2 # EnSilica eSi-32xx SoC (eSi-RISC Family)
3 # http://www.ensilica.com/risc-ip/
6 if { [info exists CHIPNAME] } {
7 set _CHIPNAME $CHIPNAME
12 if { [info exists CPUTAPID] } {
13 set _CPUTAPID $CPUTAPID
15 set _CPUTAPID 0x11234001
18 jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
20 set _TARGETNAME $_CHIPNAME.cpu
21 target create $_TARGETNAME esirisc -chain-position $_CHIPNAME.cpu
23 # Targets with the UNIFIED_ADDRESS_SPACE option disabled should set
24 # CACHEARCH to 'harvard'. By default, 'von_neumann' is assumed.
25 if { [info exists CACHEARCH] } {
26 $_TARGETNAME esirisc cache_arch $CACHEARCH
33 # The default linker scripts provided by the eSi-RISC toolchain do not
34 # specify attributes on memory regions, which results in incorrect
35 # application of software breakpoints by GDB.
36 gdb_breakpoint_override hard