1 # SPDX-License-Identifier: GPL-2.0-or-later
4 # EnSilica eSi-32xx SoC (eSi-RISC Family)
5 # http://www.ensilica.com/risc-ip/
8 if { [info exists CHIPNAME] } {
9 set _CHIPNAME $CHIPNAME
14 if { [info exists CPUTAPID] } {
15 set _CPUTAPID $CPUTAPID
17 set _CPUTAPID 0x11234001
20 jtag newtap $_CHIPNAME cpu -irlen 4 -expected-id $_CPUTAPID
22 set _TARGETNAME $_CHIPNAME.cpu
23 target create $_TARGETNAME esirisc -chain-position $_CHIPNAME.cpu
25 # Targets with the UNIFIED_ADDRESS_SPACE option disabled should set
26 # CACHEARCH to 'harvard'. By default, 'von_neumann' is assumed.
27 if { [info exists CACHEARCH] } {
28 $_TARGETNAME esirisc cache_arch $CACHEARCH
35 # The default linker scripts provided by the eSi-RISC toolchain do not
36 # specify attributes on memory regions, which results in incorrect
37 # application of software breakpoints by GDB.
38 gdb breakpoint_override hard