src/jtag/drivers/mpsse: Add support for new FTDI chip types.
[openocd.git] / src / jtag / drivers / mpsse.h
blobe92a9bb56fc4fb1f1f1102bc74b6666fc0368132
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 /**************************************************************************
4 * Copyright (C) 2012 by Andreas Fritiofson *
5 * andreas.fritiofson@gmail.com *
6 ***************************************************************************/
8 #ifndef OPENOCD_JTAG_DRIVERS_MPSSE_H
9 #define OPENOCD_JTAG_DRIVERS_MPSSE_H
11 #include <stdbool.h>
12 #include "helper/binarybuffer.h"
14 /* Mode flags */
15 #define POS_EDGE_OUT 0x00
16 #define NEG_EDGE_OUT 0x01
17 #define POS_EDGE_IN 0x00
18 #define NEG_EDGE_IN 0x04
19 #define MSB_FIRST 0x00
20 #define LSB_FIRST 0x08
22 enum ftdi_chip_type {
23 TYPE_FT2232C,
24 TYPE_FT2232H,
25 TYPE_FT4232H,
26 TYPE_FT232H,
27 TYPE_FT2233HP,
28 TYPE_FT4233HP,
29 TYPE_FT2232HP,
30 TYPE_FT4232HP,
31 TYPE_FT233HP,
32 TYPE_FT232HP,
35 struct mpsse_ctx;
37 /* Device handling */
38 struct mpsse_ctx *mpsse_open(const uint16_t *vid, const uint16_t *pid, const char *description,
39 const char *serial, const char *location, int channel);
40 void mpsse_close(struct mpsse_ctx *ctx);
41 bool mpsse_is_high_speed(struct mpsse_ctx *ctx);
43 /* Command queuing. These correspond to the MPSSE commands with the same names, but no need to care
44 * about bit/byte transfer or data length limitation. Read data is guaranteed to be available only
45 * after the following mpsse_flush(). */
46 void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
47 unsigned length, uint8_t mode);
48 void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_offset, unsigned length,
49 uint8_t mode);
50 void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in,
51 unsigned in_offset, unsigned length, uint8_t mode);
52 void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
53 unsigned length, bool tdi, uint8_t mode);
54 void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in,
55 unsigned in_offset, unsigned length, bool tdi, uint8_t mode);
56 void mpsse_set_data_bits_low_byte(struct mpsse_ctx *ctx, uint8_t data, uint8_t dir);
57 void mpsse_set_data_bits_high_byte(struct mpsse_ctx *ctx, uint8_t data, uint8_t dir);
58 void mpsse_read_data_bits_low_byte(struct mpsse_ctx *ctx, uint8_t *data);
59 void mpsse_read_data_bits_high_byte(struct mpsse_ctx *ctx, uint8_t *data);
60 void mpsse_loopback_config(struct mpsse_ctx *ctx, bool enable);
61 void mpsse_set_divisor(struct mpsse_ctx *ctx, uint16_t divisor);
62 int mpsse_divide_by_5_config(struct mpsse_ctx *ctx, bool enable);
63 int mpsse_rtck_config(struct mpsse_ctx *ctx, bool enable);
65 /* Helper to set frequency in Hertz. Returns actual realizable frequency or negative error.
66 * Frequency 0 means RTCK. */
67 int mpsse_set_frequency(struct mpsse_ctx *ctx, int frequency);
69 /* Queue handling */
70 int mpsse_flush(struct mpsse_ctx *ctx);
71 void mpsse_purge(struct mpsse_ctx *ctx);
73 #endif /* OPENOCD_JTAG_DRIVERS_MPSSE_H */