src/jtag/drivers/mpsse.h

   1 /* SPDX-License-Identifier: GPL-2.0-or-later */
   2
   3 /**************************************************************************
   4  *   Copyright (C) 2012 by Andreas Fritiofson                              *
   5  *   andreas.fritiofson@gmail.com                                          *
   6  ***************************************************************************/
   7
   8 #ifndef OPENOCD_JTAG_DRIVERS_MPSSE_H
   9 #define OPENOCD_JTAG_DRIVERS_MPSSE_H
  10
  11 #include <stdbool.h>
  12 #include "helper/binarybuffer.h"
  13
  14 /* Mode flags */
  15 #define POS_EDGE_OUT 0x00
  16 #define NEG_EDGE_OUT 0x01
  17 #define POS_EDGE_IN 0x00
  18 #define NEG_EDGE_IN 0x04
  19 #define MSB_FIRST 0x00
  20 #define LSB_FIRST 0x08
  21
  22 enum ftdi_chip_type {
  23         TYPE_FT2232C,
  24         TYPE_FT2232H,
  25         TYPE_FT4232H,
  26         TYPE_FT232H,
  27         TYPE_FT2233HP,
  28         TYPE_FT4233HP,
  29         TYPE_FT2232HP,
  30         TYPE_FT4232HP,
  31         TYPE_FT233HP,
  32         TYPE_FT232HP,
  33         TYPE_FT4232HA,
  34 };
  35
  36 struct mpsse_ctx;
  37
  38 /* Device handling */
  39 struct mpsse_ctx *mpsse_open(const uint16_t *vid, const uint16_t *pid, const char *description,
  40         const char *serial, const char *location, int channel);
  41 void mpsse_close(struct mpsse_ctx *ctx);
  42 bool mpsse_is_high_speed(struct mpsse_ctx *ctx);
  43
  44 /* Command queuing. These correspond to the MPSSE commands with the same names, but no need to care
  45  * about bit/byte transfer or data length limitation. Read data is guaranteed to be available only
  46  * after the following mpsse_flush(). */
  47 void mpsse_clock_data_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
  48                          unsigned length, uint8_t mode);
  49 void mpsse_clock_data_in(struct mpsse_ctx *ctx, uint8_t *in, unsigned in_offset, unsigned length,
  50                         uint8_t mode);
  51 void mpsse_clock_data(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in,
  52                      unsigned in_offset, unsigned length, uint8_t mode);
  53 void mpsse_clock_tms_cs_out(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset,
  54                            unsigned length, bool tdi, uint8_t mode);
  55 void mpsse_clock_tms_cs(struct mpsse_ctx *ctx, const uint8_t *out, unsigned out_offset, uint8_t *in,
  56                        unsigned in_offset, unsigned length, bool tdi, uint8_t mode);
  57 void mpsse_set_data_bits_low_byte(struct mpsse_ctx *ctx, uint8_t data, uint8_t dir);
  58 void mpsse_set_data_bits_high_byte(struct mpsse_ctx *ctx, uint8_t data, uint8_t dir);
  59 void mpsse_read_data_bits_low_byte(struct mpsse_ctx *ctx, uint8_t *data);
  60 void mpsse_read_data_bits_high_byte(struct mpsse_ctx *ctx, uint8_t *data);
  61 void mpsse_loopback_config(struct mpsse_ctx *ctx, bool enable);
  62 void mpsse_set_divisor(struct mpsse_ctx *ctx, uint16_t divisor);
  63 int mpsse_divide_by_5_config(struct mpsse_ctx *ctx, bool enable);
  64 int mpsse_rtck_config(struct mpsse_ctx *ctx, bool enable);
  65
  66 /* Helper to set frequency in Hertz. Returns actual realizable frequency or negative error.
  67  * Frequency 0 means RTCK. */
  68 int mpsse_set_frequency(struct mpsse_ctx *ctx, int frequency);
  69
  70 /* Queue handling */
  71 int mpsse_flush(struct mpsse_ctx *ctx);
  72 void mpsse_purge(struct mpsse_ctx *ctx);
  73
  74 #endif /* OPENOCD_JTAG_DRIVERS_MPSSE_H */