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Merge from mainline (160224:163495).
[official-gcc/graphite-test-results.git] / gcc / config / rx / rx.h
blobb3a12690b08a52c7dc350c0519235dce8fbcfbe8
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 builtin_assert ("machine=RX610"); \
29 else \
30 builtin_assert ("machine=RX600"); \
31 \
32 if (TARGET_BIG_ENDIAN_DATA) \
33 builtin_define ("__RX_BIG_ENDIAN__"); \
34 else \
35 builtin_define ("__RX_LITTLE_ENDIAN__");\
36 \
37 if (TARGET_64BIT_DOUBLES) \
38 builtin_define ("__RX_64BIT_DOUBLES__");\
39 else \
40 builtin_define ("__RX_32BIT_DOUBLES__");\
41 \
42 if (ALLOW_RX_FPU_INSNS) \
43 builtin_define ("__RX_FPU_INSNS__"); \
44 \
45 if (TARGET_AS100_SYNTAX) \
46 builtin_define ("__RX_AS100_SYNTAX__"); \
47 else \
48 builtin_define ("__RX_GAS_SYNTAX__"); \
49 } \
50 while (0)
51
52 enum rx_cpu_types
53 {
54 RX600,
55 RX610,
56 RX200
57 };
58
59 extern enum rx_cpu_types rx_cpu_type;
60
61 #undef CC1_SPEC
62 #define CC1_SPEC "\
63 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
64 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
65
66 #undef STARTFILE_SPEC
67 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
68
69 #undef ENDFILE_SPEC
70 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
71
72 #undef ASM_SPEC
73 #define ASM_SPEC "\
74 %{mbig-endian-data:-mbig-endian-data} \
75 %{m64bit-doubles:-m64bit-doubles} \
76 %{!m64bit-doubles:-m32bit-doubles} \
77 %{msmall-data-limit*:-msmall-data-limit} \
78 %{mrelax:-relax} \
79 "
80
81 #undef LIB_SPEC
82 #define LIB_SPEC " \
83 --start-group \
84 -lc \
85 %{msim*:-lsim}%{!msim*:-lnosys} \
86 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
87 --end-group \
88 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
89 "
90
91 #undef LINK_SPEC
92 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
93 \f
94
95 #define BITS_BIG_ENDIAN 0
96 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
97 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
98
99 #ifdef __RX_BIG_ENDIAN__
100 #define LIBGCC2_WORDS_BIG_ENDIAN 1
101 #else
102 #define LIBGCC2_WORDS_BIG_ENDIAN 0
103 #endif
104
105 #define UNITS_PER_WORD 4
106
107 #define INT_TYPE_SIZE 32
108 #define LONG_TYPE_SIZE 32
109 #define LONG_LONG_TYPE_SIZE 64
110
111 #define FLOAT_TYPE_SIZE 32
112 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
113 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
114
115 #ifdef __RX_32BIT_DOUBLES__
116 #define LIBGCC2_HAS_DF_MODE 0
117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
118 #define LIBGCC2_DOUBLE_TYPE_SIZE 32
119 #else
120 #define LIBGCC2_HAS_DF_MODE 1
121 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
122 #define LIBGCC2_DOUBLE_TYPE_SIZE 64
123 #endif
124
125 #define DEFAULT_SIGNED_CHAR 0
126
127 #define STRICT_ALIGNMENT 1
128 #define FUNCTION_BOUNDARY 8
129 #define BIGGEST_ALIGNMENT 32
130 #define STACK_BOUNDARY 32
131 #define PARM_BOUNDARY 8
132
133 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32
134
135 #define STACK_GROWS_DOWNWARD 1
136 #define FRAME_GROWS_DOWNWARD 0
137 #define FIRST_PARM_OFFSET(FNDECL) 0
138
139 #define MAX_REGS_PER_ADDRESS 2
140
141 #define Pmode SImode
142 #define POINTER_SIZE 32
143 #undef SIZE_TYPE
144 #define SIZE_TYPE "long unsigned int"
145 #undef PTRDIFF_TYPE
146 #define PTRDIFF_TYPE "long int"
147 #define POINTERS_EXTEND_UNSIGNED 1
148 #define FUNCTION_MODE QImode
149 #define CASE_VECTOR_MODE Pmode
150 #define WORD_REGISTER_OPERATIONS 1
151 #define HAS_LONG_COND_BRANCH 0
152 #define HAS_LONG_UNCOND_BRANCH 0
153
154 #define MOVE_MAX 4
155 #define STARTING_FRAME_OFFSET 0
156
157 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
158
159 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
160
161 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
162
163 #define HAVE_PRE_DECCREMENT 1
164 #define HAVE_POST_INCREMENT 1
165
166 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
167 #define SLOW_BYTE_ACCESS 1
168
169 #define STORE_FLAG_VALUE 1
170 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
171 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
172 \f
173 enum reg_class
174 {
175 NO_REGS, /* No registers in set. */
176 GR_REGS, /* Integer registers. */
177 ALL_REGS, /* All registers. */
178 LIM_REG_CLASSES /* Max value + 1. */
179 };
180
181 #define REG_CLASS_NAMES \
182 { \
183 "NO_REGS", \
184 "GR_REGS", \
185 "ALL_REGS" \
186 }
187
188 #define REG_CLASS_CONTENTS \
189 { \
190 { 0x00000000 }, /* No registers, */ \
191 { 0x0000ffff }, /* Integer registers. */ \
192 { 0x0000ffff } /* All registers. */ \
193 }
194
195 #define IRA_COVER_CLASSES \
196 { \
197 GR_REGS, LIM_REG_CLASSES \
198 }
199
200 #define SMALL_REGISTER_CLASSES 0
201 #define N_REG_CLASSES (int) LIM_REG_CLASSES
202 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
203 + UNITS_PER_WORD - 1) \
204 / UNITS_PER_WORD)
205
206 #define GENERAL_REGS GR_REGS
207 #define BASE_REG_CLASS GR_REGS
208 #define INDEX_REG_CLASS GR_REGS
209
210 #define FIRST_PSEUDO_REGISTER 17
211
212 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
213 ? GR_REGS : NO_REGS)
214
215 #define STACK_POINTER_REGNUM 0
216 #define FUNC_RETURN_REGNUM 1
217 #define FRAME_POINTER_REGNUM 6
218 #define ARG_POINTER_REGNUM 7
219 #define STATIC_CHAIN_REGNUM 8
220 #define TRAMPOLINE_TEMP_REGNUM 9
221 #define STRUCT_VAL_REGNUM 15
222 #define CC_REGNUM 16
223
224 /* This is the register which is used to hold the address of the start
225 of the small data area, if that feature is being used. Note - this
226 register must not be call_used because otherwise library functions
227 that are compiled without small data support might clobber it.
228
229 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
230 built in copy of this register's name, rather than constructing the
231 name from this #define. */
232 #define GP_BASE_REGNUM 13
233
234 #define ELIMINABLE_REGS \
235 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
236 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
237 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
238
239 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
240 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
241
242
243 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
244 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
245 #define DEFAULT_PCC_STRUCT_RETURN 0
246
247 #define FIXED_REGISTERS \
248 { \
249 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1 \
250 }
251
252 #define CALL_USED_REGISTERS \
253 { \
254 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1 \
255 }
256
257 #define CONDITIONAL_REGISTER_USAGE \
258 rx_conditional_register_usage ()
259
260 #define LIBCALL_VALUE(MODE) \
261 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
262 || GET_MODE_SIZE (MODE) >= 4) \
263 ? (MODE) \
264 : SImode), \
265 FUNC_RETURN_REGNUM)
266
267 /* Order of allocation of registers. */
268
269 #define REG_ALLOC_ORDER \
270 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
271 }
272
273 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
274
275 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
276 (IN_RANGE ((REGNO), (MIN), (MAX)) \
277 || (reg_renumber != NULL \
278 && reg_renumber[(REGNO)] >= (MIN) \
279 && reg_renumber[(REGNO)] <= (MAX)))
280
281 #ifdef REG_OK_STRICT
282 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
283 #else
284 #define REGNO_OK_FOR_BASE_P(regno) 1
285 #endif
286
287 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
288
289 #define RTX_OK_FOR_BASE(X, STRICT) \
290 ((STRICT) ? \
291 ( (REG_P (X) \
292 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
293 || (GET_CODE (X) == SUBREG \
294 && REG_P (SUBREG_REG (X)) \
295 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
296 : \
297 ( (REG_P (X) \
298 || (GET_CODE (X) == SUBREG \
299 && REG_P (SUBREG_REG (X))))))
300
301 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
302 do \
303 { \
304 if (rx_is_mode_dependent_addr (ADDR)) \
305 goto LABEL; \
306 } \
307 while (0)
308 \f
309
310 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
311 ((COUNT) == 0 \
312 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
313 : NULL_RTX)
314
315 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
316
317 #define ACCUMULATE_OUTGOING_ARGS 1
318
319 typedef unsigned int CUMULATIVE_ARGS;
320
321 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
322 (CUM) = 0
323
324 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
325 rx_function_arg (& CUM, MODE, TYPE, NAMED)
326
327 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
328 (CUM) += rx_function_arg_size (MODE, TYPE)
329 \f
330 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
331 #define TRAMPOLINE_ALIGNMENT 32
332 \f
333 #define NO_PROFILE_COUNTERS 1
334 #define PROFILE_BEFORE_PROLOGUE 1
335
336 #define FUNCTION_PROFILER(FILE, LABELNO) \
337 fprintf (FILE, "\tbsr\t__mcount\n");
338 \f
339
340 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
341
342 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
343 REGNO_REG_CLASS (REGNO) == GR_REGS
344
345 #define MODES_TIEABLE_P(MODE1, MODE2) \
346 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
347 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
348 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
349 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
350 \f
351
352 #define REGISTER_NAMES \
353 { \
354 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
355 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", "cc" \
356 };
357
358 #define ADDITIONAL_REGISTER_NAMES \
359 { \
360 { "sp", STACK_POINTER_REGNUM } \
361 , { "fp", FRAME_POINTER_REGNUM } \
362 , { "arg", ARG_POINTER_REGNUM } \
363 , { "chain", STATIC_CHAIN_REGNUM } \
364 }
365
366 #define DATA_SECTION_ASM_OP \
367 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
368 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
369
370 #define SDATA_SECTION_ASM_OP \
371 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
372 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
373
374 #undef READONLY_DATA_SECTION_ASM_OP
375 #define READONLY_DATA_SECTION_ASM_OP \
376 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
377 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
378
379 #define BSS_SECTION_ASM_OP \
380 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
381 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
382
383 #define SBSS_SECTION_ASM_OP \
384 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
385 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
386
387 /* The following definitions are conditional depending upon whether the
388 compiler is being built or crtstuff.c is being compiled by the built
389 compiler. */
390 #if defined CRT_BEGIN || defined CRT_END
391 # ifdef __RX_AS100_SYNTAX
392 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
393 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
394 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
395 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
396 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
397 # else
398 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
399 # define CTORS_SECTION_ASM_OP \
400 "\t.section\t.init_array,\"aw\",@init_array"
401 # define DTORS_SECTION_ASM_OP \
402 "\t.section\t.fini_array,\"aw\",@fini_array"
403 # define INIT_ARRAY_SECTION_ASM_OP \
404 "\t.section\t.init_array,\"aw\",@init_array"
405 # define FINI_ARRAY_SECTION_ASM_OP \
406 "\t.section\t.fini_array,\"aw\",@fini_array"
407 # endif
408 #else
409 # define TEXT_SECTION_ASM_OP \
410 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
411
412 # define CTORS_SECTION_ASM_OP \
413 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
414 : "\t.section\t.init_array,\"aw\",@init_array")
415
416 # define DTORS_SECTION_ASM_OP \
417 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
418 : "\t.section\t.fini_array,\"aw\",@fini_array")
419
420 # define INIT_ARRAY_SECTION_ASM_OP \
421 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
422 : "\t.section\t.init_array,\"aw\",@init_array")
423
424 # define FINI_ARRAY_SECTION_ASM_OP \
425 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
426 : "\t.section\t.fini_array,\"aw\",@fini_array")
427 #endif
428
429 #define GLOBAL_ASM_OP \
430 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
431 #define ASM_COMMENT_START " ;"
432 #define ASM_APP_ON ""
433 #define ASM_APP_OFF ""
434 #define LOCAL_LABEL_PREFIX "L"
435 #undef USER_LABEL_PREFIX
436 #define USER_LABEL_PREFIX "_"
437
438 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
439 do \
440 { \
441 if ((LOG) == 0) \
442 break; \
443 if (TARGET_AS100_SYNTAX) \
444 { \
445 if ((LOG) >= 2) \
446 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
447 else \
448 fprintf (STREAM, "\t.ALIGN 2\n"); \
449 } \
450 else \
451 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
452 } \
453 while (0)
454
455 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
456 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
457 VALUE)
458
459 /* This is how to output an element of a case-vector that is relative.
460 Note: The local label referenced by the "3b" below is emitted by
461 the tablejump insn. */
462
463 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
464 fprintf (FILE, TARGET_AS100_SYNTAX \
465 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
466
467 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
468 do \
469 { \
470 HOST_WIDE_INT size_ = (SIZE); \
471 \
472 /* The as100 assembler does not have an equivalent of the SVR4 \
473 .size pseudo-op. */ \
474 if (TARGET_AS100_SYNTAX) \
475 break; \
476 \
477 fputs (SIZE_ASM_OP, STREAM); \
478 assemble_name (STREAM, NAME); \
479 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
480 } \
481 while (0)
482
483 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
484 do \
485 { \
486 /* The as100 assembler does not have an equivalent of the SVR4 \
487 .size pseudo-op. */ \
488 if (TARGET_AS100_SYNTAX) \
489 break; \
490 fputs (SIZE_ASM_OP, STREAM); \
491 assemble_name (STREAM, NAME); \
492 fputs (", .-", STREAM); \
493 assemble_name (STREAM, NAME); \
494 putc ('\n', STREAM); \
495 } \
496 while (0)
497
498 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
499 do \
500 { \
501 /* The as100 assembler does not have an equivalent of the SVR4 \
502 .size pseudo-op. */ \
503 if (TARGET_AS100_SYNTAX) \
504 break; \
505 fputs (TYPE_ASM_OP, STREAM); \
506 assemble_name (STREAM, NAME); \
507 fputs (", ", STREAM); \
508 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
509 putc ('\n', STREAM); \
510 } \
511 while (0)
512
513 #undef ASM_GENERATE_INTERNAL_LABEL
514 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
515 do \
516 { \
517 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
518 PREFIX, (unsigned) (NUM)); \
519 } \
520 while (0)
521
522 #undef ASM_OUTPUT_EXTERNAL
523 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
524 do \
525 { \
526 if (TARGET_AS100_SYNTAX) \
527 targetm.asm_out.globalize_label (FILE, NAME); \
528 default_elf_asm_output_external (FILE, DECL, NAME); \
529 } \
530 while (0)
531
532 #undef ASM_OUTPUT_ALIGNED_COMMON
533 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
534 do \
535 { \
536 if (TARGET_AS100_SYNTAX) \
537 { \
538 fprintf ((FILE), "\t.GLB\t"); \
539 assemble_name ((FILE), (NAME)); \
540 fprintf ((FILE), "\n"); \
541 assemble_name ((FILE), (NAME)); \
542 switch ((ALIGN) / BITS_PER_UNIT) \
543 { \
544 case 4: \
545 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
546 (SIZE) / 4); \
547 break; \
548 case 2: \
549 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
550 (SIZE) / 2); \
551 break; \
552 default: \
553 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
554 (SIZE)); \
555 break; \
556 } \
557 } \
558 else \
559 { \
560 fprintf ((FILE), "%s", COMMON_ASM_OP); \
561 assemble_name ((FILE), (NAME)); \
562 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
563 (SIZE), (ALIGN) / BITS_PER_UNIT); \
564 } \
565 } \
566 while (0)
567
568 #undef SKIP_ASM_OP
569 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
570
571 #undef ASM_OUTPUT_LIMITED_STRING
572 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
573 do \
574 { \
575 const unsigned char *_limited_str = \
576 (const unsigned char *) (STR); \
577 unsigned ch; \
578 \
579 fprintf ((FILE), TARGET_AS100_SYNTAX \
580 ? "\t.BYTE\t\"" : "\t.string\t\""); \
581 \
582 for (; (ch = *_limited_str); _limited_str++) \
583 { \
584 int escape; \
585 \
586 switch (escape = ESCAPES[ch]) \
587 { \
588 case 0: \
589 putc (ch, (FILE)); \
590 break; \
591 case 1: \
592 fprintf ((FILE), "\\%03o", ch); \
593 break; \
594 default: \
595 putc ('\\', (FILE)); \
596 putc (escape, (FILE)); \
597 break; \
598 } \
599 } \
600 \
601 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
602 } \
603 while (0)
604
605 #undef IDENT_ASM_OP
606 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
607 ? "\t.END\t; Built by: ": "\t.ident\t")
608
609 /* For PIC put jump tables into the text section so that the offsets that
610 they contain are always computed between two same-section symbols. */
611 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
612 \f
613 extern int rx_float_compare_mode;
614 \f
615 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
616 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
617
618 /* Like REG_P except that this macro is true for SET expressions. */
619 #define SET_P(rtl) (GET_CODE (rtl) == SET)
620 \f
621 #define CAN_DEBUG_WITHOUT_FP 1
622
623 /* The AS100 assembler does not support .leb128 and .uleb128, but
624 the compiler-build-time configure tests will have enabled their
625 use because GAS supports them. So default to generating STABS
626 debug information instead of DWARF2 when generating AS100
627 compatible output. */
628 #undef PREFERRED_DEBUGGING_TYPE
629 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
630 ? DBX_DEBUG : DWARF2_DEBUG)
631
632 #define INCOMING_FRAME_SP_OFFSET 4
633 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
634 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
635 \f
636 /* Translate -nofpu into -mnofpu so that it gets passed from gcc to cc1. */
637 #define TARGET_OPTION_TRANSLATE_TABLE \
638 {"-nofpu", "-mnofpu" }
639
640 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
641 rx_set_optimization_options ()
642
643 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
644
645 /* This macro is used to decide when RX FPU instructions can be used. */
646 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
647
648 #define BRANCH_COST(SPEED,PREDICT) 1
649 #define REGISTER_MOVE_COST(MODE,FROM,TO) 2
650
651 #define SELECT_CC_MODE(OP,X,Y) \
652 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CC_ZSmode : \
653 (GET_CODE (X) == PLUS || GET_CODE (X) == MINUS ? CC_ZSCmode : \
654 (GET_CODE (X) == ABS ? CC_ZSOmode : \
655 (GET_CODE (X) == AND || GET_CODE (X) == NOT || GET_CODE (X) == IOR \
656 || GET_CODE (X) == XOR || GET_CODE (X) == ROTATE \
657 || GET_CODE (X) == ROTATERT || GET_CODE (X) == ASHIFTRT \
658 || GET_CODE (X) == LSHIFTRT || GET_CODE (X) == ASHIFT ? CC_ZSmode : \
659 CCmode))))
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