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Remove outermost loop parameter.
[official-gcc/graphite-test-results.git] / gcc / config / rx / rx.h
blob8be66b53d9b18e7f8f7291a6fd23aa21e30699ff
1 /* GCC backend definitions for the Renesas RX processor.
2 Copyright (C) 2008, 2009, 2010 Free Software Foundation, Inc.
3 Contributed by Red Hat.
4
5 This file is part of GCC.
6
7 GCC is free software; you can redistribute it and/or modify it
8 under the terms of the GNU General Public License as published
9 by the Free Software Foundation; either version 3, or (at your
10 option) any later version.
11
12 GCC is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
20 \f
21
22 #define TARGET_CPU_CPP_BUILTINS() \
23 do \
24 { \
25 builtin_define ("__RX__"); \
26 builtin_assert ("cpu=RX"); \
27 if (rx_cpu_type == RX610) \
28 builtin_assert ("machine=RX610"); \
29 else \
30 builtin_assert ("machine=RX600"); \
31 \
32 if (TARGET_BIG_ENDIAN_DATA) \
33 builtin_define ("__RX_BIG_ENDIAN__"); \
34 else \
35 builtin_define ("__RX_LITTLE_ENDIAN__");\
36 \
37 if (TARGET_64BIT_DOUBLES) \
38 builtin_define ("__RX_64BIT_DOUBLES__");\
39 else \
40 builtin_define ("__RX_32BIT_DOUBLES__");\
41 \
42 if (ALLOW_RX_FPU_INSNS) \
43 builtin_define ("__RX_FPU_INSNS__"); \
44 \
45 if (TARGET_AS100_SYNTAX) \
46 builtin_define ("__RX_AS100_SYNTAX__"); \
47 else \
48 builtin_define ("__RX_GAS_SYNTAX__"); \
49 } \
50 while (0)
51
52 enum rx_cpu_types
53 {
54 RX600,
55 RX610,
56 RX200
57 };
58
59 extern enum rx_cpu_types rx_cpu_type;
60
61 #undef CC1_SPEC
62 #define CC1_SPEC "\
63 %{mas100-syntax:%{gdwarf*:%e-mas100-syntax is incompatible with -gdwarf}} \
64 %{mcpu=rx200:%{fpu:%erx200 cpu does not have FPU hardware}}"
65
66 #undef STARTFILE_SPEC
67 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:crt0.o%s} crtbegin.o%s"
68
69 #undef ENDFILE_SPEC
70 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
71
72 #undef ASM_SPEC
73 #define ASM_SPEC "\
74 %{mbig-endian-data:-mbig-endian-data} \
75 %{m64bit-doubles:-m64bit-doubles} \
76 %{!m64bit-doubles:-m32bit-doubles} \
77 %{msmall-data-limit*:-msmall-data-limit} \
78 %{mrelax:-relax} \
79 "
80
81 #undef LIB_SPEC
82 #define LIB_SPEC " \
83 --start-group \
84 -lc \
85 %{msim*:-lsim}%{!msim*:-lnosys} \
86 %{fprofile-arcs|fprofile-generate|coverage:-lgcov} \
87 --end-group \
88 %{!T*: %{msim*:%Trx-sim.ld}%{!msim*:%Trx.ld}} \
89 "
90
91 #undef LINK_SPEC
92 #define LINK_SPEC "%{mbig-endian-data:--oformat elf32-rx-be} %{mrelax:-relax}"
93 \f
94
95 #define BITS_BIG_ENDIAN 0
96 #define BYTES_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
97 #define WORDS_BIG_ENDIAN TARGET_BIG_ENDIAN_DATA
98
99 #ifdef __RX_BIG_ENDIAN__
100 #define LIBGCC2_WORDS_BIG_ENDIAN 1
101 #else
102 #define LIBGCC2_WORDS_BIG_ENDIAN 0
103 #endif
104
105 #define UNITS_PER_WORD 4
106
107 #define INT_TYPE_SIZE 32
108 #define LONG_TYPE_SIZE 32
109 #define LONG_LONG_TYPE_SIZE 64
110
111 #define FLOAT_TYPE_SIZE 32
112 #define DOUBLE_TYPE_SIZE (TARGET_64BIT_DOUBLES ? 64 : 32)
113 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE
114
115 #ifdef __RX_32BIT_DOUBLES__
116 #define LIBGCC2_HAS_DF_MODE 0
117 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 32
118 #define LIBGCC2_DOUBLE_TYPE_SIZE 32
119 #else
120 #define LIBGCC2_HAS_DF_MODE 1
121 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE 64
122 #define LIBGCC2_DOUBLE_TYPE_SIZE 64
123 #endif
124
125 #define DEFAULT_SIGNED_CHAR 0
126
127 #define STRICT_ALIGNMENT 1
128 #define FUNCTION_BOUNDARY 8
129 #define BIGGEST_ALIGNMENT 32
130 #define STACK_BOUNDARY 32
131 #define PARM_BOUNDARY 8
132
133 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) 32
134
135 #define STACK_GROWS_DOWNWARD 1
136 #define FRAME_GROWS_DOWNWARD 0
137 #define FIRST_PARM_OFFSET(FNDECL) 0
138
139 #define MAX_REGS_PER_ADDRESS 2
140
141 #define Pmode SImode
142 #define POINTER_SIZE 32
143 #undef SIZE_TYPE
144 #define SIZE_TYPE "long unsigned int"
145 #define POINTERS_EXTEND_UNSIGNED 1
146 #define FUNCTION_MODE QImode
147 #define CASE_VECTOR_MODE Pmode
148 #define WORD_REGISTER_OPERATIONS 1
149 #define HAS_LONG_COND_BRANCH 0
150 #define HAS_LONG_UNCOND_BRANCH 0
151
152 #define MOVE_MAX 4
153 #define STARTING_FRAME_OFFSET 0
154
155 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
156 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
157
158 #define LEGITIMATE_CONSTANT_P(X) rx_is_legitimate_constant (X)
159
160 #define HANDLE_PRAGMA_PACK_PUSH_POP 1
161
162 #define HAVE_PRE_DECCREMENT 1
163 #define HAVE_POST_INCREMENT 1
164
165 #define MOVE_RATIO(SPEED) ((SPEED) ? 4 : 2)
166 #define SLOW_BYTE_ACCESS 1
167
168 #define STORE_FLAG_VALUE 1
169 #define LOAD_EXTEND_OP(MODE) SIGN_EXTEND
170 #define SHORT_IMMEDIATES_SIGN_EXTEND 1
171 \f
172 enum reg_class
173 {
174 NO_REGS, /* No registers in set. */
175 GR_REGS, /* Integer registers. */
176 ALL_REGS, /* All registers. */
177 LIM_REG_CLASSES /* Max value + 1. */
178 };
179
180 #define REG_CLASS_NAMES \
181 { \
182 "NO_REGS", \
183 "GR_REGS", \
184 "ALL_REGS" \
185 }
186
187 #define REG_CLASS_CONTENTS \
188 { \
189 { 0x00000000 }, /* No registers, */ \
190 { 0x0000ffff }, /* Integer registers. */ \
191 { 0x0000ffff } /* All registers. */ \
192 }
193
194 #define IRA_COVER_CLASSES \
195 { \
196 GR_REGS, LIM_REG_CLASSES \
197 }
198
199 #define N_REG_CLASSES (int) LIM_REG_CLASSES
200 #define CLASS_MAX_NREGS(CLASS, MODE) ((GET_MODE_SIZE (MODE) \
201 + UNITS_PER_WORD - 1) \
202 / UNITS_PER_WORD)
203
204 #define GENERAL_REGS GR_REGS
205 #define BASE_REG_CLASS GR_REGS
206 #define INDEX_REG_CLASS GR_REGS
207
208 #define FIRST_PSEUDO_REGISTER 16
209
210 #define REGNO_REG_CLASS(REGNO) ((REGNO) < FIRST_PSEUDO_REGISTER \
211 ? GR_REGS : NO_REGS)
212
213 #define STACK_POINTER_REGNUM 0
214 #define FUNC_RETURN_REGNUM 1
215 #define FRAME_POINTER_REGNUM 6
216 #define ARG_POINTER_REGNUM 7
217 #define STATIC_CHAIN_REGNUM 8
218 #define TRAMPOLINE_TEMP_REGNUM 9
219 #define STRUCT_VAL_REGNUM 15
220
221 /* This is the register which is used to hold the address of the start
222 of the small data area, if that feature is being used. Note - this
223 register must not be call_used because otherwise library functions
224 that are compiled without small data support might clobber it.
225
226 FIXME: The function gcc/config/rx/rx.c:rx_gen_move_template() has a
227 built in copy of this register's name, rather than constructing the
228 name from this #define. */
229 #define GP_BASE_REGNUM 13
230
231 #define ELIMINABLE_REGS \
232 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM }, \
233 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM }, \
234 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
235
236 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
237 (OFFSET) = rx_initial_elimination_offset ((FROM), (TO))
238
239
240 #define FUNCTION_ARG_REGNO_P(N) (((N) >= 1) && ((N) <= 4))
241 #define FUNCTION_VALUE_REGNO_P(N) ((N) == FUNC_RETURN_REGNUM)
242 #define DEFAULT_PCC_STRUCT_RETURN 0
243
244 #define FIXED_REGISTERS \
245 { \
246 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 \
247 }
248
249 #define CALL_USED_REGISTERS \
250 { \
251 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \
252 }
253
254 #define CONDITIONAL_REGISTER_USAGE \
255 rx_conditional_register_usage ()
256
257 #define LIBCALL_VALUE(MODE) \
258 gen_rtx_REG (((GET_MODE_CLASS (MODE) != MODE_INT \
259 || GET_MODE_SIZE (MODE) >= 4) \
260 ? (MODE) \
261 : SImode), \
262 FUNC_RETURN_REGNUM)
263
264 /* Order of allocation of registers. */
265
266 #define REG_ALLOC_ORDER \
267 { 7, 10, 11, 12, 13, 14, 4, 3, 2, 1, 9, 8, 6, 5, 15 \
268 }
269
270 #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
271
272 #define REGNO_IN_RANGE(REGNO, MIN, MAX) \
273 (IN_RANGE ((REGNO), (MIN), (MAX)) \
274 || (reg_renumber != NULL \
275 && reg_renumber[(REGNO)] >= (MIN) \
276 && reg_renumber[(REGNO)] <= (MAX)))
277
278 #ifdef REG_OK_STRICT
279 #define REGNO_OK_FOR_BASE_P(regno) REGNO_IN_RANGE (regno, 0, 15)
280 #else
281 #define REGNO_OK_FOR_BASE_P(regno) 1
282 #endif
283
284 #define REGNO_OK_FOR_INDEX_P(regno) REGNO_OK_FOR_BASE_P (regno)
285
286 #define RTX_OK_FOR_BASE(X, STRICT) \
287 ((STRICT) ? \
288 ( (REG_P (X) \
289 && REGNO_IN_RANGE (REGNO (X), 0, 15)) \
290 || (GET_CODE (X) == SUBREG \
291 && REG_P (SUBREG_REG (X)) \
292 && REGNO_IN_RANGE (REGNO (SUBREG_REG (X)), 0, 15))) \
293 : \
294 ( (REG_P (X) \
295 || (GET_CODE (X) == SUBREG \
296 && REG_P (SUBREG_REG (X))))))
297
298 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
299 do \
300 { \
301 if (rx_is_mode_dependent_addr (ADDR)) \
302 goto LABEL; \
303 } \
304 while (0)
305 \f
306
307 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
308 ((COUNT) == 0 \
309 ? gen_rtx_MEM (Pmode, gen_rtx_PLUS (Pmode, arg_pointer_rtx, GEN_INT (-4))) \
310 : NULL_RTX)
311
312 #define INCOMING_RETURN_ADDR_RTX gen_rtx_MEM (Pmode, stack_pointer_rtx)
313
314 #define ACCUMULATE_OUTGOING_ARGS 1
315
316 typedef unsigned int CUMULATIVE_ARGS;
317
318 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
319 (CUM) = 0
320
321 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
322 rx_function_arg (& CUM, MODE, TYPE, NAMED)
323
324 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
325 (CUM) += rx_function_arg_size (MODE, TYPE)
326 \f
327 #define TRAMPOLINE_SIZE (! TARGET_BIG_ENDIAN_DATA ? 14 : 20)
328 #define TRAMPOLINE_ALIGNMENT 32
329 \f
330 #define NO_PROFILE_COUNTERS 1
331 #define PROFILE_BEFORE_PROLOGUE 1
332
333 #define FUNCTION_PROFILER(FILE, LABELNO) \
334 fprintf (FILE, "\tbsr\t__mcount\n");
335 \f
336
337 #define HARD_REGNO_NREGS(REGNO, MODE) CLASS_MAX_NREGS (0, MODE)
338
339 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
340 REGNO_REG_CLASS (REGNO) == GR_REGS
341
342 #define MODES_TIEABLE_P(MODE1, MODE2) \
343 ( ( GET_MODE_CLASS (MODE1) == MODE_FLOAT \
344 || GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT) \
345 == ( GET_MODE_CLASS (MODE2) == MODE_FLOAT \
346 || GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
347 \f
348
349 #define REGISTER_NAMES \
350 { \
351 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
352 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15" \
353 };
354
355 #define ADDITIONAL_REGISTER_NAMES \
356 { \
357 { "sp", STACK_POINTER_REGNUM } \
358 , { "fp", FRAME_POINTER_REGNUM } \
359 , { "arg", ARG_POINTER_REGNUM } \
360 , { "chain", STATIC_CHAIN_REGNUM } \
361 }
362
363 #define DATA_SECTION_ASM_OP \
364 (TARGET_AS100_SYNTAX ? "\t.SECTION D,DATA" \
365 : "\t.section D,\"aw\",@progbits\n\t.p2align 2")
366
367 #define SDATA_SECTION_ASM_OP \
368 (TARGET_AS100_SYNTAX ? "\t.SECTION D_2,DATA,ALIGN=2" \
369 : "\t.section D_2,\"aw\",@progbits\n\t.p2align 1")
370
371 #undef READONLY_DATA_SECTION_ASM_OP
372 #define READONLY_DATA_SECTION_ASM_OP \
373 (TARGET_AS100_SYNTAX ? "\t.SECTION C,ROMDATA,ALIGN=4" \
374 : "\t.section C,\"a\",@progbits\n\t.p2align 2")
375
376 #define BSS_SECTION_ASM_OP \
377 (TARGET_AS100_SYNTAX ? "\t.SECTION B,DATA,ALIGN=4" \
378 : "\t.section B,\"w\",@nobits\n\t.p2align 2")
379
380 #define SBSS_SECTION_ASM_OP \
381 (TARGET_AS100_SYNTAX ? "\t.SECTION B_2,DATA,ALIGN=2" \
382 : "\t.section B_2,\"w\",@nobits\n\t.p2align 1")
383
384 /* The following definitions are conditional depending upon whether the
385 compiler is being built or crtstuff.c is being compiled by the built
386 compiler. */
387 #if defined CRT_BEGIN || defined CRT_END
388 # ifdef __RX_AS100_SYNTAX
389 # define TEXT_SECTION_ASM_OP "\t.SECTION P,CODE"
390 # define CTORS_SECTION_ASM_OP "\t.SECTION init_array,CODE"
391 # define DTORS_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
392 # define INIT_ARRAY_SECTION_ASM_OP "\t.SECTION init_array,CODE"
393 # define FINI_ARRAY_SECTION_ASM_OP "\t.SECTION fini_array,CODE"
394 # else
395 # define TEXT_SECTION_ASM_OP "\t.section P,\"ax\""
396 # define CTORS_SECTION_ASM_OP \
397 "\t.section\t.init_array,\"aw\",@init_array"
398 # define DTORS_SECTION_ASM_OP \
399 "\t.section\t.fini_array,\"aw\",@fini_array"
400 # define INIT_ARRAY_SECTION_ASM_OP \
401 "\t.section\t.init_array,\"aw\",@init_array"
402 # define FINI_ARRAY_SECTION_ASM_OP \
403 "\t.section\t.fini_array,\"aw\",@fini_array"
404 # endif
405 #else
406 # define TEXT_SECTION_ASM_OP \
407 (TARGET_AS100_SYNTAX ? "\t.SECTION P,CODE" : "\t.section P,\"ax\"")
408
409 # define CTORS_SECTION_ASM_OP \
410 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
411 : "\t.section\t.init_array,\"aw\",@init_array")
412
413 # define DTORS_SECTION_ASM_OP \
414 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
415 : "\t.section\t.fini_array,\"aw\",@fini_array")
416
417 # define INIT_ARRAY_SECTION_ASM_OP \
418 (TARGET_AS100_SYNTAX ? "\t.SECTION init_array,CODE" \
419 : "\t.section\t.init_array,\"aw\",@init_array")
420
421 # define FINI_ARRAY_SECTION_ASM_OP \
422 (TARGET_AS100_SYNTAX ? "\t.SECTION fini_array,CODE" \
423 : "\t.section\t.fini_array,\"aw\",@fini_array")
424 #endif
425
426 #define GLOBAL_ASM_OP \
427 (TARGET_AS100_SYNTAX ? "\t.GLB\t" : "\t.global\t")
428 #define ASM_COMMENT_START " ;"
429 #define ASM_APP_ON ""
430 #define ASM_APP_OFF ""
431 #define LOCAL_LABEL_PREFIX "L"
432 #undef USER_LABEL_PREFIX
433 #define USER_LABEL_PREFIX "_"
434
435 #define ASM_OUTPUT_ALIGN(STREAM, LOG) \
436 do \
437 { \
438 if ((LOG) == 0) \
439 break; \
440 if (TARGET_AS100_SYNTAX) \
441 { \
442 if ((LOG) >= 2) \
443 fprintf (STREAM, "\t.ALIGN 4\t; %d alignment actually requested\n", 1 << (LOG)); \
444 else \
445 fprintf (STREAM, "\t.ALIGN 2\n"); \
446 } \
447 else \
448 fprintf (STREAM, "\t.balign %d\n", 1 << (LOG)); \
449 } \
450 while (0)
451
452 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
453 fprintf (FILE, TARGET_AS100_SYNTAX ? "\t.LWORD L%d\n" : "\t.long .L%d\n", \
454 VALUE)
455
456 /* This is how to output an element of a case-vector that is relative.
457 Note: The local label referenced by the "3b" below is emitted by
458 the tablejump insn. */
459
460 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
461 fprintf (FILE, TARGET_AS100_SYNTAX \
462 ? "\t.LWORD L%d - ?-\n" : "\t.long .L%d - 1b\n", VALUE)
463
464 #define ASM_OUTPUT_SIZE_DIRECTIVE(STREAM, NAME, SIZE) \
465 do \
466 { \
467 HOST_WIDE_INT size_ = (SIZE); \
468 \
469 /* The as100 assembler does not have an equivalent of the SVR4 \
470 .size pseudo-op. */ \
471 if (TARGET_AS100_SYNTAX) \
472 break; \
473 \
474 fputs (SIZE_ASM_OP, STREAM); \
475 assemble_name (STREAM, NAME); \
476 fprintf (STREAM, ", " HOST_WIDE_INT_PRINT_DEC "\n", size_); \
477 } \
478 while (0)
479
480 #define ASM_OUTPUT_MEASURED_SIZE(STREAM, NAME) \
481 do \
482 { \
483 /* The as100 assembler does not have an equivalent of the SVR4 \
484 .size pseudo-op. */ \
485 if (TARGET_AS100_SYNTAX) \
486 break; \
487 fputs (SIZE_ASM_OP, STREAM); \
488 assemble_name (STREAM, NAME); \
489 fputs (", .-", STREAM); \
490 assemble_name (STREAM, NAME); \
491 putc ('\n', STREAM); \
492 } \
493 while (0)
494
495 #define ASM_OUTPUT_TYPE_DIRECTIVE(STREAM, NAME, TYPE) \
496 do \
497 { \
498 /* The as100 assembler does not have an equivalent of the SVR4 \
499 .size pseudo-op. */ \
500 if (TARGET_AS100_SYNTAX) \
501 break; \
502 fputs (TYPE_ASM_OP, STREAM); \
503 assemble_name (STREAM, NAME); \
504 fputs (", ", STREAM); \
505 fprintf (STREAM, TYPE_OPERAND_FMT, TYPE); \
506 putc ('\n', STREAM); \
507 } \
508 while (0)
509
510 #undef ASM_GENERATE_INTERNAL_LABEL
511 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \
512 do \
513 { \
514 sprintf (LABEL, TARGET_AS100_SYNTAX ? "*%s%u" : "*.%s%u", \
515 PREFIX, (unsigned) (NUM)); \
516 } \
517 while (0)
518
519 #undef ASM_OUTPUT_EXTERNAL
520 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
521 do \
522 { \
523 if (TARGET_AS100_SYNTAX) \
524 targetm.asm_out.globalize_label (FILE, NAME); \
525 default_elf_asm_output_external (FILE, DECL, NAME); \
526 } \
527 while (0)
528
529 #undef ASM_OUTPUT_ALIGNED_COMMON
530 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN) \
531 do \
532 { \
533 if (TARGET_AS100_SYNTAX) \
534 { \
535 fprintf ((FILE), "\t.GLB\t"); \
536 assemble_name ((FILE), (NAME)); \
537 fprintf ((FILE), "\n"); \
538 assemble_name ((FILE), (NAME)); \
539 switch ((ALIGN) / BITS_PER_UNIT) \
540 { \
541 case 4: \
542 fprintf ((FILE), ":\t.BLKL\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
543 (SIZE) / 4); \
544 break; \
545 case 2: \
546 fprintf ((FILE), ":\t.BLKW\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
547 (SIZE) / 2); \
548 break; \
549 default: \
550 fprintf ((FILE), ":\t.BLKB\t"HOST_WIDE_INT_PRINT_UNSIGNED"\n",\
551 (SIZE)); \
552 break; \
553 } \
554 } \
555 else \
556 { \
557 fprintf ((FILE), "%s", COMMON_ASM_OP); \
558 assemble_name ((FILE), (NAME)); \
559 fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n", \
560 (SIZE), (ALIGN) / BITS_PER_UNIT); \
561 } \
562 } \
563 while (0)
564
565 #undef SKIP_ASM_OP
566 #define SKIP_ASM_OP (TARGET_AS100_SYNTAX ? "\t.BLKB\t" : "\t.zero\t")
567
568 #undef ASM_OUTPUT_LIMITED_STRING
569 #define ASM_OUTPUT_LIMITED_STRING(FILE, STR) \
570 do \
571 { \
572 const unsigned char *_limited_str = \
573 (const unsigned char *) (STR); \
574 unsigned ch; \
575 \
576 fprintf ((FILE), TARGET_AS100_SYNTAX \
577 ? "\t.BYTE\t\"" : "\t.string\t\""); \
578 \
579 for (; (ch = *_limited_str); _limited_str++) \
580 { \
581 int escape; \
582 \
583 switch (escape = ESCAPES[ch]) \
584 { \
585 case 0: \
586 putc (ch, (FILE)); \
587 break; \
588 case 1: \
589 fprintf ((FILE), "\\%03o", ch); \
590 break; \
591 default: \
592 putc ('\\', (FILE)); \
593 putc (escape, (FILE)); \
594 break; \
595 } \
596 } \
597 \
598 fprintf ((FILE), TARGET_AS100_SYNTAX ? "\"\n\t.BYTE\t0\n" : "\"\n");\
599 } \
600 while (0)
601
602 #undef IDENT_ASM_OP
603 #define IDENT_ASM_OP (TARGET_AS100_SYNTAX \
604 ? "\t.END\t; Built by: ": "\t.ident\t")
605
606 /* For PIC put jump tables into the text section so that the offsets that
607 they contain are always computed between two same-section symbols. */
608 #define JUMP_TABLES_IN_TEXT_SECTION (flag_pic)
609 \f
610 #define PRINT_OPERAND(FILE, X, CODE) \
611 rx_print_operand (FILE, X, CODE)
612 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
613 rx_print_operand_address (FILE, ADDR)
614 \f
615 #define CC_NO_CARRY 0400
616 #define NOTICE_UPDATE_CC(EXP, INSN) rx_notice_update_cc (EXP, INSN)
617
618 extern int rx_float_compare_mode;
619 \f
620 /* This is a version of REG_P that also returns TRUE for SUBREGs. */
621 #define RX_REG_P(rtl) (REG_P (rtl) || GET_CODE (rtl) == SUBREG)
622
623 /* Like REG_P except that this macro is true for SET expressions. */
624 #define SET_P(rtl) (GET_CODE (rtl) == SET)
625 \f
626 #define CAN_DEBUG_WITHOUT_FP 1
627
628 /* The AS100 assembler does not support .leb128 and .uleb128, but
629 the compiler-build-time configure tests will have enabled their
630 use because GAS supports them. So default to generating STABS
631 debug information instead of DWARF2 when generating AS100
632 compatible output. */
633 #undef PREFERRED_DEBUGGING_TYPE
634 #define PREFERRED_DEBUGGING_TYPE (TARGET_AS100_SYNTAX \
635 ? DBX_DEBUG : DWARF2_DEBUG)
636
637 #define INCOMING_FRAME_SP_OFFSET 4
638 #define ARG_POINTER_CFA_OFFSET(FNDECL) 4
639 #define FRAME_POINTER_CFA_OFFSET(FNDECL) 4
640 \f
641 /* Translate -nofpu into -mnofpu so that it gets passed from gcc to cc1. */
642 #define TARGET_OPTION_TRANSLATE_TABLE \
643 {"-nofpu", "-mnofpu" }
644
645 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
646 rx_set_optimization_options ()
647
648 #define TARGET_USE_FPU (! TARGET_NO_USE_FPU)
649
650 /* This macro is used to decide when RX FPU instructions can be used. */
651 #define ALLOW_RX_FPU_INSNS (TARGET_USE_FPU)
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