2017-08-28 Richard Biener <rguenther@suse.de>
[official-gcc.git] / gcc / testsuite / gcc.target / powerpc / p9-extract-1.c
blobecbe0ed660d5c2111859e2fb1190bf4c34260261
1 /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
2 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
3 /* { dg-require-effective-target powerpc_p9vector_ok } */
4 /* { dg-options "-mcpu=power9 -O2" } */
6 /* Test to make sure VEXTU{B,H,W}{L,R}X is generated for various vector extract
7 operations for ISA 3.0 (-mcpu=power9). In addition, make sure that neither
8 of the the the old methods of doing vector extracts are done either by
9 explict stores to the stack or by using direct move instructions. */
11 #include <altivec.h>
13 int
14 extract_int_0 (vector int a)
16 int b = vec_extract (a, 0);
17 return b;
20 int
21 extract_int_3 (vector int a)
23 int b = vec_extract (a, 3);
24 return b;
27 unsigned int
28 extract_uint_0 (vector unsigned int a)
30 unsigned int b = vec_extract (a, 0);
31 return b;
34 unsigned int
35 extract_uint_3 (vector unsigned int a)
37 unsigned int b = vec_extract (a, 3);
38 return b;
41 short
42 extract_short_0 (vector short a)
44 short b = vec_extract (a, 0);
45 return b;
48 short
49 extract_short_7 (vector short a)
51 short b = vec_extract (a, 7);
52 return b;
55 unsigned short
56 extract_ushort_0 (vector unsigned short a)
58 unsigned short b = vec_extract (a, 0);
59 return b;
62 unsigned short
63 extract_ushort_7 (vector unsigned short a)
65 unsigned short b = vec_extract (a, 7);
66 return b;
69 signed char
70 extract_schar_0 (vector signed char a)
72 signed char b = vec_extract (a, 0);
73 return b;
76 signed char
77 extract_schar_15 (vector signed char a)
79 signed char b = vec_extract (a, 15);
80 return b;
83 unsigned char
84 extract_uchar_0 (vector unsigned char a)
86 unsigned char b = vec_extract (a, 0);
87 return b;
90 unsigned char
91 extract_uchar_15 (vector unsigned char a)
93 signed char b = vec_extract (a, 15);
94 return b;
97 /* { dg-final { scan-assembler "vextub\[lr\]x " } } */
98 /* { dg-final { scan-assembler "vextuh\[lr\]x " } } */
99 /* { dg-final { scan-assembler "vextuw\[lr\]x " } } */
100 /* { dg-final { scan-assembler "extsb " } } */
101 /* { dg-final { scan-assembler "extsh " } } */
102 /* { dg-final { scan-assembler "extsw " } } */
103 /* { dg-final { scan-assembler-not "m\[ft\]vsr" } } */
104 /* { dg-final { scan-assembler-not "stxvd2x " } } */
105 /* { dg-final { scan-assembler-not "stxv " } } */
106 /* { dg-final { scan-assembler-not "lwa " } } */
107 /* { dg-final { scan-assembler-not "lwz " } } */
108 /* { dg-final { scan-assembler-not "lha " } } */
109 /* { dg-final { scan-assembler-not "lhz " } } */