gcc/testsuite/gcc.target/powerpc/p9-extract-1.c

   1 /* { dg-do compile { target lp64 } } */
   2 /* { dg-options "-mdejagnu-cpu=power9 -mvsx -O2" } */
   3 /* { dg-require-effective-target powerpc_vsx } */
   4
   5 /* Test to make sure VEXTU{B,H,W}{L,R}X is generated for various vector extract
   6    operations for ISA 3.0 (-mcpu=power9).  In addition, make sure that neither
   7    of the old methods of doing vector extracts are done either by
   8    explict stores to the stack or by using direct move instructions.  */
   9
  10 #include <altivec.h>
  11
  12 int
  13 extract_int_0 (vector int a)
  14 {
  15   int c = 0;
  16   int b = vec_extract (a, c);
  17   return b;
  18 }
  19
  20 int
  21 extract_int_3 (vector int a)
  22 {
  23   int c = 3;
  24   int b = vec_extract (a, c);
  25   return b;
  26 }
  27
  28 unsigned int
  29 extract_uint_0 (vector unsigned int a)
  30 {
  31   int c = 0;
  32   unsigned int b = vec_extract (a, c);
  33   return b;
  34 }
  35
  36 unsigned int
  37 extract_uint_3 (vector unsigned int a)
  38 {
  39   int c = 3;
  40   unsigned int b = vec_extract (a, c);
  41   return b;
  42 }
  43
  44 short
  45 extract_short_0 (vector short a)
  46 {
  47   int c = 0;
  48   short b = vec_extract (a, c);
  49   return b;
  50 }
  51
  52 short
  53 extract_short_7 (vector short a)
  54 {
  55   int c = 7;
  56   short b = vec_extract (a, c);
  57   return b;
  58 }
  59
  60 unsigned short
  61 extract_ushort_0 (vector unsigned short a)
  62 {
  63   int c = 0;
  64   unsigned short b = vec_extract (a, c);
  65   return b;
  66 }
  67
  68 unsigned short
  69 extract_ushort_7 (vector unsigned short a)
  70 {
  71   int c = 7;
  72   unsigned short b = vec_extract (a, c);
  73   return b;
  74 }
  75
  76 signed char
  77 extract_schar_0 (vector signed char a)
  78 {
  79   int c = 0;
  80   signed char b = vec_extract (a, c);
  81   return b;
  82 }
  83
  84 signed char
  85 extract_schar_15 (vector signed char a)
  86 {
  87   int c = 15;
  88   signed char b = vec_extract (a, c);
  89   return b;
  90 }
  91
  92 unsigned char
  93 extract_uchar_0 (vector unsigned char a)
  94 {
  95   int c = 0;
  96   unsigned char b = vec_extract (a, c);
  97   return b;
  98 }
  99
 100 unsigned char
 101 extract_uchar_15 (vector unsigned char a)
 102 {
 103   int c = 15;
 104   signed char b = vec_extract (a, c);
 105   return b;
 106 }
 107
 108 unsigned char
 109 extract_bool_char_0 (vector bool char a)
 110 {
 111   int c = 0;
 112   unsigned char b = vec_extract (a, c);
 113   return b;
 114 }
 115
 116 unsigned int
 117 extract_bool_int_0 (vector bool int a)
 118 {
 119   int c = 0;
 120   unsigned int b = vec_extract (a, c);
 121   return b;
 122 }
 123
 124 unsigned short int
 125 extract_bool_short_int_0 (vector bool short int a)
 126 {
 127   int c = 0;
 128   unsigned short int b = vec_extract (a, c);
 129   return b;
 130 }
 131
 132 /* { dg-final { scan-assembler     "vextub\[lr\]x " } } */
 133 /* { dg-final { scan-assembler     "vextuh\[lr\]x " } } */
 134 /* { dg-final { scan-assembler     "vextuw\[lr\]x " } } */
 135 /* { dg-final { scan-assembler     "extsb "         } } */
 136 /* { dg-final { scan-assembler     "extsh "         } } */
 137 /* { dg-final { scan-assembler     "extsw "         } } */
 138 /* { dg-final { scan-assembler-not "m\[ft\]vsr"     } } */
 139 /* { dg-final { scan-assembler-not "stxvd2x "       } } */
 140 /* { dg-final { scan-assembler-not "stxv "          } } */
 141 /* { dg-final { scan-assembler-not "lwa "           } } */
 142 /* { dg-final { scan-assembler-not "lwz "           } } */
 143 /* { dg-final { scan-assembler-not "lha "           } } */
 144 /* { dg-final { scan-assembler-not "lhz "           } } */