RISC-V: Implement instruction patterns for ZBB extension.
[official-gcc.git] / gcc / testsuite / gcc.target / riscv / zbbw.c
blob236ddf7b58348f038c0fd1731652eae2945aab59
1 /* { dg-do compile } */
2 /* { dg-options "-march=rv64gc_zbb -mabi=lp64 -O2" } */
4 int
5 clz (int i)
7 return __builtin_clz (i);
10 int
11 ctz (int i)
13 return __builtin_ctz (i);
16 int
17 popcount (int i)
19 return __builtin_popcount (i);
23 /* { dg-final { scan-assembler-times "clzw" 1 } } */
24 /* { dg-final { scan-assembler-times "ctzw" 1 } } */
25 /* { dg-final { scan-assembler-times "cpopw" 1 } } */