gcc/testsuite/gcc.target/riscv/zbb-rol-ror-02.c

   1 /* { dg-do compile } */
   2 /* { dg-options "-march=rv32gc_zbb -mabi=ilp32 -O2" } */
   3
   4 unsigned int foo1(unsigned int rs1, unsigned int rs2)
   5 {
   6     unsigned int shamt = rs2 & (32 - 1);
   7     return (rs1 << shamt) | (rs1 >> ((32 - shamt) & (32 - 1)));
   8 }
   9 unsigned int foo2(unsigned int rs1, unsigned int rs2)
  10 {
  11     unsigned int shamt = rs2 & (32 - 1);
  12     return (rs1 >> shamt) | (rs1 << ((32 - shamt) & (32 - 1)));
  13 }
  14
  15 /* { dg-final { scan-assembler-times "rol" 2 } } */
  16 /* { dg-final { scan-assembler-times "ror" 2 } } */