gcc/config/microblaze/microblaze.h

   1 /* Definitions of target machine for GNU compiler for Xilinx MicroBlaze.
   2    Copyright (C) 2009-2017 Free Software Foundation, Inc.
   3
   4    Contributed by Michael Eager <eager@eagercon.com>.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 /* Standard GCC variables that we reference.  */
  23
  24 /* MicroBlaze external variables defined in microblaze.c.  */
  25
  26 /* Which pipeline to schedule for.  */
  27 enum pipeline_type
  28 {
  29   MICROBLAZE_PIPE_3 = 0,
  30   MICROBLAZE_PIPE_5 = 1
  31 };
  32
  33 #define MICROBLAZE_MASK_NO_UNSAFE_DELAY         0x00000001
  34
  35 /* print_operand punctuation chars */
  36 extern char microblaze_print_operand_punct[];
  37
  38 /* # bytes of data/sdata cutoff */
  39 extern int microblaze_section_threshold;
  40
  41 /* Map register # to debug register # */
  42 extern int microblaze_dbx_regno[];
  43
  44 extern int microblaze_no_unsafe_delay;
  45 extern int microblaze_has_clz;
  46 extern enum pipeline_type microblaze_pipe;
  47
  48 #define OBJECT_FORMAT_ELF
  49
  50 #if TARGET_BIG_ENDIAN_DEFAULT
  51 #define TARGET_ENDIAN_DEFAULT    0
  52 #define TARGET_ENDIAN_OPTION     "mbig-endian"
  53 #else
  54 #define TARGET_ENDIAN_DEFAULT    MASK_LITTLE_ENDIAN
  55 #define TARGET_ENDIAN_OPTION     "mlittle-endian"
  56 #endif
  57
  58 /* Default target_flags if no switches are specified  */
  59 #define TARGET_DEFAULT      (MASK_SOFT_MUL | MASK_SOFT_DIV | MASK_SOFT_FLOAT \
  60                              | TARGET_ENDIAN_DEFAULT)
  61
  62 /* Do we have CLZ?  */
  63 #define TARGET_HAS_CLZ      (TARGET_PATTERN_COMPARE && microblaze_has_clz)
  64
  65 /* The default is to support PIC.  */
  66 #define TARGET_SUPPORTS_PIC 1
  67
  68 /* The default is to not need GOT for TLS.  */
  69 #define TLS_NEEDS_GOT 0
  70
  71 /* What is the default setting for -mcpu= . We set it to v4.00.a even though
  72    we are actually ahead. This is safest version that has generate code
  73    compatible for the original ISA */
  74 #define MICROBLAZE_DEFAULT_CPU      "v4.00.a"
  75
  76 /* Macros to decide whether certain features are available or not,
  77    depending on the instruction set architecture level.  */
  78
  79 #define DRIVER_SELF_SPECS                               \
  80         "%{mxl-soft-mul:%<mno-xl-soft-mul}",            \
  81         "%{mno-xl-barrel-shift:%<mxl-barrel-shift}",    \
  82         "%{mno-xl-pattern-compare:%<mxl-pattern-compare}", \
  83         "%{mxl-soft-div:%<mno-xl-soft-div}",            \
  84         "%{mxl-reorder:%<mno-xl-reorder}",              \
  85         "%{msoft-float:%<mhard-float}"
  86
  87 /* Tell collect what flags to pass to nm.  */
  88 #ifndef NM_FLAGS
  89 #define NM_FLAGS "-Bn"
  90 #endif
  91
  92 /* Names to predefine in the preprocessor for this target machine.  */
  93 #define TARGET_CPU_CPP_BUILTINS() microblaze_cpp_define (pfile)
  94
  95 /* Assembler specs.  */
  96
  97 #define TARGET_ASM_SPEC ""
  98
  99 #define ASM_SPEC "\
 100 %(target_asm_spec) \
 101 %{mbig-endian:-EB} \
 102 %{mlittle-endian:-EL}"
 103
 104 /* Extra switches sometimes passed to the linker.  */
 105 /* -xl-mode-xmdstub translated to -Zxl-mode-xmdstub -- deprecated.  */
 106
 107 #define LINK_SPEC "%{shared:-shared} -N -relax \
 108   %{mbig-endian:-EB --oformat=elf32-microblaze} \
 109   %{mlittle-endian:-EL --oformat=elf32-microblazeel} \
 110   %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
 111   %{mxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
 112   %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0} \
 113   %{!T*: -dT xilinx.ld%s}"
 114
 115 /* Specs for the compiler proper  */
 116
 117 #ifndef CC1_SPEC
 118 #define CC1_SPEC " \
 119 %{G*} \
 120 %(subtarget_cc1_spec) \
 121 %{mxl-multiply-high:-mcpu=v6.00.a} \
 122 "
 123 #endif
 124
 125 #define EXTRA_SPECS                                                     \
 126   { "target_asm_spec", TARGET_ASM_SPEC },                               \
 127   SUBTARGET_EXTRA_SPECS
 128
 129 /* Local compiler-generated symbols must have a prefix that the assembler
 130    understands.   */
 131
 132 #ifndef LOCAL_LABEL_PREFIX
 133 #define LOCAL_LABEL_PREFIX      "$"
 134 #endif
 135
 136 /* fixed registers.  */
 137 #define MB_ABI_BASE_REGNUM                   0
 138 #define MB_ABI_STACK_POINTER_REGNUM          1
 139 #define MB_ABI_GPRO_REGNUM                   2
 140 #define MB_ABI_GPRW_REGNUM                  13
 141 #define MB_ABI_INTR_RETURN_ADDR_REGNUM      14
 142 #define MB_ABI_SUB_RETURN_ADDR_REGNUM       15
 143 #define MB_ABI_DEBUG_RETURN_ADDR_REGNUM     16
 144 #define MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM 17
 145 #define MB_ABI_ASM_TEMP_REGNUM              18
 146 /* This is our temp register.  */
 147 #define MB_ABI_FRAME_POINTER_REGNUM         19
 148 #define MB_ABI_PIC_ADDR_REGNUM              20
 149 #define MB_ABI_PIC_FUNC_REGNUM              21
 150 /* Volatile registers.  */
 151 #define MB_ABI_INT_RETURN_VAL_REGNUM         3
 152 #define MB_ABI_INT_RETURN_VAL2_REGNUM        4
 153 #define MB_ABI_FIRST_ARG_REGNUM              5
 154 #define MB_ABI_LAST_ARG_REGNUM              10
 155 #define MB_ABI_MAX_ARG_REGS                 (MB_ABI_LAST_ARG_REGNUM     \
 156                                              - MB_ABI_FIRST_ARG_REGNUM + 1)
 157 #define MB_ABI_STATIC_CHAIN_REGNUM           3
 158 #define MB_ABI_TEMP1_REGNUM                 11
 159 #define MB_ABI_TEMP2_REGNUM                 12
 160 #define MB_ABI_MSR_SAVE_REG                 11
 161 /* Volatile register used to save MSR in interrupt handlers.  */
 162
 163
 164 /* Debug stuff.  */
 165
 166 /* How to renumber registers for dbx and gdb.  */
 167 #define DBX_REGISTER_NUMBER(REGNO) microblaze_dbx_regno[(REGNO)]
 168
 169 /* Generate DWARF exception handling info.  */
 170 #define DWARF2_UNWIND_INFO 1
 171
 172 /* Don't generate .loc operations.  */
 173 #define DWARF2_ASM_LINE_DEBUG_INFO 0
 174
 175 /* The DWARF 2 CFA column which tracks the return address.  */
 176 #define DWARF_FRAME_RETURN_COLUMN \
 177         (GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
 178
 179 /* Initial state of return address on entry to func = R15.
 180    Actually, the RA is at R15+8, but gcc doesn't know how
 181    to generate this.
 182    NOTE:  GDB has a workaround and expects this incorrect value.
 183    If this is fixed, a corresponding fix to GDB is needed.  */
 184 #define INCOMING_RETURN_ADDR_RTX                        \
 185   gen_rtx_REG (Pmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
 186
 187 /* Specifies the offset from INCOMING_RETURN_ADDR_RTX and the actual return PC.  */
 188 #define RETURN_ADDR_OFFSET (8)
 189
 190 /* Describe how we implement __builtin_eh_return.  */
 191 #define EH_RETURN_DATA_REGNO(N)                                 \
 192   (((N) < 2) ? MB_ABI_FIRST_ARG_REGNUM + (N) : INVALID_REGNUM)
 193
 194 #define MB_EH_STACKADJ_REGNUM  MB_ABI_INT_RETURN_VAL2_REGNUM
 195 #define EH_RETURN_STACKADJ_RTX  gen_rtx_REG (Pmode, MB_EH_STACKADJ_REGNUM)
 196
 197 /* Select a format to encode pointers in exception handling data.  CODE
 198    is 0 for data, 1 for code labels, 2 for function pointers.  GLOBAL is
 199    true if the symbol may be affected by dynamic relocations.  */
 200 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) \
 201   ((flag_pic || GLOBAL) ? DW_EH_PE_aligned : DW_EH_PE_absptr)
 202
 203 /* Use DWARF 2 debugging information by default.  */
 204 #define DWARF2_DEBUGGING_INFO
 205 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 206
 207 /* Target machine storage layout */
 208
 209 #define BITS_BIG_ENDIAN 0
 210 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
 211 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
 212 #define BITS_PER_WORD           32
 213 #define UNITS_PER_WORD          4
 214 #define MIN_UNITS_PER_WORD      4
 215 #define INT_TYPE_SIZE           32
 216 #define SHORT_TYPE_SIZE         16
 217 #define LONG_TYPE_SIZE          32
 218 #define LONG_LONG_TYPE_SIZE     64
 219 #define FLOAT_TYPE_SIZE         32
 220 #define DOUBLE_TYPE_SIZE        64
 221 #define LONG_DOUBLE_TYPE_SIZE   64
 222 #define POINTER_SIZE            32
 223 #define PARM_BOUNDARY           32
 224 #define FUNCTION_BOUNDARY       32
 225 #define EMPTY_FIELD_BOUNDARY    32
 226 #define STRUCTURE_SIZE_BOUNDARY 8
 227 #define BIGGEST_ALIGNMENT       32
 228 #define STRICT_ALIGNMENT        1
 229 #define PCC_BITFIELD_TYPE_MATTERS 1
 230
 231 #undef SIZE_TYPE
 232 #define SIZE_TYPE "unsigned int"
 233
 234 #undef PTRDIFF_TYPE
 235 #define PTRDIFF_TYPE "int"
 236
 237 #define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \
 238   ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \
 239    && (ALIGN) < BITS_PER_WORD                                           \
 240         ? BITS_PER_WORD                                                 \
 241         : (ALIGN))
 242
 243 #define DATA_ALIGNMENT(TYPE, ALIGN)                                     \
 244   ((((ALIGN) < BITS_PER_WORD)                                           \
 245     && (TREE_CODE (TYPE) == ARRAY_TYPE                                  \
 246         || TREE_CODE (TYPE) == UNION_TYPE                               \
 247         || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
 248
 249 #define LOCAL_ALIGNMENT(TYPE, ALIGN)                                    \
 250     (((TREE_CODE (TYPE) == ARRAY_TYPE                                   \
 251        && TYPE_MODE (TREE_TYPE (TYPE)) == QImode)                       \
 252      && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
 253
 254 #define WORD_REGISTER_OPERATIONS 1
 255
 256 #define LOAD_EXTEND_OP(MODE)  ZERO_EXTEND
 257
 258 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
 259   if (GET_MODE_CLASS (MODE) == MODE_INT         \
 260       && GET_MODE_SIZE (MODE) < 4)              \
 261     (MODE) = SImode;
 262
 263 /* Standard register usage.  */
 264
 265 /* On the MicroBlaze, we have 32 integer registers */
 266
 267 #define FIRST_PSEUDO_REGISTER 36
 268
 269 #define FIXED_REGISTERS                                                 \
 270 {                                                                       \
 271   1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,                       \
 272   1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 273   1, 1, 1, 1                                                            \
 274 }
 275
 276 #define CALL_USED_REGISTERS                                             \
 277 {                                                                       \
 278   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,                       \
 279   1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 280   1, 1, 1, 1                                                            \
 281 }
 282 #define GP_REG_FIRST    0
 283 #define GP_REG_LAST     31
 284 #define GP_REG_NUM      (GP_REG_LAST - GP_REG_FIRST + 1)
 285 #define GP_DBX_FIRST    0
 286
 287 #define ST_REG          32
 288 #define AP_REG_NUM      33
 289 #define RAP_REG_NUM     34
 290 #define FRP_REG_NUM     35
 291
 292 #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
 293 #define ST_REG_P(REGNO) ((REGNO) == ST_REG)
 294
 295 #define HARD_REGNO_NREGS(REGNO, MODE)                                   \
 296         ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 297
 298 #define STACK_POINTER_REGNUM   (GP_REG_FIRST + MB_ABI_STACK_POINTER_REGNUM)
 299
 300 #define STACK_POINTER_OFFSET   FIRST_PARM_OFFSET(FNDECL)
 301
 302 /* Base register for access to local variables of the function.  We
 303    pretend that the frame pointer is
 304    MB_ABI_INTR_RETURN_ADDR_REGNUM, and then eliminate it
 305    to HARD_FRAME_POINTER_REGNUM.  We can get away with this because
 306    rMB_ABI_INTR_RETUREN_ADDR_REGNUM is a fixed
 307    register(return address for interrupt), and will not be used for
 308    anything else.  */
 309
 310 #define FRAME_POINTER_REGNUM            FRP_REG_NUM
 311 #define HARD_FRAME_POINTER_REGNUM       \
 312         (GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM)
 313 #define ARG_POINTER_REGNUM              AP_REG_NUM
 314 #define RETURN_ADDRESS_POINTER_REGNUM   RAP_REG_NUM
 315 #define STATIC_CHAIN_REGNUM             \
 316         (GP_REG_FIRST + MB_ABI_STATIC_CHAIN_REGNUM)
 317
 318 /* registers used in prologue/epilogue code when the stack frame
 319    is larger than 32K bytes.  These registers must come from the
 320    scratch register set, and not used for passing and returning
 321    arguments and any other information used in the calling sequence
 322    (such as pic).  */
 323
 324 #define MICROBLAZE_TEMP1_REGNUM         \
 325         (GP_REG_FIRST + MB_ABI_TEMP1_REGNUM)
 326
 327 #define MICROBLAZE_TEMP2_REGNUM         \
 328         (GP_REG_FIRST + MB_ABI_TEMP2_REGNUM)
 329
 330 #define NO_FUNCTION_CSE                 1
 331
 332 #define PIC_OFFSET_TABLE_REGNUM   (GP_REG_FIRST + MB_ABI_PIC_ADDR_REGNUM)
 333
 334 enum reg_class
 335 {
 336   NO_REGS,                      /* no registers in set.  */
 337   GR_REGS,                      /* integer registers.  */
 338   ST_REGS,                      /* status register.  */
 339   ALL_REGS,                     /* all registers.  */
 340   LIM_REG_CLASSES               /* max value + 1.  */
 341 };
 342
 343 #define N_REG_CLASSES           (int) LIM_REG_CLASSES
 344
 345 #define GENERAL_REGS            GR_REGS
 346
 347 #define REG_CLASS_NAMES                                                 \
 348 {                                                                       \
 349   "NO_REGS",                                                            \
 350   "GR_REGS",                                                            \
 351   "ST_REGS",                                                            \
 352   "ALL_REGS"                                                            \
 353 }
 354
 355 #define REG_CLASS_CONTENTS                                              \
 356 {                                                                       \
 357   { 0x00000000, 0x00000000 },           /* no registers.  */            \
 358   { 0xffffffff, 0x00000000 },           /* integer registers.  */       \
 359   { 0x00000000, 0x00000001 },           /* status registers.  */        \
 360   { 0xffffffff, 0x0000000f }            /* all registers.  */           \
 361 }
 362
 363 extern enum reg_class microblaze_regno_to_class[];
 364
 365 #define REGNO_REG_CLASS(REGNO)          microblaze_regno_to_class[ (REGNO) ]
 366
 367 #define BASE_REG_CLASS                  GR_REGS
 368
 369 #define INDEX_REG_CLASS                 GR_REGS
 370
 371 #define GR_REG_CLASS_P(CLASS)           ((CLASS) == GR_REGS)
 372
 373 /* REGISTER AND CONSTANT CLASSES */
 374
 375 #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
 376 #define LARGE_INT(X) \
 377   (INTVAL (X) > 0 && UINTVAL (X) >= 0x80000000 && UINTVAL (X) <= 0xffffffff)
 378 #define PLT_ADDR_P(X) (GET_CODE (X) == UNSPEC && XINT (X,1) == UNSPEC_PLT)
 379 /* Test for a valid operand for a call instruction.
 380    Don't allow the arg pointer register or virtual regs
 381    since they may change into reg + const, which the patterns
 382    can't handle yet.  */
 383 #define CALL_INSN_OP(X) (CONSTANT_ADDRESS_P (X) \
 384                          || (GET_CODE (X) == REG && X != arg_pointer_rtx\
 385                              && ! (REGNO (X) >= FIRST_PSEUDO_REGISTER   \
 386                              && REGNO (X) <= LAST_VIRTUAL_REGISTER)))
 387
 388 /* True if VALUE is a signed 16-bit number.  */
 389 #define SMALL_OPERAND(VALUE)                                            \
 390   ((unsigned HOST_WIDE_INT) (VALUE) + 0x8000 < 0x10000)
 391
 392 /* Constant which cannot be loaded in one instruction.  */
 393 #define LARGE_OPERAND(VALUE)                                            \
 394   ((((VALUE) & ~0x0000ffff) != 0)                                       \
 395    && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)                          \
 396    && (((VALUE) & 0x0000ffff) != 0                                      \
 397        || (((VALUE) & ~2147483647) != 0                                 \
 398            && ((VALUE) & ~2147483647) != ~2147483647)))
 399
 400 #define PREFERRED_RELOAD_CLASS(X,CLASS)                                 \
 401   ((CLASS) != ALL_REGS                                                  \
 402    ? (CLASS)                                                    \
 403    : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT                      \
 404        || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT)          \
 405       ? (GR_REGS)                       \
 406       : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT                     \
 407           || GET_MODE (X) == VOIDmode)                                  \
 408          ? (GR_REGS) : (CLASS))))
 409
 410 /* Stack layout; function entry, exit and calling.  */
 411
 412 #define STACK_GROWS_DOWNWARD 1
 413
 414 /* Changed the starting frame offset to including the new link stuff */
 415 #define STARTING_FRAME_OFFSET                                           \
 416    (crtl->outgoing_args_size + FIRST_PARM_OFFSET(FNDECL))
 417
 418 /* The return address for the current frame is in r31 if this is a leaf
 419    function.  Otherwise, it is on the stack.  It is at a variable offset
 420    from sp/fp/ap, so we define a fake hard register rap which is a
 421    poiner to the return address on the stack.  This always gets eliminated
 422    during reload to be either the frame pointer or the stack pointer plus
 423    an offset.  */
 424
 425 #define RETURN_ADDR_RTX(count, frame)                   \
 426   microblaze_return_addr(count,frame)
 427
 428 extern struct microblaze_frame_info current_frame_info;
 429
 430 #define ELIMINABLE_REGS                                                 \
 431 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \
 432  { ARG_POINTER_REGNUM,   GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM},   \
 433  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 434  { RETURN_ADDRESS_POINTER_REGNUM,                                       \
 435    GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM},                         \
 436  { RETURN_ADDRESS_POINTER_REGNUM,                                       \
 437    GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM},                       \
 438  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 439  { FRAME_POINTER_REGNUM, GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM}}
 440
 441 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                     \
 442         (OFFSET) = microblaze_initial_elimination_offset ((FROM), (TO))
 443
 444 #define ACCUMULATE_OUTGOING_ARGS        1
 445
 446 #define FIRST_PARM_OFFSET(FNDECL)               (UNITS_PER_WORD)
 447
 448 #define ARG_POINTER_CFA_OFFSET(FNDECL)          0
 449
 450 #define REG_PARM_STACK_SPACE(FNDECL)            (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD)
 451
 452 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE)   1
 453
 454 #define STACK_BOUNDARY                          32
 455
 456 #define NUM_OF_ARGS                             6
 457
 458 #define GP_RETURN                               (GP_REG_FIRST + MB_ABI_INT_RETURN_VAL_REGNUM)
 459
 460 #define GP_ARG_FIRST                            (GP_REG_FIRST + MB_ABI_FIRST_ARG_REGNUM)
 461 #define GP_ARG_LAST                             (GP_REG_FIRST + MB_ABI_LAST_ARG_REGNUM)
 462
 463 #define MAX_ARGS_IN_REGISTERS                   MB_ABI_MAX_ARG_REGS
 464
 465 #define LIBCALL_VALUE(MODE)                                             \
 466   gen_rtx_REG (                                                         \
 467            ((GET_MODE_CLASS (MODE) != MODE_INT                          \
 468              || GET_MODE_SIZE (MODE) >= 4)                              \
 469             ? (MODE)                                                    \
 470             : SImode), GP_RETURN)
 471
 472 /* 1 if N is a possible register number for a function value.
 473    On the MicroBlaze, R2 R3 are the only register thus used.
 474    Currently, R2 are only implemented  here (C has no complex type)  */
 475
 476 #define FUNCTION_VALUE_REGNO_P(N)               ((N) == GP_RETURN)
 477
 478 #define FUNCTION_ARG_REGNO_P(N)                 (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
 479
 480 typedef struct microblaze_args
 481 {
 482   int gp_reg_found;             /* whether a gp register was found yet */
 483   int arg_number;               /* argument number */
 484   int arg_words;                /* # total words the arguments take */
 485   int fp_arg_words;             /* # words for FP args */
 486   int last_arg_fp;              /* nonzero if last arg was FP (EABI only) */
 487   int fp_code;                  /* Mode of FP arguments */
 488   int num_adjusts;              /* number of adjustments made */
 489   /* Adjustments made to args pass in regs.  */
 490   /* ??? The size is doubled to work around a bug in the code that sets the
 491      adjustments in function_arg.  */
 492   rtx adjust[MAX_ARGS_IN_REGISTERS * 2];
 493 } CUMULATIVE_ARGS;
 494
 495 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS)    \
 496   init_cumulative_args (&CUM, FNTYPE, LIBNAME)
 497
 498 #define NO_PROFILE_COUNTERS                     1
 499
 500 #define FUNCTION_PROFILER(FILE, LABELNO) { \
 501   {                                        \
 502     fprintf (FILE, "\tbrki\tr16,_mcount\n");           \
 503   }                                                    \
 504  }
 505
 506 #define EXIT_IGNORE_STACK                       1
 507
 508 /* 4 insns + 2 words of data.  */
 509 #define TRAMPOLINE_SIZE                         (6 * 4)
 510
 511 #define TRAMPOLINE_ALIGNMENT                    32
 512
 513 #define REGNO_OK_FOR_BASE_P(regno)              microblaze_regno_ok_for_base_p ((regno), 1)
 514
 515 #define REGNO_OK_FOR_INDEX_P(regno)             microblaze_regno_ok_for_base_p ((regno), 1)
 516
 517 #ifndef REG_OK_STRICT
 518 #define REG_STRICT_FLAG                         0
 519 #else
 520 #define REG_STRICT_FLAG                         1
 521 #endif
 522
 523 #define REG_OK_FOR_BASE_P(X)    \
 524   microblaze_regno_ok_for_base_p (REGNO (X), REG_STRICT_FLAG)
 525
 526 #define REG_OK_FOR_INDEX_P(X)   \
 527   microblaze_regno_ok_for_base_p (REGNO (X), REG_STRICT_FLAG)
 528
 529 #define MAX_REGS_PER_ADDRESS 2
 530
 531
 532 /* Identify valid constant addresses.  Exclude if PIC addr which
 533    needs scratch register.  */
 534 #define CONSTANT_ADDRESS_P(X)                                           \
 535   (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF              \
 536     || GET_CODE (X) == CONST_INT                                        \
 537     || (GET_CODE (X) == CONST                                           \
 538         && ! (flag_pic && pic_address_needs_scratch (X))))
 539
 540 /* Define this, so that when PIC, reload won't try to reload invalid
 541    addresses which require two reload registers.  */
 542 #define LEGITIMATE_PIC_OPERAND_P(X)  microblaze_legitimate_pic_operand (X)
 543
 544 #define CASE_VECTOR_MODE                        (SImode)
 545
 546 #ifndef DEFAULT_SIGNED_CHAR
 547 #define DEFAULT_SIGNED_CHAR                     1
 548 #endif
 549
 550 #define MOVE_MAX                                4
 551 #define MAX_MOVE_MAX                            8
 552
 553 #define SLOW_BYTE_ACCESS                        1
 554
 555 /* sCOND operations return 1.  */
 556 #define STORE_FLAG_VALUE                        1
 557
 558 #define SHIFT_COUNT_TRUNCATED                   1
 559
 560 /* This results in inefficient code for 64 bit to 32 conversions.
 561    Something needs to be done about this.  Perhaps not use any 32 bit
 562    instructions?  Perhaps use PROMOTE_MODE?  */
 563 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 564
 565 #define Pmode SImode
 566
 567 #define FUNCTION_MODE   SImode
 568
 569 /* Mode should always be SImode */
 570 #define REGISTER_MOVE_COST(MODE, FROM, TO)                      \
 571   ( GR_REG_CLASS_P (FROM) && GR_REG_CLASS_P (TO) ? 2            \
 572    : (FROM) == ST_REGS && GR_REG_CLASS_P (TO) ? 4               \
 573    : 12)
 574
 575 #define MEMORY_MOVE_COST(MODE,CLASS,TO_P) \
 576   (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P)))
 577
 578 #define BRANCH_COST(speed_p, predictable_p)     2
 579
 580 /* Control the assembler format that we output.  */
 581 #define ASM_APP_ON " #APP\n"
 582 #define ASM_APP_OFF " #NO_APP\n"
 583
 584 #define REGISTER_NAMES {                                                \
 585   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",         \
 586   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",        \
 587   "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",        \
 588   "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",        \
 589   "rmsr", "$ap",  "$rap", "$frp" }
 590
 591 #define ADDITIONAL_REGISTER_NAMES                                       \
 592 {                                                                       \
 593   { "r0",        0 + GP_REG_FIRST },                                    \
 594   { "r1",        1 + GP_REG_FIRST },                                    \
 595   { "r2",        2 + GP_REG_FIRST },                                    \
 596   { "r3",        3 + GP_REG_FIRST },                                    \
 597   { "r4",        4 + GP_REG_FIRST },                                    \
 598   { "r5",        5 + GP_REG_FIRST },                                    \
 599   { "r6",        6 + GP_REG_FIRST },                                    \
 600   { "r7",        7 + GP_REG_FIRST },                                    \
 601   { "r8",        8 + GP_REG_FIRST },                                    \
 602   { "r9",        9 + GP_REG_FIRST },                                    \
 603   { "r10",      10 + GP_REG_FIRST },                                    \
 604   { "r11",      11 + GP_REG_FIRST },                                    \
 605   { "r12",      12 + GP_REG_FIRST },                                    \
 606   { "r13",      13 + GP_REG_FIRST },                                    \
 607   { "r14",      14 + GP_REG_FIRST },                                    \
 608   { "r15",      15 + GP_REG_FIRST },                                    \
 609   { "r16",      16 + GP_REG_FIRST },                                    \
 610   { "r17",      17 + GP_REG_FIRST },                                    \
 611   { "r18",      18 + GP_REG_FIRST },                                    \
 612   { "r19",      19 + GP_REG_FIRST },                                    \
 613   { "r20",      20 + GP_REG_FIRST },                                    \
 614   { "r21",      21 + GP_REG_FIRST },                                    \
 615   { "r22",      22 + GP_REG_FIRST },                                    \
 616   { "r23",      23 + GP_REG_FIRST },                                    \
 617   { "r24",      24 + GP_REG_FIRST },                                    \
 618   { "r25",      25 + GP_REG_FIRST },                                    \
 619   { "r26",      26 + GP_REG_FIRST },                                    \
 620   { "r27",      27 + GP_REG_FIRST },                                    \
 621   { "r28",      28 + GP_REG_FIRST },                                    \
 622   { "r29",      29 + GP_REG_FIRST },                                    \
 623   { "r30",      30 + GP_REG_FIRST },                                    \
 624   { "r31",      31 + GP_REG_FIRST },                                    \
 625   { "rmsr",     ST_REG}                                                 \
 626 }
 627
 628 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 629
 630 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) microblaze_print_operand_punct[CODE]
 631
 632 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 633
 634 /* ASM_OUTPUT_ALIGNED_COMMON and ASM_OUTPUT_ALIGNED_LOCAL
 635
 636    Unfortunately, we still need to set the section explicitly. Somehow,
 637    our binutils assign .comm and .lcomm variables to the "current" section
 638    in the assembly file, rather than where they implicitly belong. We need to
 639    remove this explicit setting in GCC when binutils can understand sections
 640    better.  */
 641 #undef  ASM_OUTPUT_ALIGNED_COMMON
 642 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
 643 do {                                                                    \
 644   if ((SIZE) > 0 && (SIZE) <= INT_MAX                                   \
 645       && (int) (SIZE) <= microblaze_section_threshold                   \
 646       && TARGET_XLGPOPT)                                                \
 647     {                                                                   \
 648       switch_to_section (sbss_section);                                 \
 649     }                                                                   \
 650   else                                                                  \
 651     {                                                                   \
 652       switch_to_section (bss_section);                                  \
 653     }                                                                   \
 654   fprintf (FILE, "%s", COMMON_ASM_OP);                                  \
 655   assemble_name ((FILE), (NAME));                                       \
 656   fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",             \
 657            (SIZE), (ALIGN) / BITS_PER_UNIT);                            \
 658   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 659 } while (0)
 660
 661 #undef ASM_OUTPUT_ALIGNED_LOCAL
 662 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
 663 do {                                                                    \
 664   if ((SIZE) > 0 && (SIZE) <= INT_MAX                                   \
 665       && (int) (SIZE) <= microblaze_section_threshold                   \
 666       && TARGET_XLGPOPT)                                                \
 667     {                                                                   \
 668       switch_to_section (sbss_section);                                 \
 669     }                                                                   \
 670   else                                                                  \
 671     {                                                                   \
 672       switch_to_section (bss_section);                                  \
 673     }                                                                   \
 674   fprintf (FILE, "%s", LCOMMON_ASM_OP);                                 \
 675   assemble_name ((FILE), (NAME));                                       \
 676   fprintf ((FILE), "," HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",             \
 677            (SIZE), (ALIGN) / BITS_PER_UNIT);                            \
 678   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 679 } while (0)
 680
 681 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)           \
 682 do {                                                                    \
 683   ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN);                   \
 684 } while (0)
 685
 686 #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL)                     \
 687 {                                                                       \
 688 }
 689
 690 #undef TARGET_ASM_CONSTRUCTOR
 691 #define TARGET_ASM_CONSTRUCTOR microblaze_elf_asm_constructor
 692
 693 #undef TARGET_ASM_DESTRUCTOR
 694 #define TARGET_ASM_DESTRUCTOR microblaze_elf_asm_destructor
 695
 696 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)                   \
 697   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long)(NUM))
 698
 699 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
 700   fprintf (STREAM, "\t%s\t%sL%d\n",                                     \
 701            ".gpword",                                                   \
 702            LOCAL_LABEL_PREFIX, VALUE)
 703
 704 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
 705 do {                                                                    \
 706   if (flag_pic == 2)                                               \
 707     fprintf (STREAM, "\t%s\t%sL%d@GOTOFF\n",                            \
 708              ".gpword",                                                 \
 709              LOCAL_LABEL_PREFIX, VALUE);                                \
 710   else                                                                  \
 711     fprintf (STREAM, "\t%s\t%sL%d\n",                                   \
 712              ".gpword",                                                 \
 713              LOCAL_LABEL_PREFIX, VALUE);                                \
 714 } while (0)
 715
 716 #define ASM_OUTPUT_ALIGN(STREAM,LOG)                                    \
 717   fprintf (STREAM, "\t.align\t%d\n", (LOG))
 718
 719 #define ASM_OUTPUT_SKIP(STREAM,SIZE)                                    \
 720   fprintf (STREAM, "\t.space\t%lu\n", (SIZE))
 721
 722 #define ASCII_DATA_ASM_OP               "\t.ascii\t"
 723 #define STRING_ASM_OP                   "\t.asciz\t"
 724
 725 #undef TARGET_ASM_OUTPUT_IDENT
 726 #define TARGET_ASM_OUTPUT_IDENT microblaze_asm_output_ident
 727
 728 /* Default to -G 8 */
 729 #ifndef MICROBLAZE_DEFAULT_GVALUE
 730 #define MICROBLAZE_DEFAULT_GVALUE 8
 731 #endif
 732
 733 /* Given a decl node or constant node, choose the section to output it in
 734    and select that section.  */
 735
 736 /* Store in OUTPUT a string (made with alloca) containing
 737    an assembler-name for a local static variable named NAME.
 738    LABELNO is an integer which is different for each call.  */
 739 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)                  \
 740 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 13),                    \
 741   sprintf ((OUTPUT), "%s.%lu", (NAME), (unsigned long)(LABELNO)))
 742
 743 /* How to start an assembler comment.
 744    The leading space is important (the microblaze assembler requires it).  */
 745 #ifndef ASM_COMMENT_START
 746 #define ASM_COMMENT_START               " #"
 747 #endif
 748
 749 #define BSS_VAR         1
 750 #define SBSS_VAR        2
 751 #define DATA_VAR        4
 752 #define SDATA_VAR       5
 753 #define RODATA_VAR      6
 754 #define SDATA2_VAR      7
 755
 756 /* These definitions are used in with the shift_type flag in the rtl.  */
 757 #define SHIFT_CONST     1
 758 #define SHIFT_REG       2
 759 #define USE_ADDK        3
 760
 761 /* Handle interrupt attribute.  */
 762 extern int interrupt_handler;
 763 extern int fast_interrupt;
 764 extern int save_volatiles;
 765
 766 #define INTERRUPT_HANDLER_NAME "_interrupt_handler"
 767 /* The function name for the function tagged with attribute break_handler
 768    has been set in the RTL as _break_handler. This function name is used
 769    in the generation of directives .ent .end and .global. */
 770 #define BREAK_HANDLER_NAME "_break_handler"
 771 #define FAST_INTERRUPT_NAME "_fast_interrupt"
 772
 773 /* The following #defines are used in the headers files. Always retain these.  */
 774
 775 /* Added for declaring size at the end of the function.  */
 776 #undef ASM_DECLARE_FUNCTION_SIZE
 777 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)                    \
 778   do {                                                                  \
 779     if (!flag_inhibit_size_directive)                                   \
 780       {                                                                 \
 781         char label[256];                                                \
 782         static int labelno;                                             \
 783         labelno++;                                                      \
 784         ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno);            \
 785         (*targetm.asm_out.internal_label) (FILE, "Lfe", labelno);       \
 786         fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 787         assemble_name (FILE, (FNAME));                                  \
 788         fprintf (FILE, ",");                                            \
 789         assemble_name (FILE, label);                                    \
 790         fprintf (FILE, "-");                                            \
 791         assemble_name (FILE, (FNAME));                                  \
 792         putc ('\n', FILE);                                              \
 793       }                                                                 \
 794   } while (0)
 795
 796 #define GLOBAL_ASM_OP                   "\t.globl\t"
 797 #define TYPE_ASM_OP                     "\t.type\t"
 798 #define SIZE_ASM_OP                     "\t.size\t"
 799 #define COMMON_ASM_OP                   "\t.comm\t"
 800 #define LCOMMON_ASM_OP                  "\t.lcomm\t"
 801
 802 #define MAX_OFILE_ALIGNMENT             (32768*8)
 803
 804 #define TYPE_OPERAND_FMT                "@%s"
 805
 806 /* Write the extra assembler code needed to declare an object properly.  */
 807 #undef ASM_DECLARE_OBJECT_NAME
 808 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)                       \
 809   do {                                                                  \
 810     fprintf (FILE, "%s", TYPE_ASM_OP);                                  \
 811     assemble_name (FILE, NAME);                                         \
 812     putc (',', FILE);                                                   \
 813     fprintf (FILE, TYPE_OPERAND_FMT, "object");                         \
 814     putc ('\n', FILE);                                                  \
 815     size_directive_output = 0;                                          \
 816     if (!flag_inhibit_size_directive && DECL_SIZE (DECL))               \
 817       {                                                                 \
 818         size_directive_output = 1;                                      \
 819         fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 820         assemble_name (FILE, NAME);                                     \
 821         fprintf (FILE, "," HOST_WIDE_INT_PRINT_DEC "\n",                \
 822         int_size_in_bytes (TREE_TYPE (DECL)));                          \
 823       }                                                                 \
 824     microblaze_declare_object (FILE, NAME, "", ":\n", 0);                       \
 825   } while (0)
 826
 827 #undef ASM_FINISH_DECLARE_OBJECT
 828 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)         \
 829 do {                                                                     \
 830      const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0);             \
 831      if (!flag_inhibit_size_directive && DECL_SIZE (DECL)                \
 832          && ! AT_END && TOP_LEVEL                                        \
 833          && DECL_INITIAL (DECL) == error_mark_node                       \
 834          && !size_directive_output)                                      \
 835        {                                                                 \
 836          size_directive_output = 1;                                      \
 837          fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 838          assemble_name (FILE, name);                                     \
 839          fprintf (FILE, "," HOST_WIDE_INT_PRINT_DEC "\n",                \
 840                   int_size_in_bytes (TREE_TYPE (DECL)));                 \
 841        }                                                                 \
 842    } while (0)
 843
 844 #define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2)                            \
 845  do { fputc ( '\t', FILE);                                            \
 846       assemble_name (FILE, LABEL1);                                   \
 847       fputs ( " = ", FILE);                                           \
 848       assemble_name (FILE, LABEL2);                                   \
 849       fputc ( '\n', FILE);                                            \
 850  } while (0)
 851
 852 #define ASM_WEAKEN_LABEL(FILE,NAME)                                     \
 853  do { fputs ("\t.weakext\t", FILE);                                     \
 854       assemble_name (FILE, NAME);                                       \
 855       fputc ('\n', FILE);                                               \
 856     } while (0)
 857
 858 #define MAKE_DECL_ONE_ONLY(DECL)        (DECL_WEAK (DECL) = 1)
 859 #undef UNIQUE_SECTION_P
 860 #define UNIQUE_SECTION_P(DECL)          (DECL_ONE_ONLY (DECL))
 861
 862 #undef TARGET_ASM_NAMED_SECTION
 863 #define TARGET_ASM_NAMED_SECTION        default_elf_asm_named_section
 864
 865 /* Define the strings to put out for each section in the object file.
 866
 867    Note: For ctors/dtors, we want to give these sections the SHF_WRITE
 868    attribute to allow shared libraries to patch/resolve addresses into
 869    these locations.  On Microblaze, there is no concept of shared libraries
 870    yet, so this is for future use.  */
 871 #define TEXT_SECTION_ASM_OP     "\t.text"
 872 #define DATA_SECTION_ASM_OP     "\t.data"
 873 #define READONLY_DATA_SECTION_ASM_OP    \
 874                                 "\t.rodata"
 875 #define BSS_SECTION_ASM_OP      "\t.bss"
 876 #define CTORS_SECTION_ASM_OP    "\t.section\t.ctors,\"aw\""
 877 #define DTORS_SECTION_ASM_OP    "\t.section\t.dtors,\"aw\""
 878 #define INIT_SECTION_ASM_OP     "\t.section\t.init,\"ax\""
 879 #define FINI_SECTION_ASM_OP     "\t.section\t.fini,\"ax\""
 880
 881 #define SDATA_SECTION_ASM_OP    "\t.sdata"      /* Small RW initialized data   */
 882 #define SDATA2_SECTION_ASM_OP   "\t.sdata2"     /* Small RO initialized data   */
 883 #define SBSS_SECTION_ASM_OP     "\t.sbss"       /* Small RW uninitialized data */
 884 #define SBSS2_SECTION_ASM_OP    "\t.sbss2"      /* Small RO uninitialized data */
 885
 886 /* We do this to save a few 10s of code space that would be taken up
 887    by the call_FUNC () wrappers, used by the generic CRT_CALL_STATIC_FUNCTION
 888    definition in crtstuff.c.  */
 889 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC)      \
 890     asm ( SECTION_OP "\n"                               \
 891           "\tbrlid   r15, " #FUNC "\n\t nop\n"         \
 892           TEXT_SECTION_ASM_OP);
 893
 894 /* We need to group -lm as well, since some Newlib math functions
 895    reference __errno!  */
 896 #undef LIB_SPEC
 897 #define LIB_SPEC \
 898 "%{!nostdlib: \
 899 %{pg:-start-group -lxilprofile -lgloss -lxil -lc -lm -end-group } \
 900 %{!pg:-start-group -lgloss -lxil -lc -lm -end-group }} "
 901
 902 /* microblaze-unknown-elf target has no support of C99 runtime */
 903 #undef TARGET_LIBC_HAS_FUNCTION
 904 #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
 905
 906 #undef  ENDFILE_SPEC
 907 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
 908
 909 #define STARTFILE_EXECUTABLE_SPEC   "crt0.o%s crti.o%s crtbegin.o%s"
 910 #define STARTFILE_XMDSTUB_SPEC      "crt1.o%s crti.o%s crtbegin.o%s"
 911 #define STARTFILE_BOOTSTRAP_SPEC    "crt2.o%s crti.o%s crtbegin.o%s"
 912 #define STARTFILE_NOVECTORS_SPEC    "crt3.o%s crti.o%s crtbegin.o%s"
 913 #define STARTFILE_CRTINIT_SPEC      "%{!pg: %{!mno-clearbss: crtinit.o%s} \
 914 %{mno-clearbss: sim-crtinit.o%s}} \
 915 %{pg: %{!mno-clearbss: pgcrtinit.o%s} %{mno-clearbss: sim-pgcrtinit.o%s}}"
 916
 917 #define STARTFILE_DEFAULT_SPEC      STARTFILE_EXECUTABLE_SPEC
 918
 919 #undef SUBTARGET_EXTRA_SPECS
 920 #define SUBTARGET_EXTRA_SPECS                                           \
 921   { "startfile_executable",     STARTFILE_EXECUTABLE_SPEC },            \
 922   { "startfile_xmdstub",        STARTFILE_XMDSTUB_SPEC },               \
 923   { "startfile_bootstrap",      STARTFILE_BOOTSTRAP_SPEC },             \
 924   { "startfile_novectors",      STARTFILE_NOVECTORS_SPEC },             \
 925   { "startfile_crtinit",        STARTFILE_CRTINIT_SPEC },               \
 926   { "startfile_default",        STARTFILE_DEFAULT_SPEC },
 927
 928 #undef  STARTFILE_SPEC
 929 #define STARTFILE_SPEC  "\
 930 %{Zxl-mode-executable   : %(startfile_executable)  ; \
 931   mxl-mode-executable   : %(startfile_executable)  ; \
 932   Zxl-mode-xmdstub      : %(startfile_xmdstub)     ; \
 933   mxl-mode-xmdstub      : %(startfile_xmdstub)     ; \
 934   Zxl-mode-bootstrap    : %(startfile_bootstrap)   ; \
 935   mxl-mode-bootstrap    : %(startfile_bootstrap)   ; \
 936   Zxl-mode-novectors    : %(startfile_novectors)   ; \
 937   mxl-mode-novectors    : %(startfile_novectors)   ; \
 938   Zxl-mode-xilkernel    : %(startfile_xilkernel)   ; \
 939   mxl-mode-xilkernel    : %(startfile_xilkernel)   ; \
 940                         : %(startfile_default)       \
 941 } \
 942 %(startfile_crtinit)"