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RISC-V: Disallow transformation into VLMAX AVL for cond_len_xxx when length is in...
[official-gcc.git]
/
gcc
/
testsuite
/
gcc.target
/
riscv
/
rvv
/
autovec
/
post-ra-avl.c
blob
bff6dcb1c387020520e2f38baf744bb143f239e9
1
/* { dg-do compile } */
2
/* { dg-options "-O3 -march=rv64gcv -mabi=lp64d --param=riscv-autovec-preference=fixed-vlmax" } */
3
4
int
a
,
b
,
c
,
e
;
5
short
d
[
7
][
7
] = {};
6
int
foo
() {
7
short
f
;
8
c
=
0
;
9
for
(;
c
<=
6
;
c
++) {
10
e
|=
d
[
c
][
c
] &
1
;
11
b
&=
f
&
3
;
12
}
13
return
a
;
14
}
15
16
/* { dg-final { scan-assembler-not {vsetvli\s+[a-x0-9]+,\s*zero} } } */