1 /* Definitions of target machine for GNU compiler, for IBM RS/6000.
2 Copyright (C) 1992, 93-99, 2000 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu)
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Note that some other tm.h files include this one and then override
24 many of the definitions that relate to assembler syntax. */
27 /* Names to predefine in the preprocessor for this target machine. */
29 #define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_LONG_LONG \
30 -Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)"
32 /* Print subsidiary information on the compiler version in use. */
33 #define TARGET_VERSION ;
35 /* Default string to use for cpu if not specified. */
36 #ifndef TARGET_CPU_DEFAULT
37 #define TARGET_CPU_DEFAULT ((char *)0)
40 /* Tell the assembler to assume that all undefined names are external.
42 Don't do this until the fixed IBM assembler is more generally available.
43 When this becomes permanently defined, the ASM_OUTPUT_EXTERNAL,
44 ASM_OUTPUT_EXTERNAL_LIBCALL, and RS6000_OUTPUT_BASENAME macros will no
45 longer be needed. Also, the extern declaration of mcount in ASM_FILE_START
46 will no longer be needed. */
48 /* #define ASM_SPEC "-u %(asm_cpu)" */
50 /* Define appropriate architecture macros for preprocessor depending on
53 #define CPP_SPEC "%{posix: -D_POSIX_SOURCE} %(cpp_cpu)"
55 /* Common CPP definitions used by CPP_SPEC among the various targets
56 for handling -mcpu=xxx switches. */
57 #define CPP_CPU_SPEC \
59 %{mpower: %{!mpower2: -D_ARCH_PWR}} \
60 %{mpower2: -D_ARCH_PWR2} \
61 %{mpowerpc*: -D_ARCH_PPC} \
62 %{mno-power: %{!mpowerpc*: -D_ARCH_COM}} \
63 %{!mno-power: %{!mpower2: %(cpp_default)}}} \
64 %{mcpu=common: -D_ARCH_COM} \
65 %{mcpu=power: -D_ARCH_PWR} \
66 %{mcpu=power2: -D_ARCH_PWR2} \
67 %{mcpu=powerpc: -D_ARCH_PPC} \
68 %{mcpu=rios: -D_ARCH_PWR} \
69 %{mcpu=rios1: -D_ARCH_PWR} \
70 %{mcpu=rios2: -D_ARCH_PWR2} \
71 %{mcpu=rsc: -D_ARCH_PWR} \
72 %{mcpu=rsc1: -D_ARCH_PWR} \
73 %{mcpu=401: -D_ARCH_PPC} \
74 %{mcpu=403: -D_ARCH_PPC} \
75 %{mcpu=505: -D_ARCH_PPC} \
76 %{mcpu=601: -D_ARCH_PPC -D_ARCH_PWR} \
77 %{mcpu=602: -D_ARCH_PPC} \
78 %{mcpu=603: -D_ARCH_PPC} \
79 %{mcpu=603e: -D_ARCH_PPC} \
80 %{mcpu=ec603e: -D_ARCH_PPC} \
81 %{mcpu=604: -D_ARCH_PPC} \
82 %{mcpu=604e: -D_ARCH_PPC} \
83 %{mcpu=620: -D_ARCH_PPC} \
84 %{mcpu=740: -D_ARCH_PPC} \
85 %{mcpu=750: -D_ARCH_PPC} \
86 %{mcpu=801: -D_ARCH_PPC} \
87 %{mcpu=821: -D_ARCH_PPC} \
88 %{mcpu=823: -D_ARCH_PPC} \
89 %{mcpu=860: -D_ARCH_PPC}"
91 #ifndef CPP_DEFAULT_SPEC
92 #define CPP_DEFAULT_SPEC "-D_ARCH_PWR"
96 #define CPP_SYSV_SPEC ""
99 #ifndef CPP_ENDIAN_SPEC
100 #define CPP_ENDIAN_SPEC ""
103 #ifndef CPP_ENDIAN_DEFAULT_SPEC
104 #define CPP_ENDIAN_DEFAULT_SPEC ""
107 #ifndef CPP_SYSV_DEFAULT_SPEC
108 #define CPP_SYSV_DEFAULT_SPEC ""
111 /* Common ASM definitions used by ASM_SPEC among the various targets
112 for handling -mcpu=xxx switches. */
113 #define ASM_CPU_SPEC \
115 %{mpower: %{!mpower2: -mpwr}} \
117 %{mpowerpc*: -mppc} \
118 %{mno-power: %{!mpowerpc*: -mcom}} \
119 %{!mno-power: %{!mpower2: %(asm_default)}}} \
120 %{mcpu=common: -mcom} \
121 %{mcpu=power: -mpwr} \
122 %{mcpu=power2: -mpwrx} \
123 %{mcpu=powerpc: -mppc} \
124 %{mcpu=rios: -mpwr} \
125 %{mcpu=rios1: -mpwr} \
126 %{mcpu=rios2: -mpwrx} \
128 %{mcpu=rsc1: -mpwr} \
135 %{mcpu=603e: -mppc} \
136 %{mcpu=ec603e: -mppc} \
138 %{mcpu=604e: -mppc} \
147 #ifndef ASM_DEFAULT_SPEC
148 #define ASM_DEFAULT_SPEC ""
151 /* This macro defines names of additional specifications to put in the specs
152 that can be used in various specifications like CC1_SPEC. Its definition
153 is an initializer with a subgrouping for each command option.
155 Each subgrouping contains a string constant, that defines the
156 specification name, and a string constant that used by the GNU CC driver
159 Do not define this macro if it does not need to do anything. */
161 #ifndef SUBTARGET_EXTRA_SPECS
162 #define SUBTARGET_EXTRA_SPECS
165 #define EXTRA_SPECS \
166 { "cpp_cpu", CPP_CPU_SPEC }, \
167 { "cpp_default", CPP_DEFAULT_SPEC }, \
168 { "cpp_sysv", CPP_SYSV_SPEC }, \
169 { "cpp_sysv_default", CPP_SYSV_DEFAULT_SPEC }, \
170 { "cpp_endian_default", CPP_ENDIAN_DEFAULT_SPEC }, \
171 { "cpp_endian", CPP_ENDIAN_SPEC }, \
172 { "asm_cpu", ASM_CPU_SPEC }, \
173 { "asm_default", ASM_DEFAULT_SPEC }, \
174 { "link_syscalls", LINK_SYSCALLS_SPEC }, \
175 { "link_libg", LINK_LIBG_SPEC }, \
176 SUBTARGET_EXTRA_SPECS
178 /* Default location of syscalls.exp under AIX */
179 #ifndef CROSS_COMPILE
180 #define LINK_SYSCALLS_SPEC "-bI:/lib/syscalls.exp"
182 #define LINK_SYSCALLS_SPEC ""
185 /* Default location of libg.exp under AIX */
186 #ifndef CROSS_COMPILE
187 #define LINK_LIBG_SPEC "-bexport:/usr/lib/libg.exp"
189 #define LINK_LIBG_SPEC ""
192 /* Define the options for the binder: Start text at 512, align all segments
193 to 512 bytes, and warn if there is text relocation.
195 The -bhalt:4 option supposedly changes the level at which ld will abort,
196 but it also suppresses warnings about multiply defined symbols and is
197 used by the AIX cc command. So we use it here.
199 -bnodelcsect undoes a poor choice of default relating to multiply-defined
200 csects. See AIX documentation for more information about this.
202 -bM:SRE tells the linker that the output file is Shared REusable. Note
203 that to actually build a shared library you will also need to specify an
204 export list with the -Wl,-bE option. */
206 #define LINK_SPEC "-T512 -H512 %{!r:-btextro} -bhalt:4 -bnodelcsect\
207 %{static:-bnso %(link_syscalls) } \
208 %{!shared:%{g*: %(link_libg) }} %{shared:-bM:SRE}"
210 /* Profiled library versions are used by linking with special directories. */
211 #define LIB_SPEC "%{pg:-L/lib/profiled -L/usr/lib/profiled}\
212 %{p:-L/lib/profiled -L/usr/lib/profiled} %{!shared:%{g*:-lg}} -lc"
214 /* gcc must do the search itself to find libgcc.a, not use -l. */
215 #define LIBGCC_SPEC "libgcc.a%s"
217 /* Don't turn -B into -L if the argument specifies a relative file name. */
218 #define RELATIVE_PREFIX_NOT_LINKDIR
220 /* Architecture type. */
222 extern int target_flags
;
224 /* Use POWER architecture instructions and MQ register. */
225 #define MASK_POWER 0x00000001
227 /* Use POWER2 extensions to POWER architecture. */
228 #define MASK_POWER2 0x00000002
230 /* Use PowerPC architecture instructions. */
231 #define MASK_POWERPC 0x00000004
233 /* Use PowerPC General Purpose group optional instructions, e.g. fsqrt. */
234 #define MASK_PPC_GPOPT 0x00000008
236 /* Use PowerPC Graphics group optional instructions, e.g. fsel. */
237 #define MASK_PPC_GFXOPT 0x00000010
239 /* Use PowerPC-64 architecture instructions. */
240 #define MASK_POWERPC64 0x00000020
242 /* Use revised mnemonic names defined for PowerPC architecture. */
243 #define MASK_NEW_MNEMONICS 0x00000040
245 /* Disable placing fp constants in the TOC; can be turned on when the
247 #define MASK_NO_FP_IN_TOC 0x00000080
249 /* Disable placing symbol+offset constants in the TOC; can be turned on when
250 the TOC overflows. */
251 #define MASK_NO_SUM_IN_TOC 0x00000100
253 /* Output only one TOC entry per module. Normally linking fails if
254 there are more than 16K unique variables/constants in an executable. With
255 this option, linking fails only if there are more than 16K modules, or
256 if there are more than 16K unique variables/constant in a single module.
258 This is at the cost of having 2 extra loads and one extra store per
259 function, and one less allocable register. */
260 #define MASK_MINIMAL_TOC 0x00000200
262 /* Nonzero for the 64bit model: ints, longs, and pointers are 64 bits. */
263 #define MASK_64BIT 0x00000400
265 /* Disable use of FPRs. */
266 #define MASK_SOFT_FLOAT 0x00000800
268 /* Enable load/store multiple, even on powerpc */
269 #define MASK_MULTIPLE 0x00001000
270 #define MASK_MULTIPLE_SET 0x00002000
272 /* Use string instructions for block moves */
273 #define MASK_STRING 0x00004000
274 #define MASK_STRING_SET 0x00008000
276 /* Disable update form of load/store */
277 #define MASK_NO_UPDATE 0x00010000
279 /* Disable fused multiply/add operations */
280 #define MASK_NO_FUSED_MADD 0x00020000
282 #define TARGET_POWER (target_flags & MASK_POWER)
283 #define TARGET_POWER2 (target_flags & MASK_POWER2)
284 #define TARGET_POWERPC (target_flags & MASK_POWERPC)
285 #define TARGET_PPC_GPOPT (target_flags & MASK_PPC_GPOPT)
286 #define TARGET_PPC_GFXOPT (target_flags & MASK_PPC_GFXOPT)
287 #define TARGET_POWERPC64 (target_flags & MASK_POWERPC64)
288 #define TARGET_NEW_MNEMONICS (target_flags & MASK_NEW_MNEMONICS)
289 #define TARGET_NO_FP_IN_TOC (target_flags & MASK_NO_FP_IN_TOC)
290 #define TARGET_NO_SUM_IN_TOC (target_flags & MASK_NO_SUM_IN_TOC)
291 #define TARGET_MINIMAL_TOC (target_flags & MASK_MINIMAL_TOC)
292 #define TARGET_64BIT (target_flags & MASK_64BIT)
293 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
294 #define TARGET_MULTIPLE (target_flags & MASK_MULTIPLE)
295 #define TARGET_MULTIPLE_SET (target_flags & MASK_MULTIPLE_SET)
296 #define TARGET_STRING (target_flags & MASK_STRING)
297 #define TARGET_STRING_SET (target_flags & MASK_STRING_SET)
298 #define TARGET_NO_UPDATE (target_flags & MASK_NO_UPDATE)
299 #define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD)
301 #define TARGET_32BIT (! TARGET_64BIT)
302 #define TARGET_HARD_FLOAT (! TARGET_SOFT_FLOAT)
303 #define TARGET_UPDATE (! TARGET_NO_UPDATE)
304 #define TARGET_FUSED_MADD (! TARGET_NO_FUSED_MADD)
307 /* For libgcc2 we make sure this is a compile time constant */
308 #undef TARGET_POWERPC64
310 #define TARGET_POWERPC64 1
312 #define TARGET_POWERPC64 0
316 /* Pseudo target to indicate whether the object format is ELF
317 (to get around not having conditional compilation in the md file) */
322 /* If this isn't V.4, don't support -mno-toc. */
323 #ifndef TARGET_NO_TOC
324 #define TARGET_NO_TOC 0
328 /* Pseudo target to say whether this is Windows NT */
329 #ifndef TARGET_WINDOWS_NT
330 #define TARGET_WINDOWS_NT 0
333 /* Pseudo target to say whether this is MAC */
335 #define TARGET_MACOS 0
338 /* Pseudo target to say whether this is AIX */
340 #if (TARGET_ELF || TARGET_WINDOWS_NT || TARGET_MACOS)
347 #ifndef TARGET_XL_CALL
348 #define TARGET_XL_CALL 0
351 /* Run-time compilation parameters selecting different hardware subsets.
353 Macro to define tables used to set the flags.
354 This is a list in braces of pairs in braces,
355 each pair being { "NAME", VALUE }
356 where VALUE is the bits to set or minus the bits to clear.
357 An empty string NAME is used to identify the default VALUE. */
359 /* This is meant to be redefined in the host dependent files */
360 #ifndef SUBTARGET_SWITCHES
361 #define SUBTARGET_SWITCHES
364 #define TARGET_SWITCHES \
365 {{"power", MASK_POWER | MASK_MULTIPLE | MASK_STRING}, \
366 {"power2", (MASK_POWER | MASK_MULTIPLE | MASK_STRING \
368 {"no-power2", - MASK_POWER2}, \
369 {"no-power", - (MASK_POWER | MASK_POWER2 | MASK_MULTIPLE \
371 {"powerpc", MASK_POWERPC}, \
372 {"no-powerpc", - (MASK_POWERPC | MASK_PPC_GPOPT \
373 | MASK_PPC_GFXOPT | MASK_POWERPC64)}, \
374 {"powerpc-gpopt", MASK_POWERPC | MASK_PPC_GPOPT}, \
375 {"no-powerpc-gpopt", - MASK_PPC_GPOPT}, \
376 {"powerpc-gfxopt", MASK_POWERPC | MASK_PPC_GFXOPT}, \
377 {"no-powerpc-gfxopt", - MASK_PPC_GFXOPT}, \
378 {"powerpc64", MASK_POWERPC64}, \
379 {"no-powerpc64", - MASK_POWERPC64}, \
380 {"new-mnemonics", MASK_NEW_MNEMONICS}, \
381 {"old-mnemonics", -MASK_NEW_MNEMONICS}, \
382 {"full-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC \
383 | MASK_MINIMAL_TOC)}, \
384 {"fp-in-toc", - MASK_NO_FP_IN_TOC}, \
385 {"no-fp-in-toc", MASK_NO_FP_IN_TOC}, \
386 {"sum-in-toc", - MASK_NO_SUM_IN_TOC}, \
387 {"no-sum-in-toc", MASK_NO_SUM_IN_TOC}, \
388 {"minimal-toc", MASK_MINIMAL_TOC}, \
389 {"minimal-toc", - (MASK_NO_FP_IN_TOC | MASK_NO_SUM_IN_TOC)}, \
390 {"no-minimal-toc", - MASK_MINIMAL_TOC}, \
391 {"hard-float", - MASK_SOFT_FLOAT}, \
392 {"soft-float", MASK_SOFT_FLOAT}, \
393 {"multiple", MASK_MULTIPLE | MASK_MULTIPLE_SET}, \
394 {"no-multiple", - MASK_MULTIPLE}, \
395 {"no-multiple", MASK_MULTIPLE_SET}, \
396 {"string", MASK_STRING | MASK_STRING_SET}, \
397 {"no-string", - MASK_STRING}, \
398 {"no-string", MASK_STRING_SET}, \
399 {"update", - MASK_NO_UPDATE}, \
400 {"no-update", MASK_NO_UPDATE}, \
401 {"fused-madd", - MASK_NO_FUSED_MADD}, \
402 {"no-fused-madd", MASK_NO_FUSED_MADD}, \
404 {"", TARGET_DEFAULT | SUBTARGET_DEFAULT}}
406 #define TARGET_DEFAULT (MASK_POWER | MASK_MULTIPLE | MASK_STRING)
407 #define SUBTARGET_DEFAULT 0
409 /* Processor type. Order must match cpu attribute in MD file. */
426 extern enum processor_type rs6000_cpu
;
428 /* Recast the processor type to the cpu attribute. */
429 #define rs6000_cpu_attr ((enum attr_cpu)rs6000_cpu)
431 /* Define generic processor types based upon current deployment. */
432 #define PROCESSOR_COMMON PROCESSOR_PPC601
433 #define PROCESSOR_POWER PROCESSOR_RIOS1
434 #define PROCESSOR_POWERPC PROCESSOR_PPC604
435 #define PROCESSOR_POWERPC64 PROCESSOR_RS64A
437 /* Define the default processor. This is overridden by other tm.h files. */
438 #define PROCESSOR_DEFAULT PROCESSOR_RIOS1
439 #define PROCESSOR_DEFAULT64 PROCESSOR_RS64A
441 /* Specify the dialect of assembler to use. New mnemonics is dialect one
442 and the old mnemonics are dialect zero. */
443 #define ASSEMBLER_DIALECT TARGET_NEW_MNEMONICS ? 1 : 0
445 /* This macro is similar to `TARGET_SWITCHES' but defines names of
446 command options that have values. Its definition is an
447 initializer with a subgrouping for each command option.
449 Each subgrouping contains a string constant, that defines the
450 fixed part of the option name, and the address of a variable.
451 The variable, type `char *', is set to the variable part of the
452 given option if the fixed part matches. The actual option name
453 is made by appending `-m' to the specified name.
455 Here is an example which defines `-mshort-data-NUMBER'. If the
456 given option is `-mshort-data-512', the variable `m88k_short_data'
457 will be set to the string `"512"'.
459 extern char *m88k_short_data;
460 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
462 /* This is meant to be overridden in target specific files. */
463 #ifndef SUBTARGET_OPTIONS
464 #define SUBTARGET_OPTIONS
467 #define TARGET_OPTIONS \
469 {"cpu=", &rs6000_select[1].string}, \
470 {"tune=", &rs6000_select[2].string}, \
471 {"debug-", &rs6000_debug_name}, \
472 {"debug=", &rs6000_debug_name}, \
476 /* rs6000_select[0] is reserved for the default cpu defined via --with-cpu */
477 struct rs6000_cpu_select
485 extern struct rs6000_cpu_select rs6000_select
[];
488 extern const char *rs6000_debug_name
; /* Name for -mdebug-xxxx option */
489 extern int rs6000_debug_stack
; /* debug stack applications */
490 extern int rs6000_debug_arg
; /* debug argument handling */
492 #define TARGET_DEBUG_STACK rs6000_debug_stack
493 #define TARGET_DEBUG_ARG rs6000_debug_arg
495 /* Sometimes certain combinations of command options do not make sense
496 on a particular target machine. You can define a macro
497 `OVERRIDE_OPTIONS' to take account of this. This macro, if
498 defined, is executed once just after all the command options have
501 Don't use this macro to turn on various extra optimizations for
502 `-O'. That is what `OPTIMIZATION_OPTIONS' is for.
504 On the RS/6000 this is used to define the target cpu type. */
506 #define OVERRIDE_OPTIONS rs6000_override_options (TARGET_CPU_DEFAULT)
508 /* Define this to change the optimizations performed by default. */
509 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) optimization_options(LEVEL,SIZE)
511 /* Show we can debug even without a frame pointer. */
512 #define CAN_DEBUG_WITHOUT_FP
514 /* target machine storage layout */
516 /* Define to support cross compilation to an RS6000 target. */
517 #define REAL_ARITHMETIC
519 /* Define this macro if it is advisable to hold scalars in registers
520 in a wider mode than that declared by the program. In such cases,
521 the value is constrained to be within the bounds of the declared
522 type, but kept valid in the wider mode. The signedness of the
523 extension may differ from that of the type. */
525 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
526 if (GET_MODE_CLASS (MODE) == MODE_INT \
527 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
530 /* Define this if function arguments should also be promoted using the above
533 #define PROMOTE_FUNCTION_ARGS
535 /* Likewise, if the function return value is promoted. */
537 #define PROMOTE_FUNCTION_RETURN
539 /* Define this if most significant bit is lowest numbered
540 in instructions that operate on numbered bit-fields. */
541 /* That is true on RS/6000. */
542 #define BITS_BIG_ENDIAN 1
544 /* Define this if most significant byte of a word is the lowest numbered. */
545 /* That is true on RS/6000. */
546 #define BYTES_BIG_ENDIAN 1
548 /* Define this if most significant word of a multiword number is lowest
551 For RS/6000 we can decide arbitrarily since there are no machine
552 instructions for them. Might as well be consistent with bits and bytes. */
553 #define WORDS_BIG_ENDIAN 1
555 /* number of bits in an addressable storage unit */
556 #define BITS_PER_UNIT 8
558 /* Width in bits of a "word", which is the contents of a machine register.
559 Note that this is not necessarily the width of data type `int';
560 if using 16-bit ints on a 68000, this would still be 32.
561 But on a machine with 16-bit registers, this would be 16. */
562 #define BITS_PER_WORD (! TARGET_POWERPC64 ? 32 : 64)
563 #define MAX_BITS_PER_WORD 64
565 /* Width of a word, in units (bytes). */
566 #define UNITS_PER_WORD (! TARGET_POWERPC64 ? 4 : 8)
567 #define MIN_UNITS_PER_WORD 4
568 #define UNITS_PER_FP_WORD 8
570 /* Type used for ptrdiff_t, as a string used in a declaration. */
571 #define PTRDIFF_TYPE "int"
573 /* Type used for wchar_t, as a string used in a declaration. */
574 #define WCHAR_TYPE "short unsigned int"
576 /* Width of wchar_t in bits. */
577 #define WCHAR_TYPE_SIZE 16
579 /* A C expression for the size in bits of the type `short' on the
580 target machine. If you don't define this, the default is half a
581 word. (If this would be less than one storage unit, it is
582 rounded up to one unit.) */
583 #define SHORT_TYPE_SIZE 16
585 /* A C expression for the size in bits of the type `int' on the
586 target machine. If you don't define this, the default is one
588 #define INT_TYPE_SIZE 32
590 /* A C expression for the size in bits of the type `long' on the
591 target machine. If you don't define this, the default is one
593 #define LONG_TYPE_SIZE (TARGET_32BIT ? 32 : 64)
594 #define MAX_LONG_TYPE_SIZE 64
596 /* A C expression for the size in bits of the type `long long' on the
597 target machine. If you don't define this, the default is two
599 #define LONG_LONG_TYPE_SIZE 64
601 /* A C expression for the size in bits of the type `char' on the
602 target machine. If you don't define this, the default is one
603 quarter of a word. (If this would be less than one storage unit,
604 it is rounded up to one unit.) */
605 #define CHAR_TYPE_SIZE BITS_PER_UNIT
607 /* A C expression for the size in bits of the type `float' on the
608 target machine. If you don't define this, the default is one
610 #define FLOAT_TYPE_SIZE 32
612 /* A C expression for the size in bits of the type `double' on the
613 target machine. If you don't define this, the default is two
615 #define DOUBLE_TYPE_SIZE 64
617 /* A C expression for the size in bits of the type `long double' on
618 the target machine. If you don't define this, the default is two
620 #define LONG_DOUBLE_TYPE_SIZE 64
622 /* Width in bits of a pointer.
623 See also the macro `Pmode' defined below. */
624 #define POINTER_SIZE (TARGET_32BIT ? 32 : 64)
626 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
627 #define PARM_BOUNDARY (TARGET_32BIT ? 32 : 64)
629 /* Boundary (in *bits*) on which stack pointer should be aligned. */
630 #define STACK_BOUNDARY (TARGET_32BIT ? 64 : 128)
632 /* Allocation boundary (in *bits*) for the code of a function. */
633 #define FUNCTION_BOUNDARY 32
635 /* No data type wants to be aligned rounder than this. */
636 #define BIGGEST_ALIGNMENT 64
638 /* Handle #pragma pack. */
639 #define HANDLE_PRAGMA_PACK 1
641 /* AIX word-aligns FP doubles but doubleword-aligns 64-bit ints. */
642 #define ADJUST_FIELD_ALIGN(FIELD, COMPUTED) \
643 (TYPE_MODE (TREE_CODE (TREE_TYPE (FIELD)) == ARRAY_TYPE \
644 ? get_inner_array_type (FIELD) \
645 : TREE_TYPE (FIELD)) == DFmode \
646 ? MIN ((COMPUTED), 32) : (COMPUTED))
648 /* Alignment of field after `int : 0' in a structure. */
649 #define EMPTY_FIELD_BOUNDARY 32
651 /* Every structure's size must be a multiple of this. */
652 #define STRUCTURE_SIZE_BOUNDARY 8
654 /* A bitfield declared as `int' forces `int' alignment for the struct. */
655 #define PCC_BITFIELD_TYPE_MATTERS 1
657 /* AIX increases natural record alignment to doubleword if the first
658 field is an FP double while the FP fields remain word aligned. */
659 #define ROUND_TYPE_ALIGN(STRUCT, COMPUTED, SPECIFIED) \
660 ((TREE_CODE (STRUCT) == RECORD_TYPE \
661 || TREE_CODE (STRUCT) == UNION_TYPE \
662 || TREE_CODE (STRUCT) == QUAL_UNION_TYPE) \
663 && TYPE_FIELDS (STRUCT) != 0 \
664 && DECL_MODE (TYPE_FIELDS (STRUCT)) == DFmode \
665 ? MAX (MAX ((COMPUTED), (SPECIFIED)), BIGGEST_ALIGNMENT) \
666 : MAX ((COMPUTED), (SPECIFIED)))
668 /* Make strings word-aligned so strcpy from constants will be faster. */
669 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
670 (TREE_CODE (EXP) == STRING_CST \
671 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
673 /* Make arrays of chars word-aligned for the same reasons. */
674 #define DATA_ALIGNMENT(TYPE, ALIGN) \
675 (TREE_CODE (TYPE) == ARRAY_TYPE \
676 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
677 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
679 /* Non-zero if move instructions will actually fail to work
680 when given unaligned data. */
681 #define STRICT_ALIGNMENT 0
683 /* Define this macro to be the value 1 if unaligned accesses have a cost
684 many times greater than aligned accesses, for example if they are
685 emulated in a trap handler. */
686 #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \
687 ((((MODE) == SFmode || (MODE) == DFmode || (MODE) == DImode) \
688 && (ALIGN) < 4) ? 1 : 0)
691 /* Standard register usage. */
693 /* Number of actual hardware registers.
694 The hardware registers are assigned numbers for the compiler
695 from 0 to just below FIRST_PSEUDO_REGISTER.
696 All registers that the compiler knows about must be given numbers,
697 even those that are not normally considered general registers.
699 RS/6000 has 32 fixed-point registers, 32 floating-point registers,
700 an MQ register, a count register, a link register, and 8 condition
701 register fields, which we view here as separate registers.
703 In addition, the difference between the frame and argument pointers is
704 a function of the number of registers saved, so we need to have a
705 register for AP that will later be eliminated in favor of SP or FP.
706 This is a normal register, but it is fixed.
708 We also create a pseudo register for float/int conversions, that will
709 really represent the memory location used. It is represented here as
710 a register, in order to work around problems in allocating stack storage
711 in inline functions. */
713 #define FIRST_PSEUDO_REGISTER 77
715 /* 1 for registers that have pervasive standard uses
716 and are not available for the register allocator.
718 On RS/6000, r1 is used for the stack and r2 is used as the TOC pointer.
720 cr5 is not supposed to be used.
722 On System V implementations, r13 is fixed and not available for use. */
728 #define FIXED_REGISTERS \
729 {0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, FIXED_R13, 0, 0, \
730 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
731 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
732 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
733 0, 0, 0, 1, 0, 0, 0, 0, 0, 1, 0, 0, 1}
735 /* 1 for registers not available across function calls.
736 These must include the FIXED_REGISTERS and also any
737 registers that can be used without being saved.
738 The latter must include the registers where values are returned
739 and the register where structure-value addresses are passed.
740 Aside from that, you can include as many other registers as you like. */
742 #define CALL_USED_REGISTERS \
743 {1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, FIXED_R13, 0, 0, \
744 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
745 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, \
746 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
747 1, 1, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1}
749 /* List the order in which to allocate registers. Each register must be
750 listed once, even those in FIXED_REGISTERS.
752 We allocate in the following order:
753 fp0 (not saved or used for anything)
754 fp13 - fp2 (not saved; incoming fp arg registers)
755 fp1 (not saved; return value)
756 fp31 - fp14 (saved; order given to save least number)
757 cr7, cr6 (not saved or special)
758 cr1 (not saved, but used for FP operations)
759 cr0 (not saved, but used for arithmetic operations)
760 cr4, cr3, cr2 (saved)
761 r0 (not saved; cannot be base reg)
762 r9 (not saved; best for TImode)
763 r11, r10, r8-r4 (not saved; highest used first to make less conflict)
764 r3 (not saved; return value register)
765 r31 - r13 (saved; order given to save least number)
766 r12 (not saved; if used for DImode or DFmode would use r13)
767 mq (not saved; best to use it if we can)
768 ctr (not saved; when we have the choice ctr is better)
770 cr5, r1, r2, ap, fpmem (fixed) */
772 #define REG_ALLOC_ORDER \
774 45, 44, 43, 42, 41, 40, 39, 38, 37, 36, 35, 34, \
776 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \
777 50, 49, 48, 47, 46, \
778 75, 74, 69, 68, 72, 71, 70, \
780 9, 11, 10, 8, 7, 6, 5, 4, \
782 31, 30, 29, 28, 27, 26, 25, 24, 23, 22, 21, 20, 19, \
783 18, 17, 16, 15, 14, 13, 12, \
787 /* True if register is floating-point. */
788 #define FP_REGNO_P(N) ((N) >= 32 && (N) <= 63)
790 /* True if register is a condition register. */
791 #define CR_REGNO_P(N) ((N) >= 68 && (N) <= 75)
793 /* True if register is condition register 0. */
794 #define CR0_REGNO_P(N) ((N) == 68)
796 /* True if register is a condition register, but not cr0. */
797 #define CR_REGNO_NOT_CR0_P(N) ((N) >= 69 && (N) <= 75)
799 /* True if register is an integer register. */
800 #define INT_REGNO_P(N) ((N) <= 31 || (N) == 67)
802 /* True if register is the temporary memory location used for int/float
804 #define FPMEM_REGNO_P(N) ((N) == FPMEM_REGNUM)
806 /* Return number of consecutive hard regs needed starting at reg REGNO
807 to hold something of mode MODE.
808 This is ordinarily the length in words of a value of mode MODE
809 but can be less for certain modes in special long registers.
811 POWER and PowerPC GPRs hold 32 bits worth;
812 PowerPC64 GPRs and FPRs point register holds 64 bits worth. */
814 #define HARD_REGNO_NREGS(REGNO, MODE) \
815 (FP_REGNO_P (REGNO) || FPMEM_REGNO_P (REGNO) \
816 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
817 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
819 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE.
820 For POWER and PowerPC, the GPRs can hold any mode, but the float
821 registers only can hold floating modes and DImode, and CR register only
822 can hold CC modes. We cannot put TImode anywhere except general
823 register and it must be able to fit within the register set. */
825 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
826 (FP_REGNO_P (REGNO) ? \
827 (GET_MODE_CLASS (MODE) == MODE_FLOAT \
828 || (GET_MODE_CLASS (MODE) == MODE_INT \
829 && GET_MODE_SIZE (MODE) == UNITS_PER_FP_WORD)) \
830 : CR_REGNO_P (REGNO) ? GET_MODE_CLASS (MODE) == MODE_CC \
831 : FPMEM_REGNO_P (REGNO) ? ((MODE) == DImode || (MODE) == DFmode) \
832 : ! INT_REGNO_P (REGNO) ? (GET_MODE_CLASS (MODE) == MODE_INT \
833 && GET_MODE_SIZE (MODE) <= UNITS_PER_WORD) \
836 /* Value is 1 if it is a good idea to tie two pseudo registers
837 when one has mode MODE1 and one has mode MODE2.
838 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
839 for any hard reg, then this must be 0 for correct output. */
840 #define MODES_TIEABLE_P(MODE1, MODE2) \
841 (GET_MODE_CLASS (MODE1) == MODE_FLOAT \
842 ? GET_MODE_CLASS (MODE2) == MODE_FLOAT \
843 : GET_MODE_CLASS (MODE2) == MODE_FLOAT \
844 ? GET_MODE_CLASS (MODE1) == MODE_FLOAT \
845 : GET_MODE_CLASS (MODE1) == MODE_CC \
846 ? GET_MODE_CLASS (MODE2) == MODE_CC \
847 : GET_MODE_CLASS (MODE2) == MODE_CC \
848 ? GET_MODE_CLASS (MODE1) == MODE_CC \
851 /* A C expression returning the cost of moving data from a register of class
852 CLASS1 to one of CLASS2.
854 On the RS/6000, copying between floating-point and fixed-point
855 registers is expensive. */
857 #define REGISTER_MOVE_COST(CLASS1, CLASS2) \
858 ((CLASS1) == FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 2 \
859 : (CLASS1) == FLOAT_REGS && (CLASS2) != FLOAT_REGS ? 10 \
860 : (CLASS1) != FLOAT_REGS && (CLASS2) == FLOAT_REGS ? 10 \
861 : (((CLASS1) == SPECIAL_REGS || (CLASS1) == MQ_REGS \
862 || (CLASS1) == LINK_REGS || (CLASS1) == CTR_REGS \
863 || (CLASS1) == LINK_OR_CTR_REGS) \
864 && ((CLASS2) == SPECIAL_REGS || (CLASS2) == MQ_REGS \
865 || (CLASS2) == LINK_REGS || (CLASS2) == CTR_REGS \
866 || (CLASS2) == LINK_OR_CTR_REGS)) ? 10 \
869 /* A C expressions returning the cost of moving data of MODE from a register to
872 On the RS/6000, bump this up a bit. */
874 #define MEMORY_MOVE_COST(MODE, CLASS, IN) \
875 ((GET_MODE_CLASS (MODE) == MODE_FLOAT \
876 && (rs6000_cpu == PROCESSOR_RIOS1 || rs6000_cpu == PROCESSOR_PPC601) \
880 /* Specify the cost of a branch insn; roughly the number of extra insns that
881 should be added to avoid a branch.
883 Set this to 3 on the RS/6000 since that is roughly the average cost of an
884 unscheduled conditional branch. */
886 #define BRANCH_COST 3
888 /* A C statement (sans semicolon) to update the integer variable COST
889 based on the relationship between INSN that is dependent on
890 DEP_INSN through the dependence LINK. The default is to make no
891 adjustment to COST. On the RS/6000, ignore the cost of anti- and
892 output-dependencies. In fact, output dependencies on the CR do have
893 a cost, but it is probably not worthwhile to track it. */
895 #define ADJUST_COST(INSN, LINK, DEP_INSN, COST) \
896 (COST) = rs6000_adjust_cost (INSN,LINK,DEP_INSN,COST)
898 /* A C statement (sans semicolon) to update the integer scheduling priority
899 INSN_PRIORITY (INSN). Reduce the priority to execute the INSN earlier,
900 increase the priority to execute INSN later. Do not define this macro if
901 you do not need to adjust the scheduling priorities of insns. */
903 #define ADJUST_PRIORITY(INSN) \
904 INSN_PRIORITY (INSN) = rs6000_adjust_priority (INSN, INSN_PRIORITY (INSN))
906 /* Define this macro to change register usage conditional on target flags.
907 Set MQ register fixed (already call_used) if not POWER architecture
908 (RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated.
909 64-bit AIX reserves GPR13 for thread-private data.
910 Conditionally disable FPRs. */
912 #define CONDITIONAL_REGISTER_USAGE \
914 if (! TARGET_POWER) \
915 fixed_regs[64] = 1; \
917 fixed_regs[13] = call_used_regs[13] = 1; \
918 if (TARGET_SOFT_FLOAT) \
919 for (i = 32; i < 64; i++) \
920 fixed_regs[i] = call_used_regs[i] = 1; \
921 if ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \
923 fixed_regs[PIC_OFFSET_TABLE_REGNUM] \
924 = call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
927 /* Specify the registers used for certain standard purposes.
928 The values of these macros are register numbers. */
930 /* RS/6000 pc isn't overloaded on a register that the compiler knows about. */
931 /* #define PC_REGNUM */
933 /* Register to use for pushing function arguments. */
934 #define STACK_POINTER_REGNUM 1
936 /* Base register for access to local variables of the function. */
937 #define FRAME_POINTER_REGNUM 31
939 /* Value should be nonzero if functions must have frame pointers.
940 Zero means the frame pointer need not be set up (and parms
941 may be accessed via the stack pointer) in functions that seem suitable.
942 This is computed in `reload', in reload1.c. */
943 #define FRAME_POINTER_REQUIRED 0
945 /* Base register for access to arguments of the function. */
946 #define ARG_POINTER_REGNUM 67
948 /* Place to put static chain when calling a function that requires it. */
949 #define STATIC_CHAIN_REGNUM 11
951 /* count register number for special purposes */
952 #define COUNT_REGISTER_REGNUM 66
954 /* Special register that represents memory, used for float/int conversions. */
955 #define FPMEM_REGNUM 76
957 /* Place that structure value return address is placed.
959 On the RS/6000, it is passed as an extra parameter. */
960 #define STRUCT_VALUE 0
962 /* Define the classes of registers for register constraints in the
963 machine description. Also define ranges of constants.
965 One of the classes must always be named ALL_REGS and include all hard regs.
966 If there is more than one class, another class must be named NO_REGS
967 and contain no registers.
969 The name GENERAL_REGS must be the name of a class (or an alias for
970 another name such as ALL_REGS). This is the class of registers
971 that is allowed by "g" or "r" in a register constraint.
972 Also, registers outside this class are allocated only when
973 instructions express preferences for them.
975 The classes must be numbered in nondecreasing order; that is,
976 a larger-numbered class must never be contained completely
977 in a smaller-numbered class.
979 For any two classes, it is very desirable that there be another
980 class that represents their union. */
982 /* The RS/6000 has three types of registers, fixed-point, floating-point,
983 and condition registers, plus three special registers, MQ, CTR, and the
986 However, r0 is special in that it cannot be used as a base register.
987 So make a class for registers valid as base registers.
989 Also, cr0 is the only condition code register that can be used in
990 arithmetic insns, so make a separate class for it.
992 There is a special 'register' (76), which is not a register, but a
993 placeholder for memory allocated to convert between floating point and
994 integral types. This works around a problem where if we allocate memory
995 with allocate_stack_{local,temp} and the function is an inline function, the
996 memory allocated will clobber memory in the caller. So we use a special
997 register, and if that is used, we allocate stack space for it. */
1016 FLOAT_OR_FPMEM_REGS
,
1021 #define N_REG_CLASSES (int) LIM_REG_CLASSES
1023 /* Give names of register classes as strings for dump file. */
1025 #define REG_CLASS_NAMES \
1031 "NON_SPECIAL_REGS", \
1035 "LINK_OR_CTR_REGS", \
1037 "SPEC_OR_GEN_REGS", \
1042 "FLOAT_OR_FPMEM_REGS", \
1046 /* Define which registers fit in which classes.
1047 This is an initializer for a vector of HARD_REG_SET
1048 of length N_REG_CLASSES. */
1050 #define REG_CLASS_CONTENTS \
1052 { 0x00000000, 0x00000000, 0x00000000 }, /* NO_REGS */ \
1053 { 0xfffffffe, 0x00000000, 0x00000008 }, /* BASE_REGS */ \
1054 { 0xffffffff, 0x00000000, 0x00000008 }, /* GENERAL_REGS */ \
1055 { 0x00000000, 0xffffffff, 0x00000000 }, /* FLOAT_REGS */ \
1056 { 0xffffffff, 0xffffffff, 0x00000008 }, /* NON_SPECIAL_REGS */ \
1057 { 0x00000000, 0x00000000, 0x00000001 }, /* MQ_REGS */ \
1058 { 0x00000000, 0x00000000, 0x00000002 }, /* LINK_REGS */ \
1059 { 0x00000000, 0x00000000, 0x00000004 }, /* CTR_REGS */ \
1060 { 0x00000000, 0x00000000, 0x00000006 }, /* LINK_OR_CTR_REGS */ \
1061 { 0x00000000, 0x00000000, 0x00000007 }, /* SPECIAL_REGS */ \
1062 { 0xffffffff, 0x00000000, 0x0000000f }, /* SPEC_OR_GEN_REGS */ \
1063 { 0x00000000, 0x00000000, 0x00000010 }, /* CR0_REGS */ \
1064 { 0x00000000, 0x00000000, 0x00000ff0 }, /* CR_REGS */ \
1065 { 0xffffffff, 0x00000000, 0x0000ffff }, /* NON_FLOAT_REGS */ \
1066 { 0x00000000, 0x00000000, 0x00010000 }, /* FPMEM_REGS */ \
1067 { 0x00000000, 0xffffffff, 0x00010000 }, /* FLOAT_OR_FPMEM_REGS */ \
1068 { 0xffffffff, 0xffffffff, 0x0001ffff } /* ALL_REGS */ \
1071 /* The same information, inverted:
1072 Return the class number of the smallest class containing
1073 reg number REGNO. This could be a conditional expression
1074 or could index an array. */
1076 #define REGNO_REG_CLASS(REGNO) \
1077 ((REGNO) == 0 ? GENERAL_REGS \
1078 : (REGNO) < 32 ? BASE_REGS \
1079 : FP_REGNO_P (REGNO) ? FLOAT_REGS \
1080 : (REGNO) == 68 ? CR0_REGS \
1081 : CR_REGNO_P (REGNO) ? CR_REGS \
1082 : (REGNO) == 64 ? MQ_REGS \
1083 : (REGNO) == 65 ? LINK_REGS \
1084 : (REGNO) == 66 ? CTR_REGS \
1085 : (REGNO) == 67 ? BASE_REGS \
1086 : (REGNO) == 76 ? FPMEM_REGS \
1089 /* The class value for index registers, and the one for base regs. */
1090 #define INDEX_REG_CLASS GENERAL_REGS
1091 #define BASE_REG_CLASS BASE_REGS
1093 /* Get reg_class from a letter such as appears in the machine description. */
1095 #define REG_CLASS_FROM_LETTER(C) \
1096 ((C) == 'f' ? FLOAT_REGS \
1097 : (C) == 'b' ? BASE_REGS \
1098 : (C) == 'h' ? SPECIAL_REGS \
1099 : (C) == 'q' ? MQ_REGS \
1100 : (C) == 'c' ? CTR_REGS \
1101 : (C) == 'l' ? LINK_REGS \
1102 : (C) == 'x' ? CR0_REGS \
1103 : (C) == 'y' ? CR_REGS \
1104 : (C) == 'z' ? FPMEM_REGS \
1107 /* The letters I, J, K, L, M, N, and P in a register constraint string
1108 can be used to stand for particular ranges of immediate operands.
1109 This macro defines what the ranges are.
1110 C is the letter, and VALUE is a constant value.
1111 Return 1 if VALUE is in the range specified by C.
1113 `I' is a signed 16-bit constant
1114 `J' is a constant with only the high-order 16 bits non-zero
1115 `K' is a constant with only the low-order 16 bits non-zero
1116 `L' is a signed 16-bit constant shifted left 16 bits
1117 `M' is a constant that is greater than 31
1118 `N' is a constant that is an exact power of two
1119 `O' is the constant zero
1120 `P' is a constant whose negation is a signed 16-bit constant */
1122 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1123 ( (C) == 'I' ? (unsigned HOST_WIDE_INT) ((VALUE) + 0x8000) < 0x10000 \
1124 : (C) == 'J' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff0000)) == 0 \
1125 : (C) == 'K' ? ((VALUE) & (~ (HOST_WIDE_INT) 0xffff)) == 0 \
1126 : (C) == 'L' ? (((VALUE) & 0xffff) == 0 \
1127 && ((VALUE) >> 31 == -1 || (VALUE) >> 31 == 0)) \
1128 : (C) == 'M' ? (VALUE) > 31 \
1129 : (C) == 'N' ? exact_log2 (VALUE) >= 0 \
1130 : (C) == 'O' ? (VALUE) == 0 \
1131 : (C) == 'P' ? (unsigned HOST_WIDE_INT) ((- (VALUE)) + 0x8000) < 0x10000 \
1134 /* Similar, but for floating constants, and defining letters G and H.
1135 Here VALUE is the CONST_DOUBLE rtx itself.
1137 We flag for special constants when we can copy the constant into
1138 a general register in two insns for DF/DI and one insn for SF.
1140 'H' is used for DI/DF constants that take 3 insns. */
1142 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
1143 ( (C) == 'G' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) \
1144 == ((GET_MODE (VALUE) == SFmode) ? 1 : 2)) \
1145 : (C) == 'H' ? (num_insns_constant (VALUE, GET_MODE (VALUE)) == 3) \
1148 /* Optional extra constraints for this machine.
1150 'Q' means that is a memory operand that is just an offset from a reg.
1151 'R' is for AIX TOC entries.
1152 'S' is a constant that can be placed into a 64-bit mask operand
1153 'T' is a consatnt that can be placed into a 32-bit mask operand
1154 'U' is for V.4 small data references. */
1156 #define EXTRA_CONSTRAINT(OP, C) \
1157 ((C) == 'Q' ? GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \
1158 : (C) == 'R' ? LEGITIMATE_CONSTANT_POOL_ADDRESS_P (OP) \
1159 : (C) == 'S' ? mask64_operand (OP, VOIDmode) \
1160 : (C) == 'T' ? mask_operand (OP, VOIDmode) \
1161 : (C) == 'U' ? ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \
1162 && small_data_operand (OP, GET_MODE (OP))) \
1165 /* Given an rtx X being reloaded into a reg required to be
1166 in class CLASS, return the class of reg to actually use.
1167 In general this is just CLASS; but on some machines
1168 in some cases it is preferable to use a more restrictive class.
1170 On the RS/6000, we have to return NO_REGS when we want to reload a
1171 floating-point CONST_DOUBLE to force it to be copied to memory. */
1173 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
1174 ((GET_CODE (X) == CONST_DOUBLE \
1175 && GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1176 ? NO_REGS : (CLASS))
1178 /* Return the register class of a scratch register needed to copy IN into
1179 or out of a register in CLASS in MODE. If it can be done directly,
1180 NO_REGS is returned. */
1182 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
1183 secondary_reload_class (CLASS, MODE, IN)
1185 /* If we are copying between FP registers and anything else, we need a memory
1188 #define SECONDARY_MEMORY_NEEDED(CLASS1,CLASS2,MODE) \
1189 ((CLASS1) != (CLASS2) && ((CLASS1) == FLOAT_REGS || (CLASS2) == FLOAT_REGS))
1191 /* Return the maximum number of consecutive registers
1192 needed to represent mode MODE in a register of class CLASS.
1194 On RS/6000, this is the size of MODE in words,
1195 except in the FP regs, where a single reg is enough for two words. */
1196 #define CLASS_MAX_NREGS(CLASS, MODE) \
1197 (((CLASS) == FLOAT_REGS || (CLASS) == FPMEM_REGS \
1198 || (CLASS) == FLOAT_OR_FPMEM_REGS) \
1199 ? ((GET_MODE_SIZE (MODE) + UNITS_PER_FP_WORD - 1) / UNITS_PER_FP_WORD) \
1200 : ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD))
1202 /* If defined, gives a class of registers that cannot be used as the
1203 operand of a SUBREG that changes the size of the object. */
1205 #define CLASS_CANNOT_CHANGE_SIZE FLOAT_OR_FPMEM_REGS
1207 /* Stack layout; function entry, exit and calling. */
1209 /* Enumeration to give which calling sequence to use. */
1212 ABI_AIX
, /* IBM's AIX */
1213 ABI_AIX_NODESC
, /* AIX calling sequence minus function descriptors */
1214 ABI_V4
, /* System V.4/eabi */
1215 ABI_NT
, /* Windows/NT */
1216 ABI_SOLARIS
/* Solaris */
1219 extern enum rs6000_abi rs6000_current_abi
; /* available for use by subtarget */
1221 /* Default ABI to compile code for */
1223 #define DEFAULT_ABI ABI_AIX
1224 /* The prefix to add to user-visible assembler symbols. */
1225 #define USER_LABEL_PREFIX "."
1228 /* Structure used to define the rs6000 stack */
1229 typedef struct rs6000_stack
{
1230 int first_gp_reg_save
; /* first callee saved GP register used */
1231 int first_fp_reg_save
; /* first callee saved FP register used */
1232 int lr_save_p
; /* true if the link reg needs to be saved */
1233 int cr_save_p
; /* true if the CR reg needs to be saved */
1234 int toc_save_p
; /* true if the TOC needs to be saved */
1235 int push_p
; /* true if we need to allocate stack space */
1236 int calls_p
; /* true if the function makes any calls */
1237 int main_p
; /* true if this is main */
1238 int main_save_p
; /* true if this is main and we need to save args */
1239 int fpmem_p
; /* true if float/int conversion temp needed */
1240 enum rs6000_abi abi
; /* which ABI to use */
1241 int gp_save_offset
; /* offset to save GP regs from initial SP */
1242 int fp_save_offset
; /* offset to save FP regs from initial SP */
1243 int lr_save_offset
; /* offset to save LR from initial SP */
1244 int cr_save_offset
; /* offset to save CR from initial SP */
1245 int toc_save_offset
; /* offset to save the TOC pointer */
1246 int varargs_save_offset
; /* offset to save the varargs registers */
1247 int main_save_offset
; /* offset to save main's args */
1248 int fpmem_offset
; /* offset for float/int conversion temp */
1249 int reg_size
; /* register size (4 or 8) */
1250 int varargs_size
; /* size to hold V.4 args passed in regs */
1251 int vars_size
; /* variable save area size */
1252 int parm_size
; /* outgoing parameter size */
1253 int main_size
; /* size to hold saving main's args */
1254 int save_size
; /* save area size */
1255 int fixed_size
; /* fixed size of stack frame */
1256 int gp_size
; /* size of saved GP registers */
1257 int fp_size
; /* size of saved FP registers */
1258 int cr_size
; /* size to hold CR if not in save_size */
1259 int lr_size
; /* size to hold LR if not in save_size */
1260 int fpmem_size
; /* size to hold float/int conversion */
1261 int toc_size
; /* size to hold TOC if not in save_size */
1262 int total_size
; /* total bytes allocated for stack */
1265 /* Define this if pushing a word on the stack
1266 makes the stack pointer a smaller address. */
1267 #define STACK_GROWS_DOWNWARD
1269 /* Define this if the nominal address of the stack frame
1270 is at the high-address end of the local variables;
1271 that is, each additional local variable allocated
1272 goes at a more negative offset in the frame.
1274 On the RS/6000, we grow upwards, from the area after the outgoing
1276 /* #define FRAME_GROWS_DOWNWARD */
1278 /* Size of the outgoing register save area */
1279 #define RS6000_REG_SAVE (TARGET_32BIT ? 32 : 64)
1281 /* Size of the fixed area on the stack */
1282 #define RS6000_SAVE_AREA (TARGET_32BIT ? 24 : 48)
1284 /* MEM representing address to save the TOC register */
1285 #define RS6000_SAVE_TOC gen_rtx_MEM (Pmode, \
1286 plus_constant (stack_pointer_rtx, \
1287 (TARGET_32BIT ? 20 : 40)))
1289 /* Offset & size for fpmem stack locations used for converting between
1290 float and integral types. */
1291 extern int rs6000_fpmem_offset
;
1292 extern int rs6000_fpmem_size
;
1294 /* Size of the V.4 varargs area if needed */
1295 #define RS6000_VARARGS_AREA 0
1297 /* Whether a V.4 varargs area is needed */
1298 extern int rs6000_sysv_varargs_p
;
1300 /* Align an address */
1301 #define RS6000_ALIGN(n,a) (((n) + (a) - 1) & ~((a) - 1))
1303 /* Initialize data used by insn expanders. This is called from
1304 init_emit, once for each function, before code is generated. */
1305 #define INIT_EXPANDERS rs6000_init_expanders ()
1307 /* Size of V.4 varargs area in bytes */
1308 #define RS6000_VARARGS_SIZE \
1309 ((GP_ARG_NUM_REG * (TARGET_32BIT ? 4 : 8)) + (FP_ARG_NUM_REG * 8) + 8)
1311 /* Offset within stack frame to start allocating local variables at.
1312 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1313 first local allocated. Otherwise, it is the offset to the BEGINNING
1314 of the first local allocated.
1316 On the RS/6000, the frame pointer is the same as the stack pointer,
1317 except for dynamic allocations. So we start after the fixed area and
1318 outgoing parameter area. */
1320 #define STARTING_FRAME_OFFSET \
1321 (RS6000_ALIGN (current_function_outgoing_args_size, 8) \
1322 + RS6000_VARARGS_AREA \
1325 /* Offset from the stack pointer register to an item dynamically
1326 allocated on the stack, e.g., by `alloca'.
1328 The default value for this macro is `STACK_POINTER_OFFSET' plus the
1329 length of the outgoing arguments. The default is correct for most
1330 machines. See `function.c' for details. */
1331 #define STACK_DYNAMIC_OFFSET(FUNDECL) \
1332 (RS6000_ALIGN (current_function_outgoing_args_size, 8) \
1333 + (STACK_POINTER_OFFSET))
1335 /* If we generate an insn to push BYTES bytes,
1336 this says how many the stack pointer really advances by.
1337 On RS/6000, don't define this because there are no push insns. */
1338 /* #define PUSH_ROUNDING(BYTES) */
1340 /* Offset of first parameter from the argument pointer register value.
1341 On the RS/6000, we define the argument pointer to the start of the fixed
1343 #define FIRST_PARM_OFFSET(FNDECL) RS6000_SAVE_AREA
1345 /* Define this if stack space is still allocated for a parameter passed
1346 in a register. The value is the number of bytes allocated to this
1348 #define REG_PARM_STACK_SPACE(FNDECL) RS6000_REG_SAVE
1350 /* Define this if the above stack space is to be considered part of the
1351 space allocated by the caller. */
1352 #define OUTGOING_REG_PARM_STACK_SPACE
1354 /* This is the difference between the logical top of stack and the actual sp.
1356 For the RS/6000, sp points past the fixed area. */
1357 #define STACK_POINTER_OFFSET RS6000_SAVE_AREA
1359 /* Define this if the maximum size of all the outgoing args is to be
1360 accumulated and pushed during the prologue. The amount can be
1361 found in the variable current_function_outgoing_args_size. */
1362 #define ACCUMULATE_OUTGOING_ARGS
1364 /* Value is the number of bytes of arguments automatically
1365 popped when returning from a subroutine call.
1366 FUNDECL is the declaration node of the function (as a tree),
1367 FUNTYPE is the data type of the function (as a tree),
1368 or for a library call it is an identifier node for the subroutine name.
1369 SIZE is the number of bytes of arguments passed on the stack. */
1371 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1373 /* Define how to find the value returned by a function.
1374 VALTYPE is the data type of the value (as a tree).
1375 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1376 otherwise, FUNC is 0.
1378 On RS/6000 an integer value is in r3 and a floating-point value is in
1379 fp1, unless -msoft-float. */
1381 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1382 gen_rtx_REG ((INTEGRAL_TYPE_P (VALTYPE) \
1383 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
1384 || POINTER_TYPE_P (VALTYPE) \
1385 ? word_mode : TYPE_MODE (VALTYPE), \
1386 TREE_CODE (VALTYPE) == REAL_TYPE && TARGET_HARD_FLOAT ? 33 : 3)
1388 /* Define how to find the value returned by a library function
1389 assuming the value has mode MODE. */
1391 #define LIBCALL_VALUE(MODE) \
1392 gen_rtx_REG (MODE, (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1393 && TARGET_HARD_FLOAT ? 33 : 3))
1395 /* The definition of this macro implies that there are cases where
1396 a scalar value cannot be returned in registers.
1398 For the RS/6000, any structure or union type is returned in memory, except for
1399 Solaris, which returns structures <= 8 bytes in registers. */
1401 #define RETURN_IN_MEMORY(TYPE) \
1402 (TYPE_MODE (TYPE) == BLKmode \
1403 && (DEFAULT_ABI != ABI_SOLARIS || int_size_in_bytes (TYPE) > 8))
1405 /* Mode of stack savearea.
1406 FUNCTION is VOIDmode because calling convention maintains SP.
1407 BLOCK needs Pmode for SP.
1408 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
1409 #define STACK_SAVEAREA_MODE(LEVEL) \
1410 (LEVEL == SAVE_FUNCTION ? VOIDmode \
1411 : LEVEL == SAVE_NONLOCAL ? (TARGET_32BIT ? DImode : TImode) : Pmode)
1413 /* Minimum and maximum general purpose registers used to hold arguments. */
1414 #define GP_ARG_MIN_REG 3
1415 #define GP_ARG_MAX_REG 10
1416 #define GP_ARG_NUM_REG (GP_ARG_MAX_REG - GP_ARG_MIN_REG + 1)
1418 /* Minimum and maximum floating point registers used to hold arguments. */
1419 #define FP_ARG_MIN_REG 33
1420 #define FP_ARG_AIX_MAX_REG 45
1421 #define FP_ARG_V4_MAX_REG 40
1422 #define FP_ARG_MAX_REG FP_ARG_AIX_MAX_REG
1423 #define FP_ARG_NUM_REG (FP_ARG_MAX_REG - FP_ARG_MIN_REG + 1)
1425 /* Return registers */
1426 #define GP_ARG_RETURN GP_ARG_MIN_REG
1427 #define FP_ARG_RETURN FP_ARG_MIN_REG
1429 /* Flags for the call/call_value rtl operations set up by function_arg */
1430 #define CALL_NORMAL 0x00000000 /* no special processing */
1431 #define CALL_NT_DLLIMPORT 0x00000001 /* NT, this is a DLL import call */
1432 #define CALL_V4_CLEAR_FP_ARGS 0x00000002 /* V.4, no FP args passed */
1433 #define CALL_V4_SET_FP_ARGS 0x00000004 /* V.4, FP args were passed */
1434 #define CALL_LONG 0x00000008 /* always call indirect */
1436 /* Define cutoff for using external functions to save floating point */
1437 #define FP_SAVE_INLINE(FIRST_REG) ((FIRST_REG) == 62 || (FIRST_REG) == 63)
1439 /* 1 if N is a possible register number for a function value
1440 as seen by the caller.
1442 On RS/6000, this is r3 and fp1. */
1443 #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_ARG_RETURN || ((N) == FP_ARG_RETURN))
1445 /* 1 if N is a possible register number for function argument passing.
1446 On RS/6000, these are r3-r10 and fp1-fp13. */
1447 #define FUNCTION_ARG_REGNO_P(N) \
1448 (((unsigned)((N) - GP_ARG_MIN_REG) < (unsigned)(GP_ARG_NUM_REG)) \
1449 || ((unsigned)((N) - FP_ARG_MIN_REG) < (unsigned)(FP_ARG_NUM_REG)))
1452 /* Define a data type for recording info about an argument list
1453 during the scan of that argument list. This data type should
1454 hold all necessary information about the function itself
1455 and about the args processed so far, enough to enable macros
1456 such as FUNCTION_ARG to determine where the next arg should go.
1458 On the RS/6000, this is a structure. The first element is the number of
1459 total argument words, the second is used to store the next
1460 floating-point register number, and the third says how many more args we
1461 have prototype types for.
1463 For ABI_V4, we treat these slightly differently -- `sysv_gregno' is
1464 the next availible GP register, `fregno' is the next available FP
1465 register, and `words' is the number of words used on the stack.
1467 The varargs/stdarg support requires that this structure's size
1468 be a multiple of sizeof(int). */
1470 typedef struct rs6000_args
1472 int words
; /* # words used for passing GP registers */
1473 int fregno
; /* next available FP register */
1474 int nargs_prototype
; /* # args left in the current prototype */
1475 int orig_nargs
; /* Original value of nargs_prototype */
1476 int prototype
; /* Whether a prototype was defined */
1477 int call_cookie
; /* Do special things for this call */
1478 int sysv_gregno
; /* next available GP register */
1481 /* Define intermediate macro to compute the size (in registers) of an argument
1484 #define RS6000_ARG_SIZE(MODE, TYPE, NAMED) \
1486 : (MODE) != BLKmode \
1487 ? (GET_MODE_SIZE (MODE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD \
1488 : (int_size_in_bytes (TYPE) + (UNITS_PER_WORD - 1)) / UNITS_PER_WORD)
1490 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1491 for a call to a function whose data type is FNTYPE.
1492 For a library call, FNTYPE is 0. */
1494 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
1495 init_cumulative_args (&CUM, FNTYPE, LIBNAME, FALSE)
1497 /* Similar, but when scanning the definition of a procedure. We always
1498 set NARGS_PROTOTYPE large so we never return an EXPR_LIST. */
1500 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,LIBNAME) \
1501 init_cumulative_args (&CUM, FNTYPE, LIBNAME, TRUE)
1503 /* Update the data in CUM to advance over an argument
1504 of mode MODE and data type TYPE.
1505 (TYPE is null for libcalls where that information may not be available.) */
1507 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1508 function_arg_advance (&CUM, MODE, TYPE, NAMED)
1510 /* Non-zero if we can use a floating-point register to pass this arg. */
1511 #define USE_FP_FOR_ARG_P(CUM,MODE,TYPE) \
1512 (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1513 && (CUM).fregno <= FP_ARG_MAX_REG \
1514 && TARGET_HARD_FLOAT)
1516 /* Determine where to put an argument to a function.
1517 Value is zero to push the argument on the stack,
1518 or a hard register in which to store the argument.
1520 MODE is the argument's machine mode.
1521 TYPE is the data type of the argument (as a tree).
1522 This is null for libcalls where that information may
1524 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1525 the preceding args and about the function being called.
1526 NAMED is nonzero if this argument is a named parameter
1527 (otherwise it is an extra parameter matching an ellipsis).
1529 On RS/6000 the first eight words of non-FP are normally in registers
1530 and the rest are pushed. The first 13 FP args are in registers.
1532 If this is floating-point and no prototype is specified, we use
1533 both an FP and integer register (or possibly FP reg and stack). Library
1534 functions (when TYPE is zero) always have the proper types for args,
1535 so we can pass the FP value just in one register. emit_library_function
1536 doesn't support EXPR_LIST anyway. */
1538 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1539 function_arg (&CUM, MODE, TYPE, NAMED)
1541 /* For an arg passed partly in registers and partly in memory,
1542 this is the number of registers used.
1543 For args passed entirely in registers or entirely in memory, zero. */
1545 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
1546 function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED)
1548 /* A C expression that indicates when an argument must be passed by
1549 reference. If nonzero for an argument, a copy of that argument is
1550 made in memory and a pointer to the argument is passed instead of
1551 the argument itself. The pointer is passed in whatever way is
1552 appropriate for passing a pointer to that type. */
1554 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1555 function_arg_pass_by_reference(&CUM, MODE, TYPE, NAMED)
1557 /* If defined, a C expression which determines whether, and in which
1558 direction, to pad out an argument with extra space. The value
1559 should be of type `enum direction': either `upward' to pad above
1560 the argument, `downward' to pad below, or `none' to inhibit
1563 #define FUNCTION_ARG_PADDING(MODE, TYPE) \
1564 (enum direction) function_arg_padding (MODE, TYPE)
1566 /* If defined, a C expression that gives the alignment boundary, in bits,
1567 of an argument with the specified mode and type. If it is not defined,
1568 PARM_BOUNDARY is used for all arguments. */
1570 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
1571 function_arg_boundary (MODE, TYPE)
1573 /* Perform any needed actions needed for a function that is receiving a
1574 variable number of arguments.
1578 MODE and TYPE are the mode and type of the current parameter.
1580 PRETEND_SIZE is a variable that should be set to the amount of stack
1581 that must be pushed by the prolog to pretend that our caller pushed
1584 Normally, this macro will push all remaining incoming registers on the
1585 stack and set PRETEND_SIZE to the length of the registers pushed. */
1587 #define SETUP_INCOMING_VARARGS(CUM,MODE,TYPE,PRETEND_SIZE,NO_RTL) \
1588 setup_incoming_varargs (&CUM, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
1590 /* Define the `__builtin_va_list' type for the ABI. */
1591 #define BUILD_VA_LIST_TYPE(VALIST) \
1592 (VALIST) = rs6000_build_va_list ()
1594 /* Implement `va_start' for varargs and stdarg. */
1595 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1596 rs6000_va_start (stdarg, valist, nextarg)
1598 /* Implement `va_arg'. */
1599 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1600 rs6000_va_arg (valist, type)
1602 /* This macro generates the assembly code for function entry.
1603 FILE is a stdio stream to output the code to.
1604 SIZE is an int: how many units of temporary storage to allocate.
1605 Refer to the array `regs_ever_live' to determine which registers
1606 to save; `regs_ever_live[I]' is nonzero if register number I
1607 is ever used in the function. This macro is responsible for
1608 knowing which registers should not be saved even if used. */
1610 #define FUNCTION_PROLOGUE(FILE, SIZE) output_prolog (FILE, SIZE)
1612 /* Output assembler code to FILE to increment profiler label # LABELNO
1613 for profiling a function entry. */
1615 #define FUNCTION_PROFILER(FILE, LABELNO) \
1616 output_function_profiler ((FILE), (LABELNO));
1618 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1619 the stack pointer does not matter. No definition is equivalent to
1622 On the RS/6000, this is non-zero because we can restore the stack from
1623 its backpointer, which we maintain. */
1624 #define EXIT_IGNORE_STACK 1
1626 /* This macro generates the assembly code for function exit,
1627 on machines that need it. If FUNCTION_EPILOGUE is not defined
1628 then individual return instructions are generated for each
1629 return statement. Args are same as for FUNCTION_PROLOGUE.
1631 The function epilogue should not depend on the current stack pointer!
1632 It should use the frame pointer only. This is mandatory because
1633 of alloca; we also take advantage of it to omit stack adjustments
1634 before returning. */
1636 #define FUNCTION_EPILOGUE(FILE, SIZE) output_epilog (FILE, SIZE)
1638 /* A C compound statement that outputs the assembler code for a thunk function,
1639 used to implement C++ virtual function calls with multiple inheritance. The
1640 thunk acts as a wrapper around a virtual function, adjusting the implicit
1641 object parameter before handing control off to the real function.
1643 First, emit code to add the integer DELTA to the location that contains the
1644 incoming first argument. Assume that this argument contains a pointer, and
1645 is the one used to pass the `this' pointer in C++. This is the incoming
1646 argument *before* the function prologue, e.g. `%o0' on a sparc. The
1647 addition must preserve the values of all other incoming arguments.
1649 After the addition, emit code to jump to FUNCTION, which is a
1650 `FUNCTION_DECL'. This is a direct pure jump, not a call, and does not touch
1651 the return address. Hence returning from FUNCTION will return to whoever
1652 called the current `thunk'.
1654 The effect must be as if FUNCTION had been called directly with the adjusted
1655 first argument. This macro is responsible for emitting all of the code for
1656 a thunk function; `FUNCTION_PROLOGUE' and `FUNCTION_EPILOGUE' are not
1659 The THUNK_FNDECL is redundant. (DELTA and FUNCTION have already been
1660 extracted from it.) It might possibly be useful on some targets, but
1663 If you do not define this macro, the target-independent code in the C++
1664 frontend will generate a less efficient heavyweight thunk that calls
1665 FUNCTION instead of jumping to it. The generic approach does not support
1668 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
1669 output_mi_thunk (FILE, THUNK_FNDECL, DELTA, FUNCTION)
1672 /* TRAMPOLINE_TEMPLATE deleted */
1674 /* Length in units of the trampoline for entering a nested function. */
1676 #define TRAMPOLINE_SIZE rs6000_trampoline_size ()
1678 /* Emit RTL insns to initialize the variable parts of a trampoline.
1679 FNADDR is an RTX for the address of the function's pure code.
1680 CXT is an RTX for the static chain value for the function. */
1682 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
1683 rs6000_initialize_trampoline (ADDR, FNADDR, CXT)
1685 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1686 with arguments ARGS is a valid machine specific attribute for DECL.
1687 The attributes in ATTRIBUTES have previously been assigned to DECL. */
1689 #define VALID_MACHINE_DECL_ATTRIBUTE(DECL, ATTRIBUTES, NAME, ARGS) \
1690 (rs6000_valid_decl_attribute_p (DECL, ATTRIBUTES, NAME, ARGS))
1692 /* If defined, a C expression whose value is nonzero if IDENTIFIER
1693 with arguments ARGS is a valid machine specific attribute for TYPE.
1694 The attributes in ATTRIBUTES have previously been assigned to TYPE. */
1696 #define VALID_MACHINE_TYPE_ATTRIBUTE(TYPE, ATTRIBUTES, NAME, ARGS) \
1697 (rs6000_valid_type_attribute_p (TYPE, ATTRIBUTES, NAME, ARGS))
1699 /* If defined, a C expression whose value is zero if the attributes on
1700 TYPE1 and TYPE2 are incompatible, one if they are compatible, and
1701 two if they are nearly compatible (which causes a warning to be
1704 #define COMP_TYPE_ATTRIBUTES(TYPE1, TYPE2) \
1705 (rs6000_comp_type_attributes (TYPE1, TYPE2))
1707 /* If defined, a C statement that assigns default attributes to newly
1710 #define SET_DEFAULT_TYPE_ATTRIBUTES(TYPE) \
1711 (rs6000_set_default_type_attributes (TYPE))
1714 /* Definitions for __builtin_return_address and __builtin_frame_address.
1715 __builtin_return_address (0) should give link register (65), enable
1717 /* This should be uncommented, so that the link register is used, but
1718 currently this would result in unmatched insns and spilling fixed
1719 registers so we'll leave it for another day. When these problems are
1720 taken care of one additional fetch will be necessary in RETURN_ADDR_RTX.
1722 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */
1724 /* Number of bytes into the frame return addresses can be found. See
1725 rs6000_stack_info in rs6000.c for more information on how the different
1726 abi's store the return address. */
1727 #define RETURN_ADDRESS_OFFSET \
1728 ((DEFAULT_ABI == ABI_AIX \
1729 || DEFAULT_ABI == ABI_AIX_NODESC) ? 8 : \
1730 (DEFAULT_ABI == ABI_V4 \
1731 || DEFAULT_ABI == ABI_SOLARIS) ? (TARGET_32BIT ? 4 : 8) : \
1732 (DEFAULT_ABI == ABI_NT) ? -4 : \
1733 (fatal ("RETURN_ADDRESS_OFFSET not supported"), 0))
1735 /* The current return address is in link register (65). The return address
1736 of anything farther back is accessed normally at an offset of 8 from the
1738 #define RETURN_ADDR_RTX(count, frame) \
1740 ? gen_rtx_REG (Pmode, 65) \
1741 : gen_rtx_MEM (Pmode, \
1744 plus_constant (copy_to_reg \
1745 (gen_rtx_MEM (Pmode, \
1746 memory_address (Pmode, \
1748 RETURN_ADDRESS_OFFSET))))
1750 /* Definitions for register eliminations.
1752 We have two registers that can be eliminated on the RS/6000. First, the
1753 frame pointer register can often be eliminated in favor of the stack
1754 pointer register. Secondly, the argument pointer register can always be
1755 eliminated; it is replaced with either the stack or frame pointer.
1757 In addition, we use the elimination mechanism to see if r30 is needed
1758 Initially we assume that it isn't. If it is, we spill it. This is done
1759 by making it an eliminable register. We replace it with itself so that
1760 if it isn't needed, then existing uses won't be modified. */
1762 /* This is an array of structures. Each structure initializes one pair
1763 of eliminable registers. The "from" register number is given first,
1764 followed by "to". Eliminations of the same "from" register are listed
1765 in order of preference. */
1766 #define ELIMINABLE_REGS \
1767 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1768 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
1769 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
1772 /* Given FROM and TO register numbers, say whether this elimination is allowed.
1773 Frame pointer elimination is automatically handled.
1775 For the RS/6000, if frame pointer elimination is being done, we would like
1776 to convert ap into fp, not sp.
1778 We need r30 if -mminimal-toc was specified, and there are constant pool
1781 #define CAN_ELIMINATE(FROM, TO) \
1782 ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM \
1783 ? ! frame_pointer_needed \
1784 : (FROM) == 30 ? ! TARGET_MINIMAL_TOC || TARGET_NO_TOC || get_pool_size () == 0 \
1787 /* Define the offset between two registers, one to be eliminated, and the other
1788 its replacement, at the start of a routine. */
1789 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
1791 rs6000_stack_t *info = rs6000_stack_info (); \
1793 if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1794 (OFFSET) = (info->push_p) ? 0 : - info->total_size; \
1795 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == FRAME_POINTER_REGNUM) \
1796 (OFFSET) = info->total_size; \
1797 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
1798 (OFFSET) = (info->push_p) ? info->total_size : 0; \
1799 else if ((FROM) == 30) \
1805 /* Addressing modes, and classification of registers for them. */
1807 /* #define HAVE_POST_INCREMENT 0 */
1808 /* #define HAVE_POST_DECREMENT 0 */
1810 #define HAVE_PRE_DECREMENT 1
1811 #define HAVE_PRE_INCREMENT 1
1813 /* Macros to check register numbers against specific register classes. */
1815 /* These assume that REGNO is a hard or pseudo reg number.
1816 They give nonzero only if REGNO is a hard reg of the suitable class
1817 or a pseudo reg currently allocated to a suitable hard reg.
1818 Since they use reg_renumber, they are safe only once reg_renumber
1819 has been allocated, which happens in local-alloc.c. */
1821 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1822 ((REGNO) < FIRST_PSEUDO_REGISTER \
1823 ? (REGNO) <= 31 || (REGNO) == 67 \
1824 : (reg_renumber[REGNO] >= 0 \
1825 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
1827 #define REGNO_OK_FOR_BASE_P(REGNO) \
1828 ((REGNO) < FIRST_PSEUDO_REGISTER \
1829 ? ((REGNO) > 0 && (REGNO) <= 31) || (REGNO) == 67 \
1830 : (reg_renumber[REGNO] > 0 \
1831 && (reg_renumber[REGNO] <= 31 || reg_renumber[REGNO] == 67)))
1833 /* Maximum number of registers that can appear in a valid memory address. */
1835 #define MAX_REGS_PER_ADDRESS 2
1837 /* Recognize any constant value that is a valid address. */
1839 #define CONSTANT_ADDRESS_P(X) \
1840 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1841 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1842 || GET_CODE (X) == HIGH)
1844 /* Nonzero if the constant value X is a legitimate general operand.
1845 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.
1847 On the RS/6000, all integer constants are acceptable, most won't be valid
1848 for particular insns, though. Only easy FP constants are
1851 #define LEGITIMATE_CONSTANT_P(X) \
1852 (GET_CODE (X) != CONST_DOUBLE || GET_MODE (X) == VOIDmode \
1853 || (TARGET_POWERPC64 && GET_MODE (X) == DImode) \
1854 || easy_fp_constant (X, GET_MODE (X)))
1856 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1857 and check its validity for a certain class.
1858 We have two alternate definitions for each of them.
1859 The usual definition accepts all pseudo regs; the other rejects
1860 them unless they have been allocated suitable hard regs.
1861 The symbol REG_OK_STRICT causes the latter definition to be used.
1863 Most source files want to accept pseudo regs in the hope that
1864 they will get allocated to the class that the insn wants them to be in.
1865 Source files for reload pass need to be strict.
1866 After reload, it makes no difference, since pseudo regs have
1867 been eliminated by then. */
1869 #ifndef REG_OK_STRICT
1871 /* Nonzero if X is a hard reg that can be used as an index
1872 or if it is a pseudo reg. */
1873 #define REG_OK_FOR_INDEX_P(X) \
1874 (REGNO (X) <= 31 || REGNO (X) == 67 || REGNO (X) >= FIRST_PSEUDO_REGISTER)
1876 /* Nonzero if X is a hard reg that can be used as a base reg
1877 or if it is a pseudo reg. */
1878 #define REG_OK_FOR_BASE_P(X) \
1879 (REGNO (X) > 0 && REG_OK_FOR_INDEX_P (X))
1883 /* Nonzero if X is a hard reg that can be used as an index. */
1884 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1885 /* Nonzero if X is a hard reg that can be used as a base reg. */
1886 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1890 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1891 that is a valid memory address for an instruction.
1892 The MODE argument is the machine mode for the MEM expression
1893 that wants to use this address.
1895 On the RS/6000, there are four valid address: a SYMBOL_REF that
1896 refers to a constant pool entry of an address (or the sum of it
1897 plus a constant), a short (16-bit signed) constant plus a register,
1898 the sum of two registers, or a register indirect, possibly with an
1899 auto-increment. For DFmode and DImode with an constant plus register,
1900 we must ensure that both words are addressable or PowerPC64 with offset
1903 For modes spanning multiple registers (DFmode in 32-bit GPRs,
1904 32-bit DImode, TImode), indexed addressing cannot be used because
1905 adjacent memory cells are accessed by adding word-sized offsets
1906 during assembly output. */
1908 #define LEGITIMATE_CONSTANT_POOL_BASE_P(X) \
1909 (TARGET_TOC && GET_CODE (X) == SYMBOL_REF \
1910 && CONSTANT_POOL_ADDRESS_P (X) \
1911 && ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (get_pool_constant (X)))
1913 /* AIX64 guaranteed to have 64 bit TOC alignment. */
1914 #define LEGITIMATE_CONSTANT_POOL_ADDRESS_P(X) \
1915 (LEGITIMATE_CONSTANT_POOL_BASE_P (X) \
1917 && GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
1918 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
1919 && LEGITIMATE_CONSTANT_POOL_BASE_P (XEXP (XEXP (X, 0), 0))))
1921 #define LEGITIMATE_SMALL_DATA_P(MODE, X) \
1922 ((DEFAULT_ABI == ABI_V4 || DEFAULT_ABI == ABI_SOLARIS) \
1923 && !flag_pic && !TARGET_TOC \
1924 && (GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == CONST) \
1925 && small_data_operand (X, MODE))
1927 #define LEGITIMATE_ADDRESS_INTEGER_P(X,OFFSET) \
1928 (GET_CODE (X) == CONST_INT \
1929 && (unsigned HOST_WIDE_INT) (INTVAL (X) + (OFFSET) + 0x8000) < 0x10000)
1931 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE,X) \
1932 (GET_CODE (X) == PLUS \
1933 && GET_CODE (XEXP (X, 0)) == REG \
1934 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1935 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 0) \
1936 && (((MODE) != DFmode && (MODE) != DImode) \
1938 ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 4) \
1939 : ! (INTVAL (XEXP (X, 1)) & 3))) \
1940 && ((MODE) != TImode \
1942 ? LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 12) \
1943 : (LEGITIMATE_ADDRESS_INTEGER_P (XEXP (X, 1), 8) \
1944 && ! (INTVAL (XEXP (X, 1)) & 3)))))
1946 #define LEGITIMATE_INDEXED_ADDRESS_P(X) \
1947 (GET_CODE (X) == PLUS \
1948 && GET_CODE (XEXP (X, 0)) == REG \
1949 && GET_CODE (XEXP (X, 1)) == REG \
1950 && ((REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1951 && REG_OK_FOR_INDEX_P (XEXP (X, 1))) \
1952 || (REG_OK_FOR_BASE_P (XEXP (X, 1)) \
1953 && REG_OK_FOR_INDEX_P (XEXP (X, 0)))))
1955 #define LEGITIMATE_INDIRECT_ADDRESS_P(X) \
1956 (GET_CODE (X) == REG && REG_OK_FOR_BASE_P (X))
1958 #define LEGITIMATE_LO_SUM_ADDRESS_P(MODE, X) \
1960 && ! flag_pic && ! TARGET_TOC \
1961 && (MODE) != DImode \
1962 && (MODE) != TImode \
1963 && (TARGET_HARD_FLOAT || (MODE) != DFmode) \
1964 && GET_CODE (X) == LO_SUM \
1965 && GET_CODE (XEXP (X, 0)) == REG \
1966 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1967 && CONSTANT_P (XEXP (X, 1)))
1969 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1970 { if (LEGITIMATE_INDIRECT_ADDRESS_P (X)) \
1972 if ((GET_CODE (X) == PRE_INC || GET_CODE (X) == PRE_DEC) \
1974 && LEGITIMATE_INDIRECT_ADDRESS_P (XEXP (X, 0))) \
1976 if (LEGITIMATE_SMALL_DATA_P (MODE, X)) \
1978 if (LEGITIMATE_CONSTANT_POOL_ADDRESS_P (X)) \
1980 if (LEGITIMATE_OFFSET_ADDRESS_P (MODE, X)) \
1982 if ((MODE) != TImode \
1983 && (TARGET_HARD_FLOAT || TARGET_POWERPC64 || (MODE) != DFmode) \
1984 && (TARGET_POWERPC64 || (MODE) != DImode) \
1985 && LEGITIMATE_INDEXED_ADDRESS_P (X)) \
1987 if (LEGITIMATE_LO_SUM_ADDRESS_P (MODE, X)) \
1991 /* Try machine-dependent ways of modifying an illegitimate address
1992 to be legitimate. If we find one, return the new, valid address.
1993 This macro is used in only one place: `memory_address' in explow.c.
1995 OLDX is the address as it was before break_out_memory_refs was called.
1996 In some cases it is useful to look at this to decide what needs to be done.
1998 MODE and WIN are passed so that this macro can use
1999 GO_IF_LEGITIMATE_ADDRESS.
2001 It is always safe for this macro to do nothing. It exists to recognize
2002 opportunities to optimize the output.
2004 On RS/6000, first check for the sum of a register with a constant
2005 integer that is out of range. If so, generate code to add the
2006 constant with the low-order 16 bits masked to the register and force
2007 this result into another register (this can be done with `cau').
2008 Then generate an address of REG+(CONST&0xffff), allowing for the
2009 possibility of bit 16 being a one.
2011 Then check for the sum of a register and something not constant, try to
2012 load the other things into a register and return the sum. */
2014 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
2015 { if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
2016 && GET_CODE (XEXP (X, 1)) == CONST_INT \
2017 && (unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) + 0x8000) >= 0x10000) \
2018 { HOST_WIDE_INT high_int, low_int; \
2020 high_int = INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff); \
2021 low_int = INTVAL (XEXP (X, 1)) & 0xffff; \
2022 if (low_int & 0x8000) \
2023 high_int += 0x10000, low_int |= ((HOST_WIDE_INT) -1) << 16; \
2024 sum = force_operand (gen_rtx_PLUS (Pmode, XEXP (X, 0), \
2025 GEN_INT (high_int)), 0); \
2026 (X) = gen_rtx_PLUS (Pmode, sum, GEN_INT (low_int)); \
2029 else if (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 0)) == REG \
2030 && GET_CODE (XEXP (X, 1)) != CONST_INT \
2031 && (TARGET_HARD_FLOAT || TARGET_POWERPC64 || (MODE) != DFmode) \
2032 && (TARGET_POWERPC64 || (MODE) != DImode) \
2033 && (MODE) != TImode) \
2035 (X) = gen_rtx_PLUS (Pmode, XEXP (X, 0), \
2036 force_reg (Pmode, force_operand (XEXP (X, 1), 0))); \
2039 else if (TARGET_ELF && TARGET_32BIT && TARGET_NO_TOC \
2041 && GET_CODE (X) != CONST_INT \
2042 && GET_CODE (X) != CONST_DOUBLE && CONSTANT_P (X) \
2043 && (TARGET_HARD_FLOAT || (MODE) != DFmode) \
2044 && (MODE) != DImode && (MODE) != TImode) \
2046 rtx reg = gen_reg_rtx (Pmode); \
2047 emit_insn (gen_elf_high (reg, (X))); \
2048 (X) = gen_rtx_LO_SUM (Pmode, reg, (X)); \
2053 /* Try a machine-dependent way of reloading an illegitimate address
2054 operand. If we find one, push the reload and jump to WIN. This
2055 macro is used in only one place: `find_reloads_address' in reload.c.
2057 For RS/6000, we wish to handle large displacements off a base
2058 register by splitting the addend across an addiu/addis and the mem insn.
2059 This cuts number of extra insns needed from 3 to 1. */
2061 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_LEVELS,WIN) \
2063 /* We must recognize output that we have already generated ourselves. */ \
2064 if (GET_CODE (X) == PLUS \
2065 && GET_CODE (XEXP (X, 0)) == PLUS \
2066 && GET_CODE (XEXP (XEXP (X, 0), 0)) == REG \
2067 && GET_CODE (XEXP (XEXP (X, 0), 1)) == CONST_INT \
2068 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
2070 push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \
2071 BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \
2075 if (GET_CODE (X) == PLUS \
2076 && GET_CODE (XEXP (X, 0)) == REG \
2077 && REGNO (XEXP (X, 0)) < FIRST_PSEUDO_REGISTER \
2078 && REG_MODE_OK_FOR_BASE_P (XEXP (X, 0), MODE) \
2079 && GET_CODE (XEXP (X, 1)) == CONST_INT) \
2081 HOST_WIDE_INT val = INTVAL (XEXP (X, 1)); \
2082 HOST_WIDE_INT low = ((val & 0xffff) ^ 0x8000) - 0x8000; \
2083 HOST_WIDE_INT high \
2084 = (((val - low) & 0xffffffff) ^ 0x80000000) - 0x80000000; \
2086 /* Check for 32-bit overflow. */ \
2087 if (high + low != val) \
2090 /* Reload the high part into a base reg; leave the low part \
2091 in the mem directly. */ \
2093 X = gen_rtx_PLUS (GET_MODE (X), \
2094 gen_rtx_PLUS (GET_MODE (X), XEXP (X, 0), \
2098 push_reload (XEXP (X, 0), NULL_RTX, &XEXP (X, 0), NULL_PTR, \
2099 BASE_REG_CLASS, GET_MODE (X), VOIDmode, 0, 0, \
2105 /* Go to LABEL if ADDR (a legitimate address expression)
2106 has an effect that depends on the machine mode it is used for.
2108 On the RS/6000 this is true if the address is valid with a zero offset
2109 but not with an offset of four (this means it cannot be used as an
2110 address for DImode or DFmode) or is a pre-increment or decrement. Since
2111 we know it is valid, we just check for an address that is not valid with
2112 an offset of four. */
2114 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
2115 { if (GET_CODE (ADDR) == PLUS \
2116 && LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), 0) \
2117 && ! LEGITIMATE_ADDRESS_INTEGER_P (XEXP (ADDR, 1), \
2118 (TARGET_32BIT ? 4 : 8))) \
2120 if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_INC) \
2122 if (TARGET_UPDATE && GET_CODE (ADDR) == PRE_DEC) \
2124 if (GET_CODE (ADDR) == LO_SUM) \
2128 /* The register number of the register used to address a table of
2129 static data addresses in memory. In some cases this register is
2130 defined by a processor's "application binary interface" (ABI).
2131 When this macro is defined, RTL is generated for this register
2132 once, as with the stack pointer and frame pointer registers. If
2133 this macro is not defined, it is up to the machine-dependent files
2134 to allocate such a register (if necessary). */
2136 #define PIC_OFFSET_TABLE_REGNUM 30
2138 /* Define this macro if the register defined by
2139 `PIC_OFFSET_TABLE_REGNUM' is clobbered by calls. Do not define
2140 this macro if `PPIC_OFFSET_TABLE_REGNUM' is not defined. */
2142 /* #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED */
2144 /* By generating position-independent code, when two different
2145 programs (A and B) share a common library (libC.a), the text of
2146 the library can be shared whether or not the library is linked at
2147 the same address for both programs. In some of these
2148 environments, position-independent code requires not only the use
2149 of different addressing modes, but also special code to enable the
2150 use of these addressing modes.
2152 The `FINALIZE_PIC' macro serves as a hook to emit these special
2153 codes once the function is being compiled into assembly code, but
2154 not before. (It is not done before, because in the case of
2155 compiling an inline function, it would lead to multiple PIC
2156 prologues being included in functions which used inline functions
2157 and were compiled to assembly language.) */
2159 /* #define FINALIZE_PIC */
2161 /* A C expression that is nonzero if X is a legitimate immediate
2162 operand on the target machine when generating position independent
2163 code. You can assume that X satisfies `CONSTANT_P', so you need
2164 not check this. You can also assume FLAG_PIC is true, so you need
2165 not check it either. You need not define this macro if all
2166 constants (including `SYMBOL_REF') can be immediate operands when
2167 generating position independent code. */
2169 /* #define LEGITIMATE_PIC_OPERAND_P (X) */
2171 /* In rare cases, correct code generation requires extra machine
2172 dependent processing between the second jump optimization pass and
2173 delayed branch scheduling. On those machines, define this macro
2174 as a C statement to act on the code starting at INSN.
2176 On the RS/6000, we use it to make sure the GOT_TOC register marker
2177 that FINALIZE_PIC is supposed to remove actually got removed. */
2179 #define MACHINE_DEPENDENT_REORG(INSN) rs6000_reorg (INSN)
2182 /* Define this if some processing needs to be done immediately before
2183 emitting code for an insn. */
2185 /* #define FINAL_PRESCAN_INSN(INSN,OPERANDS,NOPERANDS) */
2187 /* Specify the machine mode that this machine uses
2188 for the index in the tablejump instruction. */
2189 #define CASE_VECTOR_MODE SImode
2191 /* Define as C expression which evaluates to nonzero if the tablejump
2192 instruction expects the table to contain offsets from the address of the
2194 Do not define this if the table should contain absolute addresses. */
2195 #define CASE_VECTOR_PC_RELATIVE 1
2197 /* Specify the tree operation to be used to convert reals to integers. */
2198 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
2200 /* This is the kind of divide that is easiest to do in the general case. */
2201 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
2203 /* Define this as 1 if `char' should by default be signed; else as 0. */
2204 #define DEFAULT_SIGNED_CHAR 0
2206 /* This flag, if defined, says the same insns that convert to a signed fixnum
2207 also convert validly to an unsigned one. */
2209 /* #define FIXUNS_TRUNC_LIKE_FIX_TRUNC */
2211 /* Max number of bytes we can move from memory to memory
2212 in one reasonably fast instruction. */
2213 #define MOVE_MAX (! TARGET_POWERPC64 ? 4 : 8)
2214 #define MAX_MOVE_MAX 8
2216 /* Nonzero if access to memory by bytes is no faster than for words.
2217 Also non-zero if doing byte operations (specifically shifts) in registers
2219 #define SLOW_BYTE_ACCESS 1
2221 /* Define if operations between registers always perform the operation
2222 on the full register even if a narrower mode is specified. */
2223 #define WORD_REGISTER_OPERATIONS
2225 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
2226 will either zero-extend or sign-extend. The value of this macro should
2227 be the code that says which one of the two operations is implicitly
2228 done, NIL if none. */
2229 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
2231 /* Define if loading short immediate values into registers sign extends. */
2232 #define SHORT_IMMEDIATES_SIGN_EXTEND
2234 /* The RS/6000 uses the XCOFF format. */
2236 #define XCOFF_DEBUGGING_INFO
2238 /* Define if the object format being used is COFF or a superset. */
2239 #define OBJECT_FORMAT_COFF
2241 /* Define the magic numbers that we recognize as COFF.
2243 AIX 4.3 adds U803XTOCMAGIC (0757) for 64-bit objects, but collect2.c
2244 does not include files in the correct order to conditionally define
2245 the symbolic name in this macro.
2247 The AIX linker accepts import/export files as object files,
2248 so accept "#!" (0x2321) magic number. */
2249 #define MY_ISCOFF(magic) \
2250 ((magic) == U802WRMAGIC || (magic) == U802ROMAGIC \
2251 || (magic) == U802TOCMAGIC || (magic) == 0757 || (magic) == 0x2321)
2253 /* This is the only version of nm that collect2 can work with. */
2254 #define REAL_NM_FILE_NAME "/usr/ucb/nm"
2256 /* We don't have GAS for the RS/6000 yet, so don't write out special
2257 .stabs in cc1plus. */
2259 #define FASCIST_ASSEMBLER
2261 /* AIX does not have any init/fini or ctor/dtor sections, so create
2262 static constructors and destructors as normal functions. */
2263 /* #define ASM_OUTPUT_CONSTRUCTOR(file, name) */
2264 /* #define ASM_OUTPUT_DESTRUCTOR(file, name) */
2266 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
2267 is done just by pretending it is already truncated. */
2268 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
2270 /* Specify the machine mode that pointers have.
2271 After generation of rtl, the compiler makes no further distinction
2272 between pointers and any other objects of this machine mode. */
2273 #define Pmode (TARGET_32BIT ? SImode : DImode)
2275 /* Mode of a function address in a call instruction (for indexing purposes).
2276 Doesn't matter on RS/6000. */
2277 #define FUNCTION_MODE (TARGET_32BIT ? SImode : DImode)
2279 /* Define this if addresses of constant functions
2280 shouldn't be put through pseudo regs where they can be cse'd.
2281 Desirable on machines where ordinary constants are expensive
2282 but a CALL with constant address is cheap. */
2283 #define NO_FUNCTION_CSE
2285 /* Define this to be nonzero if shift instructions ignore all but the low-order
2288 The sle and sre instructions which allow SHIFT_COUNT_TRUNCATED
2289 have been dropped from the PowerPC architecture. */
2291 #define SHIFT_COUNT_TRUNCATED (TARGET_POWER ? 1 : 0)
2293 /* Compute the cost of computing a constant rtl expression RTX
2294 whose rtx-code is CODE. The body of this macro is a portion
2295 of a switch statement. If the code is computed here,
2296 return it with a return statement. Otherwise, break from the switch.
2298 On the RS/6000, if it is valid in the insn, it is free. So this
2299 always returns 0. */
2301 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
2306 case CONST_DOUBLE: \
2310 /* Provide the costs of a rtl expression. This is in the body of a
2313 #define RTX_COSTS(X,CODE,OUTER_CODE) \
2315 return ((GET_CODE (XEXP (X, 1)) == CONST_INT \
2316 && ((unsigned HOST_WIDE_INT) (INTVAL (XEXP (X, 1)) \
2317 + 0x8000) >= 0x10000) \
2318 && ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \
2319 ? COSTS_N_INSNS (2) \
2320 : COSTS_N_INSNS (1)); \
2324 return ((GET_CODE (XEXP (X, 1)) == CONST_INT \
2325 && (INTVAL (XEXP (X, 1)) & (~ (HOST_WIDE_INT) 0xffff)) != 0 \
2326 && ((INTVAL (XEXP (X, 1)) & 0xffff) != 0)) \
2327 ? COSTS_N_INSNS (2) \
2328 : COSTS_N_INSNS (1)); \
2330 switch (rs6000_cpu) \
2332 case PROCESSOR_RIOS1: \
2333 return (GET_CODE (XEXP (X, 1)) != CONST_INT \
2334 ? COSTS_N_INSNS (5) \
2335 : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
2336 ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
2337 case PROCESSOR_RS64A: \
2338 return (GET_CODE (XEXP (X, 1)) != CONST_INT \
2339 ? GET_MODE (XEXP (X, 1)) != DImode \
2340 ? COSTS_N_INSNS (20) : COSTS_N_INSNS (34) \
2341 : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
2342 ? COSTS_N_INSNS (12) : COSTS_N_INSNS (14)); \
2343 case PROCESSOR_RIOS2: \
2344 case PROCESSOR_MPCCORE: \
2345 case PROCESSOR_PPC604e: \
2346 return COSTS_N_INSNS (2); \
2347 case PROCESSOR_PPC601: \
2348 return COSTS_N_INSNS (5); \
2349 case PROCESSOR_PPC603: \
2350 case PROCESSOR_PPC750: \
2351 return (GET_CODE (XEXP (X, 1)) != CONST_INT \
2352 ? COSTS_N_INSNS (5) \
2353 : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
2354 ? COSTS_N_INSNS (2) : COSTS_N_INSNS (3)); \
2355 case PROCESSOR_PPC403: \
2356 case PROCESSOR_PPC604: \
2357 return COSTS_N_INSNS (4); \
2358 case PROCESSOR_PPC620: \
2359 case PROCESSOR_PPC630: \
2360 return (GET_CODE (XEXP (X, 1)) != CONST_INT \
2361 ? GET_MODE (XEXP (X, 1)) != DImode \
2362 ? COSTS_N_INSNS (4) : COSTS_N_INSNS (7) \
2363 : INTVAL (XEXP (X, 1)) >= -256 && INTVAL (XEXP (X, 1)) <= 255 \
2364 ? COSTS_N_INSNS (3) : COSTS_N_INSNS (4)); \
2368 if (GET_CODE (XEXP (X, 1)) == CONST_INT \
2369 && exact_log2 (INTVAL (XEXP (X, 1))) >= 0) \
2370 return COSTS_N_INSNS (2); \
2371 /* otherwise fall through to normal divide. */ \
2374 switch (rs6000_cpu) \
2376 case PROCESSOR_RIOS1: \
2377 return COSTS_N_INSNS (19); \
2378 case PROCESSOR_RIOS2: \
2379 return COSTS_N_INSNS (13); \
2380 case PROCESSOR_RS64A: \
2381 return (GET_MODE (XEXP (X, 1)) != DImode \
2382 ? COSTS_N_INSNS (65) \
2383 : COSTS_N_INSNS (67)); \
2384 case PROCESSOR_MPCCORE: \
2385 return COSTS_N_INSNS (6); \
2386 case PROCESSOR_PPC403: \
2387 return COSTS_N_INSNS (33); \
2388 case PROCESSOR_PPC601: \
2389 return COSTS_N_INSNS (36); \
2390 case PROCESSOR_PPC603: \
2391 return COSTS_N_INSNS (37); \
2392 case PROCESSOR_PPC604: \
2393 case PROCESSOR_PPC604e: \
2394 return COSTS_N_INSNS (20); \
2395 case PROCESSOR_PPC620: \
2396 case PROCESSOR_PPC630: \
2397 return (GET_MODE (XEXP (X, 1)) != DImode \
2398 ? COSTS_N_INSNS (21) \
2399 : COSTS_N_INSNS (37)); \
2400 case PROCESSOR_PPC750: \
2401 return COSTS_N_INSNS (19); \
2404 return COSTS_N_INSNS (4); \
2406 /* MEM should be slightly more expensive than (plus (reg) (const)) */ \
2409 /* Compute the cost of an address. This is meant to approximate the size
2410 and/or execution delay of an insn using that address. If the cost is
2411 approximated by the RTL complexity, including CONST_COSTS above, as
2412 is usually the case for CISC machines, this macro should not be defined.
2413 For aggressively RISCy machines, only one insn format is allowed, so
2414 this macro should be a constant. The value of this macro only matters
2415 for valid addresses.
2417 For the RS/6000, everything is cost 0. */
2419 #define ADDRESS_COST(RTX) 0
2421 /* Adjust the length of an INSN. LENGTH is the currently-computed length and
2422 should be adjusted to reflect any required changes. This macro is used when
2423 there is some systematic length adjustment required that would be difficult
2424 to express in the length attribute. */
2426 /* #define ADJUST_INSN_LENGTH(X,LENGTH) */
2428 /* Add any extra modes needed to represent the condition code.
2430 For the RS/6000, we need separate modes when unsigned (logical) comparisons
2431 are being done and we need a separate mode for floating-point. We also
2432 use a mode for the case when we are comparing the results of two
2435 #define EXTRA_CC_MODES \
2436 CC(CCUNSmode, "CCUNS") \
2437 CC(CCFPmode, "CCFP") \
2438 CC(CCEQmode, "CCEQ")
2440 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
2441 return the mode to be used for the comparison. For floating-point, CCFPmode
2442 should be used. CCUNSmode should be used for unsigned comparisons.
2443 CCEQmode should be used when we are doing an inequality comparison on
2444 the result of a comparison. CCmode should be used in all other cases. */
2446 #define SELECT_CC_MODE(OP,X,Y) \
2447 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode \
2448 : (OP) == GTU || (OP) == LTU || (OP) == GEU || (OP) == LEU ? CCUNSmode \
2449 : (((OP) == EQ || (OP) == NE) && GET_RTX_CLASS (GET_CODE (X)) == '<' \
2450 ? CCEQmode : CCmode))
2452 /* Define the information needed to generate branch and scc insns. This is
2453 stored from the compare operation. Note that we can't use "rtx" here
2454 since it hasn't been defined! */
2456 extern struct rtx_def
*rs6000_compare_op0
, *rs6000_compare_op1
;
2457 extern int rs6000_compare_fp_p
;
2459 /* Set to non-zero by "fix" operation to indicate that itrunc and
2460 uitrunc must be defined. */
2462 extern int rs6000_trunc_used
;
2464 /* Function names to call to do floating point truncation. */
2466 #define RS6000_ITRUNC "__itrunc"
2467 #define RS6000_UITRUNC "__uitrunc"
2469 /* Prefix and suffix to use to saving floating point */
2470 #ifndef SAVE_FP_PREFIX
2471 #define SAVE_FP_PREFIX "._savef"
2472 #define SAVE_FP_SUFFIX ""
2475 /* Prefix and suffix to use to restoring floating point */
2476 #ifndef RESTORE_FP_PREFIX
2477 #define RESTORE_FP_PREFIX "._restf"
2478 #define RESTORE_FP_SUFFIX ""
2481 /* Function name to call to do profiling. */
2482 #define RS6000_MCOUNT ".__mcount"
2485 /* Control the assembler format that we output. */
2487 /* A C string constant describing how to begin a comment in the target
2488 assembler language. The compiler assumes that the comment will end at
2489 the end of the line. */
2490 #define ASM_COMMENT_START " #"
2492 /* Output at beginning of assembler file.
2494 Initialize the section names for the RS/6000 at this point.
2496 Specify filename, including full path, to assembler.
2498 We want to go into the TOC section so at least one .toc will be emitted.
2499 Also, in order to output proper .bs/.es pairs, we need at least one static
2500 [RW] section emitted.
2502 We then switch back to text to force the gcc2_compiled. label and the space
2503 allocated after it (when profiling) into the text section.
2505 Finally, declare mcount when profiling to make the assembler happy. */
2507 #define ASM_FILE_START(FILE) \
2509 rs6000_gen_section_name (&xcoff_bss_section_name, \
2510 main_input_filename, ".bss_"); \
2511 rs6000_gen_section_name (&xcoff_private_data_section_name, \
2512 main_input_filename, ".rw_"); \
2513 rs6000_gen_section_name (&xcoff_read_only_section_name, \
2514 main_input_filename, ".ro_"); \
2516 fprintf (FILE, "\t.file\t\"%s\"\n", main_input_filename); \
2518 fputs ("\t.machine\t\"ppc64\"\n", FILE); \
2520 if (write_symbols != NO_DEBUG) \
2521 private_data_section (); \
2524 fprintf (FILE, "\t.extern %s\n", RS6000_MCOUNT); \
2525 rs6000_file_start (FILE, TARGET_CPU_DEFAULT); \
2528 /* Output at end of assembler file.
2530 On the RS/6000, referencing data should automatically pull in text. */
2532 #define ASM_FILE_END(FILE) \
2535 fputs ("_section_.text:\n", FILE); \
2537 fputs (TARGET_32BIT \
2538 ? "\t.long _section_.text\n" : "\t.llong _section_.text\n", FILE); \
2541 /* We define this to prevent the name mangler from putting dollar signs into
2544 #define NO_DOLLAR_IN_LABEL
2546 /* We define this to 0 so that gcc will never accept a dollar sign in a
2547 variable name. This is needed because the AIX assembler will not accept
2550 #define DOLLARS_IN_IDENTIFIERS 0
2552 /* Implicit library calls should use memcpy, not bcopy, etc. */
2554 #define TARGET_MEM_FUNCTIONS
2556 /* Define the extra sections we need. We define three: one is the read-only
2557 data section which is used for constants. This is a csect whose name is
2558 derived from the name of the input file. The second is for initialized
2559 global variables. This is a csect whose name is that of the variable.
2560 The third is the TOC. */
2562 #define EXTRA_SECTIONS \
2563 read_only_data, private_data, read_only_private_data, toc, bss
2565 /* Define the name of our readonly data section. */
2567 #define READONLY_DATA_SECTION read_only_data_section
2570 /* Define the name of the section to use for the exception tables.
2571 TODO: test and see if we can use read_only_data_section, if so,
2574 #define EXCEPTION_SECTION data_section
2576 /* If we are referencing a function that is static or is known to be
2577 in this file, make the SYMBOL_REF special. We can use this to indicate
2578 that we can branch to this function without emitting a no-op after the
2579 call. Do not set this flag if the function is weakly defined. */
2581 #define ENCODE_SECTION_INFO(DECL) \
2582 if (TREE_CODE (DECL) == FUNCTION_DECL \
2583 && (TREE_ASM_WRITTEN (DECL) || ! TREE_PUBLIC (DECL)) \
2584 && ! DECL_WEAK (DECL)) \
2585 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1;
2587 /* Indicate that jump tables go in the text section. */
2589 #define JUMP_TABLES_IN_TEXT_SECTION 1
2591 /* Define the routines to implement these extra sections.
2592 BIGGEST_ALIGNMENT is 64, so align the sections that much. */
2594 #define EXTRA_SECTION_FUNCTIONS \
2597 read_only_data_section () \
2599 if (in_section != read_only_data) \
2601 fprintf (asm_out_file, "\t.csect %s[RO],3\n", \
2602 xcoff_read_only_section_name); \
2603 in_section = read_only_data; \
2608 private_data_section () \
2610 if (in_section != private_data) \
2612 fprintf (asm_out_file, "\t.csect %s[RW],3\n", \
2613 xcoff_private_data_section_name); \
2614 in_section = private_data; \
2619 read_only_private_data_section () \
2621 if (in_section != read_only_private_data) \
2623 fprintf (asm_out_file, "\t.csect %s[RO],3\n", \
2624 xcoff_private_data_section_name); \
2625 in_section = read_only_private_data; \
2632 if (TARGET_MINIMAL_TOC) \
2634 /* toc_section is always called at least once from ASM_FILE_START, \
2635 so this is guaranteed to always be defined once and only once \
2637 if (! toc_initialized) \
2639 fputs ("\t.toc\nLCTOC..0:\n", asm_out_file); \
2640 fputs ("\t.tc toc_table[TC],toc_table[RW]\n", asm_out_file); \
2641 toc_initialized = 1; \
2644 if (in_section != toc) \
2645 fprintf (asm_out_file, "\t.csect toc_table[RW]%s\n", \
2646 (TARGET_32BIT ? "" : ",3")); \
2650 if (in_section != toc) \
2651 fputs ("\t.toc\n", asm_out_file); \
2656 /* Flag to say the TOC is initialized */
2657 extern int toc_initialized
;
2659 /* This macro produces the initial definition of a function name.
2660 On the RS/6000, we need to place an extra '.' in the function name and
2661 output the function descriptor.
2663 The csect for the function will have already been created by the
2664 `text_section' call previously done. We do have to go back to that
2667 The third and fourth parameters to the .function pseudo-op (16 and 044)
2668 are placeholders which no longer have any use. */
2670 #define ASM_DECLARE_FUNCTION_NAME(FILE,NAME,DECL) \
2671 { if (TREE_PUBLIC (DECL)) \
2673 fputs ("\t.globl .", FILE); \
2674 RS6000_OUTPUT_BASENAME (FILE, NAME); \
2675 putc ('\n', FILE); \
2679 fputs ("\t.lglobl .", FILE); \
2680 RS6000_OUTPUT_BASENAME (FILE, NAME); \
2681 putc ('\n', FILE); \
2683 fputs ("\t.csect ", FILE); \
2684 RS6000_OUTPUT_BASENAME (FILE, NAME); \
2685 fputs (TARGET_32BIT ? "[DS]\n" : "[DS],3\n", FILE); \
2686 RS6000_OUTPUT_BASENAME (FILE, NAME); \
2687 fputs (":\n", FILE); \
2688 fputs (TARGET_32BIT ? "\t.long ." : "\t.llong .", FILE); \
2689 RS6000_OUTPUT_BASENAME (FILE, NAME); \
2690 fputs (", TOC[tc0], 0\n", FILE); \
2691 fputs (TARGET_32BIT \
2692 ? "\t.csect .text[PR]\n." : "\t.csect .text[PR],3\n.", FILE); \
2693 RS6000_OUTPUT_BASENAME (FILE, NAME); \
2694 fputs (":\n", FILE); \
2695 if (write_symbols == XCOFF_DEBUG) \
2696 xcoffout_declare_function (FILE, DECL, NAME); \
2699 /* Return non-zero if this entry is to be written into the constant pool
2700 in a special way. We do so if this is a SYMBOL_REF, LABEL_REF or a CONST
2701 containing one of them. If -mfp-in-toc (the default), we also do
2702 this for floating-point constants. We actually can only do this
2703 if the FP formats of the target and host machines are the same, but
2704 we can't check that since not every file that uses
2705 GO_IF_LEGITIMATE_ADDRESS_P includes real.h. */
2707 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY_P(X) \
2709 && (GET_CODE (X) == SYMBOL_REF \
2710 || (GET_CODE (X) == CONST && GET_CODE (XEXP (X, 0)) == PLUS \
2711 && GET_CODE (XEXP (XEXP (X, 0), 0)) == SYMBOL_REF) \
2712 || GET_CODE (X) == LABEL_REF \
2713 || (! (TARGET_NO_FP_IN_TOC && ! TARGET_MINIMAL_TOC) \
2714 && GET_CODE (X) == CONST_DOUBLE \
2715 && (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT \
2716 || (TARGET_POWERPC64 && GET_MODE (X) == DImode)))))
2718 && BITS_PER_WORD
== HOST_BITS_PER_INT
)))
2721 /* Select section for constant in constant pool.
2723 On RS/6000, all constants are in the private read-only data area.
2724 However, if this is being placed in the TOC it must be output as a
2727 #define SELECT_RTX_SECTION(MODE, X) \
2728 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
2731 read_only_private_data_section (); \
2734 /* Macro to output a special constant pool entry. Go to WIN if we output
2735 it. Otherwise, it is written the usual way.
2737 On the RS/6000, toc entries are handled this way. */
2739 #define ASM_OUTPUT_SPECIAL_POOL_ENTRY(FILE, X, MODE, ALIGN, LABELNO, WIN) \
2740 { if (ASM_OUTPUT_SPECIAL_POOL_ENTRY_P (X)) \
2742 output_toc (FILE, X, LABELNO); \
2747 /* Select the section for an initialized data object.
2749 On the RS/6000, we have a special section for all variables except those
2752 #define SELECT_SECTION(EXP,RELOC) \
2754 if ((TREE_CODE (EXP) == STRING_CST \
2755 && ! flag_writable_strings) \
2756 || (TREE_CODE_CLASS (TREE_CODE (EXP)) == 'd' \
2757 && TREE_READONLY (EXP) && ! TREE_THIS_VOLATILE (EXP) \
2758 && DECL_INITIAL (EXP) \
2759 && (DECL_INITIAL (EXP) == error_mark_node \
2760 || TREE_CONSTANT (DECL_INITIAL (EXP))) \
2763 if (TREE_PUBLIC (EXP)) \
2764 read_only_data_section (); \
2766 read_only_private_data_section (); \
2770 if (TREE_PUBLIC (EXP)) \
2773 private_data_section (); \
2777 /* This outputs NAME to FILE up to the first null or '['. */
2779 #define RS6000_OUTPUT_BASENAME(FILE, NAME) \
2783 STRIP_NAME_ENCODING (_p, (NAME)); \
2784 assemble_name ((FILE), _p); \
2787 /* Remove any trailing [DS] or the like from the symbol name. */
2789 #define STRIP_NAME_ENCODING(VAR,NAME) \
2792 const char *_name = (NAME); \
2794 if (_name[0] == '*') \
2796 _len = strlen (_name); \
2797 if (_name[_len - 1] != ']') \
2801 char *_new_name = (char *) alloca (_len + 1); \
2802 strcpy (_new_name, _name); \
2803 _new_name[_len - 4] = '\0'; \
2804 (VAR) = _new_name; \
2809 /* Output something to declare an external symbol to the assembler. Most
2810 assemblers don't need this.
2812 If we haven't already, add "[RW]" (or "[DS]" for a function) to the
2813 name. Normally we write this out along with the name. In the few cases
2814 where we can't, it gets stripped off. */
2816 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
2817 { rtx _symref = XEXP (DECL_RTL (DECL), 0); \
2818 if ((TREE_CODE (DECL) == VAR_DECL \
2819 || TREE_CODE (DECL) == FUNCTION_DECL) \
2820 && (NAME)[strlen (NAME) - 1] != ']') \
2822 char *_name = (char *) permalloc (strlen (XSTR (_symref, 0)) + 5); \
2823 strcpy (_name, XSTR (_symref, 0)); \
2824 strcat (_name, TREE_CODE (DECL) == FUNCTION_DECL ? "[DS]" : "[RW]"); \
2825 XSTR (_symref, 0) = _name; \
2827 fputs ("\t.extern ", FILE); \
2828 assemble_name (FILE, XSTR (_symref, 0)); \
2829 if (TREE_CODE (DECL) == FUNCTION_DECL) \
2831 fputs ("\n\t.extern .", FILE); \
2832 RS6000_OUTPUT_BASENAME (FILE, XSTR (_symref, 0)); \
2834 putc ('\n', FILE); \
2837 /* Similar, but for libcall. We only have to worry about the function name,
2838 not that of the descriptor. */
2840 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
2841 { fputs ("\t.extern .", FILE); \
2842 assemble_name (FILE, XSTR (FUN, 0)); \
2843 putc ('\n', FILE); \
2846 /* This is how we tell the assembler that two symbols have the same value. */
2848 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
2850 fputs("\t.set ", FILE); \
2851 assemble_name(FILE, NAME1); \
2853 assemble_name(FILE, NAME2); \
2854 fputc('\n', FILE); \
2857 /* Output to assembler file text saying following lines
2858 may contain character constants, extra white space, comments, etc. */
2860 #define ASM_APP_ON ""
2862 /* Output to assembler file text saying following lines
2863 no longer contain unusual constructs. */
2865 #define ASM_APP_OFF ""
2867 /* Output before instructions.
2868 Text section for 64-bit target may contain 64-bit address jump table. */
2870 #define TEXT_SECTION_ASM_OP (TARGET_32BIT \
2871 ? "\t.csect .text[PR]" : "\t.csect .text[PR],3")
2873 /* Output before writable data.
2874 Align entire section to BIGGEST_ALIGNMENT. */
2876 #define DATA_SECTION_ASM_OP ".csect .data[RW],3"
2878 /* How to refer to registers in assembler output.
2879 This sequence is indexed by compiler's hard-register-number (see above). */
2881 extern char rs6000_reg_names
[][8]; /* register names (0 vs. %r0). */
2883 #define REGISTER_NAMES \
2885 &rs6000_reg_names[ 0][0], /* r0 */ \
2886 &rs6000_reg_names[ 1][0], /* r1 */ \
2887 &rs6000_reg_names[ 2][0], /* r2 */ \
2888 &rs6000_reg_names[ 3][0], /* r3 */ \
2889 &rs6000_reg_names[ 4][0], /* r4 */ \
2890 &rs6000_reg_names[ 5][0], /* r5 */ \
2891 &rs6000_reg_names[ 6][0], /* r6 */ \
2892 &rs6000_reg_names[ 7][0], /* r7 */ \
2893 &rs6000_reg_names[ 8][0], /* r8 */ \
2894 &rs6000_reg_names[ 9][0], /* r9 */ \
2895 &rs6000_reg_names[10][0], /* r10 */ \
2896 &rs6000_reg_names[11][0], /* r11 */ \
2897 &rs6000_reg_names[12][0], /* r12 */ \
2898 &rs6000_reg_names[13][0], /* r13 */ \
2899 &rs6000_reg_names[14][0], /* r14 */ \
2900 &rs6000_reg_names[15][0], /* r15 */ \
2901 &rs6000_reg_names[16][0], /* r16 */ \
2902 &rs6000_reg_names[17][0], /* r17 */ \
2903 &rs6000_reg_names[18][0], /* r18 */ \
2904 &rs6000_reg_names[19][0], /* r19 */ \
2905 &rs6000_reg_names[20][0], /* r20 */ \
2906 &rs6000_reg_names[21][0], /* r21 */ \
2907 &rs6000_reg_names[22][0], /* r22 */ \
2908 &rs6000_reg_names[23][0], /* r23 */ \
2909 &rs6000_reg_names[24][0], /* r24 */ \
2910 &rs6000_reg_names[25][0], /* r25 */ \
2911 &rs6000_reg_names[26][0], /* r26 */ \
2912 &rs6000_reg_names[27][0], /* r27 */ \
2913 &rs6000_reg_names[28][0], /* r28 */ \
2914 &rs6000_reg_names[29][0], /* r29 */ \
2915 &rs6000_reg_names[30][0], /* r30 */ \
2916 &rs6000_reg_names[31][0], /* r31 */ \
2918 &rs6000_reg_names[32][0], /* fr0 */ \
2919 &rs6000_reg_names[33][0], /* fr1 */ \
2920 &rs6000_reg_names[34][0], /* fr2 */ \
2921 &rs6000_reg_names[35][0], /* fr3 */ \
2922 &rs6000_reg_names[36][0], /* fr4 */ \
2923 &rs6000_reg_names[37][0], /* fr5 */ \
2924 &rs6000_reg_names[38][0], /* fr6 */ \
2925 &rs6000_reg_names[39][0], /* fr7 */ \
2926 &rs6000_reg_names[40][0], /* fr8 */ \
2927 &rs6000_reg_names[41][0], /* fr9 */ \
2928 &rs6000_reg_names[42][0], /* fr10 */ \
2929 &rs6000_reg_names[43][0], /* fr11 */ \
2930 &rs6000_reg_names[44][0], /* fr12 */ \
2931 &rs6000_reg_names[45][0], /* fr13 */ \
2932 &rs6000_reg_names[46][0], /* fr14 */ \
2933 &rs6000_reg_names[47][0], /* fr15 */ \
2934 &rs6000_reg_names[48][0], /* fr16 */ \
2935 &rs6000_reg_names[49][0], /* fr17 */ \
2936 &rs6000_reg_names[50][0], /* fr18 */ \
2937 &rs6000_reg_names[51][0], /* fr19 */ \
2938 &rs6000_reg_names[52][0], /* fr20 */ \
2939 &rs6000_reg_names[53][0], /* fr21 */ \
2940 &rs6000_reg_names[54][0], /* fr22 */ \
2941 &rs6000_reg_names[55][0], /* fr23 */ \
2942 &rs6000_reg_names[56][0], /* fr24 */ \
2943 &rs6000_reg_names[57][0], /* fr25 */ \
2944 &rs6000_reg_names[58][0], /* fr26 */ \
2945 &rs6000_reg_names[59][0], /* fr27 */ \
2946 &rs6000_reg_names[60][0], /* fr28 */ \
2947 &rs6000_reg_names[61][0], /* fr29 */ \
2948 &rs6000_reg_names[62][0], /* fr30 */ \
2949 &rs6000_reg_names[63][0], /* fr31 */ \
2951 &rs6000_reg_names[64][0], /* mq */ \
2952 &rs6000_reg_names[65][0], /* lr */ \
2953 &rs6000_reg_names[66][0], /* ctr */ \
2954 &rs6000_reg_names[67][0], /* ap */ \
2956 &rs6000_reg_names[68][0], /* cr0 */ \
2957 &rs6000_reg_names[69][0], /* cr1 */ \
2958 &rs6000_reg_names[70][0], /* cr2 */ \
2959 &rs6000_reg_names[71][0], /* cr3 */ \
2960 &rs6000_reg_names[72][0], /* cr4 */ \
2961 &rs6000_reg_names[73][0], /* cr5 */ \
2962 &rs6000_reg_names[74][0], /* cr6 */ \
2963 &rs6000_reg_names[75][0], /* cr7 */ \
2965 &rs6000_reg_names[76][0], /* fpmem */ \
2968 /* print-rtl can't handle the above REGISTER_NAMES, so define the
2969 following for it. Switch to use the alternate names since
2970 they are more mnemonic. */
2972 #define DEBUG_REGISTER_NAMES \
2974 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
2975 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
2976 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
2977 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", \
2978 "f0", "f1", "f2", "f3", "f4", "f5", "f6", "f7", \
2979 "f8", "f9", "f10", "f11", "f12", "f13", "f14", "f15", \
2980 "f16", "f17", "f18", "f19", "f20", "f21", "f22", "f23", \
2981 "f24", "f25", "f26", "f27", "f28", "f29", "f30", "f31", \
2982 "mq", "lr", "ctr", "ap", \
2983 "cr0", "cr1", "cr2", "cr3", "cr4", "cr5", "cr6", "cr7", \
2987 /* Table of additional register names to use in user input. */
2989 #define ADDITIONAL_REGISTER_NAMES \
2990 {{"r0", 0}, {"r1", 1}, {"r2", 2}, {"r3", 3}, \
2991 {"r4", 4}, {"r5", 5}, {"r6", 6}, {"r7", 7}, \
2992 {"r8", 8}, {"r9", 9}, {"r10", 10}, {"r11", 11}, \
2993 {"r12", 12}, {"r13", 13}, {"r14", 14}, {"r15", 15}, \
2994 {"r16", 16}, {"r17", 17}, {"r18", 18}, {"r19", 19}, \
2995 {"r20", 20}, {"r21", 21}, {"r22", 22}, {"r23", 23}, \
2996 {"r24", 24}, {"r25", 25}, {"r26", 26}, {"r27", 27}, \
2997 {"r28", 28}, {"r29", 29}, {"r30", 30}, {"r31", 31}, \
2998 {"fr0", 32}, {"fr1", 33}, {"fr2", 34}, {"fr3", 35}, \
2999 {"fr4", 36}, {"fr5", 37}, {"fr6", 38}, {"fr7", 39}, \
3000 {"fr8", 40}, {"fr9", 41}, {"fr10", 42}, {"fr11", 43}, \
3001 {"fr12", 44}, {"fr13", 45}, {"fr14", 46}, {"fr15", 47}, \
3002 {"fr16", 48}, {"fr17", 49}, {"fr18", 50}, {"fr19", 51}, \
3003 {"fr20", 52}, {"fr21", 53}, {"fr22", 54}, {"fr23", 55}, \
3004 {"fr24", 56}, {"fr25", 57}, {"fr26", 58}, {"fr27", 59}, \
3005 {"fr28", 60}, {"fr29", 61}, {"fr30", 62}, {"fr31", 63}, \
3006 /* no additional names for: mq, lr, ctr, ap */ \
3007 {"cr0", 68}, {"cr1", 69}, {"cr2", 70}, {"cr3", 71}, \
3008 {"cr4", 72}, {"cr5", 73}, {"cr6", 74}, {"cr7", 75}, \
3009 {"cc", 68}, {"sp", 1}, {"toc", 2} }
3011 /* How to renumber registers for dbx and gdb. */
3013 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
3015 /* Text to write out after a CALL that may be replaced by glue code by
3016 the loader. This depends on the AIX version. */
3017 #define RS6000_CALL_GLUE "cror 31,31,31"
3019 /* This is how to output the definition of a user-level label named NAME,
3020 such as the label on a static function or variable NAME. */
3022 #define ASM_OUTPUT_LABEL(FILE,NAME) \
3023 do { RS6000_OUTPUT_BASENAME (FILE, NAME); fputs (":\n", FILE); } while (0)
3025 /* This is how to output a command to make the user-level label named NAME
3026 defined for reference from other files. */
3028 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
3029 do { fputs ("\t.globl ", FILE); \
3030 RS6000_OUTPUT_BASENAME (FILE, NAME); putc ('\n', FILE);} while (0)
3032 /* This is how to output a reference to a user-level label named NAME.
3033 `assemble_name' uses this. */
3035 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
3038 /* This is how to output an internal numbered label where
3039 PREFIX is the class of label and NUM is the number within the class. */
3041 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
3042 fprintf (FILE, "%s..%d:\n", PREFIX, NUM)
3044 /* This is how to output an internal label prefix. rs6000.c uses this
3045 when generating traceback tables. */
3047 #define ASM_OUTPUT_INTERNAL_LABEL_PREFIX(FILE,PREFIX) \
3048 fprintf (FILE, "%s..", PREFIX)
3050 /* This is how to output a label for a jump table. Arguments are the same as
3051 for ASM_OUTPUT_INTERNAL_LABEL, except the insn for the jump table is
3054 #define ASM_OUTPUT_CASE_LABEL(FILE,PREFIX,NUM,TABLEINSN) \
3055 { ASM_OUTPUT_ALIGN (FILE, 2); ASM_OUTPUT_INTERNAL_LABEL (FILE, PREFIX, NUM); }
3057 /* This is how to store into the string LABEL
3058 the symbol_ref name of an internal numbered label where
3059 PREFIX is the class of label and NUM is the number within the class.
3060 This is suitable for output with `assemble_name'. */
3062 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
3063 sprintf (LABEL, "*%s..%d", PREFIX, NUM)
3065 /* This is how to output an assembler line defining a `double' constant. */
3067 #define ASM_OUTPUT_DOUBLE(FILE, VALUE) \
3070 REAL_VALUE_TO_TARGET_DOUBLE ((VALUE), t); \
3071 fprintf (FILE, "\t.long 0x%lx\n\t.long 0x%lx\n", \
3072 t[0] & 0xffffffff, t[1] & 0xffffffff); \
3075 /* This is how to output an assembler line defining a `float' constant. */
3077 #define ASM_OUTPUT_FLOAT(FILE, VALUE) \
3080 REAL_VALUE_TO_TARGET_SINGLE ((VALUE), t); \
3081 fprintf (FILE, "\t.long 0x%lx\n", t & 0xffffffff); \
3084 /* This is how to output an assembler line defining an `int' constant. */
3086 #define ASM_OUTPUT_DOUBLE_INT(FILE,VALUE) \
3090 assemble_integer (operand_subword ((VALUE), 0, 0, DImode), \
3091 UNITS_PER_WORD, 1); \
3092 assemble_integer (operand_subword ((VALUE), 1, 0, DImode), \
3093 UNITS_PER_WORD, 1); \
3097 fputs ("\t.llong ", FILE); \
3098 output_addr_const (FILE, (VALUE)); \
3099 putc ('\n', FILE); \
3103 #define ASM_OUTPUT_INT(FILE,VALUE) \
3104 ( fputs ("\t.long ", FILE), \
3105 output_addr_const (FILE, (VALUE)), \
3108 /* Likewise for `char' and `short' constants. */
3110 #define ASM_OUTPUT_SHORT(FILE,VALUE) \
3111 ( fputs ("\t.short ", FILE), \
3112 output_addr_const (FILE, (VALUE)), \
3115 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
3116 ( fputs ("\t.byte ", FILE), \
3117 output_addr_const (FILE, (VALUE)), \
3120 /* This is how to output an assembler line for a numeric constant byte. */
3122 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
3123 fprintf (FILE, "\t.byte 0x%x\n", (VALUE))
3125 /* This is how to output an assembler line to define N characters starting
3128 #define ASM_OUTPUT_ASCII(FILE, P, N) output_ascii ((FILE), (P), (N))
3130 /* This is how to output an element of a case-vector that is absolute.
3131 (RS/6000 does not use such vectors, but we must define this macro
3134 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
3135 do { char buf[100]; \
3136 fputs ("\t.long ", FILE); \
3137 ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \
3138 assemble_name (FILE, buf); \
3139 putc ('\n', FILE); \
3142 /* This is how to output an element of a case-vector that is relative. */
3144 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
3145 do { char buf[100]; \
3146 fputs ("\t.long ", FILE); \
3147 ASM_GENERATE_INTERNAL_LABEL (buf, "L", VALUE); \
3148 assemble_name (FILE, buf); \
3150 ASM_GENERATE_INTERNAL_LABEL (buf, "L", REL); \
3151 assemble_name (FILE, buf); \
3152 putc ('\n', FILE); \
3155 /* This is how to output an assembler line
3156 that says to advance the location counter
3157 to a multiple of 2**LOG bytes. */
3159 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
3161 fprintf (FILE, "\t.align %d\n", (LOG))
3163 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
3164 fprintf (FILE, "\t.space %d\n", (SIZE))
3166 /* This says how to output an assembler line
3167 to define a global common symbol. */
3169 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNMENT) \
3170 do { fputs (".comm ", (FILE)); \
3171 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
3173 fprintf ((FILE), ",%d,3\n", (SIZE)); \
3175 fprintf( (FILE), ",%d\n", (SIZE)); \
3178 /* This says how to output an assembler line
3179 to define a local common symbol.
3180 Alignment cannot be specified, but we can try to maintain
3181 alignment after preceding TOC section if it was aligned
3184 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
3185 do { fputs (".lcomm ", (FILE)); \
3186 RS6000_OUTPUT_BASENAME ((FILE), (NAME)); \
3187 fprintf ((FILE), ",%d,%s\n", (TARGET_32BIT ? (SIZE) : (ROUNDED)), \
3188 xcoff_bss_section_name); \
3191 /* Store in OUTPUT a string (made with alloca) containing
3192 an assembler-name for a local static variable named NAME.
3193 LABELNO is an integer which is different for each call. */
3195 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
3196 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
3197 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
3199 /* Define the parentheses used to group arithmetic operations
3200 in assembler code. */
3202 #define ASM_OPEN_PAREN "("
3203 #define ASM_CLOSE_PAREN ")"
3205 /* Define results of standard character escape sequences. */
3206 #define TARGET_BELL 007
3207 #define TARGET_BS 010
3208 #define TARGET_TAB 011
3209 #define TARGET_NEWLINE 012
3210 #define TARGET_VT 013
3211 #define TARGET_FF 014
3212 #define TARGET_CR 015
3214 /* Print operand X (an rtx) in assembler syntax to file FILE.
3215 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
3216 For `%' followed by punctuation, CODE is the punctuation and X is null. */
3218 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
3220 /* Define which CODE values are valid. */
3222 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \
3223 ((CODE) == '.' || (CODE) == '*' || (CODE) == '$')
3225 /* Print a memory address as an operand to reference that memory location. */
3227 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
3229 /* Define the codes that are matched by predicates in rs6000.c. */
3231 #define PREDICATE_CODES \
3232 {"short_cint_operand", {CONST_INT}}, \
3233 {"u_short_cint_operand", {CONST_INT}}, \
3234 {"non_short_cint_operand", {CONST_INT}}, \
3235 {"gpc_reg_operand", {SUBREG, REG}}, \
3236 {"cc_reg_operand", {SUBREG, REG}}, \
3237 {"cc_reg_not_cr0_operand", {SUBREG, REG}}, \
3238 {"reg_or_short_operand", {SUBREG, REG, CONST_INT}}, \
3239 {"reg_or_neg_short_operand", {SUBREG, REG, CONST_INT}}, \
3240 {"reg_or_u_short_operand", {SUBREG, REG, CONST_INT}}, \
3241 {"reg_or_cint_operand", {SUBREG, REG, CONST_INT}}, \
3242 {"got_operand", {SYMBOL_REF, CONST, LABEL_REF}}, \
3243 {"got_no_const_operand", {SYMBOL_REF, LABEL_REF}}, \
3244 {"easy_fp_constant", {CONST_DOUBLE}}, \
3245 {"reg_or_mem_operand", {SUBREG, MEM, REG}}, \
3246 {"lwa_operand", {SUBREG, MEM, REG}}, \
3247 {"volatile_mem_operand", {MEM}}, \
3248 {"offsettable_mem_operand", {MEM}}, \
3249 {"mem_or_easy_const_operand", {SUBREG, MEM, CONST_DOUBLE}}, \
3250 {"add_operand", {SUBREG, REG, CONST_INT}}, \
3251 {"non_add_cint_operand", {CONST_INT}}, \
3252 {"and_operand", {SUBREG, REG, CONST_INT}}, \
3253 {"and64_operand", {SUBREG, REG, CONST_INT, CONST_DOUBLE}}, \
3254 {"logical_operand", {SUBREG, REG, CONST_INT}}, \
3255 {"non_logical_cint_operand", {CONST_INT}}, \
3256 {"mask_operand", {CONST_INT}}, \
3257 {"mask64_operand", {CONST_INT, CONST_DOUBLE}}, \
3258 {"count_register_operand", {REG}}, \
3259 {"fpmem_operand", {REG}}, \
3260 {"call_operand", {SYMBOL_REF, REG}}, \
3261 {"current_file_function_operand", {SYMBOL_REF}}, \
3262 {"input_operand", {SUBREG, MEM, REG, CONST_INT, \
3263 CONST_DOUBLE, SYMBOL_REF}}, \
3264 {"load_multiple_operation", {PARALLEL}}, \
3265 {"store_multiple_operation", {PARALLEL}}, \
3266 {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \
3267 GT, LEU, LTU, GEU, GTU}}, \
3268 {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \
3269 GT, LEU, LTU, GEU, GTU}}, \
3270 {"trap_comparison_operator", {EQ, NE, LE, LT, GE, \
3271 GT, LEU, LTU, GEU, GTU}},
3273 /* uncomment for disabling the corresponding default options */
3274 /* #define MACHINE_no_sched_interblock */
3275 /* #define MACHINE_no_sched_speculative */
3276 /* #define MACHINE_no_sched_speculative_load */
3278 /* indicate that issue rate is defined for this machine
3279 (no need to use the default) */
3280 #define ISSUE_RATE get_issue_rate ()
3282 /* General flags. */
3283 extern int flag_pic
;
3284 extern int optimize
;
3285 extern int flag_expensive_optimizations
;
3286 extern int frame_pointer_needed
;
3288 /* Declare functions in rs6000.c */
3289 extern void optimization_options ();
3290 extern void output_options ();
3291 extern void rs6000_override_options ();
3292 extern void rs6000_file_start ();
3293 extern struct rtx_def
*rs6000_float_const ();
3294 extern struct rtx_def
*rs6000_got_register ();
3295 extern struct rtx_def
*find_addr_reg();
3296 extern int direct_return ();
3297 extern int get_issue_rate ();
3298 extern int any_operand ();
3299 extern int short_cint_operand ();
3300 extern int u_short_cint_operand ();
3301 extern int non_short_cint_operand ();
3302 extern int gpc_reg_operand ();
3303 extern int cc_reg_operand ();
3304 extern int cc_reg_not_cr0_operand ();
3305 extern int reg_or_short_operand ();
3306 extern int reg_or_neg_short_operand ();
3307 extern int reg_or_u_short_operand ();
3308 extern int reg_or_cint_operand ();
3309 extern int got_operand ();
3310 extern int got_no_const_operand ();
3311 extern int num_insns_constant ();
3312 extern int easy_fp_constant ();
3313 extern int volatile_mem_operand ();
3314 extern int offsettable_mem_operand ();
3315 extern int mem_or_easy_const_operand ();
3316 extern int add_operand ();
3317 extern int non_add_cint_operand ();
3318 extern int non_logical_cint_operand ();
3319 extern int logical_operand ();
3320 extern int mask_operand ();
3321 extern int mask64_operand ();
3322 extern int and64_operand ();
3323 extern int and_operand ();
3324 extern int count_register_operand ();
3325 extern int fpmem_operand ();
3326 extern int reg_or_mem_operand ();
3327 extern int lwa_operand ();
3328 extern int call_operand ();
3329 extern int current_file_function_operand ();
3330 extern int input_operand ();
3331 extern int small_data_operand ();
3332 extern void init_cumulative_args ();
3333 extern void function_arg_advance ();
3334 extern int function_arg_boundary ();
3335 extern struct rtx_def
*function_arg ();
3336 extern int function_arg_partial_nregs ();
3337 extern int function_arg_pass_by_reference ();
3338 extern void setup_incoming_varargs ();
3339 extern union tree_node
*rs6000_build_va_list ();
3340 extern void rs6000_va_start ();
3341 extern struct rtx_def
*rs6000_va_arg ();
3342 extern struct rtx_def
*rs6000_stack_temp ();
3343 extern int expand_block_move ();
3344 extern int load_multiple_operation ();
3345 extern int store_multiple_operation ();
3346 extern int branch_comparison_operator ();
3347 extern int scc_comparison_operator ();
3348 extern int trap_comparison_operator ();
3349 extern int includes_lshift_p ();
3350 extern int includes_rshift_p ();
3351 extern int registers_ok_for_quad_peep ();
3352 extern int addrs_ok_for_quad_peep ();
3353 extern enum reg_class
secondary_reload_class ();
3354 extern int ccr_bit ();
3355 extern void rs6000_finalize_pic ();
3356 extern void rs6000_reorg ();
3357 extern void rs6000_save_machine_status ();
3358 extern void rs6000_restore_machine_status ();
3359 extern void rs6000_init_expanders ();
3360 extern void print_operand ();
3361 extern void print_operand_address ();
3362 extern int first_reg_to_save ();
3363 extern int first_fp_reg_to_save ();
3364 extern int rs6000_makes_calls ();
3365 extern rs6000_stack_t
*rs6000_stack_info ();
3366 extern void output_prolog ();
3367 extern void output_epilog ();
3368 extern void output_mi_thunk ();
3369 extern void output_toc ();
3370 extern void output_ascii ();
3371 extern void rs6000_gen_section_name ();
3372 extern void output_function_profiler ();
3373 extern int rs6000_adjust_cost ();
3374 extern int rs6000_adjust_priority ();
3375 extern void rs6000_trampoline_template ();
3376 extern int rs6000_trampoline_size ();
3377 extern void rs6000_initialize_trampoline ();
3378 extern void rs6000_output_load_toc_table ();
3379 extern int rs6000_comp_type_attributes ();
3380 extern int rs6000_valid_decl_attribute_p ();
3381 extern int rs6000_valid_type_attribute_p ();
3382 extern void rs6000_set_default_type_attributes ();
3383 extern struct rtx_def
*rs6000_dll_import_ref ();
3384 extern struct rtx_def
*rs6000_longcall_ref ();
3385 extern int function_arg_padding ();
3386 extern void toc_section ();
3387 extern void private_data_section ();
3388 extern void rs6000_fatal_bad_address ();
3390 /* See nonlocal_goto_receiver for when this must be set. */
3392 #define DONT_ACCESS_GBLS_AFTER_EPILOGUE (TARGET_TOC && TARGET_MINIMAL_TOC)