gcc/config/microblaze/microblaze.h

   1 /* Definitions of target machine for GNU compiler for Xilinx MicroBlaze.
   2    Copyright 2009, 2010 Free Software Foundation, Inc.
   3
   4    Contributed by Michael Eager <eager@eagercon.com>.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 /* Standard GCC variables that we reference.  */
  23
  24 /* MicroBlaze external variables defined in microblaze.c.  */
  25
  26 /* Which pipeline to schedule for.  */
  27 enum pipeline_type
  28 {
  29   MICROBLAZE_PIPE_3 = 0,
  30   MICROBLAZE_PIPE_5 = 1
  31 };
  32
  33 #define MICROBLAZE_MASK_NO_UNSAFE_DELAY         0x00000001
  34
  35 /* print_operand punctuation chars */
  36 extern char microblaze_print_operand_punct[];
  37
  38 /* # bytes of data/sdata cutoff */
  39 extern int microblaze_section_threshold;
  40
  41 /* Map register # to debug register # */
  42 extern int microblaze_dbx_regno[];
  43
  44 extern int microblaze_no_unsafe_delay;
  45 extern enum pipeline_type microblaze_pipe;
  46
  47 #define OBJECT_FORMAT_ELF
  48
  49 /* Default target_flags if no switches are specified  */
  50 #define TARGET_DEFAULT      (MASK_SOFT_MUL | MASK_SOFT_DIV | MASK_SOFT_FLOAT)
  51
  52 /* What is the default setting for -mcpu= . We set it to v4.00.a even though
  53    we are actually ahead. This is safest version that has generate code
  54    compatible for the original ISA */
  55 #define MICROBLAZE_DEFAULT_CPU      "v4.00.a"
  56
  57 /* Macros to decide whether certain features are available or not,
  58    depending on the instruction set architecture level.  */
  59
  60 #undef SWITCH_TAKES_ARG
  61 #define SWITCH_TAKES_ARG(CHAR)                                          \
  62   (DEFAULT_SWITCH_TAKES_ARG (CHAR) || (CHAR) == 'G')
  63
  64 #define DRIVER_SELF_SPECS                               \
  65         "%{mxl-soft-mul:%<mno-xl-soft-mul}",            \
  66         "%{mno-xl-barrel-shift:%<mxl-barrel-shift}",    \
  67         "%{mno-xl-pattern-compare:%<mxl-pattern-compare}", \
  68         "%{mxl-soft-div:%<mno-xl-soft-div}",            \
  69         "%{msoft-float:%<mhard-float}"
  70
  71 /* Tell collect what flags to pass to nm.  */
  72 #ifndef NM_FLAGS
  73 #define NM_FLAGS "-Bn"
  74 #endif
  75
  76 /* Names to predefine in the preprocessor for this target machine.  */
  77 #define TARGET_CPU_CPP_BUILTINS() microblaze_cpp_define (pfile)
  78
  79 /* Assembler specs.  */
  80
  81 #define TARGET_ASM_SPEC "%{v}"
  82
  83 #define ASM_SPEC "\
  84 %{microblaze1} \
  85 %(target_asm_spec)"
  86
  87 /* Extra switches sometimes passed to the linker.  */
  88 /* -xl-mode-xmdstub translated to -Zxl-mode-xmdstub -- deprecated.  */
  89
  90 #define LINK_SPEC "%{shared:-shared} -N -relax \
  91   %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
  92   %{mxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
  93   %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0} \
  94   %{!Wl,-T*: %{!T*: -dT xilinx.ld%s}}"
  95
  96 /* Specs for the compiler proper  */
  97
  98 #ifndef CC1_SPEC
  99 #define CC1_SPEC " \
 100 %{G*} %{gline:%{!g:%{!g0:%{!g1:%{!g2: -g1}}}}} \
 101 %{save-temps: } \
 102 %(subtarget_cc1_spec) \
 103 %{mxl-multiply-high:-mcpu=v6.00.a} \
 104 "
 105 #endif
 106
 107 #define EXTRA_SPECS                                                     \
 108   { "target_asm_spec", TARGET_ASM_SPEC },                               \
 109   SUBTARGET_EXTRA_SPECS
 110
 111 /* Print subsidiary information on the compiler version in use.  */
 112 #define MICROBLAZE_VERSION MICROBLAZE_DEFAULT_CPU
 113
 114 #ifndef MACHINE_TYPE
 115 #define MACHINE_TYPE "MicroBlaze/ELF"
 116 #endif
 117
 118 #ifndef TARGET_VERSION_INTERNAL
 119 #define TARGET_VERSION_INTERNAL(STREAM)                                 \
 120   fprintf (STREAM, " %s %s", MACHINE_TYPE, MICROBLAZE_VERSION)
 121 #endif
 122
 123 #ifndef TARGET_VERSION
 124 #define TARGET_VERSION TARGET_VERSION_INTERNAL (stderr)
 125 #endif
 126
 127 /* Local compiler-generated symbols must have a prefix that the assembler
 128    understands.   */
 129
 130 #ifndef LOCAL_LABEL_PREFIX
 131 #define LOCAL_LABEL_PREFIX      "$"
 132 #endif
 133
 134 /* fixed registers.  */
 135 #define MB_ABI_BASE_REGNUM                   0
 136 #define MB_ABI_STACK_POINTER_REGNUM          1
 137 #define MB_ABI_GPRO_REGNUM                   2
 138 #define MB_ABI_GPRW_REGNUM                  13
 139 #define MB_ABI_INTR_RETURN_ADDR_REGNUM      14
 140 #define MB_ABI_SUB_RETURN_ADDR_REGNUM       15
 141 #define MB_ABI_DEBUG_RETURN_ADDR_REGNUM     16
 142 #define MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM 17
 143 #define MB_ABI_ASM_TEMP_REGNUM              18
 144 /* This is our temp register.  */
 145 #define MB_ABI_FRAME_POINTER_REGNUM         19
 146 #define MB_ABI_PIC_ADDR_REGNUM              20
 147 #define MB_ABI_PIC_FUNC_REGNUM              21
 148 /* Volatile registers.  */
 149 #define MB_ABI_INT_RETURN_VAL_REGNUM         3
 150 #define MB_ABI_INT_RETURN_VAL2_REGNUM        4
 151 #define MB_ABI_FIRST_ARG_REGNUM              5
 152 #define MB_ABI_LAST_ARG_REGNUM              10
 153 #define MB_ABI_MAX_ARG_REGS                 (MB_ABI_LAST_ARG_REGNUM     \
 154                                              - MB_ABI_FIRST_ARG_REGNUM + 1)
 155 #define MB_ABI_STATIC_CHAIN_REGNUM           3
 156 #define MB_ABI_TEMP1_REGNUM                 11
 157 #define MB_ABI_TEMP2_REGNUM                 12
 158 #define MB_ABI_MSR_SAVE_REG                 11
 159 /* Volatile register used to save MSR in interrupt handlers.  */
 160
 161
 162 /* Debug stuff.  */
 163
 164 /* How to renumber registers for dbx and gdb.  */
 165 #define DBX_REGISTER_NUMBER(REGNO) microblaze_dbx_regno[(REGNO)]
 166
 167 /* Generate DWARF exception handling info.  */
 168 #define DWARF2_UNWIND_INFO 1
 169
 170 /* Don't generate .loc operations.  */
 171 #define DWARF2_ASM_LINE_DEBUG_INFO 0
 172
 173 /* The DWARF 2 CFA column which tracks the return address.  */
 174 #define DWARF_FRAME_RETURN_COLUMN \
 175         (GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
 176
 177 /* Initial state of return address on entry to func = R15.
 178    Actually, the RA is at R15+8, but gcc doesn't know how
 179    to generate this.
 180    NOTE:  GDB has a workaround and expects this incorrect value.
 181    If this is fixed, a corresponding fix to GDB is needed.  */
 182 #define INCOMING_RETURN_ADDR_RTX                        \
 183   gen_rtx_REG (VOIDmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
 184
 185 /* Use DWARF 2 debugging information by default.  */
 186 #define DWARF2_DEBUGGING_INFO
 187 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 188
 189 /* Target machine storage layout */
 190
 191 #define BITS_BIG_ENDIAN 0
 192 #define BYTES_BIG_ENDIAN 1
 193 #define WORDS_BIG_ENDIAN 1
 194 #define BITS_PER_UNIT           8
 195 #define BITS_PER_WORD           32
 196 #define UNITS_PER_WORD          4
 197 #define MIN_UNITS_PER_WORD      4
 198 #define INT_TYPE_SIZE           32
 199 #define SHORT_TYPE_SIZE         16
 200 #define LONG_TYPE_SIZE          32
 201 #define LONG_LONG_TYPE_SIZE     64
 202 #define FLOAT_TYPE_SIZE         32
 203 #define DOUBLE_TYPE_SIZE        64
 204 #define LONG_DOUBLE_TYPE_SIZE   64
 205 #define POINTER_SIZE            32
 206 #define PARM_BOUNDARY           32
 207 #define FUNCTION_BOUNDARY       32
 208 #define EMPTY_FIELD_BOUNDARY    32
 209 #define STRUCTURE_SIZE_BOUNDARY 8
 210 #define BIGGEST_ALIGNMENT       32
 211 #define STRICT_ALIGNMENT        1
 212 #define PCC_BITFIELD_TYPE_MATTERS 1
 213
 214 #define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \
 215   ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \
 216    && (ALIGN) < BITS_PER_WORD                                           \
 217         ? BITS_PER_WORD                                                 \
 218         : (ALIGN))
 219
 220 #define DATA_ALIGNMENT(TYPE, ALIGN)                                     \
 221   ((((ALIGN) < BITS_PER_WORD)                                           \
 222     && (TREE_CODE (TYPE) == ARRAY_TYPE                                  \
 223         || TREE_CODE (TYPE) == UNION_TYPE                               \
 224         || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
 225
 226 #define LOCAL_ALIGNMENT(TYPE, ALIGN)                                    \
 227     (((TREE_CODE (TYPE) == ARRAY_TYPE                                   \
 228        && TYPE_MODE (TREE_TYPE (TYPE)) == QImode)                       \
 229      && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
 230
 231 #define WORD_REGISTER_OPERATIONS
 232
 233 #define LOAD_EXTEND_OP(MODE)  ZERO_EXTEND
 234
 235 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
 236   if (GET_MODE_CLASS (MODE) == MODE_INT         \
 237       && GET_MODE_SIZE (MODE) < 4)              \
 238     (MODE) = SImode;
 239
 240 /* Standard register usage.  */
 241
 242 /* On the MicroBlaze, we have 32 integer registers */
 243
 244 #define FIRST_PSEUDO_REGISTER 36
 245
 246 #define FIXED_REGISTERS                                                 \
 247 {                                                                       \
 248   1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,                       \
 249   1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 250   1, 1, 1, 1                                                            \
 251 }
 252
 253 #define CALL_USED_REGISTERS                                             \
 254 {                                                                       \
 255   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,                       \
 256   1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 257   1, 1, 1, 1                                                            \
 258 }
 259
 260 #define GP_REG_FIRST    0
 261 #define GP_REG_LAST     31
 262 #define GP_REG_NUM      (GP_REG_LAST - GP_REG_FIRST + 1)
 263 #define GP_DBX_FIRST    0
 264
 265 #define ST_REG          32
 266 #define AP_REG_NUM      33
 267 #define RAP_REG_NUM     34
 268 #define FRP_REG_NUM     35
 269
 270 #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
 271 #define ST_REG_P(REGNO) ((REGNO) == ST_REG)
 272
 273 #define HARD_REGNO_NREGS(REGNO, MODE)                                   \
 274         ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 275
 276 /* Value is 1 if hard register REGNO can hold a value of machine-mode
 277    MODE.  In 32 bit mode, require that DImode and DFmode be in even
 278    registers.  For DImode, this makes some of the insns easier to
 279    write, since you don't have to worry about a DImode value in
 280    registers 3 & 4, producing a result in 4 & 5.
 281
 282    To make the code simpler HARD_REGNO_MODE_OK now just references an
 283    array built in override_options.  Because machmodes.h is not yet
 284    included before this file is processed, the MODE bound can't be
 285    expressed here.  */
 286 extern char microblaze_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
 287 #define HARD_REGNO_MODE_OK(REGNO, MODE)                                 \
 288             microblaze_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO)]
 289
 290 #define MODES_TIEABLE_P(MODE1, MODE2)                                   \
 291   ((GET_MODE_CLASS (MODE1) == MODE_FLOAT ||                             \
 292     GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)                       \
 293    == (GET_MODE_CLASS (MODE2) == MODE_FLOAT ||                          \
 294        GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
 295
 296 #define STACK_POINTER_REGNUM   (GP_REG_FIRST + MB_ABI_STACK_POINTER_REGNUM)
 297
 298 #define STACK_POINTER_OFFSET   FIRST_PARM_OFFSET(FNDECL)
 299
 300 /* Base register for access to local variables of the function.  We
 301    pretend that the frame pointer is
 302    MB_ABI_INTR_RETURN_ADDR_REGNUM, and then eliminate it
 303    to HARD_FRAME_POINTER_REGNUM.  We can get away with this because
 304    rMB_ABI_INTR_RETUREN_ADDR_REGNUM is a fixed
 305    register(return address for interrupt), and will not be used for
 306    anything else.  */
 307
 308 #define FRAME_POINTER_REGNUM            FRP_REG_NUM
 309 #define HARD_FRAME_POINTER_REGNUM       \
 310         (GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM)
 311 #define ARG_POINTER_REGNUM              AP_REG_NUM
 312 #define RETURN_ADDRESS_POINTER_REGNUM   RAP_REG_NUM
 313 #define STATIC_CHAIN_REGNUM             \
 314         (GP_REG_FIRST + MB_ABI_STATIC_CHAIN_REGNUM)
 315
 316 /* registers used in prologue/epilogue code when the stack frame
 317    is larger than 32K bytes.  These registers must come from the
 318    scratch register set, and not used for passing and returning
 319    arguments and any other information used in the calling sequence
 320    (such as pic).  */
 321
 322 #define MICROBLAZE_TEMP1_REGNUM         \
 323         (GP_REG_FIRST + MB_ABI_TEMP1_REGNUM)
 324
 325 #define MICROBLAZE_TEMP2_REGNUM         \
 326         (GP_REG_FIRST + MB_ABI_TEMP2_REGNUM)
 327
 328 #define NO_FUNCTION_CSE                 1
 329
 330 #define PIC_OFFSET_TABLE_REGNUM         \
 331         (flag_pic ? (GP_REG_FIRST + MB_ABI_PIC_ADDR_REGNUM) : \
 332         INVALID_REGNUM)
 333
 334 enum reg_class
 335 {
 336   NO_REGS,                      /* no registers in set.  */
 337   GR_REGS,                      /* integer registers.  */
 338   ST_REGS,                      /* status register.  */
 339   ALL_REGS,                     /* all registers.  */
 340   LIM_REG_CLASSES               /* max value + 1.  */
 341 };
 342
 343 #define N_REG_CLASSES           (int) LIM_REG_CLASSES
 344
 345 #define GENERAL_REGS            GR_REGS
 346
 347 #define REG_CLASS_NAMES                                                 \
 348 {                                                                       \
 349   "NO_REGS",                                                            \
 350   "GR_REGS",                                                            \
 351   "ST_REGS",                                                            \
 352   "ALL_REGS"                                                            \
 353 }
 354
 355 #define REG_CLASS_CONTENTS                                              \
 356 {                                                                       \
 357   { 0x00000000, 0x00000000 },           /* no registers.  */            \
 358   { 0xffffffff, 0x00000000 },           /* integer registers.  */       \
 359   { 0x00000000, 0x00000001 },           /* status registers.  */        \
 360   { 0xffffffff, 0x0000000f }            /* all registers.  */           \
 361 }
 362
 363 extern enum reg_class microblaze_regno_to_class[];
 364
 365 #define REGNO_REG_CLASS(REGNO)          microblaze_regno_to_class[ (REGNO) ]
 366
 367 #define BASE_REG_CLASS                  GR_REGS
 368
 369 #define INDEX_REG_CLASS                 GR_REGS
 370
 371 #define GR_REG_CLASS_P(CLASS)           ((CLASS) == GR_REGS)
 372
 373 /* REGISTER AND CONSTANT CLASSES */
 374
 375 #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
 376 #define LARGE_INT(X) (INTVAL (X) >= 0x80000000 && INTVAL (X) <= 0xffffffff)
 377 #define PLT_ADDR_P(X) (GET_CODE (X) == UNSPEC && XINT (X,1) == UNSPEC_PLT)
 378 /* Test for a valid operand for a call instruction.
 379    Don't allow the arg pointer register or virtual regs
 380    since they may change into reg + const, which the patterns
 381    can't handle yet.  */
 382 #define CALL_INSN_OP(X) (CONSTANT_ADDRESS_P (X) \
 383                          || (GET_CODE (X) == REG && X != arg_pointer_rtx\
 384                              && ! (REGNO (X) >= FIRST_PSEUDO_REGISTER   \
 385                              && REGNO (X) <= LAST_VIRTUAL_REGISTER)))
 386
 387 /* True if VALUE is a signed 16-bit number.  */
 388 #define SMALL_OPERAND(VALUE)                                            \
 389   ((unsigned HOST_WIDE_INT) (VALUE) + 0x8000 < 0x10000)
 390
 391 /* Constant which cannot be loaded in one instruction.  */
 392 #define LARGE_OPERAND(VALUE)                                            \
 393   ((((VALUE) & ~0x0000ffff) != 0)                                       \
 394    && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)                          \
 395    && (((VALUE) & 0x0000ffff) != 0                                      \
 396        || (((VALUE) & ~2147483647) != 0                                 \
 397            && ((VALUE) & ~2147483647) != ~2147483647)))
 398
 399 #define PREFERRED_RELOAD_CLASS(X,CLASS)                                 \
 400   ((CLASS) != ALL_REGS                                                  \
 401    ? (CLASS)                                                    \
 402    : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT                      \
 403        || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT)          \
 404       ? (GR_REGS)                       \
 405       : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT                     \
 406           || GET_MODE (X) == VOIDmode)                                  \
 407          ? (GR_REGS) : (CLASS))))
 408
 409 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE)                   \
 410   (GET_MODE_CLASS (MODE) == MODE_INT)
 411
 412 #define CLASS_MAX_NREGS(CLASS, MODE)                                    \
 413   ((GET_MODE_SIZE (MODE) + (UNITS_PER_WORD) - 1) / (UNITS_PER_WORD))
 414
 415 /* Stack layout; function entry, exit and calling.  */
 416
 417 #define STACK_GROWS_DOWNWARD
 418
 419 /* Changed the starting frame offset to including the new link stuff */
 420 #define STARTING_FRAME_OFFSET                                           \
 421    (crtl->outgoing_args_size + FIRST_PARM_OFFSET(FNDECL))
 422
 423 /* The return address for the current frame is in r31 if this is a leaf
 424    function.  Otherwise, it is on the stack.  It is at a variable offset
 425    from sp/fp/ap, so we define a fake hard register rap which is a
 426    poiner to the return address on the stack.  This always gets eliminated
 427    during reload to be either the frame pointer or the stack pointer plus
 428    an offset.  */
 429
 430 #define RETURN_ADDR_RTX(count, frame)                   \
 431   microblaze_return_addr(count,frame)
 432
 433 extern struct microblaze_frame_info current_frame_info;
 434
 435 #define ELIMINABLE_REGS                                                 \
 436 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \
 437  { ARG_POINTER_REGNUM,   GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM},   \
 438  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 439  { RETURN_ADDRESS_POINTER_REGNUM,                                       \
 440    GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM},                         \
 441  { RETURN_ADDRESS_POINTER_REGNUM,                                       \
 442    GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM},                       \
 443  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 444  { FRAME_POINTER_REGNUM, GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM}}
 445
 446 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                     \
 447         (OFFSET) = microblaze_initial_elimination_offset ((FROM), (TO))
 448
 449 #define ACCUMULATE_OUTGOING_ARGS        1
 450
 451 #define FIRST_PARM_OFFSET(FNDECL)               (UNITS_PER_WORD)
 452
 453 #define ARG_POINTER_CFA_OFFSET(FNDECL)          0
 454
 455 #define REG_PARM_STACK_SPACE(FNDECL)            (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD)
 456
 457 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE)   1
 458
 459 #define STACK_BOUNDARY                          32
 460
 461 #define NUM_OF_ARGS                             6
 462
 463 #define GP_RETURN                               (GP_REG_FIRST + MB_ABI_INT_RETURN_VAL_REGNUM)
 464
 465 #define GP_ARG_FIRST                            (GP_REG_FIRST + MB_ABI_FIRST_ARG_REGNUM)
 466 #define GP_ARG_LAST                             (GP_REG_FIRST + MB_ABI_LAST_ARG_REGNUM)
 467
 468 #define MAX_ARGS_IN_REGISTERS                   MB_ABI_MAX_ARG_REGS
 469
 470 #define LIBCALL_VALUE(MODE)                                             \
 471   gen_rtx_REG (                                                         \
 472            ((GET_MODE_CLASS (MODE) != MODE_INT                          \
 473              || GET_MODE_SIZE (MODE) >= 4)                              \
 474             ? (MODE)                                                    \
 475             : SImode), GP_RETURN)
 476
 477 /* 1 if N is a possible register number for a function value.
 478    On the MicroBlaze, R2 R3 are the only register thus used.
 479    Currently, R2 are only implemented  here (C has no complex type)  */
 480
 481 #define FUNCTION_VALUE_REGNO_P(N)               ((N) == GP_RETURN)
 482
 483 #define FUNCTION_ARG_REGNO_P(N)                 (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
 484
 485 typedef struct microblaze_args
 486 {
 487   int gp_reg_found;             /* whether a gp register was found yet */
 488   int arg_number;               /* argument number */
 489   int arg_words;                /* # total words the arguments take */
 490   int fp_arg_words;             /* # words for FP args */
 491   int last_arg_fp;              /* nonzero if last arg was FP (EABI only) */
 492   int fp_code;                  /* Mode of FP arguments */
 493   int num_adjusts;              /* number of adjustments made */
 494   /* Adjustments made to args pass in regs.  */
 495   /* ??? The size is doubled to work around a bug in the code that sets the
 496      adjustments in function_arg.  */
 497   struct rtx_def *adjust[MAX_ARGS_IN_REGISTERS * 2];
 498 } CUMULATIVE_ARGS;
 499
 500 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS)    \
 501   init_cumulative_args (&CUM, FNTYPE, LIBNAME)
 502
 503 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)                    \
 504   function_arg_advance (&CUM, MODE, TYPE, NAMED)
 505
 506 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
 507   function_arg( &CUM, MODE, TYPE, NAMED)
 508
 509 #define NO_PROFILE_COUNTERS                     1
 510
 511 #define FUNCTION_PROFILER(FILE, LABELNO) { \
 512   {                                        \
 513     fprintf (FILE, "\tbrki\tr16,_mcount\n");           \
 514   }                                                    \
 515  }
 516
 517 #define EXIT_IGNORE_STACK                       1
 518
 519 #define TRAMPOLINE_SIZE                         (32 + 8)
 520
 521 #define TRAMPOLINE_ALIGNMENT                    32
 522
 523 #define REGNO_OK_FOR_BASE_P(regno)              microblaze_regno_ok_for_base_p ((regno), 1)
 524
 525 #define REGNO_OK_FOR_INDEX_P(regno)             microblaze_regno_ok_for_base_p ((regno), 1)
 526
 527 #ifndef REG_OK_STRICT
 528 #define REG_STRICT_FLAG                         0
 529 #else
 530 #define REG_STRICT_FLAG                         1
 531 #endif
 532
 533 #define REG_OK_FOR_BASE_P(X)    \
 534   microblaze_regno_ok_for_base_p (REGNO (X), REG_STRICT_FLAG)
 535
 536 #define REG_OK_FOR_INDEX_P(X)   \
 537   microblaze_regno_ok_for_base_p (REGNO (X), REG_STRICT_FLAG)
 538
 539 #define MAX_REGS_PER_ADDRESS 2
 540
 541
 542 /* Identify valid constant addresses.  Exclude if PIC addr which
 543    needs scratch register.  */
 544 #define CONSTANT_ADDRESS_P(X)                                           \
 545   (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF              \
 546     || GET_CODE (X) == CONST_INT                                        \
 547     || (GET_CODE (X) == CONST                                           \
 548         && ! (flag_pic && pic_address_needs_scratch (X))))
 549
 550 /* Define this, so that when PIC, reload won't try to reload invalid
 551    addresses which require two reload registers.  */
 552 #define LEGITIMATE_PIC_OPERAND_P(X)  (!pic_address_needs_scratch (X))
 553
 554 /* At present, GAS doesn't understand li.[sd], so don't allow it
 555    to be generated at present.  */
 556 #define LEGITIMATE_CONSTANT_P(X)                                \
 557   (GET_CODE (X) != CONST_DOUBLE                                 \
 558     || microblaze_const_double_ok (X, GET_MODE (X)))
 559
 560 #define CASE_VECTOR_MODE                        (SImode)
 561
 562 #ifndef DEFAULT_SIGNED_CHAR
 563 #define DEFAULT_SIGNED_CHAR                     1
 564 #endif
 565
 566 #define MOVE_MAX                                4
 567 #define MAX_MOVE_MAX                            8
 568
 569 #define SLOW_BYTE_ACCESS                        1
 570
 571 /* sCOND operations return 1.  */
 572 #define STORE_FLAG_VALUE                        1
 573
 574 #define SHIFT_COUNT_TRUNCATED                   1
 575
 576 /* This results in inefficient code for 64 bit to 32 conversions.
 577    Something needs to be done about this.  Perhaps not use any 32 bit
 578    instructions?  Perhaps use PROMOTE_MODE?  */
 579 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 580
 581 #define Pmode SImode
 582
 583 #define FUNCTION_MODE   SImode
 584
 585 /* Mode should alwasy be SImode */
 586 #define REGISTER_MOVE_COST(MODE, FROM, TO)                      \
 587   ( GR_REG_CLASS_P (FROM) && GR_REG_CLASS_P (TO) ? 2            \
 588    : (FROM) == ST_REGS && GR_REG_CLASS_P (TO) ? 4               \
 589    : 12)
 590
 591 #define MEMORY_MOVE_COST(MODE,CLASS,TO_P) \
 592   (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P)))
 593
 594 #define BRANCH_COST(speed_p, predictable_p)     2
 595
 596 /* Control the assembler format that we output.  */
 597 #define ASM_APP_ON " #APP\n"
 598 #define ASM_APP_OFF " #NO_APP\n"
 599
 600 #define REGISTER_NAMES {                                                \
 601   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",         \
 602   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",        \
 603   "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",        \
 604   "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",        \
 605   "rmsr", "$ap",  "$rap", "$frp" }
 606
 607 #define ADDITIONAL_REGISTER_NAMES                                       \
 608 {                                                                       \
 609   { "r0",        0 + GP_REG_FIRST },                                    \
 610   { "r1",        1 + GP_REG_FIRST },                                    \
 611   { "r2",        2 + GP_REG_FIRST },                                    \
 612   { "r3",        3 + GP_REG_FIRST },                                    \
 613   { "r4",        4 + GP_REG_FIRST },                                    \
 614   { "r5",        5 + GP_REG_FIRST },                                    \
 615   { "r6",        6 + GP_REG_FIRST },                                    \
 616   { "r7",        7 + GP_REG_FIRST },                                    \
 617   { "r8",        8 + GP_REG_FIRST },                                    \
 618   { "r9",        9 + GP_REG_FIRST },                                    \
 619   { "r10",      10 + GP_REG_FIRST },                                    \
 620   { "r11",      11 + GP_REG_FIRST },                                    \
 621   { "r12",      12 + GP_REG_FIRST },                                    \
 622   { "r13",      13 + GP_REG_FIRST },                                    \
 623   { "r14",      14 + GP_REG_FIRST },                                    \
 624   { "r15",      15 + GP_REG_FIRST },                                    \
 625   { "r16",      16 + GP_REG_FIRST },                                    \
 626   { "r17",      17 + GP_REG_FIRST },                                    \
 627   { "r18",      18 + GP_REG_FIRST },                                    \
 628   { "r19",      19 + GP_REG_FIRST },                                    \
 629   { "r20",      20 + GP_REG_FIRST },                                    \
 630   { "r21",      21 + GP_REG_FIRST },                                    \
 631   { "r22",      22 + GP_REG_FIRST },                                    \
 632   { "r23",      23 + GP_REG_FIRST },                                    \
 633   { "r24",      24 + GP_REG_FIRST },                                    \
 634   { "r25",      25 + GP_REG_FIRST },                                    \
 635   { "r26",      26 + GP_REG_FIRST },                                    \
 636   { "r27",      27 + GP_REG_FIRST },                                    \
 637   { "r28",      28 + GP_REG_FIRST },                                    \
 638   { "r29",      29 + GP_REG_FIRST },                                    \
 639   { "r30",      30 + GP_REG_FIRST },                                    \
 640   { "r31",      31 + GP_REG_FIRST },                                    \
 641   { "rmsr",     ST_REG}                                                 \
 642 }
 643
 644 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 645
 646 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) microblaze_print_operand_punct[CODE]
 647
 648 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 649
 650 /* ASM_OUTPUT_ALIGNED_COMMON and ASM_OUTPUT_ALIGNED_LOCAL
 651
 652    Unfortunately, we still need to set the section explicitly. Somehow,
 653    our binutils assign .comm and .lcomm variables to the "current" section
 654    in the assembly file, rather than where they implicitly belong. We need to
 655    remove this explicit setting in GCC when binutils can understand sections
 656    better.  */
 657 #undef  ASM_OUTPUT_ALIGNED_COMMON
 658 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
 659 do {                                                                    \
 660   if (SIZE > 0 && SIZE <= microblaze_section_threshold                  \
 661       && TARGET_XLGPOPT)                                               \
 662     {                                                                   \
 663       switch_to_section (sbss_section);                                 \
 664     }                                                                   \
 665   else                                                                  \
 666     {                                                                   \
 667       switch_to_section (bss_section);                                  \
 668     }                                                                   \
 669   fprintf (FILE, "%s", COMMON_ASM_OP);                                  \
 670   assemble_name ((FILE), (NAME));                                       \
 671   fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",              \
 672            (SIZE), (ALIGN) / BITS_PER_UNIT);                            \
 673   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 674 } while (0)
 675
 676 #undef ASM_OUTPUT_ALIGNED_LOCAL
 677 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
 678 do {                                                                    \
 679   if (SIZE > 0 && SIZE <= microblaze_section_threshold                  \
 680       && TARGET_XLGPOPT)                                               \
 681     {                                                                   \
 682       switch_to_section (sbss_section);                                 \
 683     }                                                                   \
 684   else                                                                  \
 685     {                                                                   \
 686       switch_to_section (bss_section);                                  \
 687     }                                                                   \
 688   fprintf (FILE, "%s", LCOMMON_ASM_OP);                                 \
 689   assemble_name ((FILE), (NAME));                                       \
 690   fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",              \
 691            (SIZE), (ALIGN) / BITS_PER_UNIT);                            \
 692   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 693 } while (0)
 694
 695 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)           \
 696 do {                                                                    \
 697   ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN);                   \
 698 } while (0)
 699
 700 #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL)                     \
 701 {                                                                       \
 702 }
 703
 704 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)                   \
 705   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long)(NUM))
 706
 707 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
 708   fprintf (STREAM, "\t%s\t%sL%d\n",                                     \
 709            ".gpword",                                                   \
 710            LOCAL_LABEL_PREFIX, VALUE)
 711
 712 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
 713 do {                                                                    \
 714   if (flag_pic == 2)                                               \
 715     fprintf (STREAM, "\t%s\t%sL%d@GOTOFF\n",                            \
 716              ".gpword",                                                 \
 717              LOCAL_LABEL_PREFIX, VALUE);                                \
 718   else                                                                  \
 719     fprintf (STREAM, "\t%s\t%sL%d\n",                                   \
 720              ".gpword",                                                 \
 721              LOCAL_LABEL_PREFIX, VALUE);                                \
 722 } while (0)
 723
 724 #define ASM_OUTPUT_ALIGN(STREAM,LOG)                                    \
 725   fprintf (STREAM, "\t.align\t%d\n", (LOG))
 726
 727 #define ASM_OUTPUT_SKIP(STREAM,SIZE)                                    \
 728   fprintf (STREAM, "\t.space\t%lu\n", (SIZE))
 729
 730 #define ASCII_DATA_ASM_OP               "\t.ascii\t"
 731 #define STRING_ASM_OP                   "\t.asciz\t"
 732
 733 #define ASM_OUTPUT_IDENT(FILE, STRING)                                  \
 734   microblaze_asm_output_ident (FILE, STRING)
 735
 736 /* Default to -G 8 */
 737 #ifndef MICROBLAZE_DEFAULT_GVALUE
 738 #define MICROBLAZE_DEFAULT_GVALUE 8
 739 #endif
 740
 741 /* Given a decl node or constant node, choose the section to output it in
 742    and select that section.  */
 743
 744 /* Store in OUTPUT a string (made with alloca) containing
 745    an assembler-name for a local static variable named NAME.
 746    LABELNO is an integer which is different for each call.  */
 747 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)                  \
 748 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),                    \
 749   sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
 750
 751 /* How to start an assembler comment.
 752    The leading space is important (the microblaze assembler requires it).  */
 753 #ifndef ASM_COMMENT_START
 754 #define ASM_COMMENT_START               " #"
 755 #endif
 756
 757 #define BSS_VAR         1
 758 #define SBSS_VAR        2
 759 #define DATA_VAR        4
 760 #define SDATA_VAR       5
 761 #define RODATA_VAR      6
 762 #define SDATA2_VAR      7
 763
 764 /* These definitions are used in with the shift_type flag in the rtl.  */
 765 #define SHIFT_CONST     1
 766 #define SHIFT_REG       2
 767 #define USE_ADDK        3
 768
 769 /* Handle interrupt attribute.  */
 770 extern int interrupt_handler;
 771 extern int save_volatiles;
 772
 773 #define INTERRUPT_HANDLER_NAME "_interrupt_handler"
 774
 775 /* These #define added for C++.  */
 776 #define UNALIGNED_SHORT_ASM_OP          ".data16"
 777 #define UNALIGNED_INT_ASM_OP            ".data32"
 778 #define UNALIGNED_DOUBLE_INT_ASM_OP     ".data8"
 779
 780 #define ASM_BYTE_OP                     ".data8"
 781
 782 /* The following #defines are used in the headers files. Always retain these.  */
 783
 784 /* Added for declaring size at the end of the function.  */
 785 #undef ASM_DECLARE_FUNCTION_SIZE
 786 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)                    \
 787   do {                                                                  \
 788     if (!flag_inhibit_size_directive)                                   \
 789       {                                                                 \
 790         char label[256];                                                \
 791         static int labelno;                                             \
 792         labelno++;                                                      \
 793         ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno);            \
 794         (*targetm.asm_out.internal_label) (FILE, "Lfe", labelno);       \
 795         fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 796         assemble_name (FILE, (FNAME));                                  \
 797         fprintf (FILE, ",");                                            \
 798         assemble_name (FILE, label);                                    \
 799         fprintf (FILE, "-");                                            \
 800         assemble_name (FILE, (FNAME));                                  \
 801         putc ('\n', FILE);                                              \
 802       }                                                                 \
 803   } while (0)
 804
 805 #define GLOBAL_ASM_OP                   "\t.globl\t"
 806 #define TYPE_ASM_OP                     "\t.type\t"
 807 #define SIZE_ASM_OP                     "\t.size\t"
 808 #define COMMON_ASM_OP                   "\t.comm\t"
 809 #define LCOMMON_ASM_OP                  "\t.lcomm\t"
 810
 811 #define MAX_OFILE_ALIGNMENT             (32768*8)
 812
 813 #define TYPE_OPERAND_FMT                "@%s"
 814
 815 /* Write the extra assembler code needed to declare an object properly.  */
 816 #undef ASM_DECLARE_OBJECT_NAME
 817 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)                       \
 818   do {                                                                  \
 819     fprintf (FILE, "%s", TYPE_ASM_OP);                                  \
 820     assemble_name (FILE, NAME);                                         \
 821     putc (',', FILE);                                                   \
 822     fprintf (FILE, TYPE_OPERAND_FMT, "object");                         \
 823     putc ('\n', FILE);                                                  \
 824     size_directive_output = 0;                                          \
 825     if (!flag_inhibit_size_directive && DECL_SIZE (DECL))               \
 826       {                                                                 \
 827         size_directive_output = 1;                                      \
 828         fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 829         assemble_name (FILE, NAME);                                     \
 830         fprintf (FILE, ",%d\n",  int_size_in_bytes (TREE_TYPE (DECL))); \
 831       }                                                                 \
 832     microblaze_declare_object (FILE, NAME, "", ":\n", 0);                       \
 833   } while (0)
 834
 835 #undef ASM_FINISH_DECLARE_OBJECT
 836 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)         \
 837 do {                                                                     \
 838      char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0);                   \
 839      if (!flag_inhibit_size_directive && DECL_SIZE (DECL)                \
 840          && ! AT_END && TOP_LEVEL                                        \
 841          && DECL_INITIAL (DECL) == error_mark_node                       \
 842          && !size_directive_output)                                      \
 843        {                                                                 \
 844          size_directive_output = 1;                                      \
 845          fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 846          assemble_name (FILE, name);                                     \
 847          fprintf (FILE, ",%d\n", int_size_in_bytes (TREE_TYPE (DECL)));  \
 848        }                                                                 \
 849    } while (0)
 850
 851 #define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2)                            \
 852  do { fputc ( '\t', FILE);                                            \
 853       assemble_name (FILE, LABEL1);                                   \
 854       fputs ( " = ", FILE);                                           \
 855       assemble_name (FILE, LABEL2);                                   \
 856       fputc ( '\n', FILE);                                            \
 857  } while (0)
 858
 859 #define ASM_WEAKEN_LABEL(FILE,NAME)                                     \
 860  do { fputs ("\t.weakext\t", FILE);                                     \
 861       assemble_name (FILE, NAME);                                       \
 862       fputc ('\n', FILE);                                               \
 863     } while (0)
 864
 865 #define MAKE_DECL_ONE_ONLY(DECL)        (DECL_WEAK (DECL) = 1)
 866 #undef UNIQUE_SECTION_P
 867 #define UNIQUE_SECTION_P(DECL)          (DECL_ONE_ONLY (DECL))
 868
 869 #undef TARGET_ASM_NAMED_SECTION
 870 #define TARGET_ASM_NAMED_SECTION        default_elf_asm_named_section
 871
 872 /* Define the strings to put out for each section in the object file.
 873
 874    Note: For ctors/dtors, we want to give these sections the SHF_WRITE
 875    attribute to allow shared libraries to patch/resolve addresses into
 876    these locations.  On Microblaze, there is no concept of shared libraries
 877    yet, so this is for future use.  */
 878 #define TEXT_SECTION_ASM_OP     "\t.text"
 879 #define DATA_SECTION_ASM_OP     "\t.data"
 880 #define READONLY_DATA_SECTION_ASM_OP    \
 881                                 "\t.rodata"
 882 #define BSS_SECTION_ASM_OP      "\t.bss"
 883 #define CTORS_SECTION_ASM_OP    "\t.section\t.ctors,\"aw\""
 884 #define DTORS_SECTION_ASM_OP    "\t.section\t.dtors,\"aw\""
 885 #define INIT_SECTION_ASM_OP     "\t.section\t.init,\"ax\""
 886 #define FINI_SECTION_ASM_OP     "\t.section\t.fini,\"ax\""
 887
 888 #define SDATA_SECTION_ASM_OP    "\t.sdata"      /* Small RW initialized data   */
 889 #define SDATA2_SECTION_ASM_OP   "\t.sdata2"     /* Small RO initialized data   */
 890 #define SBSS_SECTION_ASM_OP     "\t.sbss"       /* Small RW uninitialized data */
 891 #define SBSS2_SECTION_ASM_OP    "\t.sbss2"      /* Small RO uninitialized data */
 892
 893 #define HOT_TEXT_SECTION_NAME   ".text.hot"
 894 #define UNLIKELY_EXECUTED_TEXT_SECTION_NAME \
 895                                 ".text.unlikely"
 896
 897 /* We do this to save a few 10s of code space that would be taken up
 898    by the call_FUNC () wrappers, used by the generic CRT_CALL_STATIC_FUNCTION
 899    definition in crtstuff.c.  */
 900 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC)      \
 901     asm ( SECTION_OP "\n"                               \
 902           "\tbrlid   r15, " #FUNC "\n\t nop\n"         \
 903           TEXT_SECTION_ASM_OP);
 904
 905 /* We need to group -lm as well, since some Newlib math functions
 906    reference __errno!  */
 907 #undef LIB_SPEC
 908 #define LIB_SPEC \
 909 "%{!nostdlib: \
 910 %{pg:-start-group -lxilprofile -lgloss -lxil -lc -lm -end-group } \
 911 %{!pg:-start-group -lgloss -lxil -lc -lm -end-group }} "
 912
 913 #undef  ENDFILE_SPEC
 914 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
 915
 916 #define STARTFILE_EXECUTABLE_SPEC   "crt0.o%s crti.o%s crtbegin.o%s"
 917 #define STARTFILE_XMDSTUB_SPEC      "crt1.o%s crti.o%s crtbegin.o%s"
 918 #define STARTFILE_BOOTSTRAP_SPEC    "crt2.o%s crti.o%s crtbegin.o%s"
 919 #define STARTFILE_NOVECTORS_SPEC    "crt3.o%s crti.o%s crtbegin.o%s"
 920 #define STARTFILE_CRTINIT_SPEC      "%{!pg: %{!mno-clearbss: crtinit.o%s} \
 921 %{mno-clearbss: sim-crtinit.o%s}} \
 922 %{pg: %{!mno-clearbss: pgcrtinit.o%s} %{mno-clearbss: sim-pgcrtinit.o%s}}"
 923
 924 #define STARTFILE_DEFAULT_SPEC      STARTFILE_EXECUTABLE_SPEC
 925
 926 #undef SUBTARGET_EXTRA_SPECS
 927 #define SUBTARGET_EXTRA_SPECS                                           \
 928   { "startfile_executable",     STARTFILE_EXECUTABLE_SPEC },            \
 929   { "startfile_xmdstub",        STARTFILE_XMDSTUB_SPEC },               \
 930   { "startfile_bootstrap",      STARTFILE_BOOTSTRAP_SPEC },             \
 931   { "startfile_novectors",      STARTFILE_NOVECTORS_SPEC },             \
 932   { "startfile_crtinit",        STARTFILE_CRTINIT_SPEC },               \
 933   { "startfile_default",        STARTFILE_DEFAULT_SPEC },
 934
 935 #undef  STARTFILE_SPEC
 936 #define STARTFILE_SPEC  "\
 937 %{Zxl-mode-executable   : %(startfile_executable)  ; \
 938   mxl-mode-executable   : %(startfile_executable)  ; \
 939   Zxl-mode-xmdstub      : %(startfile_xmdstub)     ; \
 940   mxl-mode-xmdstub      : %(startfile_xmdstub)     ; \
 941   Zxl-mode-bootstrap    : %(startfile_bootstrap)   ; \
 942   mxl-mode-bootstrap    : %(startfile_bootstrap)   ; \
 943   Zxl-mode-novectors    : %(startfile_novectors)   ; \
 944   mxl-mode-novectors    : %(startfile_novectors)   ; \
 945   Zxl-mode-xilkernel    : %(startfile_xilkernel)   ; \
 946   mxl-mode-xilkernel    : %(startfile_xilkernel)   ; \
 947                         : %(startfile_default)       \
 948 } \
 949 %(startfile_crtinit)"