gcc/testsuite/gcc.target/powerpc/p9-extract-1.c

   1 /* { dg-do compile { target { powerpc64*-*-* && lp64 } } } */
   2 /* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power9" } } */
   3 /* { dg-require-effective-target powerpc_p9vector_ok } */
   4 /* { dg-options "-mcpu=power9 -O2" } */
   5
   6 /* Test to make sure VEXTU{B,H,W}{L,R}X is generated for various vector extract
   7    operations for ISA 3.0 (-mcpu=power9).  In addition, make sure that neither
   8    of the the the old methods of doing vector extracts are done either by
   9    explict stores to the stack or by using direct move instructions.  */
  10
  11 #include <altivec.h>
  12
  13 int
  14 extract_int_0 (vector int a)
  15 {
  16   int c = 0;
  17   int b = vec_extract (a, c);
  18   return b;
  19 }
  20
  21 int
  22 extract_int_3 (vector int a)
  23 {
  24   int c = 3;
  25   int b = vec_extract (a, c);
  26   return b;
  27 }
  28
  29 unsigned int
  30 extract_uint_0 (vector unsigned int a)
  31 {
  32   int c = 0;
  33   unsigned int b = vec_extract (a, c);
  34   return b;
  35 }
  36
  37 unsigned int
  38 extract_uint_3 (vector unsigned int a)
  39 {
  40   int c = 3;
  41   unsigned int b = vec_extract (a, c);
  42   return b;
  43 }
  44
  45 short
  46 extract_short_0 (vector short a)
  47 {
  48   int c = 0;
  49   short b = vec_extract (a, c);
  50   return b;
  51 }
  52
  53 short
  54 extract_short_7 (vector short a)
  55 {
  56   int c = 7;
  57   short b = vec_extract (a, c);
  58   return b;
  59 }
  60
  61 unsigned short
  62 extract_ushort_0 (vector unsigned short a)
  63 {
  64   int c = 0;
  65   unsigned short b = vec_extract (a, c);
  66   return b;
  67 }
  68
  69 unsigned short
  70 extract_ushort_7 (vector unsigned short a)
  71 {
  72   int c = 7;
  73   unsigned short b = vec_extract (a, c);
  74   return b;
  75 }
  76
  77 signed char
  78 extract_schar_0 (vector signed char a)
  79 {
  80   int c = 0;
  81   signed char b = vec_extract (a, c);
  82   return b;
  83 }
  84
  85 signed char
  86 extract_schar_15 (vector signed char a)
  87 {
  88   int c = 15;
  89   signed char b = vec_extract (a, c);
  90   return b;
  91 }
  92
  93 unsigned char
  94 extract_uchar_0 (vector unsigned char a)
  95 {
  96   int c = 0;
  97   unsigned char b = vec_extract (a, c);
  98   return b;
  99 }
 100
 101 unsigned char
 102 extract_uchar_15 (vector unsigned char a)
 103 {
 104   int c = 15;
 105   signed char b = vec_extract (a, c);
 106   return b;
 107 }
 108
 109 unsigned char
 110 extract_bool_char_0 (vector bool char a)
 111 {
 112   int c = 0;
 113   unsigned char b = vec_extract (a, c);
 114   return b;
 115 }
 116
 117 unsigned int
 118 extract_bool_int_0 (vector bool int a)
 119 {
 120   int c = 0;
 121   unsigned int b = vec_extract (a, c);
 122   return b;
 123 }
 124
 125 unsigned short int
 126 extract_bool_short_int_0 (vector bool short int a)
 127 {
 128   int c = 0;
 129   unsigned short int b = vec_extract (a, c);
 130   return b;
 131 }
 132
 133 /* { dg-final { scan-assembler     "vextub\[lr\]x " } } */
 134 /* { dg-final { scan-assembler     "vextuh\[lr\]x " } } */
 135 /* { dg-final { scan-assembler     "vextuw\[lr\]x " } } */
 136 /* { dg-final { scan-assembler     "extsb "         } } */
 137 /* { dg-final { scan-assembler     "extsh "         } } */
 138 /* { dg-final { scan-assembler     "extsw "         } } */
 139 /* { dg-final { scan-assembler-not "m\[ft\]vsr"     } } */
 140 /* { dg-final { scan-assembler-not "stxvd2x "       } } */
 141 /* { dg-final { scan-assembler-not "stxv "          } } */
 142 /* { dg-final { scan-assembler-not "lwa "           } } */
 143 /* { dg-final { scan-assembler-not "lwz "           } } */
 144 /* { dg-final { scan-assembler-not "lha "           } } */
 145 /* { dg-final { scan-assembler-not "lhz "           } } */