gcc/testsuite/gcc.target/riscv/rvv/autovec/vls-vlmax/perm-4.c

   1 /* { dg-do compile } */
   2 /* { dg-additional-options "-march=rv64gcv -mabi=lp64d -Wno-psabi" } */
   3
   4 #include "perm.h"
   5
   6 #define MASK_2(X, Y) (Y) - 1 - (X), (Y) - 2 - (X)
   7 #define MASK_4(X, Y) MASK_2 (X, Y), MASK_2 (X + 2, Y)
   8 #define MASK_8(X, Y) MASK_4 (X, Y), MASK_4 (X + 4, Y)
   9 #define MASK_16(X, Y) MASK_8 (X, Y), MASK_8 (X + 8, Y)
  10 #define MASK_32(X, Y) MASK_16 (X, Y), MASK_16 (X + 16, Y)
  11 #define MASK_64(X, Y) MASK_32 (X, Y), MASK_32 (X + 32, Y)
  12 #define MASK_128(X, Y) MASK_64 (X, Y), MASK_64 (X + 64, Y)
  13
  14 #define PERMUTE(TYPE, NUNITS)                                                  \
  15   __attribute__ ((noipa)) void permute_##TYPE (TYPE values1, TYPE values2,     \
  16                                                TYPE *out)                      \
  17   {                                                                            \
  18     TYPE v                                                                     \
  19       = __builtin_shufflevector (values1, values2, MASK_##NUNITS (0, NUNITS)); \
  20     *(TYPE *) out = v;                                                         \
  21   }
  22
  23 #define TEST_ALL(T)                                                            \
  24   T (vnx2qi, 2)                                                                \
  25   T (vnx4qi, 4)                                                                \
  26   T (vnx8qi, 8)                                                                \
  27   T (vnx16qi, 16)                                                              \
  28   T (vnx32qi, 32)                                                              \
  29   T (vnx64qi, 64)                                                              \
  30   T (vnx128qi, 128)                                                            \
  31   T (vnx2hi, 2)                                                                \
  32   T (vnx4hi, 4)                                                                \
  33   T (vnx8hi, 8)                                                                \
  34   T (vnx16hi, 16)                                                              \
  35   T (vnx32hi, 32)                                                              \
  36   T (vnx64hi, 64)                                                              \
  37   T (vnx2si, 2)                                                                \
  38   T (vnx4si, 4)                                                                \
  39   T (vnx8si, 8)                                                                \
  40   T (vnx16si, 16)                                                              \
  41   T (vnx32si, 32)                                                              \
  42   T (vnx2di, 2)                                                                \
  43   T (vnx4di, 4)                                                                \
  44   T (vnx8di, 8)                                                                \
  45   T (vnx16di, 16)                                                              \
  46   T (vnx2sf, 2)                                                                \
  47   T (vnx4sf, 4)                                                                \
  48   T (vnx8sf, 8)                                                                \
  49   T (vnx16sf, 16)                                                              \
  50   T (vnx32sf, 32)                                                              \
  51   T (vnx2df, 2)                                                                \
  52   T (vnx4df, 4)                                                                \
  53   T (vnx8df, 8)                                                                \
  54   T (vnx16df, 16)
  55
  56 TEST_ALL (PERMUTE)
  57
  58 /* { dg-final { scan-assembler-times {vrgather\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 19 } } */
  59 /* { dg-final { scan-assembler-times {vrgatherei16\.vv\tv[0-9]+,\s*v[0-9]+,\s*v[0-9]+} 12 } } */
  60 /* { dg-final { scan-assembler-times {vrsub\.vi} 24 } } */
  61 /* { dg-final { scan-assembler-times {vrsub\.vx} 7 } } */