RISC-V: Disable BSWAP optimization for NUNITS < 4
When fixing bugs, I notice there is a piece odd codes look incorrect.
which probably make codegen worse.
#include <stdint.h>
typedef int8_t vnx2qi __attribute__ ((vector_size (2)));
#define MASK_2(X, Y) (Y) - 1 - (X), (Y) - 2 - (X)
#define PERMUTE(TYPE, NUNITS) \
__attribute__ ((noipa)) void permute_##TYPE (TYPE values1, TYPE values2, \
TYPE *out) \
{ \
TYPE v \
= __builtin_shufflevector (values1, values2, MASK_##NUNITS (0, NUNITS)); \
*(TYPE *) out = v; \
}
#define TEST_ALL(T) \
T (vnx2qi, 2)
TEST_ALL (PERMUTE)
Before this patch:
vsetivli zero,2,e8,mf8,ta,ma
vle8.v v1,0(a0)
vsetivli zero,1,e16,mf4,ta,ma
vsrl.vi v2,v1,8
vsll.vi v1,v1,8
vor.vv v1,v2,v1
vsetivli zero,2,e8,mf8,ta,ma
vse8.v v1,0(a2)
ret
After this patch:
vsetivli zero,2,e8,mf8,ta,ma
vle8.v v3,0(a0)
vid.v v1
vrsub.vi v1,v1,1
vrgather.vv v2,v3,v1
vse8.v v2,0(a2)
ret
Committed as it is very obvious if during code review.
gcc/ChangeLog:
* config/riscv/riscv-v.cc (shuffle_bswap_pattern): Disable for NUNIT < 4.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vls-vlmax/perm-4.c: Adapt test.
* gcc.target/riscv/rvv/autovec/vls/perm-4.c: Ditto.