gcc/config/arm/unspecs.md

   1 ;; Unspec defintions.
   2 ;; Copyright (C) 2012-2017 Free Software Foundation, Inc.
   3 ;; Contributed by ARM Ltd.
   4
   5 ;; This file is part of GCC.
   6
   7 ;; GCC is free software; you can redistribute it and/or modify it
   8 ;; under the terms of the GNU General Public License as published
   9 ;; by the Free Software Foundation; either version 3, or (at your
  10 ;; option) any later version.
  11
  12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
  13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14 ;; or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15 ;; License for more details.
  16
  17 ;; You should have received a copy of the GNU General Public License
  18 ;; along with GCC; see the file COPYING3.  If not see
  19 ;; <http://www.gnu.org/licenses/>.
  20
  21 ;; UNSPEC Usage:
  22 ;; Note: sin and cos are no-longer used.
  23 ;; Unspec enumerators for Neon are defined in neon.md.
  24 ;; Unspec enumerators for iwmmxt2 are defined in iwmmxt2.md
  25
  26 (define_c_enum "unspec" [
  27   UNSPEC_PUSH_MULT      ; `push multiple' operation:
  28                         ;   operand 0 is the first register,
  29                         ;   subsequent registers are in parallel (use ...)
  30                         ;   expressions.
  31   UNSPEC_PIC_SYM        ; A symbol that has been treated properly for pic
  32                         ; usage, that is, we will add the pic_register
  33                         ; value to it before trying to dereference it.
  34   UNSPEC_PIC_BASE       ; Add PC and all but the last operand together,
  35                         ; The last operand is the number of a PIC_LABEL
  36                         ; that points at the containing instruction.
  37   UNSPEC_PRLG_STK       ; A special barrier that prevents frame accesses
  38                         ; being scheduled before the stack adjustment insn.
  39   UNSPEC_REGISTER_USE   ; As USE insns are not meaningful after reload,
  40                         ; this unspec is used to prevent the deletion of
  41                         ; instructions setting registers for EH handling
  42                         ; and stack frame generation.  Operand 0 is the
  43                         ; register to "use".
  44   UNSPEC_CHECK_ARCH     ; Set CCs to indicate 26-bit or 32-bit mode.
  45   UNSPEC_WSHUFH         ; Used by the intrinsic form of the iWMMXt WSHUFH instruction.
  46   UNSPEC_WACC           ; Used by the intrinsic form of the iWMMXt WACC instruction.
  47   UNSPEC_TMOVMSK        ; Used by the intrinsic form of the iWMMXt TMOVMSK instruction.
  48   UNSPEC_WSAD           ; Used by the intrinsic form of the iWMMXt WSAD instruction.
  49   UNSPEC_WSADZ          ; Used by the intrinsic form of the iWMMXt WSADZ instruction.
  50   UNSPEC_WMACS          ; Used by the intrinsic form of the iWMMXt WMACS instruction.
  51   UNSPEC_WMACU          ; Used by the intrinsic form of the iWMMXt WMACU instruction.
  52   UNSPEC_WMACSZ         ; Used by the intrinsic form of the iWMMXt WMACSZ instruction.
  53   UNSPEC_WMACUZ         ; Used by the intrinsic form of the iWMMXt WMACUZ instruction.
  54   UNSPEC_CLRDI          ; Used by the intrinsic form of the iWMMXt CLRDI instruction.
  55   UNSPEC_WALIGNI        ; Used by the intrinsic form of the iWMMXt WALIGN instruction.
  56   UNSPEC_TLS            ; A symbol that has been treated properly for TLS usage.
  57   UNSPEC_PIC_LABEL      ; A label used for PIC access that does not appear in the
  58                         ; instruction stream.
  59   UNSPEC_PIC_OFFSET     ; A symbolic 12-bit OFFSET that has been treated
  60                         ; correctly for PIC usage.
  61   UNSPEC_GOTSYM_OFF     ; The offset of the start of the GOT from a
  62                         ; a given symbolic address.
  63   UNSPEC_THUMB1_CASESI  ; A Thumb1 compressed dispatch-table call.
  64   UNSPEC_RBIT           ; rbit operation.
  65   UNSPEC_SYMBOL_OFFSET  ; The offset of the start of the symbol from
  66                         ; another symbolic address.
  67   UNSPEC_MEMORY_BARRIER ; Represent a memory barrier.
  68   UNSPEC_UNALIGNED_LOAD ; Used to represent ldr/ldrh instructions that access
  69                         ; unaligned locations, on architectures which support
  70                         ; that.
  71   UNSPEC_UNALIGNED_STORE ; Same for str/strh.
  72   UNSPEC_PIC_UNIFIED    ; Create a common pic addressing form.
  73   UNSPEC_LL             ; Represent an unpaired load-register-exclusive.
  74   UNSPEC_VRINTZ         ; Represent a float to integral float rounding
  75                         ; towards zero.
  76   UNSPEC_VRINTP         ; Represent a float to integral float rounding
  77                         ; towards +Inf.
  78   UNSPEC_VRINTM         ; Represent a float to integral float rounding
  79                         ; towards -Inf.
  80   UNSPEC_VRINTR         ; Represent a float to integral float rounding
  81                         ; FPSCR rounding mode.
  82   UNSPEC_VRINTX         ; Represent a float to integral float rounding
  83                         ; FPSCR rounding mode and signal inexactness.
  84   UNSPEC_VRINTA         ; Represent a float to integral float rounding
  85                         ; towards nearest, ties away from zero.
  86   UNSPEC_PROBE_STACK    ; Probe stack memory reference
  87   UNSPEC_NONSECURE_MEM  ; Represent non-secure memory in ARMv8-M with
  88                         ; security extension
  89 ])
  90
  91 (define_c_enum "unspec" [
  92   UNSPEC_WADDC          ; Used by the intrinsic form of the iWMMXt WADDC instruction.
  93   UNSPEC_WABS           ; Used by the intrinsic form of the iWMMXt WABS instruction.
  94   UNSPEC_WQMULWMR       ; Used by the intrinsic form of the iWMMXt WQMULWMR instruction.
  95   UNSPEC_WQMULMR        ; Used by the intrinsic form of the iWMMXt WQMULMR instruction.
  96   UNSPEC_WQMULWM        ; Used by the intrinsic form of the iWMMXt WQMULWM instruction.
  97   UNSPEC_WQMULM         ; Used by the intrinsic form of the iWMMXt WQMULM instruction.
  98   UNSPEC_WQMIAxyn       ; Used by the intrinsic form of the iWMMXt WMIAxyn instruction.
  99   UNSPEC_WQMIAxy        ; Used by the intrinsic form of the iWMMXt WMIAxy instruction.
 100   UNSPEC_TANDC          ; Used by the intrinsic form of the iWMMXt TANDC instruction.
 101   UNSPEC_TORC           ; Used by the intrinsic form of the iWMMXt TORC instruction.
 102   UNSPEC_TORVSC         ; Used by the intrinsic form of the iWMMXt TORVSC instruction.
 103   UNSPEC_TEXTRC         ; Used by the intrinsic form of the iWMMXt TEXTRC instruction.
 104 ])
 105
 106
 107 ;; UNSPEC_VOLATILE Usage:
 108
 109 (define_c_enum "unspecv" [
 110   VUNSPEC_BLOCKAGE      ; `blockage' insn to prevent scheduling across an
 111                         ;   insn in the code.
 112   VUNSPEC_EPILOGUE      ; `epilogue' insn, used to represent any part of the
 113                         ;   instruction epilogue sequence that isn't expanded
 114                         ;   into normal RTL.  Used for both normal and sibcall
 115                         ;   epilogues.
 116   VUNSPEC_THUMB1_INTERWORK ; `prologue_thumb1_interwork' insn, used to swap
 117                         ;   modes from arm to thumb.
 118   VUNSPEC_ALIGN         ; `align' insn.  Used at the head of a minipool table
 119                         ;   for inlined constants.
 120   VUNSPEC_POOL_END      ; `end-of-table'.  Used to mark the end of a minipool
 121                         ;   table.
 122   VUNSPEC_POOL_1        ; `pool-entry(1)'.  An entry in the constant pool for
 123                         ;   an 8-bit object.
 124   VUNSPEC_POOL_2        ; `pool-entry(2)'.  An entry in the constant pool for
 125                         ;   a 16-bit object.
 126   VUNSPEC_POOL_4        ; `pool-entry(4)'.  An entry in the constant pool for
 127                         ;   a 32-bit object.
 128   VUNSPEC_POOL_8        ; `pool-entry(8)'.  An entry in the constant pool for
 129                         ;   a 64-bit object.
 130   VUNSPEC_POOL_16       ; `pool-entry(16)'.  An entry in the constant pool for
 131                         ;   a 128-bit object.
 132   VUNSPEC_TMRC          ; Used by the iWMMXt TMRC instruction.
 133   VUNSPEC_TMCR          ; Used by the iWMMXt TMCR instruction.
 134   VUNSPEC_ALIGN8        ; 8-byte alignment version of VUNSPEC_ALIGN
 135   VUNSPEC_WCMP_EQ       ; Used by the iWMMXt WCMPEQ instructions
 136   VUNSPEC_WCMP_GTU      ; Used by the iWMMXt WCMPGTU instructions
 137   VUNSPEC_WCMP_GT       ; Used by the iwMMXT WCMPGT instructions
 138   VUNSPEC_EH_RETURN     ; Use to override the return address for exception
 139                         ; handling.
 140   VUNSPEC_ATOMIC_CAS    ; Represent an atomic compare swap.
 141   VUNSPEC_ATOMIC_XCHG   ; Represent an atomic exchange.
 142   VUNSPEC_ATOMIC_OP     ; Represent an atomic operation.
 143   VUNSPEC_LL            ; Represent a load-register-exclusive.
 144   VUNSPEC_LDRD_ATOMIC   ; Represent an LDRD used as an atomic DImode load.
 145   VUNSPEC_SC            ; Represent a store-register-exclusive.
 146   VUNSPEC_LAX           ; Represent a load-register-acquire-exclusive.
 147   VUNSPEC_SLX           ; Represent a store-register-release-exclusive.
 148   VUNSPEC_LDA           ; Represent a store-register-acquire.
 149   VUNSPEC_STL           ; Represent a store-register-release.
 150   VUNSPEC_GET_FPSCR     ; Represent fetch of FPSCR content.
 151   VUNSPEC_SET_FPSCR     ; Represent assign of FPSCR content.
 152   VUNSPEC_PROBE_STACK_RANGE ; Represent stack range probing.
 153   VUNSPEC_CDP           ; Represent the coprocessor cdp instruction.
 154   VUNSPEC_CDP2          ; Represent the coprocessor cdp2 instruction.
 155   VUNSPEC_LDC           ; Represent the coprocessor ldc instruction.
 156   VUNSPEC_LDC2          ; Represent the coprocessor ldc2 instruction.
 157   VUNSPEC_LDCL          ; Represent the coprocessor ldcl instruction.
 158   VUNSPEC_LDC2L         ; Represent the coprocessor ldc2l instruction.
 159   VUNSPEC_STC           ; Represent the coprocessor stc instruction.
 160   VUNSPEC_STC2          ; Represent the coprocessor stc2 instruction.
 161   VUNSPEC_STCL          ; Represent the coprocessor stcl instruction.
 162   VUNSPEC_STC2L         ; Represent the coprocessor stc2l instruction.
 163   VUNSPEC_MCR           ; Represent the coprocessor mcr instruction.
 164   VUNSPEC_MCR2          ; Represent the coprocessor mcr2 instruction.
 165   VUNSPEC_MRC           ; Represent the coprocessor mrc instruction.
 166   VUNSPEC_MRC2          ; Represent the coprocessor mrc2 instruction.
 167   VUNSPEC_MCRR          ; Represent the coprocessor mcrr instruction.
 168   VUNSPEC_MCRR2         ; Represent the coprocessor mcrr2 instruction.
 169   VUNSPEC_MRRC          ; Represent the coprocessor mrrc instruction.
 170   VUNSPEC_MRRC2         ; Represent the coprocessor mrrc2 instruction.
 171 ])
 172
 173 ;; Enumerators for NEON unspecs.
 174 (define_c_enum "unspec" [
 175   UNSPEC_ASHIFT_SIGNED
 176   UNSPEC_ASHIFT_UNSIGNED
 177   UNSPEC_CRC32B
 178   UNSPEC_CRC32H
 179   UNSPEC_CRC32W
 180   UNSPEC_CRC32CB
 181   UNSPEC_CRC32CH
 182   UNSPEC_CRC32CW
 183   UNSPEC_AESD
 184   UNSPEC_AESE
 185   UNSPEC_AESIMC
 186   UNSPEC_AESMC
 187   UNSPEC_SHA1C
 188   UNSPEC_SHA1M
 189   UNSPEC_SHA1P
 190   UNSPEC_SHA1H
 191   UNSPEC_SHA1SU0
 192   UNSPEC_SHA1SU1
 193   UNSPEC_SHA256H
 194   UNSPEC_SHA256H2
 195   UNSPEC_SHA256SU0
 196   UNSPEC_SHA256SU1
 197   UNSPEC_VMULLP64
 198   UNSPEC_LOAD_COUNT
 199   UNSPEC_VABD_F
 200   UNSPEC_VABD_S
 201   UNSPEC_VABD_U
 202   UNSPEC_VABDL_S
 203   UNSPEC_VABDL_U
 204   UNSPEC_VADD
 205   UNSPEC_VADDHN
 206   UNSPEC_VRADDHN
 207   UNSPEC_VADDL_S
 208   UNSPEC_VADDL_U
 209   UNSPEC_VADDW_S
 210   UNSPEC_VADDW_U
 211   UNSPEC_VBSL
 212   UNSPEC_VCAGE
 213   UNSPEC_VCAGT
 214   UNSPEC_VCALE
 215   UNSPEC_VCALT
 216   UNSPEC_VCEQ
 217   UNSPEC_VCGE
 218   UNSPEC_VCGEU
 219   UNSPEC_VCGT
 220   UNSPEC_VCGTU
 221   UNSPEC_VCLS
 222   UNSPEC_VCONCAT
 223   UNSPEC_VCVT
 224   UNSPEC_VCVT_S
 225   UNSPEC_VCVT_U
 226   UNSPEC_VCVT_S_N
 227   UNSPEC_VCVT_U_N
 228   UNSPEC_VCVT_HF_S_N
 229   UNSPEC_VCVT_HF_U_N
 230   UNSPEC_VCVT_SI_S_N
 231   UNSPEC_VCVT_SI_U_N
 232   UNSPEC_VCVTH_S
 233   UNSPEC_VCVTH_U
 234   UNSPEC_VCVTA_S
 235   UNSPEC_VCVTA_U
 236   UNSPEC_VCVTM_S
 237   UNSPEC_VCVTM_U
 238   UNSPEC_VCVTN_S
 239   UNSPEC_VCVTN_U
 240   UNSPEC_VCVTP_S
 241   UNSPEC_VCVTP_U
 242   UNSPEC_VEXT
 243   UNSPEC_VHADD_S
 244   UNSPEC_VHADD_U
 245   UNSPEC_VRHADD_S
 246   UNSPEC_VRHADD_U
 247   UNSPEC_VHSUB_S
 248   UNSPEC_VHSUB_U
 249   UNSPEC_VLD1
 250   UNSPEC_VLD1_LANE
 251   UNSPEC_VLD2
 252   UNSPEC_VLD2_DUP
 253   UNSPEC_VLD2_LANE
 254   UNSPEC_VLD3
 255   UNSPEC_VLD3A
 256   UNSPEC_VLD3B
 257   UNSPEC_VLD3_DUP
 258   UNSPEC_VLD3_LANE
 259   UNSPEC_VLD4
 260   UNSPEC_VLD4A
 261   UNSPEC_VLD4B
 262   UNSPEC_VLD4_DUP
 263   UNSPEC_VLD4_LANE
 264   UNSPEC_VMAX
 265   UNSPEC_VMAX_U
 266   UNSPEC_VMAXNM
 267   UNSPEC_VMIN
 268   UNSPEC_VMIN_U
 269   UNSPEC_VMINNM
 270   UNSPEC_VMLA
 271   UNSPEC_VMLA_LANE
 272   UNSPEC_VMLAL_S
 273   UNSPEC_VMLAL_U
 274   UNSPEC_VMLAL_S_LANE
 275   UNSPEC_VMLAL_U_LANE
 276   UNSPEC_VMLS
 277   UNSPEC_VMLS_LANE
 278   UNSPEC_VMLSL_S
 279   UNSPEC_VMLSL_U
 280   UNSPEC_VMLSL_S_LANE
 281   UNSPEC_VMLSL_U_LANE
 282   UNSPEC_VMLSL_LANE
 283   UNSPEC_VFMA_LANE
 284   UNSPEC_VFMS_LANE
 285   UNSPEC_VMOVL_S
 286   UNSPEC_VMOVL_U
 287   UNSPEC_VMOVN
 288   UNSPEC_VMUL
 289   UNSPEC_VMULL_P
 290   UNSPEC_VMULL_S
 291   UNSPEC_VMULL_U
 292   UNSPEC_VMUL_LANE
 293   UNSPEC_VMULL_S_LANE
 294   UNSPEC_VMULL_U_LANE
 295   UNSPEC_VPADAL_S
 296   UNSPEC_VPADAL_U
 297   UNSPEC_VPADD
 298   UNSPEC_VPADDL_S
 299   UNSPEC_VPADDL_U
 300   UNSPEC_VPMAX
 301   UNSPEC_VPMAX_U
 302   UNSPEC_VPMIN
 303   UNSPEC_VPMIN_U
 304   UNSPEC_VPSMAX
 305   UNSPEC_VPSMIN
 306   UNSPEC_VPUMAX
 307   UNSPEC_VPUMIN
 308   UNSPEC_VQABS
 309   UNSPEC_VQADD_S
 310   UNSPEC_VQADD_U
 311   UNSPEC_VQDMLAL
 312   UNSPEC_VQDMLAL_LANE
 313   UNSPEC_VQDMLSL
 314   UNSPEC_VQDMLSL_LANE
 315   UNSPEC_VQDMULH
 316   UNSPEC_VQDMULH_LANE
 317   UNSPEC_VQRDMULH
 318   UNSPEC_VQRDMULH_LANE
 319   UNSPEC_VQDMULL
 320   UNSPEC_VQDMULL_LANE
 321   UNSPEC_VQMOVN_S
 322   UNSPEC_VQMOVN_U
 323   UNSPEC_VQMOVUN
 324   UNSPEC_VQNEG
 325   UNSPEC_VQSHL_S
 326   UNSPEC_VQSHL_U
 327   UNSPEC_VQRSHL_S
 328   UNSPEC_VQRSHL_U
 329   UNSPEC_VQSHL_S_N
 330   UNSPEC_VQSHL_U_N
 331   UNSPEC_VQSHLU_N
 332   UNSPEC_VQSHRN_S_N
 333   UNSPEC_VQSHRN_U_N
 334   UNSPEC_VQRSHRN_S_N
 335   UNSPEC_VQRSHRN_U_N
 336   UNSPEC_VQSHRUN_N
 337   UNSPEC_VQRSHRUN_N
 338   UNSPEC_VQSUB_S
 339   UNSPEC_VQSUB_U
 340   UNSPEC_VRECPE
 341   UNSPEC_VRECPS
 342   UNSPEC_VREV16
 343   UNSPEC_VREV32
 344   UNSPEC_VREV64
 345   UNSPEC_VRSQRTE
 346   UNSPEC_VRSQRTS
 347   UNSPEC_VSHL_S
 348   UNSPEC_VSHL_U
 349   UNSPEC_VRSHL_S
 350   UNSPEC_VRSHL_U
 351   UNSPEC_VSHLL_S_N
 352   UNSPEC_VSHLL_U_N
 353   UNSPEC_VSHL_N
 354   UNSPEC_VSHR_S_N
 355   UNSPEC_VSHR_U_N
 356   UNSPEC_VRSHR_S_N
 357   UNSPEC_VRSHR_U_N
 358   UNSPEC_VSHRN_N
 359   UNSPEC_VRSHRN_N
 360   UNSPEC_VSLI
 361   UNSPEC_VSRA_S_N
 362   UNSPEC_VSRA_U_N
 363   UNSPEC_VRSRA_S_N
 364   UNSPEC_VRSRA_U_N
 365   UNSPEC_VSRI
 366   UNSPEC_VST1
 367   UNSPEC_VST1_LANE
 368   UNSPEC_VST2
 369   UNSPEC_VST2_LANE
 370   UNSPEC_VST3
 371   UNSPEC_VST3A
 372   UNSPEC_VST3B
 373   UNSPEC_VST3_LANE
 374   UNSPEC_VST4
 375   UNSPEC_VST4A
 376   UNSPEC_VST4B
 377   UNSPEC_VST4_LANE
 378   UNSPEC_VSTRUCTDUMMY
 379   UNSPEC_VSUB
 380   UNSPEC_VSUBHN
 381   UNSPEC_VRSUBHN
 382   UNSPEC_VSUBL_S
 383   UNSPEC_VSUBL_U
 384   UNSPEC_VSUBW_S
 385   UNSPEC_VSUBW_U
 386   UNSPEC_VTBL
 387   UNSPEC_VTBX
 388   UNSPEC_VTRN1
 389   UNSPEC_VTRN2
 390   UNSPEC_VTST
 391   UNSPEC_VUZP1
 392   UNSPEC_VUZP2
 393   UNSPEC_VZIP1
 394   UNSPEC_VZIP2
 395   UNSPEC_MISALIGNED_ACCESS
 396   UNSPEC_VCLE
 397   UNSPEC_VCLT
 398   UNSPEC_NVRINTZ
 399   UNSPEC_NVRINTP
 400   UNSPEC_NVRINTM
 401   UNSPEC_NVRINTX
 402   UNSPEC_NVRINTA
 403   UNSPEC_NVRINTN
 404   UNSPEC_VQRDMLAH
 405   UNSPEC_VQRDMLSH
 406   UNSPEC_VRND
 407   UNSPEC_VRNDA
 408   UNSPEC_VRNDI
 409   UNSPEC_VRNDM
 410   UNSPEC_VRNDN
 411   UNSPEC_VRNDP
 412   UNSPEC_VRNDX
 413 ])