2 ;; Copyright (C) 2012-2024 Free Software Foundation, Inc.
3 ;; Contributed by ARM Ltd.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
22 ;; Note: sin and cos are no-longer used.
23 ;; Unspec enumerators for Neon are defined in neon.md.
24 ;; Unspec enumerators for iwmmxt2 are defined in iwmmxt2.md
26 (define_c_enum "unspec" [
27 UNSPEC_PUSH_MULT ; `push multiple' operation:
28 ; operand 0 is the first register,
29 ; subsequent registers are in parallel (use ...)
31 UNSPEC_PIC_SYM ; A symbol that has been treated properly for pic
32 ; usage, that is, we will add the pic_register
33 ; value to it before trying to dereference it.
34 UNSPEC_PIC_BASE ; Add PC and all but the last operand together,
35 ; The last operand is the number of a PIC_LABEL
36 ; that points at the containing instruction.
37 UNSPEC_PRLG_STK ; A special barrier that prevents frame accesses
38 ; being scheduled before the stack adjustment insn.
39 UNSPEC_REGISTER_USE ; As USE insns are not meaningful after reload,
40 ; this unspec is used to prevent the deletion of
41 ; instructions setting registers for EH handling
42 ; and stack frame generation. Operand 0 is the
44 UNSPEC_CHECK_ARCH ; Set CCs to indicate 26-bit or 32-bit mode.
45 UNSPEC_WSHUFH ; Used by the intrinsic form of the iWMMXt WSHUFH instruction.
46 UNSPEC_WACC ; Used by the intrinsic form of the iWMMXt WACC instruction.
47 UNSPEC_TMOVMSK ; Used by the intrinsic form of the iWMMXt TMOVMSK instruction.
48 UNSPEC_WSAD ; Used by the intrinsic form of the iWMMXt WSAD instruction.
49 UNSPEC_WSADZ ; Used by the intrinsic form of the iWMMXt WSADZ instruction.
50 UNSPEC_WMACS ; Used by the intrinsic form of the iWMMXt WMACS instruction.
51 UNSPEC_WMACU ; Used by the intrinsic form of the iWMMXt WMACU instruction.
52 UNSPEC_WMACSZ ; Used by the intrinsic form of the iWMMXt WMACSZ instruction.
53 UNSPEC_WMACUZ ; Used by the intrinsic form of the iWMMXt WMACUZ instruction.
54 UNSPEC_CLRDI ; Used by the intrinsic form of the iWMMXt CLRDI instruction.
55 UNSPEC_WALIGNI ; Used by the intrinsic form of the iWMMXt WALIGN instruction.
56 UNSPEC_TLS ; A symbol that has been treated properly for TLS usage.
57 UNSPEC_PIC_LABEL ; A label used for PIC access that does not appear in the
59 UNSPEC_PIC_OFFSET ; A symbolic 12-bit OFFSET that has been treated
60 ; correctly for PIC usage.
61 UNSPEC_GOTSYM_OFF ; The offset of the start of the GOT from a
62 ; a given symbolic address.
63 UNSPEC_THUMB1_CASESI ; A Thumb1 compressed dispatch-table call.
64 UNSPEC_RBIT ; rbit operation.
65 UNSPEC_SYMBOL_OFFSET ; The offset of the start of the symbol from
66 ; another symbolic address.
67 UNSPEC_MEMORY_BARRIER ; Represent a memory barrier.
68 UNSPEC_UNALIGNED_LOAD ; Used to represent ldr/ldrh instructions that access
69 ; unaligned locations, on architectures which support
71 UNSPEC_UNALIGNED_STORE ; Same for str/strh.
72 UNSPEC_PIC_UNIFIED ; Create a common pic addressing form.
73 UNSPEC_Q_SET ; Represent setting the Q bit.
74 UNSPEC_GE_SET ; Represent setting the GE bits.
75 UNSPEC_APSR_READ ; Represent reading the APSR.
77 UNSPEC_LL ; Represent an unpaired load-register-exclusive.
78 UNSPEC_VRINTZ ; Represent a float to integral float rounding
80 UNSPEC_VRINTP ; Represent a float to integral float rounding
82 UNSPEC_VRINTM ; Represent a float to integral float rounding
84 UNSPEC_VRINTR ; Represent a float to integral float rounding
85 ; FPSCR rounding mode.
86 UNSPEC_VRINTX ; Represent a float to integral float rounding
87 ; FPSCR rounding mode and signal inexactness.
88 UNSPEC_VRINTA ; Represent a float to integral float rounding
89 ; towards nearest, ties away from zero.
90 UNSPEC_PROBE_STACK ; Probe stack memory reference
91 UNSPEC_NONSECURE_MEM ; Represent non-secure memory in ARMv8-M with
93 UNSPEC_SP_SET ; Represent the setting of stack protector's canary
94 UNSPEC_SP_TEST ; Represent the testing of stack protector's canary
96 UNSPEC_PIC_RESTORE ; Use to restore fdpic register
98 UNSPEC_SXTAB16 ; Represent the SXTAB16 operation.
99 UNSPEC_UXTAB16 ; Represent the UXTAB16 operation.
100 UNSPEC_SXTB16 ; Represent the SXTB16 operation.
101 UNSPEC_UXTB16 ; Represent the UXTB16 operation.
102 UNSPEC_QADD8 ; Represent the QADD8 operation.
103 UNSPEC_QSUB8 ; Represent the QSUB8 operation.
104 UNSPEC_SHADD8 ; Represent the SHADD8 operation.
105 UNSPEC_SHSUB8 ; Represent the SHSUB8 operation.
106 UNSPEC_UHADD8 ; Represent the UHADD8 operation.
107 UNSPEC_UHSUB8 ; Represent the UHSUB8 operation.
108 UNSPEC_UQADD8 ; Represent the UQADD8 operation.
109 UNSPEC_UQSUB8 ; Represent the UQSUB8 operation.
110 UNSPEC_QADD16 ; Represent the QADD16 operation.
111 UNSPEC_QASX ; Represent the QASX operation.
112 UNSPEC_QSAX ; Represent the QSAX operation.
113 UNSPEC_QSUB16 ; Represent the QSUB16 operation.
114 UNSPEC_SHADD16 ; Represent the SHADD16 operation.
115 UNSPEC_SHASX ; Represent the SHASX operation.
116 UNSPEC_SHSAX ; Represent the SSAX operation.
117 UNSPEC_SHSUB16 ; Represent the SHSUB16 operation.
118 UNSPEC_UHADD16 ; Represent the UHADD16 operation.
119 UNSPEC_UHASX ; Represent the UHASX operation.
120 UNSPEC_UHSAX ; Represent the USAX operation.
121 UNSPEC_UHSUB16 ; Represent the UHSUB16 operation.
122 UNSPEC_UQADD16 ; Represent the UQADD16 operation.
123 UNSPEC_UQASX ; Represent the UQASX operation.
124 UNSPEC_UQSAX ; Represent the UQSAX operation.
125 UNSPEC_UQSUB16 ; Represent the UQSUB16 operation.
126 UNSPEC_SMUSD ; Represent the SMUSD operation.
127 UNSPEC_SMUSDX ; Represent the SMUSDX operation.
128 UNSPEC_USAD8 ; Represent the USAD8 operation.
129 UNSPEC_USADA8 ; Represent the USADA8 operation.
130 UNSPEC_SMLALD ; Represent the SMLALD operation.
131 UNSPEC_SMLALDX ; Represent the SMLALDX operation.
132 UNSPEC_SMLSLD ; Represent the SMLSLD operation.
133 UNSPEC_SMLSLDX ; Represent the SMLSLDX operation.
134 UNSPEC_SMLAWB ; Represent the SMLAWB operation.
135 UNSPEC_SMLAWT ; Represent the SMLAWT operation.
136 UNSPEC_SEL ; Represent the SEL operation.
137 UNSPEC_SADD8 ; Represent the SADD8 operation.
138 UNSPEC_SSUB8 ; Represent the SSUB8 operation.
139 UNSPEC_UADD8 ; Represent the UADD8 operation.
140 UNSPEC_USUB8 ; Represent the USUB8 operation.
141 UNSPEC_SADD16 ; Represent the SADD16 operation.
142 UNSPEC_SASX ; Represent the SASX operation.
143 UNSPEC_SSAX ; Represent the SSAX operation.
144 UNSPEC_SSUB16 ; Represent the SSUB16 operation.
145 UNSPEC_UADD16 ; Represent the UADD16 operation.
146 UNSPEC_UASX ; Represent the UASX operation.
147 UNSPEC_USAX ; Represent the USAX operation.
148 UNSPEC_USUB16 ; Represent the USUB16 operation.
149 UNSPEC_SMLAD ; Represent the SMLAD operation.
150 UNSPEC_SMLADX ; Represent the SMLADX operation.
151 UNSPEC_SMLSD ; Represent the SMLSD operation.
152 UNSPEC_SMLSDX ; Represent the SMLSDX operation.
153 UNSPEC_SMUAD ; Represent the SMUAD operation.
154 UNSPEC_SMUADX ; Represent the SMUADX operation.
155 UNSPEC_SSAT16 ; Represent the SSAT16 operation.
156 UNSPEC_USAT16 ; Represent the USAT16 operation.
157 UNSPEC_CDE ; Custom Datapath Extension instruction.
158 UNSPEC_CDEA ; Custom Datapath Extension instruction.
159 UNSPEC_VCDE ; Custom Datapath Extension instruction.
160 UNSPEC_VCDEA ; Custom Datapath Extension instruction.
161 UNSPEC_DLS ; Used for DLS (Do Loop Start), Armv8.1-M Mainline instruction
162 UNSPEC_PAC_NOP ; Represents PAC signing LR
166 (define_c_enum "unspec" [
167 UNSPEC_WADDC ; Used by the intrinsic form of the iWMMXt WADDC instruction.
168 UNSPEC_WABS ; Used by the intrinsic form of the iWMMXt WABS instruction.
169 UNSPEC_WQMULWMR ; Used by the intrinsic form of the iWMMXt WQMULWMR instruction.
170 UNSPEC_WQMULMR ; Used by the intrinsic form of the iWMMXt WQMULMR instruction.
171 UNSPEC_WQMULWM ; Used by the intrinsic form of the iWMMXt WQMULWM instruction.
172 UNSPEC_WQMULM ; Used by the intrinsic form of the iWMMXt WQMULM instruction.
173 UNSPEC_WQMIAxyn ; Used by the intrinsic form of the iWMMXt WMIAxyn instruction.
174 UNSPEC_WQMIAxy ; Used by the intrinsic form of the iWMMXt WMIAxy instruction.
175 UNSPEC_TANDC ; Used by the intrinsic form of the iWMMXt TANDC instruction.
176 UNSPEC_TORC ; Used by the intrinsic form of the iWMMXt TORC instruction.
177 UNSPEC_TORVSC ; Used by the intrinsic form of the iWMMXt TORVSC instruction.
178 UNSPEC_TEXTRC ; Used by the intrinsic form of the iWMMXt TEXTRC instruction.
179 UNSPEC_GET_FPSCR_NZCVQC ; Represent fetch of FPSCR_nzcvqc content.
183 ;; UNSPEC_VOLATILE Usage:
185 (define_c_enum "unspecv" [
186 VUNSPEC_BLOCKAGE ; `blockage' insn to prevent scheduling across an
188 VUNSPEC_EPILOGUE ; `epilogue' insn, used to represent any part of the
189 ; instruction epilogue sequence that isn't expanded
190 ; into normal RTL. Used for both normal and sibcall
192 VUNSPEC_THUMB1_INTERWORK ; `prologue_thumb1_interwork' insn, used to swap
193 ; modes from arm to thumb.
194 VUNSPEC_ALIGN ; `align' insn. Used at the head of a minipool table
195 ; for inlined constants.
196 VUNSPEC_POOL_END ; `end-of-table'. Used to mark the end of a minipool
198 VUNSPEC_POOL_1 ; `pool-entry(1)'. An entry in the constant pool for
200 VUNSPEC_POOL_2 ; `pool-entry(2)'. An entry in the constant pool for
202 VUNSPEC_POOL_4 ; `pool-entry(4)'. An entry in the constant pool for
204 VUNSPEC_POOL_8 ; `pool-entry(8)'. An entry in the constant pool for
206 VUNSPEC_POOL_16 ; `pool-entry(16)'. An entry in the constant pool for
208 VUNSPEC_TMRC ; Used by the iWMMXt TMRC instruction.
209 VUNSPEC_TMCR ; Used by the iWMMXt TMCR instruction.
210 VUNSPEC_ALIGN8 ; 8-byte alignment version of VUNSPEC_ALIGN
211 VUNSPEC_WCMP_EQ ; Used by the iWMMXt WCMPEQ instructions
212 VUNSPEC_WCMP_GTU ; Used by the iWMMXt WCMPGTU instructions
213 VUNSPEC_WCMP_GT ; Used by the iwMMXT WCMPGT instructions
214 VUNSPEC_EH_RETURN ; Use to override the return address for exception
216 VUNSPEC_ATOMIC_CAS ; Represent an atomic compare swap.
217 VUNSPEC_ATOMIC_XCHG ; Represent an atomic exchange.
218 VUNSPEC_ATOMIC_OP ; Represent an atomic operation.
219 VUNSPEC_LL ; Represent a load-register-exclusive.
220 VUNSPEC_LDRD_ATOMIC ; Represent an LDRD used as an atomic DImode load.
221 VUNSPEC_SC ; Represent a store-register-exclusive.
222 VUNSPEC_LAX ; Represent a load-register-acquire-exclusive.
223 VUNSPEC_SLX ; Represent a store-register-release-exclusive.
224 VUNSPEC_LDA ; Represent a load-register-acquire.
225 VUNSPEC_LDR ; Represent a load-register-relaxed.
226 VUNSPEC_STL ; Represent a store-register-release.
227 VUNSPEC_STR ; Represent a store-register-relaxed.
228 VUNSPEC_GET_FPSCR ; Represent fetch of FPSCR content.
229 VUNSPEC_SET_FPSCR ; Represent assign of FPSCR content.
230 VUNSPEC_SET_FPSCR_NZCVQC ; Represent assign of FPSCR_nzcvqc content.
231 VUNSPEC_PROBE_STACK_RANGE ; Represent stack range probing.
232 VUNSPEC_CDP ; Represent the coprocessor cdp instruction.
233 VUNSPEC_CDP2 ; Represent the coprocessor cdp2 instruction.
234 VUNSPEC_LDC ; Represent the coprocessor ldc instruction.
235 VUNSPEC_LDC2 ; Represent the coprocessor ldc2 instruction.
236 VUNSPEC_LDCL ; Represent the coprocessor ldcl instruction.
237 VUNSPEC_LDC2L ; Represent the coprocessor ldc2l instruction.
238 VUNSPEC_STC ; Represent the coprocessor stc instruction.
239 VUNSPEC_STC2 ; Represent the coprocessor stc2 instruction.
240 VUNSPEC_STCL ; Represent the coprocessor stcl instruction.
241 VUNSPEC_STC2L ; Represent the coprocessor stc2l instruction.
242 VUNSPEC_MCR ; Represent the coprocessor mcr instruction.
243 VUNSPEC_MCR2 ; Represent the coprocessor mcr2 instruction.
244 VUNSPEC_MRC ; Represent the coprocessor mrc instruction.
245 VUNSPEC_MRC2 ; Represent the coprocessor mrc2 instruction.
246 VUNSPEC_MCRR ; Represent the coprocessor mcrr instruction.
247 VUNSPEC_MCRR2 ; Represent the coprocessor mcrr2 instruction.
248 VUNSPEC_MRRC ; Represent the coprocessor mrrc instruction.
249 VUNSPEC_MRRC2 ; Represent the coprocessor mrrc2 instruction.
250 VUNSPEC_SPECULATION_BARRIER ; Represents an unconditional speculation barrier.
251 VUNSPEC_APSR_WRITE ; Represent writing the APSR.
252 VUNSPEC_VSTR_VLDR ; Represent the vstr/vldr instruction.
253 VUNSPEC_CLRM_APSR ; Represent the clearing of APSR with clrm instruction.
254 VUNSPEC_VSCCLRM_VPR ; Represent the clearing of VPR with vscclrm
256 VUNSPEC_VLSTM ; Represent the lazy store multiple with vlstm
258 VUNSPEC_VLLDM ; Represent the lazy load multiple with vlldm
260 VUNSPEC_PACBTI_NOP ; Represents PAC signing LR + valid landing pad
261 VUNSPEC_AUT_NOP ; Represents PAC verifying LR
262 VUNSPEC_BTI_NOP ; Represent BTI
265 ;; Enumerators for NEON unspecs.
266 (define_c_enum "unspec" [
268 UNSPEC_ASHIFT_UNSIGNED
498 UNSPEC_MISALIGNED_ACCESS
545 ;; Enumerators for MVE unspecs.
546 (define_c_enum "unspec" [
1256 ; DLSTP unspecs must be volatile to guarantee the scheduler does not reschedule
1257 ; these instructions within the loop preheader.
1258 (define_c_enum "unspecv" [