| commit | 976ba730622ae7c2d5e88d4fb4477ff96c1cd3f4 | |
| author | H. Peter Anvin <hpa@linux.intel.com> | |
| Tue, 20 Sep 2016 23:39:46 +0000 (20 16:39 -0700) | ||
| committer | H. Peter Anvin <hpa@linux.intel.com> | |
| Tue, 20 Sep 2016 23:39:46 +0000 (20 16:39 -0700) | ||
| tree | a3116c52af810d46b5b49a4285a058ed04527c05 | treesnapshot (tar.gz zip) |
| parent | ae707bace4406788714597ec5b4f1a427c9ad9c7 | commitdiff |
Correct /is4 encoding for EVEX instructions
For EVEX instructions, /is4 can contain a fifth register bit, encoded
in bit 3 of the imm8. Properly generate this case, and simplifiy the
/is4 generation code somewhat.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
For EVEX instructions, /is4 can contain a fifth register bit, encoded
in bit 3 of the imm8. Properly generate this case, and simplifiy the
/is4 generation code somewhat.
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| assemble.c | diffblobblamehistory |