3 # insns.pl produce insnsa.c, insnsd.c, insnsi.h, insnsn.c from insns.dat
5 # The Netwide Assembler is copyright (C) 1996 Simon Tatham and
6 # Julian Hall. All rights reserved. The software is
7 # redistributable under the license given in the file "LICENSE"
8 # distributed in the NASM archive.
10 # Opcode prefixes which need their own opcode tables
11 # LONGER PREFIXES FIRST!
12 @disasm_prefixes = qw(0F24 0F25 0F38 0F3A 0F7A 0FA6 0FA7 0F);
14 # This should match MAX_OPERANDS from nasm.h
17 # Add VEX/XOP prefixes
18 @vex_class = ( 'vex', 'xop' );
19 $vex_classes = scalar(@vex_class);
22 for ($c = 0; $c < $vex_classes; $c++) {
23 $vexmap{$vex_class[$c]} = $c;
24 for ($m = 0; $m < 32; $m++) {
25 for ($lp = 0; $lp < 8; $lp++) {
26 push(@vexlist, sprintf("%s%02X%01X", $vex_class[$c], $m, $lp));
30 @disasm_prefixes = (@vexlist, @disasm_prefixes);
32 @bytecode_count = (0) x
256;
34 print STDERR
"Reading insns.dat...\n";
38 foreach $arg ( @ARGV ) {
39 if ( $arg =~ /^\-/ ) {
40 if ( $arg =~ /^\-([abdin])$/ ) {
43 die "$0: Unknown option: ${arg}\n";
50 $fname = "insns.dat" unless $fname = $args[0];
51 open (F
, $fname) || die "unable to open $fname";
61 next if ( /^\s*(\;.*|)$/ ); # comments or blank lines
63 unless (/^\s*(\S+)\s+(\S+)\s+(\S+|\[.*\])\s+(\S+)\s*$/) {
64 warn "line $line does not contain four fields\n";
67 @fields = ($1, $2, $3, $4);
68 @field_list = ([@fields, 0]);
70 if ($fields[1] =~ /\*/) {
71 # This instruction has relaxed form(s)
72 if ($fields[2] !~ /^\[/) {
73 warn "line $line has an * operand but uses raw bytecodes\n";
78 @ops = split(/,/, $fields[1]);
79 for ($oi = 0; $oi < scalar @ops; $oi++) {
80 if ($ops[$oi] =~ /\*$/) {
82 warn "line $line has a first operand with a *\n";
89 for ($oi = 1; $oi < (1 << scalar @ops); $oi++) {
90 if (($oi & ~$opmask) == 0) {
93 for ($oj = 0; $oj < scalar(@ops); $oj++) {
95 push(@xops, $ops[$oj]);
99 push(@field_list, [$fields[0], join(',', @xops),
100 $fields[2], $fields[3], $oi]);
105 foreach $fptr (@field_list) {
107 ($formatted, $nd) = format_insn
(@fields);
110 $aname = "aa_$fields[0]";
111 push @
$aname, $formatted;
113 if ( $fields[0] =~ /cc$/ ) {
114 # Conditional instruction
115 $k_opcodes_cc{$fields[0]}++;
117 # Unconditional instruction
118 $k_opcodes{$fields[0]}++;
120 if ($formatted && !$nd) {
121 push @big, $formatted;
122 my @sseq = startseq
($fields[2], $fields[4]);
124 if (!defined($dinstables{$i})) {
125 $dinstables{$i} = [];
127 push(@
{$dinstables{$i}}, $#big);
136 # Generate the bytecode array. At this point, @bytecode_list contains
137 # the full set of bytecodes.
140 # Sort by descending length
141 @bytecode_list = sort { scalar(@
$b) <=> scalar(@
$a) } @bytecode_list;
142 @bytecode_array = ();
145 foreach $bl (@bytecode_list) {
146 my $h = hexstr
(@
$bl);
147 next if (defined($bytecode_pos{$h}));
149 push(@bytecode_array, $bl);
151 $bytecode_pos{$h} = $bytecode_next;
156 undef @bytecode_list;
158 @opcodes = sort keys(%k_opcodes);
159 @opcodes_cc = sort keys(%k_opcodes_cc);
161 if ( !defined($output) || $output eq 'b') {
162 print STDERR
"Writing insnsb.c...\n";
166 print B
"/* This file auto-generated from insns.dat by insns.pl" .
167 " - don't edit it */\n\n";
169 print B
"#include \"nasm.h\"\n";
170 print B
"#include \"insns.h\"\n\n";
172 print B
"const uint8_t nasm_bytecodes[$bytecode_next] = {\n";
175 foreach $bl (@bytecode_array) {
176 printf B
" /* %5d */ ", $p;
187 print B
" * Bytecode frequencies (including reuse):\n";
189 for ($i = 0; $i < 32; $i++) {
191 for ($j = 0; $j < 256; $j += 32) {
192 print B
" |" if ($j);
193 printf B
" %3o:%4d", $i+$j, $bytecode_count[$i+$j];
202 if ( !defined($output) || $output eq 'a' ) {
203 print STDERR
"Writing insnsa.c...\n";
207 print A
"/* This file auto-generated from insns.dat by insns.pl" .
208 " - don't edit it */\n\n";
210 print A
"#include \"nasm.h\"\n";
211 print A
"#include \"insns.h\"\n\n";
213 foreach $i (@opcodes, @opcodes_cc) {
214 print A
"static const struct itemplate instrux_${i}[] = {\n";
216 foreach $j (@
$aname) {
217 print A
" ", codesubst
($j), "\n";
219 print A
" ITEMPLATE_END\n};\n\n";
221 print A
"const struct itemplate * const nasm_instructions[] = {\n";
222 foreach $i (@opcodes, @opcodes_cc) {
223 print A
" instrux_${i},\n";
230 if ( !defined($output) || $output eq 'd' ) {
231 print STDERR
"Writing insnsd.c...\n";
235 print D
"/* This file auto-generated from insns.dat by insns.pl" .
236 " - don't edit it */\n\n";
238 print D
"#include \"nasm.h\"\n";
239 print D
"#include \"insns.h\"\n\n";
241 print D
"static const struct itemplate instrux[] = {\n";
244 printf D
" /* %4d */ %s\n", $n++, codesubst
($j);
248 foreach $h (sort(keys(%dinstables))) {
249 next if ($h eq ''); # Skip pseudo-instructions
250 print D
"\nstatic const struct itemplate * const itable_${h}[] = {\n";
251 foreach $j (@
{$dinstables{$h}}) {
252 print D
" instrux + $j,\n";
258 foreach $h (@disasm_prefixes, '') {
259 for ($c = 0; $c < 256; $c++) {
260 $nn = sprintf("%s%02X", $h, $c);
261 if ($is_prefix{$nn} || defined($dinstables{$nn})) {
262 # At least one entry in this prefix table
263 push(@prefix_list, $h);
270 foreach $h (@prefix_list) {
272 print D
"static " unless ($h eq '');
273 print D
"const struct disasm_index ";
274 print D
($h eq '') ?
'itable' : "itable_$h";
275 print D
"[256] = {\n";
276 for ($c = 0; $c < 256; $c++) {
277 $nn = sprintf("%s%02X", $h, $c);
278 if ($is_prefix{$nn}) {
279 die "$fname: ambiguous decoding of $nn\n"
280 if (defined($dinstables{$nn}));
281 printf D
" { itable_%s, -1 },\n", $nn;
282 } elsif (defined($dinstables{$nn})) {
283 printf D
" { itable_%s, %u },\n",
284 $nn, scalar(@
{$dinstables{$nn}});
286 printf D
" { NULL, 0 },\n";
292 printf D
"\nconst struct disasm_index * const itable_vex[%d][32][8] =\n",
295 for ($c = 0; $c < $vex_classes; $c++) {
297 for ($m = 0; $m < 32; $m++) {
299 for ($lp = 0; $lp < 8; $lp++) {
300 $vp = sprintf("%s%02X%01X", $vex_class[$c], $m, $lp);
301 if ($is_prefix{$vp}) {
302 printf D
" itable_%s,\n", $vp;
316 if ( !defined($output) || $output eq 'i' ) {
317 print STDERR
"Writing insnsi.h...\n";
321 print I
"/* This file is auto-generated from insns.dat by insns.pl" .
322 " - don't edit it */\n\n";
323 print I
"/* This file in included by nasm.h */\n\n";
325 print I
"/* Instruction names */\n\n";
326 print I
"#ifndef NASM_INSNSI_H\n";
327 print I
"#define NASM_INSNSI_H 1\n\n";
328 print I
"enum opcode {\n";
330 foreach $i (@opcodes, @opcodes_cc) {
331 print I
"\tI_${i},\n";
333 $len++ if ( $i =~ /cc$/ ); # Condition codes can be 3 characters long
334 $maxlen = $len if ( $len > $maxlen );
336 print I
"\tI_none = -1\n";
338 print I
"#define MAX_INSLEN ", $maxlen, "\n";
339 print I
"#define FIRST_COND_OPCODE I_", $opcodes_cc[0], "\n\n";
340 print I
"#endif /* NASM_INSNSI_H */\n";
345 if ( !defined($output) || $output eq 'n' ) {
346 print STDERR
"Writing insnsn.c...\n";
350 print N
"/* This file is auto-generated from insns.dat by insns.pl" .
351 " - don't edit it */\n\n";
352 print N
"#include \"tables.h\"\n\n";
354 print N
"const char * const nasm_insn_names[] = {";
356 foreach $i (@opcodes, @opcodes_cc) {
357 print N
"," if ( !$first );
360 $ilower =~ s/cc$//; # Remove conditional cc suffix
361 $ilower =~ tr/A-Z/a-z/; # Change to lower case (Perl 4 compatible)
362 print N
"\n\t\"${ilower}\"";
368 printf STDERR
"Done: %d instructions\n", $insns;
370 # Count primary bytecodes, for statistics
371 sub count_bytecodes
(@
) {
373 foreach my $bc (@_) {
378 $bytecode_count[$bc]++;
379 if ($bc >= 01 && $bc <= 04) {
381 } elsif (($bc & ~03) == 010) {
383 } elsif (($bc & ~013) == 0144) {
385 } elsif ($bc == 0172) {
387 } elsif ($bc >= 0260 && $bc <= 0270) {
389 } elsif ($bc == 0330) {
395 sub format_insn
($$$$$) {
396 my ($opcode, $operands, $codes, $flags, $relax) = @_;
400 return (undef, undef) if $operands eq "ignore";
402 # format the operands
403 $operands =~ s/\*//g;
404 $operands =~ s/:/|colon,/g;
405 $operands =~ s/mem(\d+)/mem|bits$1/g;
406 $operands =~ s/mem/memory/g;
407 $operands =~ s/memory_offs/mem_offs/g;
408 $operands =~ s/imm(\d+)/imm|bits$1/g;
409 $operands =~ s/imm/immediate/g;
410 $operands =~ s/rm(\d+)/rm_gpr|bits$1/g;
411 $operands =~ s/(mmx|xmm|ymm)rm/rm_$1/g;
412 $operands =~ s/\=([0-9]+)/same_as|$1/g;
413 if ($operands eq 'void') {
416 @ops = split(/\,/, $operands);
419 while (scalar(@ops) < $MAX_OPERANDS) {
422 $operands = join(',', @ops);
423 $operands =~ tr/a-z/A-Z/;
426 $flags =~ s/,/|IF_/g;
427 $flags =~ s/(\|IF_ND|IF_ND\|)//, $nd = 1 if $flags =~ /IF_ND/;
428 $flags = "IF_" . $flags;
430 @bytecode = (decodify
($codes, $relax), 0);
431 push(@bytecode_list, [@bytecode]);
432 $codes = hexstr
(@bytecode);
433 count_bytecodes
(@bytecode);
435 ("{I_$opcode, $num, {$operands}, \@\@CODES-$codes\@\@, $flags},", $nd);
439 # Look for @@CODES-xxx@@ sequences and replace them with the appropriate
440 # offset into nasm_bytecodes
446 while ($s =~ /\@\@CODES-([0-9A-F]+)\@\@/) {
447 my $pos = $bytecode_pos{$1};
448 if (!defined($pos)) {
449 die "$fname: no position assigned to byte code $1\n";
451 $s = $` . "nasm_bytecodes+${pos}" . "$'";
457 my ($prefix, @list) = @_;
462 push(@l, sprintf("%s%02X", $prefix, $x));
469 # Turn a code string into a sequence of bytes
472 # Although these are C-syntax strings, by convention they should have
473 # only octal escapes (for directives) and hexadecimal escapes
474 # (for verbatim bytes)
475 my($codestr, $relax) = @_;
477 if ($codestr =~ /^\s*\[([^\]]*)\]\s*$/) {
478 return byte_code_compile($1, $relax);
485 if ($c =~ /^\\x([0-9a-f]+)(.*)$/i) {
486 push(@codes, hex $1);
489 } elsif ($c =~ /^\\([0-7]{1,3})(.*)$/) {
490 push(@codes, oct $1);
494 die "$fname: unknown code format in \"$codestr\"\n";
501 # Turn a numeric list into a hex string
507 $s .= sprintf("%02X", $c);
512 # Here we determine the range of possible starting bytes for a given
513 # instruction. We need only consider the codes:
514 # \[1234] mean literal bytes, of course
515 # \1[0123] mean byte plus register value
516 # \330 means byte plus condition code
517 # \0 or \340 mean give up and return empty set
518 # \34[4567] mean PUSH/POP of segment registers: special case
519 # \17[234] skip is4 control byte
520 # \26x \270 skip VEX control bytes
522 my ($codestr, $relax) = @_;
529 @codes = decodify($codestr, $relax);
531 while ($c0 = shift(@codes)) {
533 if ($c0 >= 01 && $c0 <= 04) {
537 if ($c0 >= 01 && $c0 <= 04) {
539 $fbs .= sprintf("%02X", shift(@codes));
547 foreach $pfx (@disasm_prefixes) {
548 if (substr($fbs, 0, length($pfx)) eq $pfx) {
550 $fbs = substr($fbs, length($pfx));
556 return ($prefix.substr($fbs,0,2));
559 unshift(@codes, $c0);
560 } elsif ($c0 >= 010 && $c0 <= 013) {
561 return addprefix($prefix, $c1..($c1+7));
562 } elsif (($c0 & ~013) == 0144) {
563 return addprefix($prefix, $c1, $c1|2);
564 } elsif ($c0 == 0330) {
565 return addprefix($prefix, $c1..($c1+15));
566 } elsif ($c0 == 0 || $c0 == 0340) {
568 } elsif ($c0 == 0344) {
569 return addprefix($prefix, 0x06, 0x0E, 0x16, 0x1E);
570 } elsif ($c0 == 0345) {
571 return addprefix($prefix, 0x07, 0x17, 0x1F);
572 } elsif ($c0 == 0346) {
573 return addprefix($prefix, 0xA0, 0xA8);
574 } elsif ($c0 == 0347) {
575 return addprefix($prefix, 0xA1, 0xA9);
576 } elsif (($c0 & ~3) == 0260 || $c0 == 0270) {
579 $wlp = shift(@codes);
582 $prefix .= sprintf('%s%02X%01X', $vex_class[$c], $m, $wlp & 7);
583 } elsif ($c0 >= 0172 && $c0 <= 174) {
584 shift(@codes); # Skip is4 control byte
586 # We really need to be able to distinguish "forbidden"
587 # and "ignorable" codes here
594 # This function takes a series of byte codes in a format which is more
595 # typical of the Intel documentation, and encode it.
597 # The format looks like:
599 # [operands: opcodes]
601 # The operands word lists the order of the operands:
603 # r = register field in the modr/m
606 # d = DREX "dst" field
608 # s = register field of is4/imz2 field
609 # - = implicit (unencoded) operand
611 # For an operand that should be filled into more than one field,
612 # enter it as e.g. "r+v".
614 sub byte_code_compile($$) {
615 my($str, $relax) = @_;
625 unless ($str =~ /^(([^\s:]*)\:|)\s*(.*\S)\s*$/) {
626 die "$fname: $line: cannot parse: [$str]\n";
632 for ($i = 0; $i < length($opr); $i++) {
633 my $c = substr($opr,$i,1);
646 foreach $op (split(/\s*(?:\s|(?=[\/\\]))/, $opc)) {
649 } elsif ($op eq 'o32') {
651 } elsif ($op eq 'o64') { # 64-bit operand size requiring REX.W
653 } elsif ($op eq 'o64nw') { # Implied 64-bit operand size (no REX.W)
655 } elsif ($op eq 'a16') {
657 } elsif ($op eq 'a32') {
659 } elsif ($op eq 'a64') {
661 } elsif ($op eq '!osp') {
663 } elsif ($op eq '!asp') {
665 } elsif ($op eq 'rex.l') {
667 } elsif ($op eq 'repe') {
669 } elsif ($op eq 'nohi') { # Use spl/bpl/sil/dil even without REX
671 } elsif ($prefix_ok && $op =~ /^(66|f2|f3|np)$/) {
672 # 66/F2/F3 prefix used as an opcode extension, or np = no prefix
675 } elsif ($op eq 'f2') {
677 } elsif ($op eq 'f3') {
682 } elsif ($op =~ /^[0-9a-f]{2}$/) {
683 if (defined($litix) && $litix+$codes[$litix]+1 == scalar @codes &&
684 $codes[$litix] < 4) {
686 push(@codes, hex $op);
688 $litix = scalar(@codes);
689 push(@codes, 01, hex $op);
692 } elsif ($op eq '/r') {
693 if (!defined($oppos{'r'}) || !defined($oppos{'m'})) {
694 die "$fname: $line: $op requires r and m operands\n";
696 $opex = (($oppos{'m'} & 4) ? 06 : 0) |
697 (($oppos{'r'} & 4) ? 05 : 0);
698 push(@codes, $opex) if ($opex);
699 push(@codes, 0100 + (($oppos{'m'} & 3) << 3) + ($oppos{'r'} & 3));
701 } elsif ($op =~ m:^/([0-7])$:) {
702 if (!defined($oppos{'m'})) {
703 die "$fname: $line: $op requires m operand\n";
705 push(@codes, 06) if ($oppos{'m'} & 4);
706 push(@codes, 0200 + (($oppos{'m'} & 3) << 3) + $1);
708 } elsif ($op =~ /^(vex|xop)(|\..*)$/) {
710 my ($m,$w,$l,$p) = (undef,2,undef,0);
712 my @subops = split(/\./, $op);
713 shift @subops; # Drop prefix
714 foreach $oq (@subops) {
715 if ($oq eq '128' || $oq eq 'l0') {
717 } elsif ($oq eq '256' || $oq eq 'l1') {
719 } elsif ($oq eq 'w0') {
721 } elsif ($oq eq 'w1') {
723 } elsif ($oq eq 'wx') {
725 } elsif ($oq eq 'ww') {
727 } elsif ($oq eq 'p0') {
729 } elsif ($oq eq '66' || $oq eq 'p1') {
731 } elsif ($oq eq 'f3' || $oq eq 'p2') {
733 } elsif ($oq eq 'f2' || $oq eq 'p3') {
735 } elsif ($oq eq '0f') {
737 } elsif ($oq eq '0f38') {
739 } elsif ($oq eq '0f3a') {
741 } elsif ($oq =~ /^m([0-9]+)$/) {
743 } elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
744 if (!defined($oppos{'v'})) {
745 die "$fname: $line: vex.$oq without 'v' operand\n";
749 die "$fname: $line: undefined VEX subcode: $oq\n";
752 if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
753 die "$fname: $line: missing fields in VEX specification\n";
755 if (defined($oppos{'v'}) && !$has_nds) {
756 die "$fname: $line: 'v' operand without vex.nds or vex.ndd\n";
758 push(@codes, defined($oppos{'v'}) ? 0260+($oppos{'v'} & 3) : 0270,
759 ($c << 6)+$m, ($w << 3)+($l << 2)+$p);
761 } elsif ($op =~ /^\/drex([01])$/) {
763 if (!defined($oppos{'d'})) {
764 die "$fname: $line: DREX without a 'd' operand\n";
766 # Note the use of *unshift* here, as opposed to *push*.
767 # This is because NASM want this byte code at the start of
768 # the instruction sequence, but the AMD documentation puts
769 # this at (roughly) the position of the drex byte itself.
770 # This allows us to match the AMD documentation and still
771 # do the right thing.
772 unshift(@codes, 0160+($oppos{'d'} & 3)+($oc0 ? 4 : 0));
773 unshift(@codes, 05) if ($oppos{'d'} & 4);
774 } elsif ($op =~ /^(ib\,s|ib|ibx|ib\,w|iw|iwd|id|idx|iwdq|rel|rel8|rel16|rel32|iq|seg|ibw|ibd|ibd,s)$/) {
775 if (!defined($oppos{'i'})) {
776 die "$fname: $line: $op without 'i' operand\n";
778 if ($op eq 'ib,s') { # Signed imm8
779 push(@codes, 05) if ($oppos{'i'} & 4);
780 push(@codes, 014+($oppos{'i'} & 3));
781 } elsif ($op eq 'ib') { # imm8
782 push(@codes, 05) if ($oppos{'i'} & 4);
783 push(@codes, 020+($oppos{'i'} & 3));
784 } elsif ($op eq 'ib,u') { # Unsigned imm8
785 push(@codes, 05) if ($oppos{'i'} & 4);
786 push(@codes, 024+($oppos{'i'} & 3));
787 } elsif ($op eq 'iw') { # imm16
788 push(@codes, 05) if ($oppos{'i'} & 4);
789 push(@codes, 030+($oppos{'i'} & 3));
790 } elsif ($op eq 'ibx') { # imm8 sign-extended to opsize
791 push(@codes, 05) if ($oppos{'i'} & 4);
792 push(@codes, 0274+($oppos{'i'} & 3));
793 } elsif ($op eq 'iwd') { # imm16 or imm32, depending on opsize
794 push(@codes, 05) if ($oppos{'i'} & 4);
795 push(@codes, 034+($oppos{'i'} & 3));
796 } elsif ($op eq 'id') { # imm32
797 push(@codes, 05) if ($oppos{'i'} & 4);
798 push(@codes, 040+($oppos{'i'} & 3));
799 } elsif ($op eq 'idx') { # imm32 extended to 64 bits
800 push(@codes, 05) if ($oppos{'i'} & 4);
801 push(@codes, 0254+($oppos{'i'} & 3));
802 } elsif ($op eq 'iwdq') { # imm16/32/64, depending on opsize
803 push(@codes, 05) if ($oppos{'i'} & 4);
804 push(@codes, 044+($oppos{'i'} & 3));
805 } elsif ($op eq 'rel8') {
806 push(@codes, 05) if ($oppos{'i'} & 4);
807 push(@codes, 050+($oppos{'i'} & 3));
808 } elsif ($op eq 'iq') {
809 push(@codes, 05) if ($oppos{'i'} & 4);
810 push(@codes, 054+($oppos{'i'} & 3));
811 } elsif ($op eq 'rel16') {
812 push(@codes, 05) if ($oppos{'i'} & 4);
813 push(@codes, 060+($oppos{'i'} & 3));
814 } elsif ($op eq 'rel') { # 16 or 32 bit relative operand
815 push(@codes, 05) if ($oppos{'i'} & 4);
816 push(@codes, 064+($oppos{'i'} & 3));
817 } elsif ($op eq 'rel32') {
818 push(@codes, 05) if ($oppos{'i'} & 4);
819 push(@codes, 070+($oppos{'i'} & 3));
820 } elsif ($op eq 'seg') {
821 push(@codes, 05) if ($oppos{'i'} & 4);
822 push(@codes, 074+($oppos{'i'} & 3));
823 } elsif ($op eq 'ibw') { # imm16 that can be bytified
824 if (!defined($s_pos)) {
825 die "$fname: $line: $op without a +s byte\n";
827 $codes[$s_pos] += 0144;
828 push(@codes, 05) if ($oppos{'i'} & 4);
829 push(@codes, 0140+($oppos{'i'} & 3));
830 } elsif ($op eq 'ibd') { # imm32 that can be bytified
831 if (!defined($s_pos)) {
832 die "$fname: $line: $op without a +s byte\n";
834 $codes[$s_pos] += 0154;
835 push(@codes, 05) if ($oppos{'i'} & 4);
836 push(@codes, 0150+($oppos{'i'} & 3));
837 } elsif ($op eq 'ibd,s') {
838 # imm32 that can be bytified, sign extended to 64 bits
839 if (!defined($s_pos)) {
840 die "$fname: $line: $op without a +s byte\n";
842 $codes[$s_pos] += 0154;
843 push(@codes, 05) if ($oppos{'i'} & 4);
844 push(@codes, 0250+($oppos{'i'} & 3));
847 } elsif ($op eq '/is4') {
848 if (!defined($oppos{'s'})) {
849 die "$fname: $line: $op without 's' operand\n";
851 if (defined($oppos{'i'})) {
852 push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
854 push(@codes, 0174, $oppos{'s'});
857 } elsif ($op =~ /^\/is4\=([0-9]+)$/) {
859 if (!defined($oppos{'s'})) {
860 die "$fname: $line: $op without 's' operand\n";
862 if ($imm < 0 || $imm > 15) {
863 die "$fname: $line: invalid imm4 value for $op: $imm\n";
865 push(@codes, 0173, ($oppos{'s'} << 4) + $imm);
867 } elsif ($op =~ /^([0-9a-f]{2})\+s$/) {
868 if (!defined($oppos{'i'})) {
869 die "$fname: $line: $op without 'i' operand\n";
871 $s_pos = scalar @codes;
872 push(@codes, 05) if ($oppos{'i'} & 4);
873 push(@codes, $oppos{'i'} & 3, hex $1);
875 } elsif ($op =~ /^([0-9a-f]{2})\+c$/) {
876 push(@codes, 0330, hex $1);
878 } elsif ($op =~ /^\\([0-7]+|x[0-9a-f]{2})$/) {
879 # Escape to enter literal bytecodes
880 push(@codes, oct $1);
882 die "$fname: $line: unknown operation: $op\n";