2 ## --------------------------------------------------------------------------
4 ## Copyright 1996-2009 The NASM Authors - All Rights Reserved
5 ## See the file AUTHORS included with the NASM distribution for
6 ## the specific copyright holders.
8 ## This program is free software; you can redistribute it and/or modify
9 ## it under the terms of the GNU Lesser General Public License as
10 ## published by the Free Software Foundation, Inc.,
11 ## 51 Franklin St, Fifth Floor, Boston MA 02110-1301, USA; version 2.1,
12 ## or, at your option, any later version, incorporated herein by
15 ## Patches submitted to this file are required to be dual licensed
16 ## under the LGPL 2.1+ and the 2-clause BSD license:
18 ## Copyright 1996-2009 the NASM Authors - All rights reserved.
20 ## Redistribution and use in source and binary forms, with or without
21 ## modification, are permitted provided that the following
22 ## conditions are met:
24 ## * Redistributions of source code must retain the above copyright
25 ## notice, this list of conditions and the following disclaimer.
26 ## * Redistributions in binary form must reproduce the above
27 ## copyright notice, this list of conditions and the following
28 ## disclaimer in the documentation and/or other materials provided
29 ## with the distribution.
31 ## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
32 ## CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
33 ## INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
34 ## MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
35 ## DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
36 ## CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
37 ## SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
38 ## NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
39 ## LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
40 ## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
41 ## CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
42 ## OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
43 ## EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
45 ## --------------------------------------------------------------------------
50 # Parse insns.dat and produce generated source code files
52 # Opcode prefixes which need their own opcode tables
53 # LONGER PREFIXES FIRST!
54 @disasm_prefixes = qw(0F24 0F25 0F38 0F3A 0F7A 0FA6 0FA7 0F);
56 # This should match MAX_OPERANDS from nasm.h
59 # Add VEX/XOP prefixes
60 @vex_class = ( 'vex', 'xop' );
61 $vex_classes = scalar(@vex_class);
64 for ($c = 0; $c < $vex_classes; $c++) {
65 $vexmap{$vex_class[$c]} = $c;
66 for ($m = 0; $m < 32; $m++) {
67 for ($lp = 0; $lp < 8; $lp++) {
68 push(@vexlist, sprintf("%s%02X%01X", $vex_class[$c], $m, $lp));
72 @disasm_prefixes = (@vexlist, @disasm_prefixes);
74 @bytecode_count = (0) x
256;
76 print STDERR
"Reading insns.dat...\n";
80 foreach $arg ( @ARGV ) {
81 if ( $arg =~ /^\-/ ) {
82 if ( $arg =~ /^\-([abdin])$/ ) {
85 die "$0: Unknown option: ${arg}\n";
92 $fname = "insns.dat" unless $fname = $args[0];
93 open (F
, $fname) || die "unable to open $fname";
103 next if ( /^\s*(\;.*|)$/ ); # comments or blank lines
105 unless (/^\s*(\S+)\s+(\S+)\s+(\S+|\[.*\])\s+(\S+)\s*$/) {
106 warn "line $line does not contain four fields\n";
109 @fields = ($1, $2, $3, $4);
110 @field_list = ([@fields, 0]);
112 if ($fields[1] =~ /\*/) {
113 # This instruction has relaxed form(s)
114 if ($fields[2] !~ /^\[/) {
115 warn "line $line has an * operand but uses raw bytecodes\n";
120 @ops = split(/,/, $fields[1]);
121 for ($oi = 0; $oi < scalar @ops; $oi++) {
122 if ($ops[$oi] =~ /\*$/) {
124 warn "line $line has a first operand with a *\n";
131 for ($oi = 1; $oi < (1 << scalar @ops); $oi++) {
132 if (($oi & ~$opmask) == 0) {
135 for ($oj = 0; $oj < scalar(@ops); $oj++) {
137 push(@xops, $ops[$oj]);
141 push(@field_list, [$fields[0], join(',', @xops),
142 $fields[2], $fields[3], $oi]);
147 foreach $fptr (@field_list) {
149 ($formatted, $nd) = format_insn
(@fields);
152 $aname = "aa_$fields[0]";
153 push @
$aname, $formatted;
155 if ( $fields[0] =~ /cc$/ ) {
156 # Conditional instruction
157 $k_opcodes_cc{$fields[0]}++;
159 # Unconditional instruction
160 $k_opcodes{$fields[0]}++;
162 if ($formatted && !$nd) {
163 push @big, $formatted;
164 my @sseq = startseq
($fields[2], $fields[4]);
166 if (!defined($dinstables{$i})) {
167 $dinstables{$i} = [];
169 push(@
{$dinstables{$i}}, $#big);
178 # Generate the bytecode array. At this point, @bytecode_list contains
179 # the full set of bytecodes.
182 # Sort by descending length
183 @bytecode_list = sort { scalar(@
$b) <=> scalar(@
$a) } @bytecode_list;
184 @bytecode_array = ();
187 foreach $bl (@bytecode_list) {
188 my $h = hexstr
(@
$bl);
189 next if (defined($bytecode_pos{$h}));
191 push(@bytecode_array, $bl);
193 $bytecode_pos{$h} = $bytecode_next;
198 undef @bytecode_list;
200 @opcodes = sort keys(%k_opcodes);
201 @opcodes_cc = sort keys(%k_opcodes_cc);
203 if ( !defined($output) || $output eq 'b') {
204 print STDERR
"Writing insnsb.c...\n";
208 print B
"/* This file auto-generated from insns.dat by insns.pl" .
209 " - don't edit it */\n\n";
211 print B
"#include \"nasm.h\"\n";
212 print B
"#include \"insns.h\"\n\n";
214 print B
"const uint8_t nasm_bytecodes[$bytecode_next] = {\n";
217 foreach $bl (@bytecode_array) {
218 printf B
" /* %5d */ ", $p;
229 print B
" * Bytecode frequencies (including reuse):\n";
231 for ($i = 0; $i < 32; $i++) {
233 for ($j = 0; $j < 256; $j += 32) {
234 print B
" |" if ($j);
235 printf B
" %3o:%4d", $i+$j, $bytecode_count[$i+$j];
244 if ( !defined($output) || $output eq 'a' ) {
245 print STDERR
"Writing insnsa.c...\n";
249 print A
"/* This file auto-generated from insns.dat by insns.pl" .
250 " - don't edit it */\n\n";
252 print A
"#include \"nasm.h\"\n";
253 print A
"#include \"insns.h\"\n\n";
255 foreach $i (@opcodes, @opcodes_cc) {
256 print A
"static const struct itemplate instrux_${i}[] = {\n";
258 foreach $j (@
$aname) {
259 print A
" ", codesubst
($j), "\n";
261 print A
" ITEMPLATE_END\n};\n\n";
263 print A
"const struct itemplate * const nasm_instructions[] = {\n";
264 foreach $i (@opcodes, @opcodes_cc) {
265 print A
" instrux_${i},\n";
272 if ( !defined($output) || $output eq 'd' ) {
273 print STDERR
"Writing insnsd.c...\n";
277 print D
"/* This file auto-generated from insns.dat by insns.pl" .
278 " - don't edit it */\n\n";
280 print D
"#include \"nasm.h\"\n";
281 print D
"#include \"insns.h\"\n\n";
283 print D
"static const struct itemplate instrux[] = {\n";
286 printf D
" /* %4d */ %s\n", $n++, codesubst
($j);
290 foreach $h (sort(keys(%dinstables))) {
291 next if ($h eq ''); # Skip pseudo-instructions
292 print D
"\nstatic const struct itemplate * const itable_${h}[] = {\n";
293 foreach $j (@
{$dinstables{$h}}) {
294 print D
" instrux + $j,\n";
300 foreach $h (@disasm_prefixes, '') {
301 for ($c = 0; $c < 256; $c++) {
302 $nn = sprintf("%s%02X", $h, $c);
303 if ($is_prefix{$nn} || defined($dinstables{$nn})) {
304 # At least one entry in this prefix table
305 push(@prefix_list, $h);
312 foreach $h (@prefix_list) {
314 print D
"static " unless ($h eq '');
315 print D
"const struct disasm_index ";
316 print D
($h eq '') ?
'itable' : "itable_$h";
317 print D
"[256] = {\n";
318 for ($c = 0; $c < 256; $c++) {
319 $nn = sprintf("%s%02X", $h, $c);
320 if ($is_prefix{$nn}) {
321 die "$fname: ambiguous decoding of $nn\n"
322 if (defined($dinstables{$nn}));
323 printf D
" { itable_%s, -1 },\n", $nn;
324 } elsif (defined($dinstables{$nn})) {
325 printf D
" { itable_%s, %u },\n",
326 $nn, scalar(@
{$dinstables{$nn}});
328 printf D
" { NULL, 0 },\n";
334 printf D
"\nconst struct disasm_index * const itable_vex[%d][32][8] =\n",
337 for ($c = 0; $c < $vex_classes; $c++) {
339 for ($m = 0; $m < 32; $m++) {
341 for ($lp = 0; $lp < 8; $lp++) {
342 $vp = sprintf("%s%02X%01X", $vex_class[$c], $m, $lp);
343 if ($is_prefix{$vp}) {
344 printf D
" itable_%s,\n", $vp;
358 if ( !defined($output) || $output eq 'i' ) {
359 print STDERR
"Writing insnsi.h...\n";
363 print I
"/* This file is auto-generated from insns.dat by insns.pl" .
364 " - don't edit it */\n\n";
365 print I
"/* This file in included by nasm.h */\n\n";
367 print I
"/* Instruction names */\n\n";
368 print I
"#ifndef NASM_INSNSI_H\n";
369 print I
"#define NASM_INSNSI_H 1\n\n";
370 print I
"enum opcode {\n";
372 foreach $i (@opcodes, @opcodes_cc) {
373 print I
"\tI_${i},\n";
375 $len++ if ( $i =~ /cc$/ ); # Condition codes can be 3 characters long
376 $maxlen = $len if ( $len > $maxlen );
378 print I
"\tI_none = -1\n";
380 print I
"#define MAX_INSLEN ", $maxlen, "\n";
381 print I
"#define FIRST_COND_OPCODE I_", $opcodes_cc[0], "\n\n";
382 print I
"#endif /* NASM_INSNSI_H */\n";
387 if ( !defined($output) || $output eq 'n' ) {
388 print STDERR
"Writing insnsn.c...\n";
392 print N
"/* This file is auto-generated from insns.dat by insns.pl" .
393 " - don't edit it */\n\n";
394 print N
"#include \"tables.h\"\n\n";
396 print N
"const char * const nasm_insn_names[] = {";
398 foreach $i (@opcodes, @opcodes_cc) {
399 print N
"," if ( !$first );
402 $ilower =~ s/cc$//; # Remove conditional cc suffix
403 $ilower =~ tr/A-Z/a-z/; # Change to lower case (Perl 4 compatible)
404 print N
"\n\t\"${ilower}\"";
410 printf STDERR
"Done: %d instructions\n", $insns;
412 # Count primary bytecodes, for statistics
413 sub count_bytecodes
(@
) {
415 foreach my $bc (@_) {
420 $bytecode_count[$bc]++;
421 if ($bc >= 01 && $bc <= 04) {
423 } elsif (($bc & ~03) == 010) {
425 } elsif (($bc & ~013) == 0144) {
427 } elsif ($bc == 0172) {
429 } elsif ($bc >= 0260 && $bc <= 0270) {
431 } elsif ($bc == 0330) {
437 sub format_insn
($$$$$) {
438 my ($opcode, $operands, $codes, $flags, $relax) = @_;
442 return (undef, undef) if $operands eq "ignore";
444 # format the operands
445 $operands =~ s/\*//g;
446 $operands =~ s/:/|colon,/g;
447 $operands =~ s/mem(\d+)/mem|bits$1/g;
448 $operands =~ s/mem/memory/g;
449 $operands =~ s/memory_offs/mem_offs/g;
450 $operands =~ s/imm(\d+)/imm|bits$1/g;
451 $operands =~ s/imm/immediate/g;
452 $operands =~ s/rm(\d+)/rm_gpr|bits$1/g;
453 $operands =~ s/(mmx|xmm|ymm)rm/rm_$1/g;
454 $operands =~ s/\=([0-9]+)/same_as|$1/g;
455 if ($operands eq 'void') {
458 @ops = split(/\,/, $operands);
461 while (scalar(@ops) < $MAX_OPERANDS) {
464 $operands = join(',', @ops);
465 $operands =~ tr/a-z/A-Z/;
468 $flags =~ s/,/|IF_/g;
469 $flags =~ s/(\|IF_ND|IF_ND\|)//, $nd = 1 if $flags =~ /IF_ND/;
470 $flags = "IF_" . $flags;
472 @bytecode = (decodify
($codes, $relax), 0);
473 push(@bytecode_list, [@bytecode]);
474 $codes = hexstr
(@bytecode);
475 count_bytecodes
(@bytecode);
477 ("{I_$opcode, $num, {$operands}, \@\@CODES-$codes\@\@, $flags},", $nd);
481 # Look for @@CODES-xxx@@ sequences and replace them with the appropriate
482 # offset into nasm_bytecodes
488 while ($s =~ /\@\@CODES-([0-9A-F]+)\@\@/) {
489 my $pos = $bytecode_pos{$1};
490 if (!defined($pos)) {
491 die "$fname: no position assigned to byte code $1\n";
493 $s = $` . "nasm_bytecodes+${pos}" . "$'";
499 my ($prefix, @list) = @_;
504 push(@l, sprintf("%s%02X", $prefix, $x));
511 # Turn a code string into a sequence of bytes
514 # Although these are C-syntax strings, by convention they should have
515 # only octal escapes (for directives) and hexadecimal escapes
516 # (for verbatim bytes)
517 my($codestr, $relax) = @_;
519 if ($codestr =~ /^\s*\[([^\]]*)\]\s*$/) {
520 return byte_code_compile($1, $relax);
527 if ($c =~ /^\\x([0-9a-f]+)(.*)$/i) {
528 push(@codes, hex $1);
531 } elsif ($c =~ /^\\([0-7]{1,3})(.*)$/) {
532 push(@codes, oct $1);
536 die "$fname: unknown code format in \"$codestr\"\n";
543 # Turn a numeric list into a hex string
549 $s .= sprintf("%02X", $c);
554 # Here we determine the range of possible starting bytes for a given
555 # instruction. We need only consider the codes:
556 # \[1234] mean literal bytes, of course
557 # \1[0123] mean byte plus register value
558 # \330 means byte plus condition code
559 # \0 or \340 mean give up and return empty set
560 # \34[4567] mean PUSH/POP of segment registers: special case
561 # \17[234] skip is4 control byte
562 # \26x \270 skip VEX control bytes
564 my ($codestr, $relax) = @_;
571 @codes = decodify($codestr, $relax);
573 while ($c0 = shift(@codes)) {
575 if ($c0 >= 01 && $c0 <= 04) {
579 if ($c0 >= 01 && $c0 <= 04) {
581 $fbs .= sprintf("%02X", shift(@codes));
589 foreach $pfx (@disasm_prefixes) {
590 if (substr($fbs, 0, length($pfx)) eq $pfx) {
592 $fbs = substr($fbs, length($pfx));
598 return ($prefix.substr($fbs,0,2));
601 unshift(@codes, $c0);
602 } elsif ($c0 >= 010 && $c0 <= 013) {
603 return addprefix($prefix, $c1..($c1+7));
604 } elsif (($c0 & ~013) == 0144) {
605 return addprefix($prefix, $c1, $c1|2);
606 } elsif ($c0 == 0330) {
607 return addprefix($prefix, $c1..($c1+15));
608 } elsif ($c0 == 0 || $c0 == 0340) {
610 } elsif ($c0 == 0344) {
611 return addprefix($prefix, 0x06, 0x0E, 0x16, 0x1E);
612 } elsif ($c0 == 0345) {
613 return addprefix($prefix, 0x07, 0x17, 0x1F);
614 } elsif ($c0 == 0346) {
615 return addprefix($prefix, 0xA0, 0xA8);
616 } elsif ($c0 == 0347) {
617 return addprefix($prefix, 0xA1, 0xA9);
618 } elsif (($c0 & ~3) == 0260 || $c0 == 0270) {
621 $wlp = shift(@codes);
624 $prefix .= sprintf('%s%02X%01X', $vex_class[$c], $m, $wlp & 7);
625 } elsif ($c0 >= 0172 && $c0 <= 174) {
626 shift(@codes); # Skip is4 control byte
628 # We really need to be able to distinguish "forbidden"
629 # and "ignorable" codes here
636 # This function takes a series of byte codes in a format which is more
637 # typical of the Intel documentation, and encode it.
639 # The format looks like:
641 # [operands: opcodes]
643 # The operands word lists the order of the operands:
645 # r = register field in the modr/m
648 # d = DREX "dst" field
650 # s = register field of is4/imz2 field
651 # - = implicit (unencoded) operand
653 # For an operand that should be filled into more than one field,
654 # enter it as e.g. "r+v".
656 sub byte_code_compile($$) {
657 my($str, $relax) = @_;
667 unless ($str =~ /^(([^\s:]*)\:|)\s*(.*\S)\s*$/) {
668 die "$fname: $line: cannot parse: [$str]\n";
674 for ($i = 0; $i < length($opr); $i++) {
675 my $c = substr($opr,$i,1);
688 foreach $op (split(/\s*(?:\s|(?=[\/\\]))/, $opc)) {
691 } elsif ($op eq 'o32') {
693 } elsif ($op eq 'o64') { # 64-bit operand size requiring REX.W
695 } elsif ($op eq 'o64nw') { # Implied 64-bit operand size (no REX.W)
697 } elsif ($op eq 'a16') {
699 } elsif ($op eq 'a32') {
701 } elsif ($op eq 'a64') {
703 } elsif ($op eq '!osp') {
705 } elsif ($op eq '!asp') {
707 } elsif ($op eq 'rex.l') {
709 } elsif ($op eq 'repe') {
711 } elsif ($op eq 'nohi') { # Use spl/bpl/sil/dil even without REX
713 } elsif ($prefix_ok && $op =~ /^(66|f2|f3|np)$/) {
714 # 66/F2/F3 prefix used as an opcode extension, or np = no prefix
717 } elsif ($op eq 'f2') {
719 } elsif ($op eq 'f3') {
724 } elsif ($op =~ /^[0-9a-f]{2}$/) {
725 if (defined($litix) && $litix+$codes[$litix]+1 == scalar @codes &&
726 $codes[$litix] < 4) {
728 push(@codes, hex $op);
730 $litix = scalar(@codes);
731 push(@codes, 01, hex $op);
734 } elsif ($op eq '/r') {
735 if (!defined($oppos{'r'}) || !defined($oppos{'m'})) {
736 die "$fname: $line: $op requires r and m operands\n";
738 $opex = (($oppos{'m'} & 4) ? 06 : 0) |
739 (($oppos{'r'} & 4) ? 05 : 0);
740 push(@codes, $opex) if ($opex);
741 push(@codes, 0100 + (($oppos{'m'} & 3) << 3) + ($oppos{'r'} & 3));
743 } elsif ($op =~ m:^/([0-7])$:) {
744 if (!defined($oppos{'m'})) {
745 die "$fname: $line: $op requires m operand\n";
747 push(@codes, 06) if ($oppos{'m'} & 4);
748 push(@codes, 0200 + (($oppos{'m'} & 3) << 3) + $1);
750 } elsif ($op =~ /^(vex|xop)(|\..*)$/) {
752 my ($m,$w,$l,$p) = (undef,2,undef,0);
754 my @subops = split(/\./, $op);
755 shift @subops; # Drop prefix
756 foreach $oq (@subops) {
757 if ($oq eq '128' || $oq eq 'l0') {
759 } elsif ($oq eq '256' || $oq eq 'l1') {
761 } elsif ($oq eq 'w0') {
763 } elsif ($oq eq 'w1') {
765 } elsif ($oq eq 'wx') {
767 } elsif ($oq eq 'ww') {
769 } elsif ($oq eq 'p0') {
771 } elsif ($oq eq '66' || $oq eq 'p1') {
773 } elsif ($oq eq 'f3' || $oq eq 'p2') {
775 } elsif ($oq eq 'f2' || $oq eq 'p3') {
777 } elsif ($oq eq '0f') {
779 } elsif ($oq eq '0f38') {
781 } elsif ($oq eq '0f3a') {
783 } elsif ($oq =~ /^m([0-9]+)$/) {
785 } elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
786 if (!defined($oppos{'v'})) {
787 die "$fname: $line: vex.$oq without 'v' operand\n";
791 die "$fname: $line: undefined VEX subcode: $oq\n";
794 if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
795 die "$fname: $line: missing fields in VEX specification\n";
797 if (defined($oppos{'v'}) && !$has_nds) {
798 die "$fname: $line: 'v' operand without vex.nds or vex.ndd\n";
800 push(@codes, defined($oppos{'v'}) ? 0260+($oppos{'v'} & 3) : 0270,
801 ($c << 6)+$m, ($w << 3)+($l << 2)+$p);
803 } elsif ($op =~ /^\/drex([01])$/) {
805 if (!defined($oppos{'d'})) {
806 die "$fname: $line: DREX without a 'd' operand\n";
808 # Note the use of *unshift* here, as opposed to *push*.
809 # This is because NASM want this byte code at the start of
810 # the instruction sequence, but the AMD documentation puts
811 # this at (roughly) the position of the drex byte itself.
812 # This allows us to match the AMD documentation and still
813 # do the right thing.
814 unshift(@codes, 0160+($oppos{'d'} & 3)+($oc0 ? 4 : 0));
815 unshift(@codes, 05) if ($oppos{'d'} & 4);
816 } elsif ($op =~ /^(ib\,s|ib|ibx|ib\,w|iw|iwd|id|idx|iwdq|rel|rel8|rel16|rel32|iq|seg|ibw|ibd|ibd,s)$/) {
817 if (!defined($oppos{'i'})) {
818 die "$fname: $line: $op without 'i' operand\n";
820 if ($op eq 'ib,s') { # Signed imm8
821 push(@codes, 05) if ($oppos{'i'} & 4);
822 push(@codes, 014+($oppos{'i'} & 3));
823 } elsif ($op eq 'ib') { # imm8
824 push(@codes, 05) if ($oppos{'i'} & 4);
825 push(@codes, 020+($oppos{'i'} & 3));
826 } elsif ($op eq 'ib,u') { # Unsigned imm8
827 push(@codes, 05) if ($oppos{'i'} & 4);
828 push(@codes, 024+($oppos{'i'} & 3));
829 } elsif ($op eq 'iw') { # imm16
830 push(@codes, 05) if ($oppos{'i'} & 4);
831 push(@codes, 030+($oppos{'i'} & 3));
832 } elsif ($op eq 'ibx') { # imm8 sign-extended to opsize
833 push(@codes, 05) if ($oppos{'i'} & 4);
834 push(@codes, 0274+($oppos{'i'} & 3));
835 } elsif ($op eq 'iwd') { # imm16 or imm32, depending on opsize
836 push(@codes, 05) if ($oppos{'i'} & 4);
837 push(@codes, 034+($oppos{'i'} & 3));
838 } elsif ($op eq 'id') { # imm32
839 push(@codes, 05) if ($oppos{'i'} & 4);
840 push(@codes, 040+($oppos{'i'} & 3));
841 } elsif ($op eq 'idx') { # imm32 extended to 64 bits
842 push(@codes, 05) if ($oppos{'i'} & 4);
843 push(@codes, 0254+($oppos{'i'} & 3));
844 } elsif ($op eq 'iwdq') { # imm16/32/64, depending on opsize
845 push(@codes, 05) if ($oppos{'i'} & 4);
846 push(@codes, 044+($oppos{'i'} & 3));
847 } elsif ($op eq 'rel8') {
848 push(@codes, 05) if ($oppos{'i'} & 4);
849 push(@codes, 050+($oppos{'i'} & 3));
850 } elsif ($op eq 'iq') {
851 push(@codes, 05) if ($oppos{'i'} & 4);
852 push(@codes, 054+($oppos{'i'} & 3));
853 } elsif ($op eq 'rel16') {
854 push(@codes, 05) if ($oppos{'i'} & 4);
855 push(@codes, 060+($oppos{'i'} & 3));
856 } elsif ($op eq 'rel') { # 16 or 32 bit relative operand
857 push(@codes, 05) if ($oppos{'i'} & 4);
858 push(@codes, 064+($oppos{'i'} & 3));
859 } elsif ($op eq 'rel32') {
860 push(@codes, 05) if ($oppos{'i'} & 4);
861 push(@codes, 070+($oppos{'i'} & 3));
862 } elsif ($op eq 'seg') {
863 push(@codes, 05) if ($oppos{'i'} & 4);
864 push(@codes, 074+($oppos{'i'} & 3));
865 } elsif ($op eq 'ibw') { # imm16 that can be bytified
866 if (!defined($s_pos)) {
867 die "$fname: $line: $op without a +s byte\n";
869 $codes[$s_pos] += 0144;
870 push(@codes, 05) if ($oppos{'i'} & 4);
871 push(@codes, 0140+($oppos{'i'} & 3));
872 } elsif ($op eq 'ibd') { # imm32 that can be bytified
873 if (!defined($s_pos)) {
874 die "$fname: $line: $op without a +s byte\n";
876 $codes[$s_pos] += 0154;
877 push(@codes, 05) if ($oppos{'i'} & 4);
878 push(@codes, 0150+($oppos{'i'} & 3));
879 } elsif ($op eq 'ibd,s') {
880 # imm32 that can be bytified, sign extended to 64 bits
881 if (!defined($s_pos)) {
882 die "$fname: $line: $op without a +s byte\n";
884 $codes[$s_pos] += 0154;
885 push(@codes, 05) if ($oppos{'i'} & 4);
886 push(@codes, 0250+($oppos{'i'} & 3));
889 } elsif ($op eq '/is4') {
890 if (!defined($oppos{'s'})) {
891 die "$fname: $line: $op without 's' operand\n";
893 if (defined($oppos{'i'})) {
894 push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
896 push(@codes, 0174, $oppos{'s'});
899 } elsif ($op =~ /^\/is4\=([0-9]+)$/) {
901 if (!defined($oppos{'s'})) {
902 die "$fname: $line: $op without 's' operand\n";
904 if ($imm < 0 || $imm > 15) {
905 die "$fname: $line: invalid imm4 value for $op: $imm\n";
907 push(@codes, 0173, ($oppos{'s'} << 4) + $imm);
909 } elsif ($op =~ /^([0-9a-f]{2})\+s$/) {
910 if (!defined($oppos{'i'})) {
911 die "$fname: $line: $op without 'i' operand\n";
913 $s_pos = scalar @codes;
914 push(@codes, 05) if ($oppos{'i'} & 4);
915 push(@codes, $oppos{'i'} & 3, hex $1);
917 } elsif ($op =~ /^([0-9a-f]{2})\+c$/) {
918 push(@codes, 0330, hex $1);
920 } elsif ($op =~ /^\\([0-7]+|x[0-9a-f]{2})$/) {
921 # Escape to enter literal bytecodes
922 push(@codes, oct $1);
924 die "$fname: $line: unknown operation: $op\n";