disasm.c

   1 /* disasm.c   where all the _work_ gets done in the Netwide Disassembler
   2  *
   3  * The Netwide Assembler is copyright (C) 1996 Simon Tatham and
   4  * Julian Hall. All rights reserved. The software is
   5  * redistributable under the licence given in the file "Licence"
   6  * distributed in the NASM archive.
   7  *
   8  * initial version 27/iii/95 by Simon Tatham
   9  */
  10
  11 #include <stdio.h>
  12 #include <string.h>
  13
  14 #include "nasm.h"
  15 #include "disasm.h"
  16 #include "sync.h"
  17 #include "insns.h"
  18
  19 #include "names.c"
  20
  21 extern struct itemplate **itable[];
  22
  23 /*
  24  * Flags that go into the `segment' field of `insn' structures
  25  * during disassembly.
  26  */
  27 #define SEG_RELATIVE 1
  28 #define SEG_32BIT 2
  29 #define SEG_RMREG 4
  30 #define SEG_DISP8 8
  31 #define SEG_DISP16 16
  32 #define SEG_DISP32 32
  33 #define SEG_NODISP 64
  34 #define SEG_SIGNED 128
  35
  36 static int whichreg(long regflags, int regval)
  37 {
  38 #include "regdis.c"
  39
  40     if (!(REG_AL & ~regflags))
  41         return R_AL;
  42     if (!(REG_AX & ~regflags))
  43         return R_AX;
  44     if (!(REG_EAX & ~regflags))
  45         return R_EAX;
  46     if (!(REG_DL & ~regflags))
  47         return R_DL;
  48     if (!(REG_DX & ~regflags))
  49         return R_DX;
  50     if (!(REG_EDX & ~regflags))
  51         return R_EDX;
  52     if (!(REG_CL & ~regflags))
  53         return R_CL;
  54     if (!(REG_CX & ~regflags))
  55         return R_CX;
  56     if (!(REG_ECX & ~regflags))
  57         return R_ECX;
  58     if (!(FPU0 & ~regflags))
  59         return R_ST0;
  60     if (!(REG_CS & ~regflags))
  61         return (regval == 1) ? R_CS : 0;
  62     if (!(REG_DESS & ~regflags))
  63         return (regval == 0 || regval == 2 || regval == 3 ? sreg[regval] : 0);
  64     if (!(REG_FSGS & ~regflags))
  65         return (regval == 4 || regval == 5 ? sreg[regval] : 0);
  66     if (!(REG_SEG67 & ~regflags))
  67         return (regval == 6 || regval == 7 ? sreg[regval] : 0);
  68
  69     /* All the entries below look up regval in an 8-entry array */
  70     if (regval < 0 || regval > 7)
  71         return 0;
  72
  73     if (!((REGMEM|BITS8) & ~regflags))
  74         return reg8[regval];
  75     if (!((REGMEM|BITS16) & ~regflags))
  76         return reg16[regval];
  77     if (!((REGMEM|BITS32) & ~regflags))
  78         return reg32[regval];
  79     if (!(REG_SREG & ~regflags))
  80         return sreg[regval];
  81     if (!(REG_CREG & ~regflags))
  82         return creg[regval];
  83     if (!(REG_DREG & ~regflags))
  84         return dreg[regval];
  85     if (!(REG_TREG & ~regflags))
  86         return treg[regval];
  87     if (!(FPUREG & ~regflags))
  88         return fpureg[regval];
  89     if (!(MMXREG & ~regflags))
  90         return mmxreg[regval];
  91     if (!(XMMREG & ~regflags))
  92         return xmmreg[regval];
  93
  94     return 0;
  95 }
  96
  97 static const char *whichcond(int condval)
  98 {
  99     static int conds[] = {
 100         C_O, C_NO, C_C, C_NC, C_Z, C_NZ, C_NA, C_A,
 101         C_S, C_NS, C_PE, C_PO, C_L, C_NL, C_NG, C_G
 102     };
 103     return conditions[conds[condval]];
 104 }
 105
 106 /*
 107  * Process an effective address (ModRM) specification.
 108  */
 109 static unsigned char *do_ea (unsigned char *data, int modrm, int asize,
 110                              int segsize, operand *op)
 111 {
 112     int mod, rm, scale, index, base;
 113
 114     mod = (modrm >> 6) & 03;
 115     rm = modrm & 07;
 116
 117     if (mod == 3) {                    /* pure register version */
 118         op->basereg = rm;
 119         op->segment |= SEG_RMREG;
 120         return data;
 121     }
 122
 123     op->addr_size = 0;
 124
 125     if (asize == 16) {
 126         /*
 127          * <mod> specifies the displacement size (none, byte or
 128          * word), and <rm> specifies the register combination.
 129          * Exception: mod=0,rm=6 does not specify [BP] as one might
 130          * expect, but instead specifies [disp16].
 131          */
 132         op->indexreg = op->basereg = -1;
 133         op->scale = 1;                 /* always, in 16 bits */
 134         switch (rm) {
 135           case 0: op->basereg = R_BX; op->indexreg = R_SI; break;
 136           case 1: op->basereg = R_BX; op->indexreg = R_DI; break;
 137           case 2: op->basereg = R_BP; op->indexreg = R_SI; break;
 138           case 3: op->basereg = R_BP; op->indexreg = R_DI; break;
 139           case 4: op->basereg = R_SI; break;
 140           case 5: op->basereg = R_DI; break;
 141           case 6: op->basereg = R_BP; break;
 142           case 7: op->basereg = R_BX; break;
 143         }
 144         if (rm == 6 && mod == 0) {     /* special case */
 145             op->basereg = -1;
 146             if (segsize != 16)
 147                 op->addr_size = 16;
 148             mod = 2;                   /* fake disp16 */
 149         }
 150         switch (mod) {
 151           case 0:
 152             op->segment |= SEG_NODISP;
 153             break;
 154           case 1:
 155             op->segment |= SEG_DISP8;
 156             op->offset = (signed char) *data++;
 157             break;
 158           case 2:
 159             op->segment |= SEG_DISP16;
 160             op->offset = *data++;
 161             op->offset |= ((unsigned) *data++) << 8;
 162             break;
 163         }
 164         return data;
 165     } else {
 166         /*
 167          * Once again, <mod> specifies displacement size (this time
 168          * none, byte or *dword*), while <rm> specifies the base
 169          * register. Again, [EBP] is missing, replaced by a pure
 170          * disp32 (this time that's mod=0,rm=*5*). However, rm=4
 171          * indicates not a single base register, but instead the
 172          * presence of a SIB byte...
 173          */
 174         op->indexreg = -1;
 175         switch (rm) {
 176           case 0: op->basereg = R_EAX; break;
 177           case 1: op->basereg = R_ECX; break;
 178           case 2: op->basereg = R_EDX; break;
 179           case 3: op->basereg = R_EBX; break;
 180           case 5: op->basereg = R_EBP; break;
 181           case 6: op->basereg = R_ESI; break;
 182           case 7: op->basereg = R_EDI; break;
 183         }
 184         if (rm == 5 && mod == 0) {
 185             op->basereg = -1;
 186             if (segsize != 32)
 187                 op->addr_size = 32;
 188             mod = 2;                   /* fake disp32 */
 189         }
 190         if (rm == 4) {                 /* process SIB */
 191             scale = (*data >> 6) & 03;
 192             index = (*data >> 3) & 07;
 193             base = *data & 07;
 194             data++;
 195
 196             op->scale = 1 << scale;
 197             switch (index) {
 198               case 0: op->indexreg = R_EAX; break;
 199               case 1: op->indexreg = R_ECX; break;
 200               case 2: op->indexreg = R_EDX; break;
 201               case 3: op->indexreg = R_EBX; break;
 202               case 4: op->indexreg = -1; break;
 203               case 5: op->indexreg = R_EBP; break;
 204               case 6: op->indexreg = R_ESI; break;
 205               case 7: op->indexreg = R_EDI; break;
 206             }
 207
 208             switch (base) {
 209               case 0: op->basereg = R_EAX; break;
 210               case 1: op->basereg = R_ECX; break;
 211               case 2: op->basereg = R_EDX; break;
 212               case 3: op->basereg = R_EBX; break;
 213               case 4: op->basereg = R_ESP; break;
 214               case 6: op->basereg = R_ESI; break;
 215               case 7: op->basereg = R_EDI; break;
 216               case 5:
 217                 if (mod == 0) {
 218                     mod = 2;
 219                     op->basereg = -1;
 220                 } else
 221                     op->basereg = R_EBP;
 222                 break;
 223             }
 224         }
 225         switch (mod) {
 226           case 0:
 227             op->segment |= SEG_NODISP;
 228             break;
 229           case 1:
 230             op->segment |= SEG_DISP8;
 231             op->offset = (signed char) *data++;
 232             break;
 233           case 2:
 234             op->segment |= SEG_DISP32;
 235             op->offset = *data++;
 236             op->offset |= ((unsigned) *data++) << 8;
 237             op->offset |= ((long) *data++) << 16;
 238             op->offset |= ((long) *data++) << 24;
 239             break;
 240         }
 241         return data;
 242     }
 243 }
 244
 245 /*
 246  * Determine whether the instruction template in t corresponds to the data
 247  * stream in data. Return the number of bytes matched if so.
 248  */
 249 static int matches (struct itemplate *t, unsigned char *data, int asize,
 250                     int osize, int segsize, int rep, insn *ins)
 251 {
 252     unsigned char * r = (unsigned char *)(t->code);
 253     unsigned char * origdata = data;
 254     int           a_used = FALSE, o_used = FALSE;
 255     int           drep = 0;
 256
 257     if ( rep == 0xF2 )
 258       drep = P_REPNE;
 259     else if ( rep == 0xF3 )
 260       drep = P_REP;
 261
 262     while (*r)
 263     {
 264         int c = *r++;
 265         if (c >= 01 && c <= 03) {
 266             while (c--)
 267                 if (*r++ != *data++)
 268                     return FALSE;
 269         }
 270         if (c == 04) {
 271             switch (*data++) {
 272               case 0x07: ins->oprs[0].basereg = 0; break;
 273               case 0x17: ins->oprs[0].basereg = 2; break;
 274               case 0x1F: ins->oprs[0].basereg = 3; break;
 275               default: return FALSE;
 276             }
 277         }
 278         if (c == 05) {
 279             switch (*data++) {
 280               case 0xA1: ins->oprs[0].basereg = 4; break;
 281               case 0xA9: ins->oprs[0].basereg = 5; break;
 282               default: return FALSE;
 283             }
 284         }
 285         if (c == 06) {
 286             switch (*data++) {
 287               case 0x06: ins->oprs[0].basereg = 0; break;
 288               case 0x0E: ins->oprs[0].basereg = 1; break;
 289               case 0x16: ins->oprs[0].basereg = 2; break;
 290               case 0x1E: ins->oprs[0].basereg = 3; break;
 291               default: return FALSE;
 292             }
 293         }
 294         if (c == 07) {
 295             switch (*data++) {
 296               case 0xA0: ins->oprs[0].basereg = 4; break;
 297               case 0xA8: ins->oprs[0].basereg = 5; break;
 298               default: return FALSE;
 299             }
 300         }
 301         if (c >= 010 && c <= 012) {
 302             int t = *r++, d = *data++;
 303             if (d < t || d > t+7)
 304                 return FALSE;
 305             else {
 306                 ins->oprs[c-010].basereg = d-t;
 307                 ins->oprs[c-010].segment |= SEG_RMREG;
 308             }
 309         }
 310         if (c == 017)
 311             if (*data++)
 312                 return FALSE;
 313         if (c >= 014 && c <= 016) {
 314             ins->oprs[c-014].offset = (signed char) *data++;
 315             ins->oprs[c-014].segment |= SEG_SIGNED;
 316         }
 317         if (c >= 020 && c <= 022)
 318             ins->oprs[c-020].offset = *data++;
 319         if (c >= 024 && c <= 026)
 320             ins->oprs[c-024].offset = *data++;
 321         if (c >= 030 && c <= 032) {
 322             ins->oprs[c-030].offset = *data++;
 323             ins->oprs[c-030].offset |= (((unsigned) *data++) << 8);
 324         }
 325         if (c >= 034 && c <= 036) {
 326             ins->oprs[c-034].offset = *data++;
 327             ins->oprs[c-034].offset |= (((unsigned) *data++) << 8);
 328             if (osize == 32) {
 329                 ins->oprs[c-034].offset |= (((long) *data++) << 16);
 330                 ins->oprs[c-034].offset |= (((long) *data++) << 24);
 331             }
 332             if (segsize != asize)
 333                 ins->oprs[c-034].addr_size = asize;
 334         }
 335         if (c >= 040 && c <= 042) {
 336             ins->oprs[c-040].offset = *data++;
 337             ins->oprs[c-040].offset |= (((unsigned) *data++) << 8);
 338             ins->oprs[c-040].offset |= (((long) *data++) << 16);
 339             ins->oprs[c-040].offset |= (((long) *data++) << 24);
 340         }
 341         if (c >= 044 && c <= 046) {
 342             ins->oprs[c-044].offset = *data++;
 343             ins->oprs[c-044].offset |= (((unsigned) *data++) << 8);
 344             if (asize == 32) {
 345                 ins->oprs[c-044].offset |= (((long) *data++) << 16);
 346                 ins->oprs[c-044].offset |= (((long) *data++) << 24);
 347             }
 348             if (segsize != asize)
 349                 ins->oprs[c-044].addr_size = asize;
 350         }
 351         if (c >= 050 && c <= 052) {
 352             ins->oprs[c-050].offset = (signed char) *data++;
 353             ins->oprs[c-050].segment |= SEG_RELATIVE;
 354         }
 355         if (c >= 060 && c <= 062) {
 356             ins->oprs[c-060].offset = *data++;
 357             ins->oprs[c-060].offset |= (((unsigned) *data++) << 8);
 358             ins->oprs[c-060].segment |= SEG_RELATIVE;
 359             ins->oprs[c-060].segment &= ~SEG_32BIT;
 360         }
 361         if (c >= 064 && c <= 066) {
 362             ins->oprs[c-064].offset = *data++;
 363             ins->oprs[c-064].offset |= (((unsigned) *data++) << 8);
 364             if (osize == 32) {
 365                 ins->oprs[c-064].offset |= (((long) *data++) << 16);
 366                 ins->oprs[c-064].offset |= (((long) *data++) << 24);
 367                 ins->oprs[c-064].segment |= SEG_32BIT;
 368             } else
 369                 ins->oprs[c-064].segment &= ~SEG_32BIT;
 370             ins->oprs[c-064].segment |= SEG_RELATIVE;
 371             if (segsize != osize) {
 372                 ins->oprs[c-064].type =
 373                     (ins->oprs[c-064].type & NON_SIZE)
 374                     | ((osize == 16) ? BITS16 : BITS32);
 375             }
 376         }
 377         if (c >= 070 && c <= 072) {
 378             ins->oprs[c-070].offset = *data++;
 379             ins->oprs[c-070].offset |= (((unsigned) *data++) << 8);
 380             ins->oprs[c-070].offset |= (((long) *data++) << 16);
 381             ins->oprs[c-070].offset |= (((long) *data++) << 24);
 382             ins->oprs[c-070].segment |= SEG_32BIT | SEG_RELATIVE;
 383         }
 384         if (c >= 0100 && c < 0130) {
 385             int modrm = *data++;
 386             ins->oprs[c & 07].basereg = (modrm >> 3) & 07;
 387             ins->oprs[c & 07].segment |= SEG_RMREG;
 388             data = do_ea (data, modrm, asize, segsize,
 389                           &ins->oprs[(c >> 3) & 07]);
 390         }
 391         if (c >= 0130 && c <= 0132) {
 392             ins->oprs[c-0130].offset = *data++;
 393             ins->oprs[c-0130].offset |= (((unsigned) *data++) << 8);
 394         }
 395         if (c >= 0140 && c <= 0142) {
 396             ins->oprs[c-0140].offset = *data++;
 397             ins->oprs[c-0140].offset |= (((unsigned) *data++) << 8);
 398             ins->oprs[c-0140].offset |= (((long) *data++) << 16);
 399             ins->oprs[c-0140].offset |= (((long) *data++) << 24);
 400         }
 401         if (c >= 0200 && c <= 0277) {
 402             int modrm = *data++;
 403             if (((modrm >> 3) & 07) != (c & 07))
 404                 return FALSE;          /* spare field doesn't match up */
 405             data = do_ea (data, modrm, asize, segsize,
 406                           &ins->oprs[(c >> 3) & 07]);
 407         }
 408         if (c >= 0300 && c <= 0302) {
 409             if (asize)
 410                 ins->oprs[c-0300].segment |= SEG_32BIT;
 411             else
 412                 ins->oprs[c-0300].segment &= ~SEG_32BIT;
 413             a_used = TRUE;
 414         }
 415         if (c == 0310) {
 416             if (asize == 32)
 417                 return FALSE;
 418             else
 419                 a_used = TRUE;
 420         }
 421         if (c == 0311) {
 422             if (asize == 16)
 423                 return FALSE;
 424             else
 425                 a_used = TRUE;
 426         }
 427         if (c == 0312) {
 428             if (asize != segsize)
 429                 return FALSE;
 430             else
 431                 a_used = TRUE;
 432         }
 433         if (c == 0320) {
 434             if (osize == 32)
 435                 return FALSE;
 436             else
 437                 o_used = TRUE;
 438         }
 439         if (c == 0321) {
 440             if (osize == 16)
 441                 return FALSE;
 442             else
 443                 o_used = TRUE;
 444         }
 445         if (c == 0322) {
 446             if (osize != segsize)
 447                 return FALSE;
 448             else
 449                 o_used = TRUE;
 450         }
 451         if (c == 0330) {
 452             int t = *r++, d = *data++;
 453             if (d < t || d > t+15)
 454                 return FALSE;
 455             else
 456                 ins->condition = d - t;
 457         }
 458         if (c == 0331) {
 459             if ( rep )
 460                 return FALSE;
 461         }
 462         if (c == 0332) {
 463             if (drep == P_REP)
 464                 drep = P_REPE;
 465         }
 466         if (c == 0333) {
 467             if ( rep != 0xF3 )
 468                 return FALSE;
 469             drep = 0;
 470         }
 471     }
 472
 473     /*
 474      * Check for unused rep or a/o prefixes.
 475      */
 476     ins->nprefix = 0;
 477     if (drep)
 478         ins->prefixes[ins->nprefix++] = drep;
 479     if (!a_used && asize != segsize)
 480         ins->prefixes[ins->nprefix++] = (asize == 16 ? P_A16 : P_A32);
 481     if (!o_used && osize != segsize)
 482         ins->prefixes[ins->nprefix++] = (osize == 16 ? P_O16 : P_O32);
 483
 484     return data - origdata;
 485 }
 486
 487 long disasm (unsigned char *data, char *output, int segsize, long offset,
 488              int autosync, unsigned long prefer)
 489 {
 490     struct itemplate **p, **best_p;
 491     int length, best_length = 0;
 492     char *segover;
 493     int rep, lock, asize, osize, i, slen, colon;
 494     unsigned char *origdata;
 495     int works;
 496     insn tmp_ins, ins;
 497     unsigned long goodness, best;
 498
 499     /*
 500      * Scan for prefixes.
 501      */
 502     asize = osize = segsize;
 503     segover = NULL;
 504     rep = lock = 0;
 505     origdata = data;
 506     for (;;) {
 507         if (*data == 0xF3 || *data == 0xF2)
 508             rep = *data++;
 509         else if (*data == 0xF0)
 510             lock = *data++;
 511         else if (*data == 0x2E || *data == 0x36 || *data == 0x3E ||
 512                  *data == 0x26 || *data == 0x64 || *data == 0x65) {
 513             switch (*data++) {
 514               case 0x2E: segover = "cs"; break;
 515               case 0x36: segover = "ss"; break;
 516               case 0x3E: segover = "ds"; break;
 517               case 0x26: segover = "es"; break;
 518               case 0x64: segover = "fs"; break;
 519               case 0x65: segover = "gs"; break;
 520             }
 521         } else if (*data == 0x66)
 522             osize = 48 - segsize, data++;
 523         else if (*data == 0x67)
 524             asize = 48 - segsize, data++;
 525         else
 526             break;
 527     }
 528
 529     tmp_ins.oprs[0].segment = tmp_ins.oprs[1].segment =
 530     tmp_ins.oprs[2].segment =
 531     tmp_ins.oprs[0].addr_size = tmp_ins.oprs[1].addr_size =
 532       tmp_ins.oprs[2].addr_size = (segsize == 16 ? 0 : SEG_32BIT);
 533     tmp_ins.condition = -1;
 534     best = ~0UL;                /* Worst possible */
 535     best_p = NULL;
 536     for (p = itable[*data]; *p; p++) {
 537       if ( (length = matches(*p, data, asize, osize,
 538                              segsize, rep, &tmp_ins)) ) {
 539         works = TRUE;
 540         /*
 541          * Final check to make sure the types of r/m match up.
 542          */
 543         for (i = 0; i < (*p)->operands; i++) {
 544           if (
 545               /* If it's a mem-only EA but we have a register, die. */
 546               ((tmp_ins.oprs[i].segment & SEG_RMREG) &&
 547                !(MEMORY & ~(*p)->opd[i])) ||
 548
 549               /* If it's a reg-only EA but we have a memory ref, die. */
 550               (!(tmp_ins.oprs[i].segment & SEG_RMREG) &&
 551                !(REGNORM & ~(*p)->opd[i]) &&
 552                !((*p)->opd[i] & REG_SMASK)) ||
 553
 554               /* Register type mismatch (eg FS vs REG_DESS): die. */
 555               ((((*p)->opd[i] & (REGISTER | FPUREG)) ||
 556                 (tmp_ins.oprs[i].segment & SEG_RMREG)) &&
 557                !whichreg ((*p)->opd[i], tmp_ins.oprs[i].basereg))) {
 558             works = FALSE;
 559             break;
 560           }
 561         }
 562
 563         if (works) {
 564           goodness = ((*p)->flags & IF_PFMASK) ^ prefer;
 565           if ( goodness < best ) {
 566             /* This is the best one found so far */
 567             best        = goodness;
 568             best_p      = p;
 569             best_length = length;
 570             ins         = tmp_ins;
 571           }
 572         }
 573       }
 574     }
 575
 576     if (!best_p)
 577         return 0;                      /* no instruction was matched */
 578
 579     /* Pick the best match */
 580     p      = best_p;
 581     length = best_length;
 582
 583     slen = 0;
 584
 585     if (lock)
 586         slen += sprintf(output+slen, "lock ");
 587     for (i = 0; i < ins.nprefix; i++)
 588         switch (ins.prefixes[i]) {
 589           case P_REP:   slen += sprintf(output+slen, "rep "); break;
 590           case P_REPE:  slen += sprintf(output+slen, "repe "); break;
 591           case P_REPNE: slen += sprintf(output+slen, "repne "); break;
 592           case P_A16:   slen += sprintf(output+slen, "a16 "); break;
 593           case P_A32:   slen += sprintf(output+slen, "a32 "); break;
 594           case P_O16:   slen += sprintf(output+slen, "o16 "); break;
 595           case P_O32:   slen += sprintf(output+slen, "o32 "); break;
 596         }
 597
 598     for (i = 0; i < elements(ico); i++)
 599         if ((*p)->opcode == ico[i]) {
 600             slen += sprintf(output+slen, "%s%s", icn[i],
 601                             whichcond(ins.condition));
 602             break;
 603         }
 604     if (i >= elements(ico))
 605         slen += sprintf(output+slen, "%s", insn_names[(*p)->opcode]);
 606     colon = FALSE;
 607     length += data - origdata;         /* fix up for prefixes */
 608     for (i=0; i<(*p)->operands; i++) {
 609         output[slen++] = (colon ? ':' : i==0 ? ' ' : ',');
 610
 611         if (ins.oprs[i].segment & SEG_RELATIVE) {
 612             ins.oprs[i].offset += offset + length;
 613             /*
 614              * sort out wraparound
 615              */
 616             if (!(ins.oprs[i].segment & SEG_32BIT))
 617                 ins.oprs[i].offset &= 0xFFFF;
 618             /*
 619              * add sync marker, if autosync is on
 620              */
 621             if (autosync)
 622                 add_sync (ins.oprs[i].offset, 0L);
 623         }
 624
 625         if ((*p)->opd[i] & COLON)
 626             colon = TRUE;
 627         else
 628             colon = FALSE;
 629
 630         if (((*p)->opd[i] & (REGISTER | FPUREG)) ||
 631             (ins.oprs[i].segment & SEG_RMREG))
 632         {
 633             ins.oprs[i].basereg = whichreg ((*p)->opd[i],
 634                                             ins.oprs[i].basereg);
 635             if ( (*p)->opd[i] & TO )
 636                 slen += sprintf(output+slen, "to ");
 637             slen += sprintf(output+slen, "%s",
 638                             reg_names[ins.oprs[i].basereg-EXPR_REG_START]);
 639         } else if (!(UNITY & ~(*p)->opd[i])) {
 640             output[slen++] = '1';
 641         } else if ( (*p)->opd[i] & IMMEDIATE ) {
 642             if ( (*p)->opd[i] & BITS8 ) {
 643                 slen += sprintf(output+slen, "byte ");
 644                 if (ins.oprs[i].segment & SEG_SIGNED) {
 645                     if (ins.oprs[i].offset < 0) {
 646                         ins.oprs[i].offset *= -1;
 647                         output[slen++] = '-';
 648                     } else
 649                         output[slen++] = '+';
 650                 }
 651             } else if ( (*p)->opd[i] & BITS16 ) {
 652                 slen += sprintf(output+slen, "word ");
 653             } else if ( (*p)->opd[i] & BITS32 ) {
 654                 slen += sprintf(output+slen, "dword ");
 655             } else if ( (*p)->opd[i] & NEAR ) {
 656                 slen += sprintf(output+slen, "near ");
 657             } else if ( (*p)->opd[i] & SHORT ) {
 658                 slen += sprintf(output+slen, "short ");
 659             }
 660             slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 661         } else if ( !(MEM_OFFS & ~(*p)->opd[i]) ) {
 662             slen += sprintf(output+slen, "[%s%s%s0x%lx]",
 663                             (segover ? segover : ""),
 664                             (segover ? ":" : ""),
 665                             (ins.oprs[i].addr_size == 32 ? "dword " :
 666                              ins.oprs[i].addr_size == 16 ? "word " : ""),
 667                             ins.oprs[i].offset);
 668             segover = NULL;
 669         } else if ( !(REGMEM & ~(*p)->opd[i]) ) {
 670             int started = FALSE;
 671             if ( (*p)->opd[i] & BITS8 )
 672                 slen += sprintf(output+slen, "byte ");
 673             if ( (*p)->opd[i] & BITS16 )
 674                 slen += sprintf(output+slen, "word ");
 675             if ( (*p)->opd[i] & BITS32 )
 676                 slen += sprintf(output+slen, "dword ");
 677             if ( (*p)->opd[i] & BITS64 )
 678                 slen += sprintf(output+slen, "qword ");
 679             if ( (*p)->opd[i] & BITS80 )
 680                 slen += sprintf(output+slen, "tword ");
 681             if ( (*p)->opd[i] & FAR )
 682                 slen += sprintf(output+slen, "far ");
 683             if ( (*p)->opd[i] & NEAR )
 684                 slen += sprintf(output+slen, "near ");
 685             output[slen++] = '[';
 686             if (ins.oprs[i].addr_size)
 687                 slen += sprintf(output+slen, "%s",
 688                                 (ins.oprs[i].addr_size == 32 ? "dword " :
 689                                  ins.oprs[i].addr_size == 16 ? "word " : ""));
 690             if (segover) {
 691                 slen += sprintf(output+slen, "%s:", segover);
 692                 segover = NULL;
 693             }
 694             if (ins.oprs[i].basereg != -1) {
 695                 slen += sprintf(output+slen, "%s",
 696                                 reg_names[(ins.oprs[i].basereg -
 697                                            EXPR_REG_START)]);
 698                 started = TRUE;
 699             }
 700             if (ins.oprs[i].indexreg != -1) {
 701                 if (started)
 702                     output[slen++] = '+';
 703                 slen += sprintf(output+slen, "%s",
 704                                 reg_names[(ins.oprs[i].indexreg -
 705                                            EXPR_REG_START)]);
 706                 if (ins.oprs[i].scale > 1)
 707                     slen += sprintf(output+slen, "*%d", ins.oprs[i].scale);
 708                 started = TRUE;
 709             }
 710             if (ins.oprs[i].segment & SEG_DISP8) {
 711                 int sign = '+';
 712                 if (ins.oprs[i].offset & 0x80) {
 713                     ins.oprs[i].offset = - (signed char) ins.oprs[i].offset;
 714                     sign = '-';
 715                 }
 716                 slen += sprintf(output+slen, "%c0x%lx", sign,
 717                                 ins.oprs[i].offset);
 718             } else if (ins.oprs[i].segment & SEG_DISP16) {
 719                 if (started)
 720                     output[slen++] = '+';
 721                 slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 722             } else if (ins.oprs[i].segment & SEG_DISP32) {
 723                 if (started)
 724                     output[slen++] = '+';
 725                 slen += sprintf(output+slen, "0x%lx", ins.oprs[i].offset);
 726             }
 727             output[slen++] = ']';
 728         } else {
 729             slen += sprintf(output+slen, "<operand%d>", i);
 730         }
 731     }
 732     output[slen] = '\0';
 733     if (segover) {                     /* unused segment override */
 734         char *p = output;
 735         int count = slen+1;
 736         while (count--)
 737             p[count+3] = p[count];
 738         strncpy (output, segover, 2);
 739         output[2] = ' ';
 740     }
 741     return length;
 742 }
 743
 744 long eatbyte (unsigned char *data, char *output)
 745 {
 746     sprintf(output, "db 0x%02X", *data);
 747     return 1;
 748 }