2 ## --------------------------------------------------------------------------
4 ## Copyright 1996-2010 The NASM Authors - All Rights Reserved
5 ## See the file AUTHORS included with the NASM distribution for
6 ## the specific copyright holders.
8 ## Redistribution and use in source and binary forms, with or without
9 ## modification, are permitted provided that the following
10 ## conditions are met:
12 ## * Redistributions of source code must retain the above copyright
13 ## notice, this list of conditions and the following disclaimer.
14 ## * Redistributions in binary form must reproduce the above
15 ## copyright notice, this list of conditions and the following
16 ## disclaimer in the documentation and/or other materials provided
17 ## with the distribution.
19 ## THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND
20 ## CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES,
21 ## INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
22 ## MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
23 ## DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
24 ## CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
25 ## SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 ## NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
27 ## LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 ## HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
29 ## CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
30 ## OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
31 ## EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 ## --------------------------------------------------------------------------
38 # Parse insns.dat and produce generated source code files
40 # Opcode prefixes which need their own opcode tables
41 # LONGER PREFIXES FIRST!
42 @disasm_prefixes = qw(0F24 0F25 0F38 0F3A 0F7A 0FA6 0FA7 0F);
44 # This should match MAX_OPERANDS from nasm.h
47 # Add VEX/XOP prefixes
48 @vex_class = ( 'vex', 'xop' );
49 $vex_classes = scalar(@vex_class);
52 for ($c = 0; $c < $vex_classes; $c++) {
53 $vexmap{$vex_class[$c]} = $c;
54 for ($m = 0; $m < 32; $m++) {
55 for ($p = 0; $p < 4; $p++) {
56 push(@vexlist, sprintf("%s%02X%01X", $vex_class[$c], $m, $p));
60 @disasm_prefixes = (@vexlist, @disasm_prefixes);
62 @bytecode_count = (0) x
256;
64 print STDERR
"Reading insns.dat...\n";
68 foreach $arg ( @ARGV ) {
69 if ( $arg =~ /^\-/ ) {
70 if ( $arg =~ /^\-([abdin])$/ ) {
73 die "$0: Unknown option: ${arg}\n";
80 $fname = "insns.dat" unless $fname = $args[0];
81 open (F
, $fname) || die "unable to open $fname";
91 next if ( /^\s*(\;.*|)$/ ); # comments or blank lines
93 unless (/^\s*(\S+)\s+(\S+)\s+(\S+|\[.*\])\s+(\S+)\s*$/) {
94 warn "line $line does not contain four fields\n";
97 @fields = ($1, $2, $3, $4);
98 @field_list = ([@fields, 0]);
100 if ($fields[1] =~ /\*/) {
101 # This instruction has relaxed form(s)
102 if ($fields[2] !~ /^\[/) {
103 warn "line $line has an * operand but uses raw bytecodes\n";
108 @ops = split(/,/, $fields[1]);
109 for ($oi = 0; $oi < scalar @ops; $oi++) {
110 if ($ops[$oi] =~ /\*$/) {
112 warn "line $line has a first operand with a *\n";
119 for ($oi = 1; $oi < (1 << scalar @ops); $oi++) {
120 if (($oi & ~$opmask) == 0) {
123 for ($oj = 0; $oj < scalar(@ops); $oj++) {
125 push(@xops, $ops[$oj]);
129 push(@field_list, [$fields[0], join(',', @xops),
130 $fields[2], $fields[3], $oi]);
135 foreach $fptr (@field_list) {
137 ($formatted, $nd) = format_insn
(@fields);
140 $aname = "aa_$fields[0]";
141 push @
$aname, $formatted;
143 if ( $fields[0] =~ /cc$/ ) {
144 # Conditional instruction
145 $k_opcodes_cc{$fields[0]}++;
147 # Unconditional instruction
148 $k_opcodes{$fields[0]}++;
150 if ($formatted && !$nd) {
151 push @big, $formatted;
152 my @sseq = startseq
($fields[2], $fields[4]);
154 if (!defined($dinstables{$i})) {
155 $dinstables{$i} = [];
157 push(@
{$dinstables{$i}}, $#big);
166 # Generate the bytecode array. At this point, @bytecode_list contains
167 # the full set of bytecodes.
170 # Sort by descending length
171 @bytecode_list = sort { scalar(@
$b) <=> scalar(@
$a) } @bytecode_list;
172 @bytecode_array = ();
175 foreach $bl (@bytecode_list) {
176 my $h = hexstr
(@
$bl);
177 next if (defined($bytecode_pos{$h}));
179 push(@bytecode_array, $bl);
181 $bytecode_pos{$h} = $bytecode_next;
186 undef @bytecode_list;
188 @opcodes = sort keys(%k_opcodes);
189 @opcodes_cc = sort keys(%k_opcodes_cc);
191 if ( !defined($output) || $output eq 'b') {
192 print STDERR
"Writing insnsb.c...\n";
196 print B
"/* This file auto-generated from insns.dat by insns.pl" .
197 " - don't edit it */\n\n";
199 print B
"#include \"nasm.h\"\n";
200 print B
"#include \"insns.h\"\n\n";
202 print B
"const uint8_t nasm_bytecodes[$bytecode_next] = {\n";
205 foreach $bl (@bytecode_array) {
206 printf B
" /* %5d */ ", $p;
217 print B
" * Bytecode frequencies (including reuse):\n";
219 for ($i = 0; $i < 32; $i++) {
221 for ($j = 0; $j < 256; $j += 32) {
222 print B
" |" if ($j);
223 printf B
" %3o:%4d", $i+$j, $bytecode_count[$i+$j];
232 if ( !defined($output) || $output eq 'a' ) {
233 print STDERR
"Writing insnsa.c...\n";
237 print A
"/* This file auto-generated from insns.dat by insns.pl" .
238 " - don't edit it */\n\n";
240 print A
"#include \"nasm.h\"\n";
241 print A
"#include \"insns.h\"\n\n";
243 foreach $i (@opcodes, @opcodes_cc) {
244 print A
"static const struct itemplate instrux_${i}[] = {\n";
246 foreach $j (@
$aname) {
247 print A
" ", codesubst
($j), "\n";
249 print A
" ITEMPLATE_END\n};\n\n";
251 print A
"const struct itemplate * const nasm_instructions[] = {\n";
252 foreach $i (@opcodes, @opcodes_cc) {
253 print A
" instrux_${i},\n";
260 if ( !defined($output) || $output eq 'd' ) {
261 print STDERR
"Writing insnsd.c...\n";
265 print D
"/* This file auto-generated from insns.dat by insns.pl" .
266 " - don't edit it */\n\n";
268 print D
"#include \"nasm.h\"\n";
269 print D
"#include \"insns.h\"\n\n";
271 print D
"static const struct itemplate instrux[] = {\n";
274 printf D
" /* %4d */ %s\n", $n++, codesubst
($j);
278 foreach $h (sort(keys(%dinstables))) {
279 next if ($h eq ''); # Skip pseudo-instructions
280 print D
"\nstatic const struct itemplate * const itable_${h}[] = {\n";
281 foreach $j (@
{$dinstables{$h}}) {
282 print D
" instrux + $j,\n";
288 foreach $h (@disasm_prefixes, '') {
289 for ($c = 0; $c < 256; $c++) {
290 $nn = sprintf("%s%02X", $h, $c);
291 if ($is_prefix{$nn} || defined($dinstables{$nn})) {
292 # At least one entry in this prefix table
293 push(@prefix_list, $h);
300 foreach $h (@prefix_list) {
302 print D
"static " unless ($h eq '');
303 print D
"const struct disasm_index ";
304 print D
($h eq '') ?
'itable' : "itable_$h";
305 print D
"[256] = {\n";
306 for ($c = 0; $c < 256; $c++) {
307 $nn = sprintf("%s%02X", $h, $c);
308 if ($is_prefix{$nn}) {
309 die "$fname: ambiguous decoding of $nn\n"
310 if (defined($dinstables{$nn}));
311 printf D
" /* 0x%02x */ { itable_%s, -1 },\n", $c, $nn;
312 } elsif (defined($dinstables{$nn})) {
313 printf D
" /* 0x%02x */ { itable_%s, %u },\n", $c,
314 $nn, scalar(@
{$dinstables{$nn}});
316 printf D
" /* 0x%02x */ { NULL, 0 },\n", $c;
322 printf D
"\nconst struct disasm_index * const itable_vex[%d][32][4] =\n",
325 for ($c = 0; $c < $vex_classes; $c++) {
327 for ($m = 0; $m < 32; $m++) {
329 for ($p = 0; $p < 4; $p++) {
330 $vp = sprintf("%s%02X%01X", $vex_class[$c], $m, $p);
332 ($is_prefix{$vp} ?
sprintf("itable_%s,", $vp) : 'NULL,');
343 if ( !defined($output) || $output eq 'i' ) {
344 print STDERR
"Writing insnsi.h...\n";
348 print I
"/* This file is auto-generated from insns.dat by insns.pl" .
349 " - don't edit it */\n\n";
350 print I
"/* This file in included by nasm.h */\n\n";
352 print I
"/* Instruction names */\n\n";
353 print I
"#ifndef NASM_INSNSI_H\n";
354 print I
"#define NASM_INSNSI_H 1\n\n";
355 print I
"enum opcode {\n";
357 foreach $i (@opcodes, @opcodes_cc) {
358 print I
"\tI_${i},\n";
360 $len++ if ( $i =~ /cc$/ ); # Condition codes can be 3 characters long
361 $maxlen = $len if ( $len > $maxlen );
363 print I
"\tI_none = -1\n";
365 print I
"#define MAX_INSLEN ", $maxlen, "\n";
366 print I
"#define FIRST_COND_OPCODE I_", $opcodes_cc[0], "\n\n";
367 print I
"#endif /* NASM_INSNSI_H */\n";
372 if ( !defined($output) || $output eq 'n' ) {
373 print STDERR
"Writing insnsn.c...\n";
377 print N
"/* This file is auto-generated from insns.dat by insns.pl" .
378 " - don't edit it */\n\n";
379 print N
"#include \"tables.h\"\n\n";
381 print N
"const char * const nasm_insn_names[] = {";
383 foreach $i (@opcodes, @opcodes_cc) {
384 print N
"," if ( !$first );
387 $ilower =~ s/cc$//; # Remove conditional cc suffix
388 $ilower =~ tr/A-Z/a-z/; # Change to lower case (Perl 4 compatible)
389 print N
"\n\t\"${ilower}\"";
395 printf STDERR
"Done: %d instructions\n", $insns;
397 # Count primary bytecodes, for statistics
398 sub count_bytecodes
(@
) {
400 foreach my $bc (@_) {
405 $bytecode_count[$bc]++;
406 if ($bc >= 01 && $bc <= 04) {
408 } elsif (($bc & ~03) == 010) {
410 } elsif (($bc & ~013) == 0144) {
412 } elsif ($bc == 0172) {
414 } elsif ($bc >= 0260 && $bc <= 0270) {
416 } elsif ($bc == 0330) {
422 sub format_insn
($$$$$) {
423 my ($opcode, $operands, $codes, $flags, $relax) = @_;
426 my $op, @ops, $opp, @opx, @oppx;
428 return (undef, undef) if $operands eq "ignore";
430 # format the operands
431 $operands =~ s/\*//g;
432 $operands =~ s/:/|colon,/g;
434 if ($operands ne 'void') {
435 foreach $op (split(/,/, $operands)) {
436 if ($op =~ /^\=([0-9]+)$/) {
440 foreach $opp (split(/\|/, $op)) {
442 if ($opp =~ /^(.*[^\d])(8|16|32|64|80|128|256)$/) {
445 if ($ox !~ /^(sbyte|sdword|udword)$/) {
447 push(@oppx, "bits$on");
450 $opp =~ s/^mem$/memory/;
451 $opp =~ s/^memory_offs$/mem_offs/;
452 $opp =~ s/^imm$/immediate/;
453 $opp =~ s/^([a-z]+)rm$/rm_$1/;
454 $opp =~ s/^rm$/rm_gpr/;
455 $opp =~ s/^reg$/reg_gpr/;
456 push(@opx, $opp, @oppx);
458 $op = join('|', @opx);
465 while (scalar(@ops) < $MAX_OPERANDS) {
468 $operands = join(',', @ops);
469 $operands =~ tr/a-z/A-Z/;
472 $flags =~ s/,/|IF_/g;
473 $flags =~ s/(\|IF_ND|IF_ND\|)//, $nd = 1 if $flags =~ /IF_ND/;
474 $flags = "IF_" . $flags;
476 @bytecode = (decodify
($codes, $relax), 0);
477 push(@bytecode_list, [@bytecode]);
478 $codes = hexstr
(@bytecode);
479 count_bytecodes
(@bytecode);
481 ("{I_$opcode, $num, {$operands}, \@\@CODES-$codes\@\@, $flags},", $nd);
485 # Look for @@CODES-xxx@@ sequences and replace them with the appropriate
486 # offset into nasm_bytecodes
492 while ($s =~ /\@\@CODES-([0-9A-F]+)\@\@/) {
493 my $pos = $bytecode_pos{$1};
494 if (!defined($pos)) {
495 die "$fname: no position assigned to byte code $1\n";
497 $s = $` . "nasm_bytecodes+${pos}" . "$'";
503 my ($prefix, @list) = @_;
508 push(@l, sprintf("%s%02X", $prefix, $x));
515 # Turn a code string into a sequence of bytes
518 # Although these are C-syntax strings, by convention they should have
519 # only octal escapes (for directives) and hexadecimal escapes
520 # (for verbatim bytes)
521 my($codestr, $relax) = @_;
523 if ($codestr =~ /^\s*\[([^\]]*)\]\s*$/) {
524 return byte_code_compile($1, $relax);
531 if ($c =~ /^\\x([0-9a-f]+)(.*)$/i) {
532 push(@codes, hex $1);
535 } elsif ($c =~ /^\\([0-7]{1,3})(.*)$/) {
536 push(@codes, oct $1);
540 die "$fname: unknown code format in \"$codestr\"\n";
547 # Turn a numeric list into a hex string
553 $s .= sprintf("%02X", $c);
558 # Here we determine the range of possible starting bytes for a given
559 # instruction. We need only consider the codes:
560 # \[1234] mean literal bytes, of course
561 # \1[0123] mean byte plus register value
562 # \330 means byte plus condition code
563 # \0 or \340 mean give up and return empty set
564 # \34[4567] mean PUSH/POP of segment registers: special case
565 # \17[234] skip is4 control byte
566 # \26x \270 skip VEX control bytes
568 my ($codestr, $relax) = @_;
575 @codes = decodify($codestr, $relax);
577 while ($c0 = shift(@codes)) {
579 if ($c0 >= 01 && $c0 <= 04) {
583 if ($c0 >= 01 && $c0 <= 04) {
585 $fbs .= sprintf("%02X", shift(@codes));
593 foreach $pfx (@disasm_prefixes) {
594 if (substr($fbs, 0, length($pfx)) eq $pfx) {
596 $fbs = substr($fbs, length($pfx));
602 return ($prefix.substr($fbs,0,2));
605 unshift(@codes, $c0);
606 } elsif ($c0 >= 010 && $c0 <= 013) {
607 return addprefix($prefix, $c1..($c1+7));
608 } elsif (($c0 & ~013) == 0144) {
609 return addprefix($prefix, $c1, $c1|2);
610 } elsif ($c0 == 0330) {
611 return addprefix($prefix, $c1..($c1+15));
612 } elsif ($c0 == 0 || $c0 == 0340) {
614 } elsif ($c0 == 0344) {
615 return addprefix($prefix, 0x06, 0x0E, 0x16, 0x1E);
616 } elsif ($c0 == 0345) {
617 return addprefix($prefix, 0x07, 0x17, 0x1F);
618 } elsif ($c0 == 0346) {
619 return addprefix($prefix, 0xA0, 0xA8);
620 } elsif ($c0 == 0347) {
621 return addprefix($prefix, 0xA1, 0xA9);
622 } elsif (($c0 & ~3) == 0260 || $c0 == 0270) {
625 $wlp = shift(@codes);
628 $prefix .= sprintf('%s%02X%01X', $vex_class[$c], $m, $wlp & 3);
629 } elsif ($c0 >= 0172 && $c0 <= 174) {
630 shift(@codes); # Skip is4 control byte
632 # We really need to be able to distinguish "forbidden"
633 # and "ignorable" codes here
640 # This function takes a series of byte codes in a format which is more
641 # typical of the Intel documentation, and encode it.
643 # The format looks like:
645 # [operands: opcodes]
647 # The operands word lists the order of the operands:
649 # r = register field in the modr/m
652 # d = DREX "dst" field
654 # s = register field of is4/imz2 field
655 # - = implicit (unencoded) operand
657 # For an operand that should be filled into more than one field,
658 # enter it as e.g. "r+v".
660 sub byte_code_compile($$) {
661 my($str, $relax) = @_;
671 unless ($str =~ /^(([^\s:]*)\:|)\s*(.*\S)\s*$/) {
672 die "$fname: $line: cannot parse: [$str]\n";
678 for ($i = 0; $i < length($opr); $i++) {
679 my $c = substr($opr,$i,1);
692 foreach $op (split(/\s*(?:\s|(?=[\/\\]))/, $opc)) {
695 } elsif ($op eq 'o32') {
697 } elsif ($op eq 'o64') { # 64-bit operand size requiring REX.W
699 } elsif ($op eq 'o64nw') { # Implied 64-bit operand size (no REX.W)
701 } elsif ($op eq 'a16') {
703 } elsif ($op eq 'a32') {
705 } elsif ($op eq 'a64') {
707 } elsif ($op eq '!osp') {
709 } elsif ($op eq '!asp') {
711 } elsif ($op eq 'rex.l') {
713 } elsif ($op eq 'repe') {
715 } elsif ($op eq 'nohi') { # Use spl/bpl/sil/dil even without REX
717 } elsif ($op eq 'vsibx' || $op eq 'vm32x' || $op eq 'vm64x') {
718 # This instruction takes XMM VSIB
720 } elsif ($op eq 'vsiby' || $op eq 'vm32y' || $op eq 'vm64y') {
722 } elsif ($prefix_ok && $op =~ /^(66|f2|f3|np)$/) {
723 # 66/F2/F3 prefix used as an opcode extension, or np = no prefix
726 } elsif ($op eq 'f2') {
728 } elsif ($op eq 'f3') {
733 } elsif ($op =~ /^[0-9a-f]{2}$/) {
734 if (defined($litix) && $litix+$codes[$litix]+1 == scalar @codes &&
735 $codes[$litix] < 4) {
737 push(@codes, hex $op);
739 $litix = scalar(@codes);
740 push(@codes, 01, hex $op);
743 } elsif ($op eq '/r') {
744 if (!defined($oppos{'r'}) || !defined($oppos{'m'})) {
745 die "$fname: $line: $op requires r and m operands\n";
747 $opex = (($oppos{'m'} & 4) ? 06 : 0) |
748 (($oppos{'r'} & 4) ? 05 : 0);
749 push(@codes, $opex) if ($opex);
750 push(@codes, 0100 + (($oppos{'m'} & 3) << 3) + ($oppos{'r'} & 3));
752 } elsif ($op =~ m:^/([0-7])$:) {
753 if (!defined($oppos{'m'})) {
754 die "$fname: $line: $op requires m operand\n";
756 push(@codes, 06) if ($oppos{'m'} & 4);
757 push(@codes, 0200 + (($oppos{'m'} & 3) << 3) + $1);
759 } elsif ($op =~ /^(vex|xop)(|\..*)$/) {
761 my ($m,$w,$l,$p) = (undef,2,undef,0);
763 my @subops = split(/\./, $op);
764 shift @subops; # Drop prefix
765 foreach $oq (@subops) {
766 if ($oq eq '128' || $oq eq 'l0' || $oq eq 'lz') {
768 } elsif ($oq eq '256' || $oq eq 'l1') {
770 } elsif ($oq eq 'lig') {
772 } elsif ($oq eq 'w0') {
774 } elsif ($oq eq 'w1') {
776 } elsif ($oq eq 'wig') {
778 } elsif ($oq eq 'ww') {
780 } elsif ($oq eq 'p0') {
782 } elsif ($oq eq '66' || $oq eq 'p1') {
784 } elsif ($oq eq 'f3' || $oq eq 'p2') {
786 } elsif ($oq eq 'f2' || $oq eq 'p3') {
788 } elsif ($oq eq '0f') {
790 } elsif ($oq eq '0f38') {
792 } elsif ($oq eq '0f3a') {
794 } elsif ($oq =~ /^m([0-9]+)$/) {
796 } elsif ($oq eq 'nds' || $oq eq 'ndd' || $oq eq 'dds') {
797 if (!defined($oppos{'v'})) {
798 die "$fname: $line: vex.$oq without 'v' operand\n";
802 die "$fname: $line: undefined VEX subcode: $oq\n";
805 if (!defined($m) || !defined($w) || !defined($l) || !defined($p)) {
806 die "$fname: $line: missing fields in VEX specification\n";
808 if (defined($oppos{'v'}) && !$has_nds) {
809 die "$fname: $line: 'v' operand without vex.nds or vex.ndd\n";
811 push(@codes, defined($oppos{'v'}) ? 0260+($oppos{'v'} & 3) : 0270,
812 ($c << 6)+$m, ($w << 4)+($l << 2)+$p);
814 } elsif ($op =~ /^\/drex([01])$/) {
816 if (!defined($oppos{'d'})) {
817 die "$fname: $line: DREX without a 'd' operand\n";
819 # Note the use of *unshift* here, as opposed to *push*.
820 # This is because NASM want this byte code at the start of
821 # the instruction sequence, but the AMD documentation puts
822 # this at (roughly) the position of the drex byte itself.
823 # This allows us to match the AMD documentation and still
824 # do the right thing.
825 unshift(@codes, 0160+($oppos{'d'} & 3)+($oc0 ? 4 : 0));
826 unshift(@codes, 05) if ($oppos{'d'} & 4);
827 } elsif ($op =~ /^(ib\,s|ib|ibx|ib\,w|iw|iwd|id|idx|iwdq|rel|rel8|rel16|rel32|iq|seg|ibw|ibd|ibd,s)$/) {
828 if (!defined($oppos{'i'})) {
829 die "$fname: $line: $op without 'i' operand\n";
831 if ($op eq 'ib,s') { # Signed imm8
832 push(@codes, 05) if ($oppos{'i'} & 4);
833 push(@codes, 014+($oppos{'i'} & 3));
834 } elsif ($op eq 'ib') { # imm8
835 push(@codes, 05) if ($oppos{'i'} & 4);
836 push(@codes, 020+($oppos{'i'} & 3));
837 } elsif ($op eq 'ib,u') { # Unsigned imm8
838 push(@codes, 05) if ($oppos{'i'} & 4);
839 push(@codes, 024+($oppos{'i'} & 3));
840 } elsif ($op eq 'iw') { # imm16
841 push(@codes, 05) if ($oppos{'i'} & 4);
842 push(@codes, 030+($oppos{'i'} & 3));
843 } elsif ($op eq 'ibx') { # imm8 sign-extended to opsize
844 push(@codes, 05) if ($oppos{'i'} & 4);
845 push(@codes, 0274+($oppos{'i'} & 3));
846 } elsif ($op eq 'iwd') { # imm16 or imm32, depending on opsize
847 push(@codes, 05) if ($oppos{'i'} & 4);
848 push(@codes, 034+($oppos{'i'} & 3));
849 } elsif ($op eq 'id') { # imm32
850 push(@codes, 05) if ($oppos{'i'} & 4);
851 push(@codes, 040+($oppos{'i'} & 3));
852 } elsif ($op eq 'idx') { # imm32 extended to 64 bits
853 push(@codes, 05) if ($oppos{'i'} & 4);
854 push(@codes, 0254+($oppos{'i'} & 3));
855 } elsif ($op eq 'iwdq') { # imm16/32/64, depending on opsize
856 push(@codes, 05) if ($oppos{'i'} & 4);
857 push(@codes, 044+($oppos{'i'} & 3));
858 } elsif ($op eq 'rel8') {
859 push(@codes, 05) if ($oppos{'i'} & 4);
860 push(@codes, 050+($oppos{'i'} & 3));
861 } elsif ($op eq 'iq') {
862 push(@codes, 05) if ($oppos{'i'} & 4);
863 push(@codes, 054+($oppos{'i'} & 3));
864 } elsif ($op eq 'rel16') {
865 push(@codes, 05) if ($oppos{'i'} & 4);
866 push(@codes, 060+($oppos{'i'} & 3));
867 } elsif ($op eq 'rel') { # 16 or 32 bit relative operand
868 push(@codes, 05) if ($oppos{'i'} & 4);
869 push(@codes, 064+($oppos{'i'} & 3));
870 } elsif ($op eq 'rel32') {
871 push(@codes, 05) if ($oppos{'i'} & 4);
872 push(@codes, 070+($oppos{'i'} & 3));
873 } elsif ($op eq 'seg') {
874 push(@codes, 05) if ($oppos{'i'} & 4);
875 push(@codes, 074+($oppos{'i'} & 3));
876 } elsif ($op eq 'ibw') { # imm16 that can be bytified
877 if (!defined($s_pos)) {
878 die "$fname: $line: $op without a +s byte\n";
880 $codes[$s_pos] += 0144;
881 push(@codes, 05) if ($oppos{'i'} & 4);
882 push(@codes, 0140+($oppos{'i'} & 3));
883 } elsif ($op eq 'ibd') { # imm32 that can be bytified
884 if (!defined($s_pos)) {
885 die "$fname: $line: $op without a +s byte\n";
887 $codes[$s_pos] += 0154;
888 push(@codes, 05) if ($oppos{'i'} & 4);
889 push(@codes, 0150+($oppos{'i'} & 3));
890 } elsif ($op eq 'ibd,s') {
891 # imm32 that can be bytified, sign extended to 64 bits
892 if (!defined($s_pos)) {
893 die "$fname: $line: $op without a +s byte\n";
895 $codes[$s_pos] += 0154;
896 push(@codes, 05) if ($oppos{'i'} & 4);
897 push(@codes, 0250+($oppos{'i'} & 3));
900 } elsif ($op eq '/is4') {
901 if (!defined($oppos{'s'})) {
902 die "$fname: $line: $op without 's' operand\n";
904 if (defined($oppos{'i'})) {
905 push(@codes, 0172, ($oppos{'s'} << 3)+$oppos{'i'});
907 push(@codes, 0174, $oppos{'s'});
910 } elsif ($op =~ /^\/is4\=([0-9]+)$/) {
912 if (!defined($oppos{'s'})) {
913 die "$fname: $line: $op without 's' operand\n";
915 if ($imm < 0 || $imm > 15) {
916 die "$fname: $line: invalid imm4 value for $op: $imm\n";
918 push(@codes, 0173, ($oppos{'s'} << 4) + $imm);
920 } elsif ($op =~ /^([0-9a-f]{2})\+s$/) {
921 if (!defined($oppos{'i'})) {
922 die "$fname: $line: $op without 'i' operand\n";
924 $s_pos = scalar @codes;
925 push(@codes, 05) if ($oppos{'i'} & 4);
926 push(@codes, $oppos{'i'} & 3, hex $1);
928 } elsif ($op =~ /^([0-9a-f]{2})\+c$/) {
929 push(@codes, 0330, hex $1);
931 } elsif ($op =~ /^\\([0-7]+|x[0-9a-f]{2})$/) {
932 # Escape to enter literal bytecodes
933 push(@codes, oct $1);
935 die "$fname: $line: unknown operation: $op\n";