5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
28 * This program is free software; you can redistribute it and/or modify
29 * it under the terms of the GNU General Public License version 2 as
30 * published by the Free Software Foundation.
34 #include <linux/module.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/err.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/nand.h>
43 #include <linux/mtd/nand_ecc.h>
44 #include <linux/mtd/compatmac.h>
45 #include <linux/interrupt.h>
46 #include <linux/bitops.h>
47 #include <linux/leds.h>
50 #ifdef CONFIG_MTD_PARTITIONS
51 #include <linux/mtd/partitions.h>
54 /* Define default oob placement schemes for large and small page devices */
55 static struct nand_ecclayout nand_oob_8
= {
65 static struct nand_ecclayout nand_oob_16
= {
67 .eccpos
= {0, 1, 2, 3, 6, 7},
73 static struct nand_ecclayout nand_oob_64
= {
76 40, 41, 42, 43, 44, 45, 46, 47,
77 48, 49, 50, 51, 52, 53, 54, 55,
78 56, 57, 58, 59, 60, 61, 62, 63},
84 static int nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
,
87 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
88 struct mtd_oob_ops
*ops
);
91 * For devices which display every fart in the system on a seperate LED. Is
92 * compiled away when LED support is disabled.
94 DEFINE_LED_TRIGGER(nand_led_trigger
);
97 * nand_release_device - [GENERIC] release chip
98 * @mtd: MTD device structure
100 * Deselect, release chip lock and wake up anyone waiting on the device
102 static void nand_release_device(struct mtd_info
*mtd
)
104 struct nand_chip
*chip
= mtd
->priv
;
106 /* De-select the NAND device */
107 chip
->select_chip(mtd
, -1);
109 /* Release the controller and the chip */
110 spin_lock(&chip
->controller
->lock
);
111 chip
->controller
->active
= NULL
;
112 chip
->state
= FL_READY
;
113 wake_up(&chip
->controller
->wq
);
114 spin_unlock(&chip
->controller
->lock
);
118 * nand_read_byte - [DEFAULT] read one byte from the chip
119 * @mtd: MTD device structure
121 * Default read function for 8bit buswith
123 static uint8_t nand_read_byte(struct mtd_info
*mtd
)
125 struct nand_chip
*chip
= mtd
->priv
;
126 return readb(chip
->IO_ADDR_R
);
130 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
131 * @mtd: MTD device structure
133 * Default read function for 16bit buswith with
134 * endianess conversion
136 static uint8_t nand_read_byte16(struct mtd_info
*mtd
)
138 struct nand_chip
*chip
= mtd
->priv
;
139 return (uint8_t) cpu_to_le16(readw(chip
->IO_ADDR_R
));
143 * nand_read_word - [DEFAULT] read one word from the chip
144 * @mtd: MTD device structure
146 * Default read function for 16bit buswith without
147 * endianess conversion
149 static u16
nand_read_word(struct mtd_info
*mtd
)
151 struct nand_chip
*chip
= mtd
->priv
;
152 return readw(chip
->IO_ADDR_R
);
156 * nand_select_chip - [DEFAULT] control CE line
157 * @mtd: MTD device structure
158 * @chipnr: chipnumber to select, -1 for deselect
160 * Default select function for 1 chip devices.
162 static void nand_select_chip(struct mtd_info
*mtd
, int chipnr
)
164 struct nand_chip
*chip
= mtd
->priv
;
168 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
179 * nand_write_buf - [DEFAULT] write buffer to chip
180 * @mtd: MTD device structure
182 * @len: number of bytes to write
184 * Default write function for 8bit buswith
186 static void nand_write_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
189 struct nand_chip
*chip
= mtd
->priv
;
191 for (i
= 0; i
< len
; i
++)
192 writeb(buf
[i
], chip
->IO_ADDR_W
);
196 * nand_read_buf - [DEFAULT] read chip data into buffer
197 * @mtd: MTD device structure
198 * @buf: buffer to store date
199 * @len: number of bytes to read
201 * Default read function for 8bit buswith
203 static void nand_read_buf(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
206 struct nand_chip
*chip
= mtd
->priv
;
208 for (i
= 0; i
< len
; i
++)
209 buf
[i
] = readb(chip
->IO_ADDR_R
);
213 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
214 * @mtd: MTD device structure
215 * @buf: buffer containing the data to compare
216 * @len: number of bytes to compare
218 * Default verify function for 8bit buswith
220 static int nand_verify_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
223 struct nand_chip
*chip
= mtd
->priv
;
225 for (i
= 0; i
< len
; i
++)
226 if (buf
[i
] != readb(chip
->IO_ADDR_R
))
232 * nand_write_buf16 - [DEFAULT] write buffer to chip
233 * @mtd: MTD device structure
235 * @len: number of bytes to write
237 * Default write function for 16bit buswith
239 static void nand_write_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
242 struct nand_chip
*chip
= mtd
->priv
;
243 u16
*p
= (u16
*) buf
;
246 for (i
= 0; i
< len
; i
++)
247 writew(p
[i
], chip
->IO_ADDR_W
);
252 * nand_read_buf16 - [DEFAULT] read chip data into buffer
253 * @mtd: MTD device structure
254 * @buf: buffer to store date
255 * @len: number of bytes to read
257 * Default read function for 16bit buswith
259 static void nand_read_buf16(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
262 struct nand_chip
*chip
= mtd
->priv
;
263 u16
*p
= (u16
*) buf
;
266 for (i
= 0; i
< len
; i
++)
267 p
[i
] = readw(chip
->IO_ADDR_R
);
271 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
272 * @mtd: MTD device structure
273 * @buf: buffer containing the data to compare
274 * @len: number of bytes to compare
276 * Default verify function for 16bit buswith
278 static int nand_verify_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
281 struct nand_chip
*chip
= mtd
->priv
;
282 u16
*p
= (u16
*) buf
;
285 for (i
= 0; i
< len
; i
++)
286 if (p
[i
] != readw(chip
->IO_ADDR_R
))
293 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
294 * @mtd: MTD device structure
295 * @ofs: offset from device start
296 * @getchip: 0, if the chip is already selected
298 * Check, if the block is bad.
300 static int nand_block_bad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
)
302 int page
, chipnr
, res
= 0;
303 struct nand_chip
*chip
= mtd
->priv
;
306 page
= (int)(ofs
>> chip
->page_shift
) & chip
->pagemask
;
309 chipnr
= (int)(ofs
>> chip
->chip_shift
);
311 nand_get_device(chip
, mtd
, FL_READING
);
313 /* Select the NAND device */
314 chip
->select_chip(mtd
, chipnr
);
317 if (chip
->options
& NAND_BUSWIDTH_16
) {
318 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
& 0xFE,
320 bad
= cpu_to_le16(chip
->read_word(mtd
));
321 if (chip
->badblockpos
& 0x1)
323 if ((bad
& 0xFF) != 0xff)
326 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
, page
);
327 if (chip
->read_byte(mtd
) != 0xff)
332 nand_release_device(mtd
);
338 * nand_default_block_markbad - [DEFAULT] mark a block bad
339 * @mtd: MTD device structure
340 * @ofs: offset from device start
342 * This is the default implementation, which can be overridden by
343 * a hardware specific driver.
345 static int nand_default_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
347 struct nand_chip
*chip
= mtd
->priv
;
348 uint8_t buf
[2] = { 0, 0 };
351 /* Get block number */
352 block
= (int)(ofs
>> chip
->bbt_erase_shift
);
354 chip
->bbt
[block
>> 2] |= 0x01 << ((block
& 0x03) << 1);
356 /* Do we have a flash based bad block table ? */
357 if (chip
->options
& NAND_USE_FLASH_BBT
)
358 ret
= nand_update_bbt(mtd
, ofs
);
360 /* We write two bytes, so we dont have to mess with 16 bit
364 chip
->ops
.len
= chip
->ops
.ooblen
= 2;
365 chip
->ops
.datbuf
= NULL
;
366 chip
->ops
.oobbuf
= buf
;
367 chip
->ops
.ooboffs
= chip
->badblockpos
& ~0x01;
369 ret
= nand_do_write_oob(mtd
, ofs
, &chip
->ops
);
372 mtd
->ecc_stats
.badblocks
++;
377 * nand_check_wp - [GENERIC] check if the chip is write protected
378 * @mtd: MTD device structure
379 * Check, if the device is write protected
381 * The function expects, that the device is already selected
383 static int nand_check_wp(struct mtd_info
*mtd
)
385 struct nand_chip
*chip
= mtd
->priv
;
386 /* Check the WP bit */
387 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
388 return (chip
->read_byte(mtd
) & NAND_STATUS_WP
) ? 0 : 1;
392 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
393 * @mtd: MTD device structure
394 * @ofs: offset from device start
395 * @getchip: 0, if the chip is already selected
396 * @allowbbt: 1, if its allowed to access the bbt area
398 * Check, if the block is bad. Either by reading the bad block table or
399 * calling of the scan function.
401 static int nand_block_checkbad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
,
404 struct nand_chip
*chip
= mtd
->priv
;
407 return chip
->block_bad(mtd
, ofs
, getchip
);
409 /* Return info from the table */
410 return nand_isbad_bbt(mtd
, ofs
, allowbbt
);
414 * Wait for the ready pin, after a command
415 * The timeout is catched later.
417 void nand_wait_ready(struct mtd_info
*mtd
)
419 struct nand_chip
*chip
= mtd
->priv
;
420 unsigned long timeo
= jiffies
+ 2;
422 led_trigger_event(nand_led_trigger
, LED_FULL
);
423 /* wait until command is processed or timeout occures */
425 if (chip
->dev_ready(mtd
))
427 touch_softlockup_watchdog();
428 } while (time_before(jiffies
, timeo
));
429 led_trigger_event(nand_led_trigger
, LED_OFF
);
431 EXPORT_SYMBOL_GPL(nand_wait_ready
);
434 * nand_command - [DEFAULT] Send command to NAND device
435 * @mtd: MTD device structure
436 * @command: the command to be sent
437 * @column: the column address for this command, -1 if none
438 * @page_addr: the page address for this command, -1 if none
440 * Send command to NAND device. This function is used for small page
441 * devices (256/512 Bytes per page)
443 static void nand_command(struct mtd_info
*mtd
, unsigned int command
,
444 int column
, int page_addr
)
446 register struct nand_chip
*chip
= mtd
->priv
;
447 int ctrl
= NAND_CTRL_CLE
| NAND_CTRL_CHANGE
;
450 * Write out the command to the device.
452 if (command
== NAND_CMD_SEQIN
) {
455 if (column
>= mtd
->writesize
) {
457 column
-= mtd
->writesize
;
458 readcmd
= NAND_CMD_READOOB
;
459 } else if (column
< 256) {
460 /* First 256 bytes --> READ0 */
461 readcmd
= NAND_CMD_READ0
;
464 readcmd
= NAND_CMD_READ1
;
466 chip
->cmd_ctrl(mtd
, readcmd
, ctrl
);
467 ctrl
&= ~NAND_CTRL_CHANGE
;
469 chip
->cmd_ctrl(mtd
, command
, ctrl
);
472 * Address cycle, when necessary
474 ctrl
= NAND_CTRL_ALE
| NAND_CTRL_CHANGE
;
475 /* Serially input address */
477 /* Adjust columns for 16 bit buswidth */
478 if (chip
->options
& NAND_BUSWIDTH_16
)
480 chip
->cmd_ctrl(mtd
, column
, ctrl
);
481 ctrl
&= ~NAND_CTRL_CHANGE
;
483 if (page_addr
!= -1) {
484 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
485 ctrl
&= ~NAND_CTRL_CHANGE
;
486 chip
->cmd_ctrl(mtd
, page_addr
>> 8, ctrl
);
487 /* One more address cycle for devices > 32MiB */
488 if (chip
->chipsize
> (32 << 20))
489 chip
->cmd_ctrl(mtd
, page_addr
>> 16, ctrl
);
491 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
494 * program and erase have their own busy handlers
495 * status and sequential in needs no delay
499 case NAND_CMD_PAGEPROG
:
500 case NAND_CMD_ERASE1
:
501 case NAND_CMD_ERASE2
:
503 case NAND_CMD_STATUS
:
509 udelay(chip
->chip_delay
);
510 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
511 NAND_CTRL_CLE
| NAND_CTRL_CHANGE
);
513 NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
514 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
517 /* This applies to read commands */
520 * If we don't have access to the busy pin, we apply the given
523 if (!chip
->dev_ready
) {
524 udelay(chip
->chip_delay
);
528 /* Apply this short delay always to ensure that we do wait tWB in
529 * any case on any machine. */
532 nand_wait_ready(mtd
);
536 * nand_command_lp - [DEFAULT] Send command to NAND large page device
537 * @mtd: MTD device structure
538 * @command: the command to be sent
539 * @column: the column address for this command, -1 if none
540 * @page_addr: the page address for this command, -1 if none
542 * Send command to NAND device. This is the version for the new large page
543 * devices We dont have the separate regions as we have in the small page
544 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
546 static void nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
547 int column
, int page_addr
)
549 register struct nand_chip
*chip
= mtd
->priv
;
551 /* Emulate NAND_CMD_READOOB */
552 if (command
== NAND_CMD_READOOB
) {
553 column
+= mtd
->writesize
;
554 command
= NAND_CMD_READ0
;
557 /* Command latch cycle */
558 chip
->cmd_ctrl(mtd
, command
& 0xff,
559 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
561 if (column
!= -1 || page_addr
!= -1) {
562 int ctrl
= NAND_CTRL_CHANGE
| NAND_NCE
| NAND_ALE
;
564 /* Serially input address */
566 /* Adjust columns for 16 bit buswidth */
567 if (chip
->options
& NAND_BUSWIDTH_16
)
569 chip
->cmd_ctrl(mtd
, column
, ctrl
);
570 ctrl
&= ~NAND_CTRL_CHANGE
;
571 chip
->cmd_ctrl(mtd
, column
>> 8, ctrl
);
573 if (page_addr
!= -1) {
574 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
575 chip
->cmd_ctrl(mtd
, page_addr
>> 8,
576 NAND_NCE
| NAND_ALE
);
577 /* One more address cycle for devices > 128MiB */
578 if (chip
->chipsize
> (128 << 20))
579 chip
->cmd_ctrl(mtd
, page_addr
>> 16,
580 NAND_NCE
| NAND_ALE
);
583 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
586 * program and erase have their own busy handlers
587 * status, sequential in, and deplete1 need no delay
591 case NAND_CMD_CACHEDPROG
:
592 case NAND_CMD_PAGEPROG
:
593 case NAND_CMD_ERASE1
:
594 case NAND_CMD_ERASE2
:
597 case NAND_CMD_STATUS
:
598 case NAND_CMD_DEPLETE1
:
602 * read error status commands require only a short delay
604 case NAND_CMD_STATUS_ERROR
:
605 case NAND_CMD_STATUS_ERROR0
:
606 case NAND_CMD_STATUS_ERROR1
:
607 case NAND_CMD_STATUS_ERROR2
:
608 case NAND_CMD_STATUS_ERROR3
:
609 udelay(chip
->chip_delay
);
615 udelay(chip
->chip_delay
);
616 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
617 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
618 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
619 NAND_NCE
| NAND_CTRL_CHANGE
);
620 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
623 case NAND_CMD_RNDOUT
:
624 /* No ready / busy check necessary */
625 chip
->cmd_ctrl(mtd
, NAND_CMD_RNDOUTSTART
,
626 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
627 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
628 NAND_NCE
| NAND_CTRL_CHANGE
);
632 chip
->cmd_ctrl(mtd
, NAND_CMD_READSTART
,
633 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
634 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
635 NAND_NCE
| NAND_CTRL_CHANGE
);
637 /* This applies to read commands */
640 * If we don't have access to the busy pin, we apply the given
643 if (!chip
->dev_ready
) {
644 udelay(chip
->chip_delay
);
649 /* Apply this short delay always to ensure that we do wait tWB in
650 * any case on any machine. */
653 nand_wait_ready(mtd
);
657 * nand_get_device - [GENERIC] Get chip for selected access
658 * @chip: the nand chip descriptor
659 * @mtd: MTD device structure
660 * @new_state: the state which is requested
662 * Get the device and lock it for exclusive access
665 nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
, int new_state
)
667 spinlock_t
*lock
= &chip
->controller
->lock
;
668 wait_queue_head_t
*wq
= &chip
->controller
->wq
;
669 DECLARE_WAITQUEUE(wait
, current
);
673 /* Hardware controller shared among independend devices */
674 /* Hardware controller shared among independend devices */
675 if (!chip
->controller
->active
)
676 chip
->controller
->active
= chip
;
678 if (chip
->controller
->active
== chip
&& chip
->state
== FL_READY
) {
679 chip
->state
= new_state
;
683 if (new_state
== FL_PM_SUSPENDED
) {
685 return (chip
->state
== FL_PM_SUSPENDED
) ? 0 : -EAGAIN
;
687 set_current_state(TASK_UNINTERRUPTIBLE
);
688 add_wait_queue(wq
, &wait
);
691 remove_wait_queue(wq
, &wait
);
696 * nand_wait - [DEFAULT] wait until the command is done
697 * @mtd: MTD device structure
698 * @chip: NAND chip structure
700 * Wait for command done. This applies to erase and program only
701 * Erase can take up to 400ms and program up to 20ms according to
702 * general NAND and SmartMedia specs
704 static int nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
)
707 unsigned long timeo
= jiffies
;
708 int status
, state
= chip
->state
;
710 if (state
== FL_ERASING
)
711 timeo
+= (HZ
* 400) / 1000;
713 timeo
+= (HZ
* 20) / 1000;
715 led_trigger_event(nand_led_trigger
, LED_FULL
);
717 /* Apply this short delay always to ensure that we do wait tWB in
718 * any case on any machine. */
721 if ((state
== FL_ERASING
) && (chip
->options
& NAND_IS_AND
))
722 chip
->cmdfunc(mtd
, NAND_CMD_STATUS_MULTI
, -1, -1);
724 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
726 while (time_before(jiffies
, timeo
)) {
727 if (chip
->dev_ready
) {
728 if (chip
->dev_ready(mtd
))
731 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
736 led_trigger_event(nand_led_trigger
, LED_OFF
);
738 status
= (int)chip
->read_byte(mtd
);
743 * nand_read_page_raw - [Intern] read raw page data without ecc
744 * @mtd: mtd info structure
745 * @chip: nand chip info structure
746 * @buf: buffer to store read data
748 static int nand_read_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
751 chip
->read_buf(mtd
, buf
, mtd
->writesize
);
752 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
757 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function
758 * @mtd: mtd info structure
759 * @chip: nand chip info structure
760 * @buf: buffer to store read data
762 static int nand_read_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
765 int i
, eccsize
= chip
->ecc
.size
;
766 int eccbytes
= chip
->ecc
.bytes
;
767 int eccsteps
= chip
->ecc
.steps
;
769 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
770 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
771 int *eccpos
= chip
->ecc
.layout
->eccpos
;
773 chip
->ecc
.read_page_raw(mtd
, chip
, buf
);
775 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
776 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
778 for (i
= 0; i
< chip
->ecc
.total
; i
++)
779 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
781 eccsteps
= chip
->ecc
.steps
;
784 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
787 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
789 mtd
->ecc_stats
.failed
++;
791 mtd
->ecc_stats
.corrected
+= stat
;
797 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function
798 * @mtd: mtd info structure
799 * @chip: nand chip info structure
800 * @buf: buffer to store read data
802 * Not for syndrome calculating ecc controllers which need a special oob layout
804 static int nand_read_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
807 int i
, eccsize
= chip
->ecc
.size
;
808 int eccbytes
= chip
->ecc
.bytes
;
809 int eccsteps
= chip
->ecc
.steps
;
811 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
812 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
813 int *eccpos
= chip
->ecc
.layout
->eccpos
;
815 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
816 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
817 chip
->read_buf(mtd
, p
, eccsize
);
818 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
820 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
822 for (i
= 0; i
< chip
->ecc
.total
; i
++)
823 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
825 eccsteps
= chip
->ecc
.steps
;
828 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
831 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
833 mtd
->ecc_stats
.failed
++;
835 mtd
->ecc_stats
.corrected
+= stat
;
841 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
842 * @mtd: mtd info structure
843 * @chip: nand chip info structure
844 * @buf: buffer to store read data
846 * The hw generator calculates the error syndrome automatically. Therefor
847 * we need a special oob layout and handling.
849 static int nand_read_page_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
852 int i
, eccsize
= chip
->ecc
.size
;
853 int eccbytes
= chip
->ecc
.bytes
;
854 int eccsteps
= chip
->ecc
.steps
;
856 uint8_t *oob
= chip
->oob_poi
;
858 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
861 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
862 chip
->read_buf(mtd
, p
, eccsize
);
864 if (chip
->ecc
.prepad
) {
865 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
866 oob
+= chip
->ecc
.prepad
;
869 chip
->ecc
.hwctl(mtd
, NAND_ECC_READSYN
);
870 chip
->read_buf(mtd
, oob
, eccbytes
);
871 stat
= chip
->ecc
.correct(mtd
, p
, oob
, NULL
);
874 mtd
->ecc_stats
.failed
++;
876 mtd
->ecc_stats
.corrected
+= stat
;
880 if (chip
->ecc
.postpad
) {
881 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
882 oob
+= chip
->ecc
.postpad
;
886 /* Calculate remaining oob bytes */
887 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
889 chip
->read_buf(mtd
, oob
, i
);
895 * nand_transfer_oob - [Internal] Transfer oob to client buffer
896 * @chip: nand chip structure
897 * @oob: oob destination address
898 * @ops: oob ops structure
899 * @len: size of oob to transfer
901 static uint8_t *nand_transfer_oob(struct nand_chip
*chip
, uint8_t *oob
,
902 struct mtd_oob_ops
*ops
, size_t len
)
908 memcpy(oob
, chip
->oob_poi
+ ops
->ooboffs
, len
);
912 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
913 uint32_t boffs
= 0, roffs
= ops
->ooboffs
;
916 for(; free
->length
&& len
; free
++, len
-= bytes
) {
917 /* Read request not from offset 0 ? */
918 if (unlikely(roffs
)) {
919 if (roffs
>= free
->length
) {
920 roffs
-= free
->length
;
923 boffs
= free
->offset
+ roffs
;
924 bytes
= min_t(size_t, len
,
925 (free
->length
- roffs
));
928 bytes
= min_t(size_t, len
, free
->length
);
929 boffs
= free
->offset
;
931 memcpy(oob
, chip
->oob_poi
+ boffs
, bytes
);
943 * nand_do_read_ops - [Internal] Read data with ECC
945 * @mtd: MTD device structure
946 * @from: offset to read from
947 * @ops: oob ops structure
949 * Internal function. Called with chip held.
951 static int nand_do_read_ops(struct mtd_info
*mtd
, loff_t from
,
952 struct mtd_oob_ops
*ops
)
954 int chipnr
, page
, realpage
, col
, bytes
, aligned
;
955 struct nand_chip
*chip
= mtd
->priv
;
956 struct mtd_ecc_stats stats
;
957 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
960 uint32_t readlen
= ops
->len
;
961 uint32_t oobreadlen
= ops
->ooblen
;
962 uint8_t *bufpoi
, *oob
, *buf
;
964 stats
= mtd
->ecc_stats
;
966 chipnr
= (int)(from
>> chip
->chip_shift
);
967 chip
->select_chip(mtd
, chipnr
);
969 realpage
= (int)(from
>> chip
->page_shift
);
970 page
= realpage
& chip
->pagemask
;
972 col
= (int)(from
& (mtd
->writesize
- 1));
978 bytes
= min(mtd
->writesize
- col
, readlen
);
979 aligned
= (bytes
== mtd
->writesize
);
981 /* Is the current page in the buffer ? */
982 if (realpage
!= chip
->pagebuf
|| oob
) {
983 bufpoi
= aligned
? buf
: chip
->buffers
->databuf
;
985 if (likely(sndcmd
)) {
986 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0x00, page
);
990 /* Now read the page into the buffer */
991 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
992 ret
= chip
->ecc
.read_page_raw(mtd
, chip
, bufpoi
);
994 ret
= chip
->ecc
.read_page(mtd
, chip
, bufpoi
);
998 /* Transfer not aligned data */
1000 chip
->pagebuf
= realpage
;
1001 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1006 if (unlikely(oob
)) {
1007 /* Raw mode does data:oob:data:oob */
1008 if (ops
->mode
!= MTD_OOB_RAW
) {
1009 int toread
= min(oobreadlen
,
1010 chip
->ecc
.layout
->oobavail
);
1012 oob
= nand_transfer_oob(chip
,
1014 oobreadlen
-= toread
;
1017 buf
= nand_transfer_oob(chip
,
1018 buf
, ops
, mtd
->oobsize
);
1021 if (!(chip
->options
& NAND_NO_READRDY
)) {
1023 * Apply delay or wait for ready/busy pin. Do
1024 * this before the AUTOINCR check, so no
1025 * problems arise if a chip which does auto
1026 * increment is marked as NOAUTOINCR by the
1029 if (!chip
->dev_ready
)
1030 udelay(chip
->chip_delay
);
1032 nand_wait_ready(mtd
);
1035 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1044 /* For subsequent reads align to page boundary. */
1046 /* Increment page address */
1049 page
= realpage
& chip
->pagemask
;
1050 /* Check, if we cross a chip boundary */
1053 chip
->select_chip(mtd
, -1);
1054 chip
->select_chip(mtd
, chipnr
);
1057 /* Check, if the chip supports auto page increment
1058 * or if we have hit a block boundary.
1060 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1064 ops
->retlen
= ops
->len
- (size_t) readlen
;
1066 ops
->oobretlen
= ops
->ooblen
- oobreadlen
;
1071 if (mtd
->ecc_stats
.failed
- stats
.failed
)
1074 return mtd
->ecc_stats
.corrected
- stats
.corrected
? -EUCLEAN
: 0;
1078 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1079 * @mtd: MTD device structure
1080 * @from: offset to read from
1081 * @len: number of bytes to read
1082 * @retlen: pointer to variable to store the number of read bytes
1083 * @buf: the databuffer to put data
1085 * Get hold of the chip and call nand_do_read
1087 static int nand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
1088 size_t *retlen
, uint8_t *buf
)
1090 struct nand_chip
*chip
= mtd
->priv
;
1093 /* Do not allow reads past end of device */
1094 if ((from
+ len
) > mtd
->size
)
1099 nand_get_device(chip
, mtd
, FL_READING
);
1101 chip
->ops
.len
= len
;
1102 chip
->ops
.datbuf
= buf
;
1103 chip
->ops
.oobbuf
= NULL
;
1105 ret
= nand_do_read_ops(mtd
, from
, &chip
->ops
);
1107 *retlen
= chip
->ops
.retlen
;
1109 nand_release_device(mtd
);
1115 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1116 * @mtd: mtd info structure
1117 * @chip: nand chip info structure
1118 * @page: page number to read
1119 * @sndcmd: flag whether to issue read command or not
1121 static int nand_read_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1122 int page
, int sndcmd
)
1125 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1128 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1133 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1135 * @mtd: mtd info structure
1136 * @chip: nand chip info structure
1137 * @page: page number to read
1138 * @sndcmd: flag whether to issue read command or not
1140 static int nand_read_oob_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1141 int page
, int sndcmd
)
1143 uint8_t *buf
= chip
->oob_poi
;
1144 int length
= mtd
->oobsize
;
1145 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1146 int eccsize
= chip
->ecc
.size
;
1147 uint8_t *bufpoi
= buf
;
1148 int i
, toread
, sndrnd
= 0, pos
;
1150 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, chip
->ecc
.size
, page
);
1151 for (i
= 0; i
< chip
->ecc
.steps
; i
++) {
1153 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1154 if (mtd
->writesize
> 512)
1155 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, pos
, -1);
1157 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, pos
, page
);
1160 toread
= min_t(int, length
, chunk
);
1161 chip
->read_buf(mtd
, bufpoi
, toread
);
1166 chip
->read_buf(mtd
, bufpoi
, length
);
1172 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1173 * @mtd: mtd info structure
1174 * @chip: nand chip info structure
1175 * @page: page number to write
1177 static int nand_write_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1181 const uint8_t *buf
= chip
->oob_poi
;
1182 int length
= mtd
->oobsize
;
1184 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, mtd
->writesize
, page
);
1185 chip
->write_buf(mtd
, buf
, length
);
1186 /* Send command to program the OOB data */
1187 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1189 status
= chip
->waitfunc(mtd
, chip
);
1191 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1195 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1196 * with syndrome - only for large page flash !
1197 * @mtd: mtd info structure
1198 * @chip: nand chip info structure
1199 * @page: page number to write
1201 static int nand_write_oob_syndrome(struct mtd_info
*mtd
,
1202 struct nand_chip
*chip
, int page
)
1204 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1205 int eccsize
= chip
->ecc
.size
, length
= mtd
->oobsize
;
1206 int i
, len
, pos
, status
= 0, sndcmd
= 0, steps
= chip
->ecc
.steps
;
1207 const uint8_t *bufpoi
= chip
->oob_poi
;
1210 * data-ecc-data-ecc ... ecc-oob
1212 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1214 if (!chip
->ecc
.prepad
&& !chip
->ecc
.postpad
) {
1215 pos
= steps
* (eccsize
+ chunk
);
1220 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, pos
, page
);
1221 for (i
= 0; i
< steps
; i
++) {
1223 if (mtd
->writesize
<= 512) {
1224 uint32_t fill
= 0xFFFFFFFF;
1228 int num
= min_t(int, len
, 4);
1229 chip
->write_buf(mtd
, (uint8_t *)&fill
,
1234 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1235 chip
->cmdfunc(mtd
, NAND_CMD_RNDIN
, pos
, -1);
1239 len
= min_t(int, length
, chunk
);
1240 chip
->write_buf(mtd
, bufpoi
, len
);
1245 chip
->write_buf(mtd
, bufpoi
, length
);
1247 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1248 status
= chip
->waitfunc(mtd
, chip
);
1250 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1254 * nand_do_read_oob - [Intern] NAND read out-of-band
1255 * @mtd: MTD device structure
1256 * @from: offset to read from
1257 * @ops: oob operations description structure
1259 * NAND read out-of-band data from the spare area
1261 static int nand_do_read_oob(struct mtd_info
*mtd
, loff_t from
,
1262 struct mtd_oob_ops
*ops
)
1264 int page
, realpage
, chipnr
, sndcmd
= 1;
1265 struct nand_chip
*chip
= mtd
->priv
;
1266 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1267 int readlen
= ops
->ooblen
;
1269 uint8_t *buf
= ops
->oobbuf
;
1271 DEBUG(MTD_DEBUG_LEVEL3
, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1272 (unsigned long long)from
, readlen
);
1274 if (ops
->mode
== MTD_OOB_AUTO
)
1275 len
= chip
->ecc
.layout
->oobavail
;
1279 if (unlikely(ops
->ooboffs
>= len
)) {
1280 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1281 "Attempt to start read outside oob\n");
1285 /* Do not allow reads past end of device */
1286 if (unlikely(from
>= mtd
->size
||
1287 ops
->ooboffs
+ readlen
> ((mtd
->size
>> chip
->page_shift
) -
1288 (from
>> chip
->page_shift
)) * len
)) {
1289 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1290 "Attempt read beyond end of device\n");
1294 chipnr
= (int)(from
>> chip
->chip_shift
);
1295 chip
->select_chip(mtd
, chipnr
);
1297 /* Shift to get page */
1298 realpage
= (int)(from
>> chip
->page_shift
);
1299 page
= realpage
& chip
->pagemask
;
1302 sndcmd
= chip
->ecc
.read_oob(mtd
, chip
, page
, sndcmd
);
1304 len
= min(len
, readlen
);
1305 buf
= nand_transfer_oob(chip
, buf
, ops
, len
);
1307 if (!(chip
->options
& NAND_NO_READRDY
)) {
1309 * Apply delay or wait for ready/busy pin. Do this
1310 * before the AUTOINCR check, so no problems arise if a
1311 * chip which does auto increment is marked as
1312 * NOAUTOINCR by the board driver.
1314 if (!chip
->dev_ready
)
1315 udelay(chip
->chip_delay
);
1317 nand_wait_ready(mtd
);
1324 /* Increment page address */
1327 page
= realpage
& chip
->pagemask
;
1328 /* Check, if we cross a chip boundary */
1331 chip
->select_chip(mtd
, -1);
1332 chip
->select_chip(mtd
, chipnr
);
1335 /* Check, if the chip supports auto page increment
1336 * or if we have hit a block boundary.
1338 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1342 ops
->oobretlen
= ops
->ooblen
;
1347 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1348 * @mtd: MTD device structure
1349 * @from: offset to read from
1350 * @ops: oob operation description structure
1352 * NAND read data and/or out-of-band data
1354 static int nand_read_oob(struct mtd_info
*mtd
, loff_t from
,
1355 struct mtd_oob_ops
*ops
)
1357 struct nand_chip
*chip
= mtd
->priv
;
1358 int ret
= -ENOTSUPP
;
1362 /* Do not allow reads past end of device */
1363 if (ops
->datbuf
&& (from
+ ops
->len
) > mtd
->size
) {
1364 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1365 "Attempt read beyond end of device\n");
1369 nand_get_device(chip
, mtd
, FL_READING
);
1382 ret
= nand_do_read_oob(mtd
, from
, ops
);
1384 ret
= nand_do_read_ops(mtd
, from
, ops
);
1387 nand_release_device(mtd
);
1393 * nand_write_page_raw - [Intern] raw page write function
1394 * @mtd: mtd info structure
1395 * @chip: nand chip info structure
1398 static void nand_write_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1401 chip
->write_buf(mtd
, buf
, mtd
->writesize
);
1402 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1406 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function
1407 * @mtd: mtd info structure
1408 * @chip: nand chip info structure
1411 static void nand_write_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1414 int i
, eccsize
= chip
->ecc
.size
;
1415 int eccbytes
= chip
->ecc
.bytes
;
1416 int eccsteps
= chip
->ecc
.steps
;
1417 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1418 const uint8_t *p
= buf
;
1419 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1421 /* Software ecc calculation */
1422 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1423 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1425 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1426 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1428 chip
->ecc
.write_page_raw(mtd
, chip
, buf
);
1432 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function
1433 * @mtd: mtd info structure
1434 * @chip: nand chip info structure
1437 static void nand_write_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1440 int i
, eccsize
= chip
->ecc
.size
;
1441 int eccbytes
= chip
->ecc
.bytes
;
1442 int eccsteps
= chip
->ecc
.steps
;
1443 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1444 const uint8_t *p
= buf
;
1445 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1447 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1448 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1449 chip
->write_buf(mtd
, p
, eccsize
);
1450 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1453 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1454 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1456 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1460 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write
1461 * @mtd: mtd info structure
1462 * @chip: nand chip info structure
1465 * The hw generator calculates the error syndrome automatically. Therefor
1466 * we need a special oob layout and handling.
1468 static void nand_write_page_syndrome(struct mtd_info
*mtd
,
1469 struct nand_chip
*chip
, const uint8_t *buf
)
1471 int i
, eccsize
= chip
->ecc
.size
;
1472 int eccbytes
= chip
->ecc
.bytes
;
1473 int eccsteps
= chip
->ecc
.steps
;
1474 const uint8_t *p
= buf
;
1475 uint8_t *oob
= chip
->oob_poi
;
1477 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1479 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1480 chip
->write_buf(mtd
, p
, eccsize
);
1482 if (chip
->ecc
.prepad
) {
1483 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1484 oob
+= chip
->ecc
.prepad
;
1487 chip
->ecc
.calculate(mtd
, p
, oob
);
1488 chip
->write_buf(mtd
, oob
, eccbytes
);
1491 if (chip
->ecc
.postpad
) {
1492 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
1493 oob
+= chip
->ecc
.postpad
;
1497 /* Calculate remaining oob bytes */
1498 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1500 chip
->write_buf(mtd
, oob
, i
);
1504 * nand_write_page - [REPLACEABLE] write one page
1505 * @mtd: MTD device structure
1506 * @chip: NAND chip descriptor
1507 * @buf: the data to write
1508 * @page: page number to write
1509 * @cached: cached programming
1510 * @raw: use _raw version of write_page
1512 static int nand_write_page(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1513 const uint8_t *buf
, int page
, int cached
, int raw
)
1517 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, 0x00, page
);
1520 chip
->ecc
.write_page_raw(mtd
, chip
, buf
);
1522 chip
->ecc
.write_page(mtd
, chip
, buf
);
1525 * Cached progamming disabled for now, Not sure if its worth the
1526 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1530 if (!cached
|| !(chip
->options
& NAND_CACHEPRG
)) {
1532 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1533 status
= chip
->waitfunc(mtd
, chip
);
1535 * See if operation failed and additional status checks are
1538 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1539 status
= chip
->errstat(mtd
, chip
, FL_WRITING
, status
,
1542 if (status
& NAND_STATUS_FAIL
)
1545 chip
->cmdfunc(mtd
, NAND_CMD_CACHEDPROG
, -1, -1);
1546 status
= chip
->waitfunc(mtd
, chip
);
1549 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1550 /* Send command to read back the data */
1551 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
1553 if (chip
->verify_buf(mtd
, buf
, mtd
->writesize
))
1560 * nand_fill_oob - [Internal] Transfer client buffer to oob
1561 * @chip: nand chip structure
1562 * @oob: oob data buffer
1563 * @ops: oob ops structure
1565 static uint8_t *nand_fill_oob(struct nand_chip
*chip
, uint8_t *oob
,
1566 struct mtd_oob_ops
*ops
)
1568 size_t len
= ops
->ooblen
;
1574 memcpy(chip
->oob_poi
+ ops
->ooboffs
, oob
, len
);
1577 case MTD_OOB_AUTO
: {
1578 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
1579 uint32_t boffs
= 0, woffs
= ops
->ooboffs
;
1582 for(; free
->length
&& len
; free
++, len
-= bytes
) {
1583 /* Write request not from offset 0 ? */
1584 if (unlikely(woffs
)) {
1585 if (woffs
>= free
->length
) {
1586 woffs
-= free
->length
;
1589 boffs
= free
->offset
+ woffs
;
1590 bytes
= min_t(size_t, len
,
1591 (free
->length
- woffs
));
1594 bytes
= min_t(size_t, len
, free
->length
);
1595 boffs
= free
->offset
;
1597 memcpy(chip
->oob_poi
+ boffs
, oob
, bytes
);
1608 #define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0
1611 * nand_do_write_ops - [Internal] NAND write with ECC
1612 * @mtd: MTD device structure
1613 * @to: offset to write to
1614 * @ops: oob operations description structure
1616 * NAND write with ECC
1618 static int nand_do_write_ops(struct mtd_info
*mtd
, loff_t to
,
1619 struct mtd_oob_ops
*ops
)
1621 int chipnr
, realpage
, page
, blockmask
, column
;
1622 struct nand_chip
*chip
= mtd
->priv
;
1623 uint32_t writelen
= ops
->len
;
1624 uint8_t *oob
= ops
->oobbuf
;
1625 uint8_t *buf
= ops
->datbuf
;
1632 /* reject writes, which are not page aligned */
1633 if (NOTALIGNED(to
) || NOTALIGNED(ops
->len
)) {
1634 printk(KERN_NOTICE
"nand_write: "
1635 "Attempt to write not page aligned data\n");
1639 column
= to
& (mtd
->writesize
- 1);
1640 subpage
= column
|| (writelen
& (mtd
->writesize
- 1));
1645 chipnr
= (int)(to
>> chip
->chip_shift
);
1646 chip
->select_chip(mtd
, chipnr
);
1648 /* Check, if it is write protected */
1649 if (nand_check_wp(mtd
))
1652 realpage
= (int)(to
>> chip
->page_shift
);
1653 page
= realpage
& chip
->pagemask
;
1654 blockmask
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1656 /* Invalidate the page cache, when we write to the cached page */
1657 if (to
<= (chip
->pagebuf
<< chip
->page_shift
) &&
1658 (chip
->pagebuf
<< chip
->page_shift
) < (to
+ ops
->len
))
1661 /* If we're not given explicit OOB data, let it be 0xFF */
1663 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1666 int bytes
= mtd
->writesize
;
1667 int cached
= writelen
> bytes
&& page
!= blockmask
;
1668 uint8_t *wbuf
= buf
;
1670 /* Partial page write ? */
1671 if (unlikely(column
|| writelen
< (mtd
->writesize
- 1))) {
1673 bytes
= min_t(int, bytes
- column
, (int) writelen
);
1675 memset(chip
->buffers
->databuf
, 0xff, mtd
->writesize
);
1676 memcpy(&chip
->buffers
->databuf
[column
], buf
, bytes
);
1677 wbuf
= chip
->buffers
->databuf
;
1681 oob
= nand_fill_oob(chip
, oob
, ops
);
1683 ret
= chip
->write_page(mtd
, chip
, wbuf
, page
, cached
,
1684 (ops
->mode
== MTD_OOB_RAW
));
1696 page
= realpage
& chip
->pagemask
;
1697 /* Check, if we cross a chip boundary */
1700 chip
->select_chip(mtd
, -1);
1701 chip
->select_chip(mtd
, chipnr
);
1705 ops
->retlen
= ops
->len
- writelen
;
1707 ops
->oobretlen
= ops
->ooblen
;
1712 * nand_write - [MTD Interface] NAND write with ECC
1713 * @mtd: MTD device structure
1714 * @to: offset to write to
1715 * @len: number of bytes to write
1716 * @retlen: pointer to variable to store the number of written bytes
1717 * @buf: the data to write
1719 * NAND write with ECC
1721 static int nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1722 size_t *retlen
, const uint8_t *buf
)
1724 struct nand_chip
*chip
= mtd
->priv
;
1727 /* Do not allow reads past end of device */
1728 if ((to
+ len
) > mtd
->size
)
1733 nand_get_device(chip
, mtd
, FL_WRITING
);
1735 chip
->ops
.len
= len
;
1736 chip
->ops
.datbuf
= (uint8_t *)buf
;
1737 chip
->ops
.oobbuf
= NULL
;
1739 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
1741 *retlen
= chip
->ops
.retlen
;
1743 nand_release_device(mtd
);
1749 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
1750 * @mtd: MTD device structure
1751 * @to: offset to write to
1752 * @ops: oob operation description structure
1754 * NAND write out-of-band
1756 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
1757 struct mtd_oob_ops
*ops
)
1759 int chipnr
, page
, status
, len
;
1760 struct nand_chip
*chip
= mtd
->priv
;
1762 DEBUG(MTD_DEBUG_LEVEL3
, "nand_write_oob: to = 0x%08x, len = %i\n",
1763 (unsigned int)to
, (int)ops
->ooblen
);
1765 if (ops
->mode
== MTD_OOB_AUTO
)
1766 len
= chip
->ecc
.layout
->oobavail
;
1770 /* Do not allow write past end of page */
1771 if ((ops
->ooboffs
+ ops
->ooblen
) > len
) {
1772 DEBUG(MTD_DEBUG_LEVEL0
, "nand_write_oob: "
1773 "Attempt to write past end of page\n");
1777 if (unlikely(ops
->ooboffs
>= len
)) {
1778 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1779 "Attempt to start write outside oob\n");
1783 /* Do not allow reads past end of device */
1784 if (unlikely(to
>= mtd
->size
||
1785 ops
->ooboffs
+ ops
->ooblen
>
1786 ((mtd
->size
>> chip
->page_shift
) -
1787 (to
>> chip
->page_shift
)) * len
)) {
1788 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1789 "Attempt write beyond end of device\n");
1793 chipnr
= (int)(to
>> chip
->chip_shift
);
1794 chip
->select_chip(mtd
, chipnr
);
1796 /* Shift to get page */
1797 page
= (int)(to
>> chip
->page_shift
);
1800 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
1801 * of my DiskOnChip 2000 test units) will clear the whole data page too
1802 * if we don't do this. I have no clue why, but I seem to have 'fixed'
1803 * it in the doc2000 driver in August 1999. dwmw2.
1805 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
1807 /* Check, if it is write protected */
1808 if (nand_check_wp(mtd
))
1811 /* Invalidate the page cache, if we write to the cached page */
1812 if (page
== chip
->pagebuf
)
1815 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1816 nand_fill_oob(chip
, ops
->oobbuf
, ops
);
1817 status
= chip
->ecc
.write_oob(mtd
, chip
, page
& chip
->pagemask
);
1818 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1823 ops
->oobretlen
= ops
->ooblen
;
1829 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1830 * @mtd: MTD device structure
1831 * @to: offset to write to
1832 * @ops: oob operation description structure
1834 static int nand_write_oob(struct mtd_info
*mtd
, loff_t to
,
1835 struct mtd_oob_ops
*ops
)
1837 struct nand_chip
*chip
= mtd
->priv
;
1838 int ret
= -ENOTSUPP
;
1842 /* Do not allow writes past end of device */
1843 if (ops
->datbuf
&& (to
+ ops
->len
) > mtd
->size
) {
1844 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1845 "Attempt read beyond end of device\n");
1849 nand_get_device(chip
, mtd
, FL_WRITING
);
1862 ret
= nand_do_write_oob(mtd
, to
, ops
);
1864 ret
= nand_do_write_ops(mtd
, to
, ops
);
1867 nand_release_device(mtd
);
1872 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1873 * @mtd: MTD device structure
1874 * @page: the page address of the block which will be erased
1876 * Standard erase command for NAND chips
1878 static void single_erase_cmd(struct mtd_info
*mtd
, int page
)
1880 struct nand_chip
*chip
= mtd
->priv
;
1881 /* Send commands to erase a block */
1882 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1883 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1887 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1888 * @mtd: MTD device structure
1889 * @page: the page address of the block which will be erased
1891 * AND multi block erase command function
1892 * Erase 4 consecutive blocks
1894 static void multi_erase_cmd(struct mtd_info
*mtd
, int page
)
1896 struct nand_chip
*chip
= mtd
->priv
;
1897 /* Send commands to erase a block */
1898 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1899 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1900 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1901 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1902 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1906 * nand_erase - [MTD Interface] erase block(s)
1907 * @mtd: MTD device structure
1908 * @instr: erase instruction
1910 * Erase one ore more blocks
1912 static int nand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
1914 return nand_erase_nand(mtd
, instr
, 0);
1917 #define BBT_PAGE_MASK 0xffffff3f
1919 * nand_erase_nand - [Internal] erase block(s)
1920 * @mtd: MTD device structure
1921 * @instr: erase instruction
1922 * @allowbbt: allow erasing the bbt area
1924 * Erase one ore more blocks
1926 int nand_erase_nand(struct mtd_info
*mtd
, struct erase_info
*instr
,
1929 int page
, len
, status
, pages_per_block
, ret
, chipnr
;
1930 struct nand_chip
*chip
= mtd
->priv
;
1931 int rewrite_bbt
[NAND_MAX_CHIPS
]={0};
1932 unsigned int bbt_masked_page
= 0xffffffff;
1934 DEBUG(MTD_DEBUG_LEVEL3
, "nand_erase: start = 0x%08x, len = %i\n",
1935 (unsigned int)instr
->addr
, (unsigned int)instr
->len
);
1937 /* Start address must align on block boundary */
1938 if (instr
->addr
& ((1 << chip
->phys_erase_shift
) - 1)) {
1939 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: Unaligned address\n");
1943 /* Length must align on block boundary */
1944 if (instr
->len
& ((1 << chip
->phys_erase_shift
) - 1)) {
1945 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1946 "Length not block aligned\n");
1950 /* Do not allow erase past end of device */
1951 if ((instr
->len
+ instr
->addr
) > mtd
->size
) {
1952 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1953 "Erase past end of device\n");
1957 instr
->fail_addr
= 0xffffffff;
1959 /* Grab the lock and see if the device is available */
1960 nand_get_device(chip
, mtd
, FL_ERASING
);
1962 /* Shift to get first page */
1963 page
= (int)(instr
->addr
>> chip
->page_shift
);
1964 chipnr
= (int)(instr
->addr
>> chip
->chip_shift
);
1966 /* Calculate pages in each block */
1967 pages_per_block
= 1 << (chip
->phys_erase_shift
- chip
->page_shift
);
1969 /* Select the NAND device */
1970 chip
->select_chip(mtd
, chipnr
);
1972 /* Check, if it is write protected */
1973 if (nand_check_wp(mtd
)) {
1974 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1975 "Device is write protected!!!\n");
1976 instr
->state
= MTD_ERASE_FAILED
;
1981 * If BBT requires refresh, set the BBT page mask to see if the BBT
1982 * should be rewritten. Otherwise the mask is set to 0xffffffff which
1983 * can not be matched. This is also done when the bbt is actually
1984 * erased to avoid recusrsive updates
1986 if (chip
->options
& BBT_AUTO_REFRESH
&& !allowbbt
)
1987 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] & BBT_PAGE_MASK
;
1989 /* Loop through the pages */
1992 instr
->state
= MTD_ERASING
;
1996 * heck if we have a bad block, we do not erase bad blocks !
1998 if (nand_block_checkbad(mtd
, ((loff_t
) page
) <<
1999 chip
->page_shift
, 0, allowbbt
)) {
2000 printk(KERN_WARNING
"nand_erase: attempt to erase a "
2001 "bad block at page 0x%08x\n", page
);
2002 instr
->state
= MTD_ERASE_FAILED
;
2007 * Invalidate the page cache, if we erase the block which
2008 * contains the current cached page
2010 if (page
<= chip
->pagebuf
&& chip
->pagebuf
<
2011 (page
+ pages_per_block
))
2014 chip
->erase_cmd(mtd
, page
& chip
->pagemask
);
2016 status
= chip
->waitfunc(mtd
, chip
);
2019 * See if operation failed and additional status checks are
2022 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
2023 status
= chip
->errstat(mtd
, chip
, FL_ERASING
,
2026 /* See if block erase succeeded */
2027 if (status
& NAND_STATUS_FAIL
) {
2028 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
2029 "Failed erase, page 0x%08x\n", page
);
2030 instr
->state
= MTD_ERASE_FAILED
;
2031 instr
->fail_addr
= (page
<< chip
->page_shift
);
2036 * If BBT requires refresh, set the BBT rewrite flag to the
2039 if (bbt_masked_page
!= 0xffffffff &&
2040 (page
& BBT_PAGE_MASK
) == bbt_masked_page
)
2041 rewrite_bbt
[chipnr
] = (page
<< chip
->page_shift
);
2043 /* Increment page address and decrement length */
2044 len
-= (1 << chip
->phys_erase_shift
);
2045 page
+= pages_per_block
;
2047 /* Check, if we cross a chip boundary */
2048 if (len
&& !(page
& chip
->pagemask
)) {
2050 chip
->select_chip(mtd
, -1);
2051 chip
->select_chip(mtd
, chipnr
);
2054 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2055 * page mask to see if this BBT should be rewritten
2057 if (bbt_masked_page
!= 0xffffffff &&
2058 (chip
->bbt_td
->options
& NAND_BBT_PERCHIP
))
2059 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] &
2063 instr
->state
= MTD_ERASE_DONE
;
2067 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
2068 /* Do call back function */
2070 mtd_erase_callback(instr
);
2072 /* Deselect and wake up anyone waiting on the device */
2073 nand_release_device(mtd
);
2076 * If BBT requires refresh and erase was successful, rewrite any
2077 * selected bad block tables
2079 if (bbt_masked_page
== 0xffffffff || ret
)
2082 for (chipnr
= 0; chipnr
< chip
->numchips
; chipnr
++) {
2083 if (!rewrite_bbt
[chipnr
])
2085 /* update the BBT for chip */
2086 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase_nand: nand_update_bbt "
2087 "(%d:0x%0x 0x%0x)\n", chipnr
, rewrite_bbt
[chipnr
],
2088 chip
->bbt_td
->pages
[chipnr
]);
2089 nand_update_bbt(mtd
, rewrite_bbt
[chipnr
]);
2092 /* Return more or less happy */
2097 * nand_sync - [MTD Interface] sync
2098 * @mtd: MTD device structure
2100 * Sync is actually a wait for chip ready function
2102 static void nand_sync(struct mtd_info
*mtd
)
2104 struct nand_chip
*chip
= mtd
->priv
;
2106 DEBUG(MTD_DEBUG_LEVEL3
, "nand_sync: called\n");
2108 /* Grab the lock and see if the device is available */
2109 nand_get_device(chip
, mtd
, FL_SYNCING
);
2110 /* Release it and go back */
2111 nand_release_device(mtd
);
2115 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2116 * @mtd: MTD device structure
2117 * @offs: offset relative to mtd start
2119 static int nand_block_isbad(struct mtd_info
*mtd
, loff_t offs
)
2121 /* Check for invalid offset */
2122 if (offs
> mtd
->size
)
2125 return nand_block_checkbad(mtd
, offs
, 1, 0);
2129 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2130 * @mtd: MTD device structure
2131 * @ofs: offset relative to mtd start
2133 static int nand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
2135 struct nand_chip
*chip
= mtd
->priv
;
2138 if ((ret
= nand_block_isbad(mtd
, ofs
))) {
2139 /* If it was bad already, return success and do nothing. */
2145 return chip
->block_markbad(mtd
, ofs
);
2149 * nand_suspend - [MTD Interface] Suspend the NAND flash
2150 * @mtd: MTD device structure
2152 static int nand_suspend(struct mtd_info
*mtd
)
2154 struct nand_chip
*chip
= mtd
->priv
;
2156 return nand_get_device(chip
, mtd
, FL_PM_SUSPENDED
);
2160 * nand_resume - [MTD Interface] Resume the NAND flash
2161 * @mtd: MTD device structure
2163 static void nand_resume(struct mtd_info
*mtd
)
2165 struct nand_chip
*chip
= mtd
->priv
;
2167 if (chip
->state
== FL_PM_SUSPENDED
)
2168 nand_release_device(mtd
);
2170 printk(KERN_ERR
"nand_resume() called for a chip which is not "
2171 "in suspended state\n");
2175 * Set default functions
2177 static void nand_set_defaults(struct nand_chip
*chip
, int busw
)
2179 /* check for proper chip_delay setup, set 20us if not */
2180 if (!chip
->chip_delay
)
2181 chip
->chip_delay
= 20;
2183 /* check, if a user supplied command function given */
2184 if (chip
->cmdfunc
== NULL
)
2185 chip
->cmdfunc
= nand_command
;
2187 /* check, if a user supplied wait function given */
2188 if (chip
->waitfunc
== NULL
)
2189 chip
->waitfunc
= nand_wait
;
2191 if (!chip
->select_chip
)
2192 chip
->select_chip
= nand_select_chip
;
2193 if (!chip
->read_byte
)
2194 chip
->read_byte
= busw
? nand_read_byte16
: nand_read_byte
;
2195 if (!chip
->read_word
)
2196 chip
->read_word
= nand_read_word
;
2197 if (!chip
->block_bad
)
2198 chip
->block_bad
= nand_block_bad
;
2199 if (!chip
->block_markbad
)
2200 chip
->block_markbad
= nand_default_block_markbad
;
2201 if (!chip
->write_buf
)
2202 chip
->write_buf
= busw
? nand_write_buf16
: nand_write_buf
;
2203 if (!chip
->read_buf
)
2204 chip
->read_buf
= busw
? nand_read_buf16
: nand_read_buf
;
2205 if (!chip
->verify_buf
)
2206 chip
->verify_buf
= busw
? nand_verify_buf16
: nand_verify_buf
;
2207 if (!chip
->scan_bbt
)
2208 chip
->scan_bbt
= nand_default_bbt
;
2210 if (!chip
->controller
) {
2211 chip
->controller
= &chip
->hwcontrol
;
2212 spin_lock_init(&chip
->controller
->lock
);
2213 init_waitqueue_head(&chip
->controller
->wq
);
2219 * Get the flash and manufacturer id and lookup if the type is supported
2221 static struct nand_flash_dev
*nand_get_flash_type(struct mtd_info
*mtd
,
2222 struct nand_chip
*chip
,
2223 int busw
, int *maf_id
)
2225 struct nand_flash_dev
*type
= NULL
;
2226 int i
, dev_id
, maf_idx
;
2228 /* Select the device */
2229 chip
->select_chip(mtd
, 0);
2231 /* Send the command for reading device ID */
2232 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2234 /* Read manufacturer and device IDs */
2235 *maf_id
= chip
->read_byte(mtd
);
2236 dev_id
= chip
->read_byte(mtd
);
2238 /* Lookup the flash id */
2239 for (i
= 0; nand_flash_ids
[i
].name
!= NULL
; i
++) {
2240 if (dev_id
== nand_flash_ids
[i
].id
) {
2241 type
= &nand_flash_ids
[i
];
2247 return ERR_PTR(-ENODEV
);
2250 mtd
->name
= type
->name
;
2252 chip
->chipsize
= type
->chipsize
<< 20;
2254 /* Newer devices have all the information in additional id bytes */
2255 if (!type
->pagesize
) {
2257 /* The 3rd id byte holds MLC / multichip data */
2258 chip
->cellinfo
= chip
->read_byte(mtd
);
2259 /* The 4th id byte is the important one */
2260 extid
= chip
->read_byte(mtd
);
2262 mtd
->writesize
= 1024 << (extid
& 0x3);
2265 mtd
->oobsize
= (8 << (extid
& 0x01)) * (mtd
->writesize
>> 9);
2267 /* Calc blocksize. Blocksize is multiples of 64KiB */
2268 mtd
->erasesize
= (64 * 1024) << (extid
& 0x03);
2270 /* Get buswidth information */
2271 busw
= (extid
& 0x01) ? NAND_BUSWIDTH_16
: 0;
2275 * Old devices have chip data hardcoded in the device id table
2277 mtd
->erasesize
= type
->erasesize
;
2278 mtd
->writesize
= type
->pagesize
;
2279 mtd
->oobsize
= mtd
->writesize
/ 32;
2280 busw
= type
->options
& NAND_BUSWIDTH_16
;
2283 /* Try to identify manufacturer */
2284 for (maf_idx
= 0; nand_manuf_ids
[maf_idx
].id
!= 0x0; maf_idx
++) {
2285 if (nand_manuf_ids
[maf_idx
].id
== *maf_id
)
2290 * Check, if buswidth is correct. Hardware drivers should set
2293 if (busw
!= (chip
->options
& NAND_BUSWIDTH_16
)) {
2294 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2295 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
,
2296 dev_id
, nand_manuf_ids
[maf_idx
].name
, mtd
->name
);
2297 printk(KERN_WARNING
"NAND bus width %d instead %d bit\n",
2298 (chip
->options
& NAND_BUSWIDTH_16
) ? 16 : 8,
2300 return ERR_PTR(-EINVAL
);
2303 /* Calculate the address shift from the page size */
2304 chip
->page_shift
= ffs(mtd
->writesize
) - 1;
2305 /* Convert chipsize to number of pages per chip -1. */
2306 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2308 chip
->bbt_erase_shift
= chip
->phys_erase_shift
=
2309 ffs(mtd
->erasesize
) - 1;
2310 chip
->chip_shift
= ffs(chip
->chipsize
) - 1;
2312 /* Set the bad block position */
2313 chip
->badblockpos
= mtd
->writesize
> 512 ?
2314 NAND_LARGE_BADBLOCK_POS
: NAND_SMALL_BADBLOCK_POS
;
2316 /* Get chip options, preserve non chip based options */
2317 chip
->options
&= ~NAND_CHIPOPTIONS_MSK
;
2318 chip
->options
|= type
->options
& NAND_CHIPOPTIONS_MSK
;
2321 * Set chip as a default. Board drivers can override it, if necessary
2323 chip
->options
|= NAND_NO_AUTOINCR
;
2325 /* Check if chip is a not a samsung device. Do not clear the
2326 * options for chips which are not having an extended id.
2328 if (*maf_id
!= NAND_MFR_SAMSUNG
&& !type
->pagesize
)
2329 chip
->options
&= ~NAND_SAMSUNG_LP_OPTIONS
;
2331 /* Check for AND chips with 4 page planes */
2332 if (chip
->options
& NAND_4PAGE_ARRAY
)
2333 chip
->erase_cmd
= multi_erase_cmd
;
2335 chip
->erase_cmd
= single_erase_cmd
;
2337 /* Do not replace user supplied command function ! */
2338 if (mtd
->writesize
> 512 && chip
->cmdfunc
== nand_command
)
2339 chip
->cmdfunc
= nand_command_lp
;
2341 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2342 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
, dev_id
,
2343 nand_manuf_ids
[maf_idx
].name
, type
->name
);
2349 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2350 * @mtd: MTD device structure
2351 * @maxchips: Number of chips to scan for
2353 * This is the first phase of the normal nand_scan() function. It
2354 * reads the flash ID and sets up MTD fields accordingly.
2356 * The mtd->owner field must be set to the module of the caller.
2358 int nand_scan_ident(struct mtd_info
*mtd
, int maxchips
)
2360 int i
, busw
, nand_maf_id
;
2361 struct nand_chip
*chip
= mtd
->priv
;
2362 struct nand_flash_dev
*type
;
2364 /* Get buswidth to select the correct functions */
2365 busw
= chip
->options
& NAND_BUSWIDTH_16
;
2366 /* Set the default functions */
2367 nand_set_defaults(chip
, busw
);
2369 /* Read the flash type */
2370 type
= nand_get_flash_type(mtd
, chip
, busw
, &nand_maf_id
);
2373 printk(KERN_WARNING
"No NAND device found!!!\n");
2374 chip
->select_chip(mtd
, -1);
2375 return PTR_ERR(type
);
2378 /* Check for a chip array */
2379 for (i
= 1; i
< maxchips
; i
++) {
2380 chip
->select_chip(mtd
, i
);
2381 /* Send the command for reading device ID */
2382 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2383 /* Read manufacturer and device IDs */
2384 if (nand_maf_id
!= chip
->read_byte(mtd
) ||
2385 type
->id
!= chip
->read_byte(mtd
))
2389 printk(KERN_INFO
"%d NAND chips detected\n", i
);
2391 /* Store the number of chips and calc total size for mtd */
2393 mtd
->size
= i
* chip
->chipsize
;
2400 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2401 * @mtd: MTD device structure
2402 * @maxchips: Number of chips to scan for
2404 * This is the second phase of the normal nand_scan() function. It
2405 * fills out all the uninitialized function pointers with the defaults
2406 * and scans for a bad block table if appropriate.
2408 int nand_scan_tail(struct mtd_info
*mtd
)
2411 struct nand_chip
*chip
= mtd
->priv
;
2413 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2414 chip
->buffers
= kmalloc(sizeof(*chip
->buffers
), GFP_KERNEL
);
2418 /* Set the internal oob buffer location, just after the page data */
2419 chip
->oob_poi
= chip
->buffers
->databuf
+ mtd
->writesize
;
2422 * If no default placement scheme is given, select an appropriate one
2424 if (!chip
->ecc
.layout
) {
2425 switch (mtd
->oobsize
) {
2427 chip
->ecc
.layout
= &nand_oob_8
;
2430 chip
->ecc
.layout
= &nand_oob_16
;
2433 chip
->ecc
.layout
= &nand_oob_64
;
2436 printk(KERN_WARNING
"No oob scheme defined for "
2437 "oobsize %d\n", mtd
->oobsize
);
2442 if (!chip
->write_page
)
2443 chip
->write_page
= nand_write_page
;
2446 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2447 * selected and we have 256 byte pagesize fallback to software ECC
2449 if (!chip
->ecc
.read_page_raw
)
2450 chip
->ecc
.read_page_raw
= nand_read_page_raw
;
2451 if (!chip
->ecc
.write_page_raw
)
2452 chip
->ecc
.write_page_raw
= nand_write_page_raw
;
2454 switch (chip
->ecc
.mode
) {
2456 /* Use standard hwecc read page function ? */
2457 if (!chip
->ecc
.read_page
)
2458 chip
->ecc
.read_page
= nand_read_page_hwecc
;
2459 if (!chip
->ecc
.write_page
)
2460 chip
->ecc
.write_page
= nand_write_page_hwecc
;
2461 if (!chip
->ecc
.read_oob
)
2462 chip
->ecc
.read_oob
= nand_read_oob_std
;
2463 if (!chip
->ecc
.write_oob
)
2464 chip
->ecc
.write_oob
= nand_write_oob_std
;
2466 case NAND_ECC_HW_SYNDROME
:
2467 if (!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
2469 printk(KERN_WARNING
"No ECC functions supplied, "
2470 "Hardware ECC not possible\n");
2473 /* Use standard syndrome read/write page function ? */
2474 if (!chip
->ecc
.read_page
)
2475 chip
->ecc
.read_page
= nand_read_page_syndrome
;
2476 if (!chip
->ecc
.write_page
)
2477 chip
->ecc
.write_page
= nand_write_page_syndrome
;
2478 if (!chip
->ecc
.read_oob
)
2479 chip
->ecc
.read_oob
= nand_read_oob_syndrome
;
2480 if (!chip
->ecc
.write_oob
)
2481 chip
->ecc
.write_oob
= nand_write_oob_syndrome
;
2483 if (mtd
->writesize
>= chip
->ecc
.size
)
2485 printk(KERN_WARNING
"%d byte HW ECC not possible on "
2486 "%d byte page size, fallback to SW ECC\n",
2487 chip
->ecc
.size
, mtd
->writesize
);
2488 chip
->ecc
.mode
= NAND_ECC_SOFT
;
2491 chip
->ecc
.calculate
= nand_calculate_ecc
;
2492 chip
->ecc
.correct
= nand_correct_data
;
2493 chip
->ecc
.read_page
= nand_read_page_swecc
;
2494 chip
->ecc
.write_page
= nand_write_page_swecc
;
2495 chip
->ecc
.read_oob
= nand_read_oob_std
;
2496 chip
->ecc
.write_oob
= nand_write_oob_std
;
2497 chip
->ecc
.size
= 256;
2498 chip
->ecc
.bytes
= 3;
2502 printk(KERN_WARNING
"NAND_ECC_NONE selected by board driver. "
2503 "This is not recommended !!\n");
2504 chip
->ecc
.read_page
= nand_read_page_raw
;
2505 chip
->ecc
.write_page
= nand_write_page_raw
;
2506 chip
->ecc
.read_oob
= nand_read_oob_std
;
2507 chip
->ecc
.write_oob
= nand_write_oob_std
;
2508 chip
->ecc
.size
= mtd
->writesize
;
2509 chip
->ecc
.bytes
= 0;
2513 printk(KERN_WARNING
"Invalid NAND_ECC_MODE %d\n",
2519 * The number of bytes available for a client to place data into
2520 * the out of band area
2522 chip
->ecc
.layout
->oobavail
= 0;
2523 for (i
= 0; chip
->ecc
.layout
->oobfree
[i
].length
; i
++)
2524 chip
->ecc
.layout
->oobavail
+=
2525 chip
->ecc
.layout
->oobfree
[i
].length
;
2526 mtd
->oobavail
= chip
->ecc
.layout
->oobavail
;
2529 * Set the number of read / write steps for one page depending on ECC
2532 chip
->ecc
.steps
= mtd
->writesize
/ chip
->ecc
.size
;
2533 if(chip
->ecc
.steps
* chip
->ecc
.size
!= mtd
->writesize
) {
2534 printk(KERN_WARNING
"Invalid ecc parameters\n");
2537 chip
->ecc
.total
= chip
->ecc
.steps
* chip
->ecc
.bytes
;
2540 * Allow subpage writes up to ecc.steps. Not possible for MLC
2543 if (!(chip
->options
& NAND_NO_SUBPAGE_WRITE
) &&
2544 !(chip
->cellinfo
& NAND_CI_CELLTYPE_MSK
)) {
2545 switch(chip
->ecc
.steps
) {
2547 mtd
->subpage_sft
= 1;
2551 mtd
->subpage_sft
= 2;
2555 chip
->subpagesize
= mtd
->writesize
>> mtd
->subpage_sft
;
2557 /* Initialize state */
2558 chip
->state
= FL_READY
;
2560 /* De-select the device */
2561 chip
->select_chip(mtd
, -1);
2563 /* Invalidate the pagebuffer reference */
2566 /* Fill in remaining MTD driver data */
2567 mtd
->type
= MTD_NANDFLASH
;
2568 mtd
->flags
= MTD_CAP_NANDFLASH
;
2569 mtd
->erase
= nand_erase
;
2571 mtd
->unpoint
= NULL
;
2572 mtd
->read
= nand_read
;
2573 mtd
->write
= nand_write
;
2574 mtd
->read_oob
= nand_read_oob
;
2575 mtd
->write_oob
= nand_write_oob
;
2576 mtd
->sync
= nand_sync
;
2579 mtd
->suspend
= nand_suspend
;
2580 mtd
->resume
= nand_resume
;
2581 mtd
->block_isbad
= nand_block_isbad
;
2582 mtd
->block_markbad
= nand_block_markbad
;
2584 /* propagate ecc.layout to mtd_info */
2585 mtd
->ecclayout
= chip
->ecc
.layout
;
2587 /* Check, if we should skip the bad block table scan */
2588 if (chip
->options
& NAND_SKIP_BBTSCAN
)
2591 /* Build bad block table */
2592 return chip
->scan_bbt(mtd
);
2595 /* module_text_address() isn't exported, and it's mostly a pointless
2596 test if this is a module _anyway_ -- they'd have to try _really_ hard
2597 to call us from in-kernel code if the core NAND support is modular. */
2599 #define caller_is_module() (1)
2601 #define caller_is_module() \
2602 module_text_address((unsigned long)__builtin_return_address(0))
2606 * nand_scan - [NAND Interface] Scan for the NAND device
2607 * @mtd: MTD device structure
2608 * @maxchips: Number of chips to scan for
2610 * This fills out all the uninitialized function pointers
2611 * with the defaults.
2612 * The flash ID is read and the mtd/chip structures are
2613 * filled with the appropriate values.
2614 * The mtd->owner field must be set to the module of the caller
2617 int nand_scan(struct mtd_info
*mtd
, int maxchips
)
2621 /* Many callers got this wrong, so check for it for a while... */
2622 if (!mtd
->owner
&& caller_is_module()) {
2623 printk(KERN_CRIT
"nand_scan() called with NULL mtd->owner!\n");
2627 ret
= nand_scan_ident(mtd
, maxchips
);
2629 ret
= nand_scan_tail(mtd
);
2634 * nand_release - [NAND Interface] Free resources held by the NAND device
2635 * @mtd: MTD device structure
2637 void nand_release(struct mtd_info
*mtd
)
2639 struct nand_chip
*chip
= mtd
->priv
;
2641 #ifdef CONFIG_MTD_PARTITIONS
2642 /* Deregister partitions */
2643 del_mtd_partitions(mtd
);
2645 /* Deregister the device */
2646 del_mtd_device(mtd
);
2648 /* Free bad block table memory */
2650 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2651 kfree(chip
->buffers
);
2654 EXPORT_SYMBOL_GPL(nand_scan
);
2655 EXPORT_SYMBOL_GPL(nand_scan_ident
);
2656 EXPORT_SYMBOL_GPL(nand_scan_tail
);
2657 EXPORT_SYMBOL_GPL(nand_release
);
2659 static int __init
nand_base_init(void)
2661 led_trigger_register_simple("nand-disk", &nand_led_trigger
);
2665 static void __exit
nand_base_exit(void)
2667 led_trigger_unregister_simple(nand_led_trigger
);
2670 module_init(nand_base_init
);
2671 module_exit(nand_base_exit
);
2673 MODULE_LICENSE("GPL");
2674 MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2675 MODULE_DESCRIPTION("Generic NAND flash driver code");