2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/module.h>
8 #include <linux/sched.h>
9 #include <linux/slab.h>
11 #include <linux/interrupt.h>
12 #include <linux/seq_file.h>
13 #include <linux/debugfs.h>
16 #include <asm/processor.h>
17 #include <asm/tlbflush.h>
18 #include <asm/sections.h>
19 #include <asm/uaccess.h>
20 #include <asm/pgalloc.h>
21 #include <asm/proto.h>
25 * The current flushing context - we pass it instead of 5 arguments:
34 unsigned force_split
: 1;
39 static inline unsigned long highmap_start_pfn(void)
41 return __pa(_text
) >> PAGE_SHIFT
;
44 static inline unsigned long highmap_end_pfn(void)
46 return __pa(round_up((unsigned long)_end
, PMD_SIZE
)) >> PAGE_SHIFT
;
51 #ifdef CONFIG_DEBUG_PAGEALLOC
52 # define debug_pagealloc 1
54 # define debug_pagealloc 0
58 within(unsigned long addr
, unsigned long start
, unsigned long end
)
60 return addr
>= start
&& addr
< end
;
68 * clflush_cache_range - flush a cache range with clflush
69 * @addr: virtual start address
70 * @size: number of bytes to flush
72 * clflush is an unordered instruction which needs fencing with mfence
73 * to avoid ordering issues.
75 void clflush_cache_range(void *vaddr
, unsigned int size
)
77 void *vend
= vaddr
+ size
- 1;
81 for (; vaddr
< vend
; vaddr
+= boot_cpu_data
.x86_clflush_size
)
84 * Flush any possible final partial cacheline:
91 static void __cpa_flush_all(void *arg
)
93 unsigned long cache
= (unsigned long)arg
;
96 * Flush all to work around Errata in early athlons regarding
97 * large page flushing.
101 if (cache
&& boot_cpu_data
.x86_model
>= 4)
105 static void cpa_flush_all(unsigned long cache
)
107 BUG_ON(irqs_disabled());
109 on_each_cpu(__cpa_flush_all
, (void *) cache
, 1, 1);
112 static void __cpa_flush_range(void *arg
)
115 * We could optimize that further and do individual per page
116 * tlb invalidates for a low number of pages. Caveat: we must
117 * flush the high aliases on 64bit as well.
122 static void cpa_flush_range(unsigned long start
, int numpages
, int cache
)
124 unsigned int i
, level
;
127 BUG_ON(irqs_disabled());
128 WARN_ON(PAGE_ALIGN(start
) != start
);
130 on_each_cpu(__cpa_flush_range
, NULL
, 1, 1);
136 * We only need to flush on one CPU,
137 * clflush is a MESI-coherent instruction that
138 * will cause all other CPUs to flush the same
141 for (i
= 0, addr
= start
; i
< numpages
; i
++, addr
+= PAGE_SIZE
) {
142 pte_t
*pte
= lookup_address(addr
, &level
);
145 * Only flush present addresses:
147 if (pte
&& (pte_val(*pte
) & _PAGE_PRESENT
))
148 clflush_cache_range((void *) addr
, PAGE_SIZE
);
153 * Certain areas of memory on x86 require very specific protection flags,
154 * for example the BIOS area or kernel text. Callers don't always get this
155 * right (again, ioremap() on BIOS memory is not uncommon) so this function
156 * checks and fixes these known static required protection bits.
158 static inline pgprot_t
static_protections(pgprot_t prot
, unsigned long address
,
161 pgprot_t forbidden
= __pgprot(0);
164 * The BIOS area between 640k and 1Mb needs to be executable for
165 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
167 if (within(pfn
, BIOS_BEGIN
>> PAGE_SHIFT
, BIOS_END
>> PAGE_SHIFT
))
168 pgprot_val(forbidden
) |= _PAGE_NX
;
171 * The kernel text needs to be executable for obvious reasons
172 * Does not cover __inittext since that is gone later on. On
173 * 64bit we do not enforce !NX on the low mapping
175 if (within(address
, (unsigned long)_text
, (unsigned long)_etext
))
176 pgprot_val(forbidden
) |= _PAGE_NX
;
179 * The .rodata section needs to be read-only. Using the pfn
180 * catches all aliases.
182 if (within(pfn
, __pa((unsigned long)__start_rodata
) >> PAGE_SHIFT
,
183 __pa((unsigned long)__end_rodata
) >> PAGE_SHIFT
))
184 pgprot_val(forbidden
) |= _PAGE_RW
;
186 prot
= __pgprot(pgprot_val(prot
) & ~pgprot_val(forbidden
));
192 * Lookup the page table entry for a virtual address. Return a pointer
193 * to the entry and the level of the mapping.
195 * Note: We return pud and pmd either when the entry is marked large
196 * or when the present bit is not set. Otherwise we would return a
197 * pointer to a nonexisting mapping.
199 pte_t
*lookup_address(unsigned long address
, unsigned int *level
)
201 pgd_t
*pgd
= pgd_offset_k(address
);
205 *level
= PG_LEVEL_NONE
;
210 pud
= pud_offset(pgd
, address
);
214 *level
= PG_LEVEL_1G
;
215 if (pud_large(*pud
) || !pud_present(*pud
))
218 pmd
= pmd_offset(pud
, address
);
222 *level
= PG_LEVEL_2M
;
223 if (pmd_large(*pmd
) || !pmd_present(*pmd
))
226 *level
= PG_LEVEL_4K
;
228 return pte_offset_kernel(pmd
, address
);
232 * Set the new pmd in all the pgds we know about:
234 static void __set_pmd_pte(pte_t
*kpte
, unsigned long address
, pte_t pte
)
237 set_pte_atomic(kpte
, pte
);
239 if (!SHARED_KERNEL_PMD
) {
242 list_for_each_entry(page
, &pgd_list
, lru
) {
247 pgd
= (pgd_t
*)page_address(page
) + pgd_index(address
);
248 pud
= pud_offset(pgd
, address
);
249 pmd
= pmd_offset(pud
, address
);
250 set_pte_atomic((pte_t
*)pmd
, pte
);
257 try_preserve_large_page(pte_t
*kpte
, unsigned long address
,
258 struct cpa_data
*cpa
)
260 unsigned long nextpage_addr
, numpages
, pmask
, psize
, flags
, addr
, pfn
;
261 pte_t new_pte
, old_pte
, *tmp
;
262 pgprot_t old_prot
, new_prot
;
266 if (cpa
->force_split
)
269 spin_lock_irqsave(&pgd_lock
, flags
);
271 * Check for races, another CPU might have split this page
274 tmp
= lookup_address(address
, &level
);
280 psize
= PMD_PAGE_SIZE
;
281 pmask
= PMD_PAGE_MASK
;
285 psize
= PUD_PAGE_SIZE
;
286 pmask
= PUD_PAGE_MASK
;
295 * Calculate the number of pages, which fit into this large
296 * page starting at address:
298 nextpage_addr
= (address
+ psize
) & pmask
;
299 numpages
= (nextpage_addr
- address
) >> PAGE_SHIFT
;
300 if (numpages
< cpa
->numpages
)
301 cpa
->numpages
= numpages
;
304 * We are safe now. Check whether the new pgprot is the same:
307 old_prot
= new_prot
= pte_pgprot(old_pte
);
309 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
310 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
313 * old_pte points to the large page base address. So we need
314 * to add the offset of the virtual address:
316 pfn
= pte_pfn(old_pte
) + ((address
& (psize
- 1)) >> PAGE_SHIFT
);
319 new_prot
= static_protections(new_prot
, address
, pfn
);
322 * We need to check the full range, whether
323 * static_protection() requires a different pgprot for one of
324 * the pages in the range we try to preserve:
326 addr
= address
+ PAGE_SIZE
;
328 for (i
= 1; i
< cpa
->numpages
; i
++, addr
+= PAGE_SIZE
, pfn
++) {
329 pgprot_t chk_prot
= static_protections(new_prot
, addr
, pfn
);
331 if (pgprot_val(chk_prot
) != pgprot_val(new_prot
))
336 * If there are no changes, return. maxpages has been updated
339 if (pgprot_val(new_prot
) == pgprot_val(old_prot
)) {
345 * We need to change the attributes. Check, whether we can
346 * change the large page in one go. We request a split, when
347 * the address is not aligned and the number of pages is
348 * smaller than the number of pages in the large page. Note
349 * that we limited the number of possible pages already to
350 * the number of pages in the large page.
352 if (address
== (nextpage_addr
- psize
) && cpa
->numpages
== numpages
) {
354 * The address is aligned and the number of pages
355 * covers the full page.
357 new_pte
= pfn_pte(pte_pfn(old_pte
), canon_pgprot(new_prot
));
358 __set_pmd_pte(kpte
, address
, new_pte
);
364 spin_unlock_irqrestore(&pgd_lock
, flags
);
369 static LIST_HEAD(page_pool
);
370 static unsigned long pool_size
, pool_pages
, pool_low
;
371 static unsigned long pool_used
, pool_failed
;
373 static void cpa_fill_pool(struct page
**ret
)
375 gfp_t gfp
= GFP_KERNEL
;
380 * Avoid recursion (on debug-pagealloc) and also signal
381 * our priority to get to these pagetables:
383 if (current
->flags
& PF_MEMALLOC
)
385 current
->flags
|= PF_MEMALLOC
;
388 * Allocate atomically from atomic contexts:
390 if (in_atomic() || irqs_disabled() || debug_pagealloc
)
391 gfp
= GFP_ATOMIC
| __GFP_NORETRY
| __GFP_NOWARN
;
393 while (pool_pages
< pool_size
|| (ret
&& !*ret
)) {
394 p
= alloc_pages(gfp
, 0);
400 * If the call site needs a page right now, provide it:
406 spin_lock_irqsave(&pgd_lock
, flags
);
407 list_add(&p
->lru
, &page_pool
);
409 spin_unlock_irqrestore(&pgd_lock
, flags
);
412 current
->flags
&= ~PF_MEMALLOC
;
415 #define SHIFT_MB (20 - PAGE_SHIFT)
416 #define ROUND_MB_GB ((1 << 10) - 1)
417 #define SHIFT_MB_GB 10
418 #define POOL_PAGES_PER_GB 16
420 void __init
cpa_init(void)
427 * Calculate the number of pool pages:
429 * Convert totalram (nr of pages) to MiB and round to the next
430 * GiB. Shift MiB to Gib and multiply the result by
433 if (debug_pagealloc
) {
434 gb
= ((si
.totalram
>> SHIFT_MB
) + ROUND_MB_GB
) >> SHIFT_MB_GB
;
435 pool_size
= POOL_PAGES_PER_GB
* gb
;
439 pool_low
= pool_size
;
443 "CPA: page pool initialized %lu of %lu pages preallocated\n",
444 pool_pages
, pool_size
);
447 static int split_large_page(pte_t
*kpte
, unsigned long address
)
449 unsigned long flags
, pfn
, pfninc
= 1;
450 unsigned int i
, level
;
456 * Get a page from the pool. The pool list is protected by the
457 * pgd_lock, which we have to take anyway for the split
460 spin_lock_irqsave(&pgd_lock
, flags
);
461 if (list_empty(&page_pool
)) {
462 spin_unlock_irqrestore(&pgd_lock
, flags
);
464 cpa_fill_pool(&base
);
467 spin_lock_irqsave(&pgd_lock
, flags
);
469 base
= list_first_entry(&page_pool
, struct page
, lru
);
470 list_del(&base
->lru
);
473 if (pool_pages
< pool_low
)
474 pool_low
= pool_pages
;
478 * Check for races, another CPU might have split this page
481 tmp
= lookup_address(address
, &level
);
485 pbase
= (pte_t
*)page_address(base
);
486 paravirt_alloc_pte(&init_mm
, page_to_pfn(base
));
487 ref_prot
= pte_pgprot(pte_clrhuge(*kpte
));
490 if (level
== PG_LEVEL_1G
) {
491 pfninc
= PMD_PAGE_SIZE
>> PAGE_SHIFT
;
492 pgprot_val(ref_prot
) |= _PAGE_PSE
;
497 * Get the target pfn from the original entry:
499 pfn
= pte_pfn(*kpte
);
500 for (i
= 0; i
< PTRS_PER_PTE
; i
++, pfn
+= pfninc
)
501 set_pte(&pbase
[i
], pfn_pte(pfn
, ref_prot
));
504 * Install the new, split up pagetable. Important details here:
506 * On Intel the NX bit of all levels must be cleared to make a
507 * page executable. See section 4.13.2 of Intel 64 and IA-32
508 * Architectures Software Developer's Manual).
510 * Mark the entry present. The current mapping might be
511 * set to not present, which we preserved above.
513 ref_prot
= pte_pgprot(pte_mkexec(pte_clrhuge(*kpte
)));
514 pgprot_val(ref_prot
) |= _PAGE_PRESENT
;
515 __set_pmd_pte(kpte
, address
, mk_pte(base
, ref_prot
));
520 * If we dropped out via the lookup_address check under
521 * pgd_lock then stick the page back into the pool:
524 list_add(&base
->lru
, &page_pool
);
528 spin_unlock_irqrestore(&pgd_lock
, flags
);
533 static int __change_page_attr(struct cpa_data
*cpa
, int primary
)
535 unsigned long address
= cpa
->vaddr
;
538 pte_t
*kpte
, old_pte
;
541 kpte
= lookup_address(address
, &level
);
546 if (!pte_val(old_pte
)) {
549 printk(KERN_WARNING
"CPA: called for zero pte. "
550 "vaddr = %lx cpa->vaddr = %lx\n", address
,
556 if (level
== PG_LEVEL_4K
) {
558 pgprot_t new_prot
= pte_pgprot(old_pte
);
559 unsigned long pfn
= pte_pfn(old_pte
);
561 pgprot_val(new_prot
) &= ~pgprot_val(cpa
->mask_clr
);
562 pgprot_val(new_prot
) |= pgprot_val(cpa
->mask_set
);
564 new_prot
= static_protections(new_prot
, address
, pfn
);
567 * We need to keep the pfn from the existing PTE,
568 * after all we're only going to change it's attributes
569 * not the memory it points to
571 new_pte
= pfn_pte(pfn
, canon_pgprot(new_prot
));
574 * Do we really change anything ?
576 if (pte_val(old_pte
) != pte_val(new_pte
)) {
577 set_pte_atomic(kpte
, new_pte
);
585 * Check, whether we can keep the large page intact
586 * and just change the pte:
588 do_split
= try_preserve_large_page(kpte
, address
, cpa
);
590 * When the range fits into the existing large page,
591 * return. cp->numpages and cpa->tlbflush have been updated in
598 * We have to split the large page:
600 err
= split_large_page(kpte
, address
);
609 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
);
611 static int cpa_process_alias(struct cpa_data
*cpa
)
613 struct cpa_data alias_cpa
;
616 if (cpa
->pfn
> max_pfn_mapped
)
620 * No need to redo, when the primary call touched the direct
623 if (!within(cpa
->vaddr
, PAGE_OFFSET
,
624 PAGE_OFFSET
+ (max_pfn_mapped
<< PAGE_SHIFT
))) {
627 alias_cpa
.vaddr
= (unsigned long) __va(cpa
->pfn
<< PAGE_SHIFT
);
629 ret
= __change_page_attr_set_clr(&alias_cpa
, 0);
636 * No need to redo, when the primary call touched the high
639 if (within(cpa
->vaddr
, (unsigned long) _text
, (unsigned long) _end
))
643 * If the physical address is inside the kernel map, we need
644 * to touch the high mapped kernel as well:
646 if (!within(cpa
->pfn
, highmap_start_pfn(), highmap_end_pfn()))
651 (cpa
->pfn
<< PAGE_SHIFT
) + __START_KERNEL_map
- phys_base
;
654 * The high mapping range is imprecise, so ignore the return value.
656 __change_page_attr_set_clr(&alias_cpa
, 0);
661 static int __change_page_attr_set_clr(struct cpa_data
*cpa
, int checkalias
)
663 int ret
, numpages
= cpa
->numpages
;
667 * Store the remaining nr of pages for the large page
668 * preservation check.
670 cpa
->numpages
= numpages
;
672 ret
= __change_page_attr(cpa
, checkalias
);
677 ret
= cpa_process_alias(cpa
);
683 * Adjust the number of pages with the result of the
684 * CPA operation. Either a large page has been
685 * preserved or a single page update happened.
687 BUG_ON(cpa
->numpages
> numpages
);
688 numpages
-= cpa
->numpages
;
689 cpa
->vaddr
+= cpa
->numpages
* PAGE_SIZE
;
694 static inline int cache_attr(pgprot_t attr
)
696 return pgprot_val(attr
) &
697 (_PAGE_PAT
| _PAGE_PAT_LARGE
| _PAGE_PWT
| _PAGE_PCD
);
700 static int change_page_attr_set_clr(unsigned long addr
, int numpages
,
701 pgprot_t mask_set
, pgprot_t mask_clr
,
705 int ret
, cache
, checkalias
;
708 * Check, if we are requested to change a not supported
711 mask_set
= canon_pgprot(mask_set
);
712 mask_clr
= canon_pgprot(mask_clr
);
713 if (!pgprot_val(mask_set
) && !pgprot_val(mask_clr
) && !force_split
)
716 /* Ensure we are PAGE_SIZE aligned */
717 if (addr
& ~PAGE_MASK
) {
720 * People should not be passing in unaligned addresses:
726 cpa
.numpages
= numpages
;
727 cpa
.mask_set
= mask_set
;
728 cpa
.mask_clr
= mask_clr
;
730 cpa
.force_split
= force_split
;
732 /* No alias checking for _NX bit modifications */
733 checkalias
= (pgprot_val(mask_set
) | pgprot_val(mask_clr
)) != _PAGE_NX
;
735 ret
= __change_page_attr_set_clr(&cpa
, checkalias
);
738 * Check whether we really changed something:
744 * No need to flush, when we did not set any of the caching
747 cache
= cache_attr(mask_set
);
750 * On success we use clflush, when the CPU supports it to
751 * avoid the wbindv. If the CPU does not support it and in the
752 * error case we fall back to cpa_flush_all (which uses
755 if (!ret
&& cpu_has_clflush
)
756 cpa_flush_range(addr
, numpages
, cache
);
758 cpa_flush_all(cache
);
766 static inline int change_page_attr_set(unsigned long addr
, int numpages
,
769 return change_page_attr_set_clr(addr
, numpages
, mask
, __pgprot(0), 0);
772 static inline int change_page_attr_clear(unsigned long addr
, int numpages
,
775 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0), mask
, 0);
778 int _set_memory_uc(unsigned long addr
, int numpages
)
781 * for now UC MINUS. see comments in ioremap_nocache()
783 return change_page_attr_set(addr
, numpages
,
784 __pgprot(_PAGE_CACHE_UC_MINUS
));
787 int set_memory_uc(unsigned long addr
, int numpages
)
790 * for now UC MINUS. see comments in ioremap_nocache()
792 if (reserve_memtype(addr
, addr
+ numpages
* PAGE_SIZE
,
793 _PAGE_CACHE_UC_MINUS
, NULL
))
796 return _set_memory_uc(addr
, numpages
);
798 EXPORT_SYMBOL(set_memory_uc
);
800 int _set_memory_wc(unsigned long addr
, int numpages
)
802 return change_page_attr_set(addr
, numpages
,
803 __pgprot(_PAGE_CACHE_WC
));
806 int set_memory_wc(unsigned long addr
, int numpages
)
809 return set_memory_uc(addr
, numpages
);
811 if (reserve_memtype(addr
, addr
+ numpages
* PAGE_SIZE
,
812 _PAGE_CACHE_WC
, NULL
))
815 return _set_memory_wc(addr
, numpages
);
817 EXPORT_SYMBOL(set_memory_wc
);
819 int _set_memory_wb(unsigned long addr
, int numpages
)
821 return change_page_attr_clear(addr
, numpages
,
822 __pgprot(_PAGE_CACHE_MASK
));
825 int set_memory_wb(unsigned long addr
, int numpages
)
827 free_memtype(addr
, addr
+ numpages
* PAGE_SIZE
);
829 return _set_memory_wb(addr
, numpages
);
831 EXPORT_SYMBOL(set_memory_wb
);
833 int set_memory_x(unsigned long addr
, int numpages
)
835 return change_page_attr_clear(addr
, numpages
, __pgprot(_PAGE_NX
));
837 EXPORT_SYMBOL(set_memory_x
);
839 int set_memory_nx(unsigned long addr
, int numpages
)
841 return change_page_attr_set(addr
, numpages
, __pgprot(_PAGE_NX
));
843 EXPORT_SYMBOL(set_memory_nx
);
845 int set_memory_ro(unsigned long addr
, int numpages
)
847 return change_page_attr_clear(addr
, numpages
, __pgprot(_PAGE_RW
));
850 int set_memory_rw(unsigned long addr
, int numpages
)
852 return change_page_attr_set(addr
, numpages
, __pgprot(_PAGE_RW
));
855 int set_memory_np(unsigned long addr
, int numpages
)
857 return change_page_attr_clear(addr
, numpages
, __pgprot(_PAGE_PRESENT
));
860 int set_memory_4k(unsigned long addr
, int numpages
)
862 return change_page_attr_set_clr(addr
, numpages
, __pgprot(0),
866 int set_pages_uc(struct page
*page
, int numpages
)
868 unsigned long addr
= (unsigned long)page_address(page
);
870 return set_memory_uc(addr
, numpages
);
872 EXPORT_SYMBOL(set_pages_uc
);
874 int set_pages_wb(struct page
*page
, int numpages
)
876 unsigned long addr
= (unsigned long)page_address(page
);
878 return set_memory_wb(addr
, numpages
);
880 EXPORT_SYMBOL(set_pages_wb
);
882 int set_pages_x(struct page
*page
, int numpages
)
884 unsigned long addr
= (unsigned long)page_address(page
);
886 return set_memory_x(addr
, numpages
);
888 EXPORT_SYMBOL(set_pages_x
);
890 int set_pages_nx(struct page
*page
, int numpages
)
892 unsigned long addr
= (unsigned long)page_address(page
);
894 return set_memory_nx(addr
, numpages
);
896 EXPORT_SYMBOL(set_pages_nx
);
898 int set_pages_ro(struct page
*page
, int numpages
)
900 unsigned long addr
= (unsigned long)page_address(page
);
902 return set_memory_ro(addr
, numpages
);
905 int set_pages_rw(struct page
*page
, int numpages
)
907 unsigned long addr
= (unsigned long)page_address(page
);
909 return set_memory_rw(addr
, numpages
);
912 #ifdef CONFIG_DEBUG_PAGEALLOC
914 static int __set_pages_p(struct page
*page
, int numpages
)
916 struct cpa_data cpa
= { .vaddr
= (unsigned long) page_address(page
),
917 .numpages
= numpages
,
918 .mask_set
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
),
919 .mask_clr
= __pgprot(0)};
921 return __change_page_attr_set_clr(&cpa
, 1);
924 static int __set_pages_np(struct page
*page
, int numpages
)
926 struct cpa_data cpa
= { .vaddr
= (unsigned long) page_address(page
),
927 .numpages
= numpages
,
928 .mask_set
= __pgprot(0),
929 .mask_clr
= __pgprot(_PAGE_PRESENT
| _PAGE_RW
)};
931 return __change_page_attr_set_clr(&cpa
, 1);
934 void kernel_map_pages(struct page
*page
, int numpages
, int enable
)
936 if (PageHighMem(page
))
939 debug_check_no_locks_freed(page_address(page
),
940 numpages
* PAGE_SIZE
);
944 * If page allocator is not up yet then do not call c_p_a():
946 if (!debug_pagealloc_enabled
)
950 * The return value is ignored as the calls cannot fail.
951 * Large pages are kept enabled at boot time, and are
952 * split up quickly with DEBUG_PAGEALLOC. If a splitup
953 * fails here (due to temporary memory shortage) no damage
954 * is done because we just keep the largepage intact up
955 * to the next attempt when it will likely be split up:
958 __set_pages_p(page
, numpages
);
960 __set_pages_np(page
, numpages
);
963 * We should perform an IPI and flush all tlbs,
964 * but that can deadlock->flush only current cpu:
969 * Try to refill the page pool here. We can do this only after
975 #ifdef CONFIG_DEBUG_FS
976 static int dpa_show(struct seq_file
*m
, void *v
)
978 seq_puts(m
, "DEBUG_PAGEALLOC\n");
979 seq_printf(m
, "pool_size : %lu\n", pool_size
);
980 seq_printf(m
, "pool_pages : %lu\n", pool_pages
);
981 seq_printf(m
, "pool_low : %lu\n", pool_low
);
982 seq_printf(m
, "pool_used : %lu\n", pool_used
);
983 seq_printf(m
, "pool_failed : %lu\n", pool_failed
);
988 static int dpa_open(struct inode
*inode
, struct file
*filp
)
990 return single_open(filp
, dpa_show
, NULL
);
993 static const struct file_operations dpa_fops
= {
997 .release
= single_release
,
1000 static int __init
debug_pagealloc_proc_init(void)
1004 de
= debugfs_create_file("debug_pagealloc", 0600, NULL
, NULL
,
1011 __initcall(debug_pagealloc_proc_init
);
1014 #ifdef CONFIG_HIBERNATION
1016 bool kernel_page_present(struct page
*page
)
1021 if (PageHighMem(page
))
1024 pte
= lookup_address((unsigned long)page_address(page
), &level
);
1025 return (pte_val(*pte
) & _PAGE_PRESENT
);
1028 #endif /* CONFIG_HIBERNATION */
1030 #endif /* CONFIG_DEBUG_PAGEALLOC */
1033 * The testcases use internal knowledge of the implementation that shouldn't
1034 * be exposed to the rest of the kernel. Include these directly here.
1036 #ifdef CONFIG_CPA_DEBUG
1037 #include "pageattr-test.c"