5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/tech/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
28 * This program is free software; you can redistribute it and/or modify
29 * it under the terms of the GNU General Public License version 2 as
30 * published by the Free Software Foundation.
34 #include <linux/module.h>
35 #include <linux/delay.h>
36 #include <linux/errno.h>
37 #include <linux/err.h>
38 #include <linux/sched.h>
39 #include <linux/slab.h>
40 #include <linux/types.h>
41 #include <linux/mtd/mtd.h>
42 #include <linux/mtd/nand.h>
43 #include <linux/mtd/nand_ecc.h>
44 #include <linux/mtd/compatmac.h>
45 #include <linux/interrupt.h>
46 #include <linux/bitops.h>
47 #include <linux/leds.h>
50 #ifdef CONFIG_MTD_PARTITIONS
51 #include <linux/mtd/partitions.h>
54 /* Define default oob placement schemes for large and small page devices */
55 static struct nand_ecclayout nand_oob_8
= {
65 static struct nand_ecclayout nand_oob_16
= {
67 .eccpos
= {0, 1, 2, 3, 6, 7},
73 static struct nand_ecclayout nand_oob_64
= {
76 40, 41, 42, 43, 44, 45, 46, 47,
77 48, 49, 50, 51, 52, 53, 54, 55,
78 56, 57, 58, 59, 60, 61, 62, 63},
84 static int nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
,
87 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
88 struct mtd_oob_ops
*ops
);
91 * For devices which display every fart in the system on a seperate LED. Is
92 * compiled away when LED support is disabled.
94 DEFINE_LED_TRIGGER(nand_led_trigger
);
97 * nand_release_device - [GENERIC] release chip
98 * @mtd: MTD device structure
100 * Deselect, release chip lock and wake up anyone waiting on the device
102 static void nand_release_device(struct mtd_info
*mtd
)
104 struct nand_chip
*chip
= mtd
->priv
;
106 /* De-select the NAND device */
107 chip
->select_chip(mtd
, -1);
109 /* Release the controller and the chip */
110 spin_lock(&chip
->controller
->lock
);
111 chip
->controller
->active
= NULL
;
112 chip
->state
= FL_READY
;
113 wake_up(&chip
->controller
->wq
);
114 spin_unlock(&chip
->controller
->lock
);
118 * nand_read_byte - [DEFAULT] read one byte from the chip
119 * @mtd: MTD device structure
121 * Default read function for 8bit buswith
123 static uint8_t nand_read_byte(struct mtd_info
*mtd
)
125 struct nand_chip
*chip
= mtd
->priv
;
126 return readb(chip
->IO_ADDR_R
);
130 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
131 * @mtd: MTD device structure
133 * Default read function for 16bit buswith with
134 * endianess conversion
136 static uint8_t nand_read_byte16(struct mtd_info
*mtd
)
138 struct nand_chip
*chip
= mtd
->priv
;
139 return (uint8_t) cpu_to_le16(readw(chip
->IO_ADDR_R
));
143 * nand_read_word - [DEFAULT] read one word from the chip
144 * @mtd: MTD device structure
146 * Default read function for 16bit buswith without
147 * endianess conversion
149 static u16
nand_read_word(struct mtd_info
*mtd
)
151 struct nand_chip
*chip
= mtd
->priv
;
152 return readw(chip
->IO_ADDR_R
);
156 * nand_select_chip - [DEFAULT] control CE line
157 * @mtd: MTD device structure
158 * @chipnr: chipnumber to select, -1 for deselect
160 * Default select function for 1 chip devices.
162 static void nand_select_chip(struct mtd_info
*mtd
, int chipnr
)
164 struct nand_chip
*chip
= mtd
->priv
;
168 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
179 * nand_write_buf - [DEFAULT] write buffer to chip
180 * @mtd: MTD device structure
182 * @len: number of bytes to write
184 * Default write function for 8bit buswith
186 static void nand_write_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
189 struct nand_chip
*chip
= mtd
->priv
;
191 for (i
= 0; i
< len
; i
++)
192 writeb(buf
[i
], chip
->IO_ADDR_W
);
196 * nand_read_buf - [DEFAULT] read chip data into buffer
197 * @mtd: MTD device structure
198 * @buf: buffer to store date
199 * @len: number of bytes to read
201 * Default read function for 8bit buswith
203 static void nand_read_buf(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
206 struct nand_chip
*chip
= mtd
->priv
;
208 for (i
= 0; i
< len
; i
++)
209 buf
[i
] = readb(chip
->IO_ADDR_R
);
213 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
214 * @mtd: MTD device structure
215 * @buf: buffer containing the data to compare
216 * @len: number of bytes to compare
218 * Default verify function for 8bit buswith
220 static int nand_verify_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
223 struct nand_chip
*chip
= mtd
->priv
;
225 for (i
= 0; i
< len
; i
++)
226 if (buf
[i
] != readb(chip
->IO_ADDR_R
))
232 * nand_write_buf16 - [DEFAULT] write buffer to chip
233 * @mtd: MTD device structure
235 * @len: number of bytes to write
237 * Default write function for 16bit buswith
239 static void nand_write_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
242 struct nand_chip
*chip
= mtd
->priv
;
243 u16
*p
= (u16
*) buf
;
246 for (i
= 0; i
< len
; i
++)
247 writew(p
[i
], chip
->IO_ADDR_W
);
252 * nand_read_buf16 - [DEFAULT] read chip data into buffer
253 * @mtd: MTD device structure
254 * @buf: buffer to store date
255 * @len: number of bytes to read
257 * Default read function for 16bit buswith
259 static void nand_read_buf16(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
262 struct nand_chip
*chip
= mtd
->priv
;
263 u16
*p
= (u16
*) buf
;
266 for (i
= 0; i
< len
; i
++)
267 p
[i
] = readw(chip
->IO_ADDR_R
);
271 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
272 * @mtd: MTD device structure
273 * @buf: buffer containing the data to compare
274 * @len: number of bytes to compare
276 * Default verify function for 16bit buswith
278 static int nand_verify_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
281 struct nand_chip
*chip
= mtd
->priv
;
282 u16
*p
= (u16
*) buf
;
285 for (i
= 0; i
< len
; i
++)
286 if (p
[i
] != readw(chip
->IO_ADDR_R
))
293 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
294 * @mtd: MTD device structure
295 * @ofs: offset from device start
296 * @getchip: 0, if the chip is already selected
298 * Check, if the block is bad.
300 static int nand_block_bad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
)
302 int page
, chipnr
, res
= 0;
303 struct nand_chip
*chip
= mtd
->priv
;
307 page
= (int)(ofs
>> chip
->page_shift
);
308 chipnr
= (int)(ofs
>> chip
->chip_shift
);
310 nand_get_device(chip
, mtd
, FL_READING
);
312 /* Select the NAND device */
313 chip
->select_chip(mtd
, chipnr
);
317 if (chip
->options
& NAND_BUSWIDTH_16
) {
318 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
& 0xFE,
319 page
& chip
->pagemask
);
320 bad
= cpu_to_le16(chip
->read_word(mtd
));
321 if (chip
->badblockpos
& 0x1)
323 if ((bad
& 0xFF) != 0xff)
326 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
,
327 page
& chip
->pagemask
);
328 if (chip
->read_byte(mtd
) != 0xff)
333 nand_release_device(mtd
);
339 * nand_default_block_markbad - [DEFAULT] mark a block bad
340 * @mtd: MTD device structure
341 * @ofs: offset from device start
343 * This is the default implementation, which can be overridden by
344 * a hardware specific driver.
346 static int nand_default_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
348 struct nand_chip
*chip
= mtd
->priv
;
349 uint8_t buf
[2] = { 0, 0 };
352 /* Get block number */
353 block
= ((int)ofs
) >> chip
->bbt_erase_shift
;
355 chip
->bbt
[block
>> 2] |= 0x01 << ((block
& 0x03) << 1);
357 /* Do we have a flash based bad block table ? */
358 if (chip
->options
& NAND_USE_FLASH_BBT
)
359 ret
= nand_update_bbt(mtd
, ofs
);
361 /* We write two bytes, so we dont have to mess with 16 bit
366 chip
->ops
.datbuf
= NULL
;
367 chip
->ops
.oobbuf
= buf
;
368 chip
->ops
.ooboffs
= chip
->badblockpos
& ~0x01;
370 ret
= nand_do_write_oob(mtd
, ofs
, &chip
->ops
);
373 mtd
->ecc_stats
.badblocks
++;
378 * nand_check_wp - [GENERIC] check if the chip is write protected
379 * @mtd: MTD device structure
380 * Check, if the device is write protected
382 * The function expects, that the device is already selected
384 static int nand_check_wp(struct mtd_info
*mtd
)
386 struct nand_chip
*chip
= mtd
->priv
;
387 /* Check the WP bit */
388 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
389 return (chip
->read_byte(mtd
) & NAND_STATUS_WP
) ? 0 : 1;
393 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
394 * @mtd: MTD device structure
395 * @ofs: offset from device start
396 * @getchip: 0, if the chip is already selected
397 * @allowbbt: 1, if its allowed to access the bbt area
399 * Check, if the block is bad. Either by reading the bad block table or
400 * calling of the scan function.
402 static int nand_block_checkbad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
,
405 struct nand_chip
*chip
= mtd
->priv
;
408 return chip
->block_bad(mtd
, ofs
, getchip
);
410 /* Return info from the table */
411 return nand_isbad_bbt(mtd
, ofs
, allowbbt
);
415 * Wait for the ready pin, after a command
416 * The timeout is catched later.
418 void nand_wait_ready(struct mtd_info
*mtd
)
420 struct nand_chip
*chip
= mtd
->priv
;
421 unsigned long timeo
= jiffies
+ 2;
423 led_trigger_event(nand_led_trigger
, LED_FULL
);
424 /* wait until command is processed or timeout occures */
426 if (chip
->dev_ready(mtd
))
428 touch_softlockup_watchdog();
429 } while (time_before(jiffies
, timeo
));
430 led_trigger_event(nand_led_trigger
, LED_OFF
);
432 EXPORT_SYMBOL_GPL(nand_wait_ready
);
435 * nand_command - [DEFAULT] Send command to NAND device
436 * @mtd: MTD device structure
437 * @command: the command to be sent
438 * @column: the column address for this command, -1 if none
439 * @page_addr: the page address for this command, -1 if none
441 * Send command to NAND device. This function is used for small page
442 * devices (256/512 Bytes per page)
444 static void nand_command(struct mtd_info
*mtd
, unsigned int command
,
445 int column
, int page_addr
)
447 register struct nand_chip
*chip
= mtd
->priv
;
448 int ctrl
= NAND_CTRL_CLE
| NAND_CTRL_CHANGE
;
451 * Write out the command to the device.
453 if (command
== NAND_CMD_SEQIN
) {
456 if (column
>= mtd
->writesize
) {
458 column
-= mtd
->writesize
;
459 readcmd
= NAND_CMD_READOOB
;
460 } else if (column
< 256) {
461 /* First 256 bytes --> READ0 */
462 readcmd
= NAND_CMD_READ0
;
465 readcmd
= NAND_CMD_READ1
;
467 chip
->cmd_ctrl(mtd
, readcmd
, ctrl
);
468 ctrl
&= ~NAND_CTRL_CHANGE
;
470 chip
->cmd_ctrl(mtd
, command
, ctrl
);
473 * Address cycle, when necessary
475 ctrl
= NAND_CTRL_ALE
| NAND_CTRL_CHANGE
;
476 /* Serially input address */
478 /* Adjust columns for 16 bit buswidth */
479 if (chip
->options
& NAND_BUSWIDTH_16
)
481 chip
->cmd_ctrl(mtd
, column
, ctrl
);
482 ctrl
&= ~NAND_CTRL_CHANGE
;
484 if (page_addr
!= -1) {
485 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
486 ctrl
&= ~NAND_CTRL_CHANGE
;
487 chip
->cmd_ctrl(mtd
, page_addr
>> 8, ctrl
);
488 /* One more address cycle for devices > 32MiB */
489 if (chip
->chipsize
> (32 << 20))
490 chip
->cmd_ctrl(mtd
, page_addr
>> 16, ctrl
);
492 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
495 * program and erase have their own busy handlers
496 * status and sequential in needs no delay
500 case NAND_CMD_PAGEPROG
:
501 case NAND_CMD_ERASE1
:
502 case NAND_CMD_ERASE2
:
504 case NAND_CMD_STATUS
:
510 udelay(chip
->chip_delay
);
511 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
512 NAND_CTRL_CLE
| NAND_CTRL_CHANGE
);
514 NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
515 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
518 /* This applies to read commands */
521 * If we don't have access to the busy pin, we apply the given
524 if (!chip
->dev_ready
) {
525 udelay(chip
->chip_delay
);
529 /* Apply this short delay always to ensure that we do wait tWB in
530 * any case on any machine. */
533 nand_wait_ready(mtd
);
537 * nand_command_lp - [DEFAULT] Send command to NAND large page device
538 * @mtd: MTD device structure
539 * @command: the command to be sent
540 * @column: the column address for this command, -1 if none
541 * @page_addr: the page address for this command, -1 if none
543 * Send command to NAND device. This is the version for the new large page
544 * devices We dont have the separate regions as we have in the small page
545 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
547 static void nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
548 int column
, int page_addr
)
550 register struct nand_chip
*chip
= mtd
->priv
;
552 /* Emulate NAND_CMD_READOOB */
553 if (command
== NAND_CMD_READOOB
) {
554 column
+= mtd
->writesize
;
555 command
= NAND_CMD_READ0
;
558 /* Command latch cycle */
559 chip
->cmd_ctrl(mtd
, command
& 0xff,
560 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
562 if (column
!= -1 || page_addr
!= -1) {
563 int ctrl
= NAND_CTRL_CHANGE
| NAND_NCE
| NAND_ALE
;
565 /* Serially input address */
567 /* Adjust columns for 16 bit buswidth */
568 if (chip
->options
& NAND_BUSWIDTH_16
)
570 chip
->cmd_ctrl(mtd
, column
, ctrl
);
571 ctrl
&= ~NAND_CTRL_CHANGE
;
572 chip
->cmd_ctrl(mtd
, column
>> 8, ctrl
);
574 if (page_addr
!= -1) {
575 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
576 chip
->cmd_ctrl(mtd
, page_addr
>> 8,
577 NAND_NCE
| NAND_ALE
);
578 /* One more address cycle for devices > 128MiB */
579 if (chip
->chipsize
> (128 << 20))
580 chip
->cmd_ctrl(mtd
, page_addr
>> 16,
581 NAND_NCE
| NAND_ALE
);
584 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
587 * program and erase have their own busy handlers
588 * status, sequential in, and deplete1 need no delay
592 case NAND_CMD_CACHEDPROG
:
593 case NAND_CMD_PAGEPROG
:
594 case NAND_CMD_ERASE1
:
595 case NAND_CMD_ERASE2
:
598 case NAND_CMD_STATUS
:
599 case NAND_CMD_DEPLETE1
:
603 * read error status commands require only a short delay
605 case NAND_CMD_STATUS_ERROR
:
606 case NAND_CMD_STATUS_ERROR0
:
607 case NAND_CMD_STATUS_ERROR1
:
608 case NAND_CMD_STATUS_ERROR2
:
609 case NAND_CMD_STATUS_ERROR3
:
610 udelay(chip
->chip_delay
);
616 udelay(chip
->chip_delay
);
617 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
618 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
619 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
620 NAND_NCE
| NAND_CTRL_CHANGE
);
621 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
624 case NAND_CMD_RNDOUT
:
625 /* No ready / busy check necessary */
626 chip
->cmd_ctrl(mtd
, NAND_CMD_RNDOUTSTART
,
627 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
628 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
629 NAND_NCE
| NAND_CTRL_CHANGE
);
633 chip
->cmd_ctrl(mtd
, NAND_CMD_READSTART
,
634 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
635 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
636 NAND_NCE
| NAND_CTRL_CHANGE
);
638 /* This applies to read commands */
641 * If we don't have access to the busy pin, we apply the given
644 if (!chip
->dev_ready
) {
645 udelay(chip
->chip_delay
);
650 /* Apply this short delay always to ensure that we do wait tWB in
651 * any case on any machine. */
654 nand_wait_ready(mtd
);
658 * nand_get_device - [GENERIC] Get chip for selected access
659 * @chip: the nand chip descriptor
660 * @mtd: MTD device structure
661 * @new_state: the state which is requested
663 * Get the device and lock it for exclusive access
666 nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
, int new_state
)
668 spinlock_t
*lock
= &chip
->controller
->lock
;
669 wait_queue_head_t
*wq
= &chip
->controller
->wq
;
670 DECLARE_WAITQUEUE(wait
, current
);
674 /* Hardware controller shared among independend devices */
675 /* Hardware controller shared among independend devices */
676 if (!chip
->controller
->active
)
677 chip
->controller
->active
= chip
;
679 if (chip
->controller
->active
== chip
&& chip
->state
== FL_READY
) {
680 chip
->state
= new_state
;
684 if (new_state
== FL_PM_SUSPENDED
) {
686 return (chip
->state
== FL_PM_SUSPENDED
) ? 0 : -EAGAIN
;
688 set_current_state(TASK_UNINTERRUPTIBLE
);
689 add_wait_queue(wq
, &wait
);
692 remove_wait_queue(wq
, &wait
);
697 * nand_wait - [DEFAULT] wait until the command is done
698 * @mtd: MTD device structure
699 * @chip: NAND chip structure
701 * Wait for command done. This applies to erase and program only
702 * Erase can take up to 400ms and program up to 20ms according to
703 * general NAND and SmartMedia specs
705 static int nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
)
708 unsigned long timeo
= jiffies
;
709 int status
, state
= chip
->state
;
711 if (state
== FL_ERASING
)
712 timeo
+= (HZ
* 400) / 1000;
714 timeo
+= (HZ
* 20) / 1000;
716 led_trigger_event(nand_led_trigger
, LED_FULL
);
718 /* Apply this short delay always to ensure that we do wait tWB in
719 * any case on any machine. */
722 if ((state
== FL_ERASING
) && (chip
->options
& NAND_IS_AND
))
723 chip
->cmdfunc(mtd
, NAND_CMD_STATUS_MULTI
, -1, -1);
725 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
727 while (time_before(jiffies
, timeo
)) {
728 if (chip
->dev_ready
) {
729 if (chip
->dev_ready(mtd
))
732 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
737 led_trigger_event(nand_led_trigger
, LED_OFF
);
739 status
= (int)chip
->read_byte(mtd
);
744 * nand_read_page_raw - [Intern] read raw page data without ecc
745 * @mtd: mtd info structure
746 * @chip: nand chip info structure
747 * @buf: buffer to store read data
749 static int nand_read_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
752 chip
->read_buf(mtd
, buf
, mtd
->writesize
);
753 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
758 * nand_read_page_swecc - {REPLACABLE] software ecc based page read function
759 * @mtd: mtd info structure
760 * @chip: nand chip info structure
761 * @buf: buffer to store read data
763 static int nand_read_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
766 int i
, eccsize
= chip
->ecc
.size
;
767 int eccbytes
= chip
->ecc
.bytes
;
768 int eccsteps
= chip
->ecc
.steps
;
770 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
771 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
772 int *eccpos
= chip
->ecc
.layout
->eccpos
;
774 nand_read_page_raw(mtd
, chip
, buf
);
776 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
777 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
779 for (i
= 0; i
< chip
->ecc
.total
; i
++)
780 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
782 eccsteps
= chip
->ecc
.steps
;
785 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
788 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
790 mtd
->ecc_stats
.failed
++;
792 mtd
->ecc_stats
.corrected
+= stat
;
798 * nand_read_page_hwecc - {REPLACABLE] hardware ecc based page read function
799 * @mtd: mtd info structure
800 * @chip: nand chip info structure
801 * @buf: buffer to store read data
803 * Not for syndrome calculating ecc controllers which need a special oob layout
805 static int nand_read_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
808 int i
, eccsize
= chip
->ecc
.size
;
809 int eccbytes
= chip
->ecc
.bytes
;
810 int eccsteps
= chip
->ecc
.steps
;
812 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
813 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
814 int *eccpos
= chip
->ecc
.layout
->eccpos
;
816 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
817 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
818 chip
->read_buf(mtd
, p
, eccsize
);
819 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
821 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
823 for (i
= 0; i
< chip
->ecc
.total
; i
++)
824 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
826 eccsteps
= chip
->ecc
.steps
;
829 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
832 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
834 mtd
->ecc_stats
.failed
++;
836 mtd
->ecc_stats
.corrected
+= stat
;
842 * nand_read_page_syndrome - {REPLACABLE] hardware ecc syndrom based page read
843 * @mtd: mtd info structure
844 * @chip: nand chip info structure
845 * @buf: buffer to store read data
847 * The hw generator calculates the error syndrome automatically. Therefor
848 * we need a special oob layout and handling.
850 static int nand_read_page_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
853 int i
, eccsize
= chip
->ecc
.size
;
854 int eccbytes
= chip
->ecc
.bytes
;
855 int eccsteps
= chip
->ecc
.steps
;
857 uint8_t *oob
= chip
->oob_poi
;
859 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
862 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
863 chip
->read_buf(mtd
, p
, eccsize
);
865 if (chip
->ecc
.prepad
) {
866 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
867 oob
+= chip
->ecc
.prepad
;
870 chip
->ecc
.hwctl(mtd
, NAND_ECC_READSYN
);
871 chip
->read_buf(mtd
, oob
, eccbytes
);
872 stat
= chip
->ecc
.correct(mtd
, p
, oob
, NULL
);
875 mtd
->ecc_stats
.failed
++;
877 mtd
->ecc_stats
.corrected
+= stat
;
881 if (chip
->ecc
.postpad
) {
882 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
883 oob
+= chip
->ecc
.postpad
;
887 /* Calculate remaining oob bytes */
888 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
890 chip
->read_buf(mtd
, oob
, i
);
896 * nand_transfer_oob - [Internal] Transfer oob to client buffer
897 * @chip: nand chip structure
898 * @oob: oob destination address
899 * @ops: oob ops structure
901 static uint8_t *nand_transfer_oob(struct nand_chip
*chip
, uint8_t *oob
,
902 struct mtd_oob_ops
*ops
)
904 size_t len
= ops
->ooblen
;
910 memcpy(oob
, chip
->oob_poi
+ ops
->ooboffs
, len
);
914 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
915 uint32_t boffs
= 0, roffs
= ops
->ooboffs
;
918 for(; free
->length
&& len
; free
++, len
-= bytes
) {
919 /* Read request not from offset 0 ? */
920 if (unlikely(roffs
)) {
921 if (roffs
>= free
->length
) {
922 roffs
-= free
->length
;
925 boffs
= free
->offset
+ roffs
;
926 bytes
= min_t(size_t, len
,
927 (free
->length
- roffs
));
930 bytes
= min_t(size_t, len
, free
->length
);
931 boffs
= free
->offset
;
933 memcpy(oob
, chip
->oob_poi
+ boffs
, bytes
);
945 * nand_do_read_ops - [Internal] Read data with ECC
947 * @mtd: MTD device structure
948 * @from: offset to read from
949 * @ops: oob ops structure
951 * Internal function. Called with chip held.
953 static int nand_do_read_ops(struct mtd_info
*mtd
, loff_t from
,
954 struct mtd_oob_ops
*ops
)
956 int chipnr
, page
, realpage
, col
, bytes
, aligned
;
957 struct nand_chip
*chip
= mtd
->priv
;
958 struct mtd_ecc_stats stats
;
959 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
962 uint32_t readlen
= ops
->len
;
963 uint8_t *bufpoi
, *oob
, *buf
;
965 stats
= mtd
->ecc_stats
;
967 chipnr
= (int)(from
>> chip
->chip_shift
);
968 chip
->select_chip(mtd
, chipnr
);
970 realpage
= (int)(from
>> chip
->page_shift
);
971 page
= realpage
& chip
->pagemask
;
973 col
= (int)(from
& (mtd
->writesize
- 1));
974 chip
->oob_poi
= chip
->buffers
->oobrbuf
;
980 bytes
= min(mtd
->writesize
- col
, readlen
);
981 aligned
= (bytes
== mtd
->writesize
);
983 /* Is the current page in the buffer ? */
984 if (realpage
!= chip
->pagebuf
|| oob
) {
985 bufpoi
= aligned
? buf
: chip
->buffers
->databuf
;
987 if (likely(sndcmd
)) {
988 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0x00, page
);
992 /* Now read the page into the buffer */
993 ret
= chip
->ecc
.read_page(mtd
, chip
, bufpoi
);
997 /* Transfer not aligned data */
999 chip
->pagebuf
= realpage
;
1000 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1005 if (unlikely(oob
)) {
1006 /* Raw mode does data:oob:data:oob */
1007 if (ops
->mode
!= MTD_OOB_RAW
)
1008 oob
= nand_transfer_oob(chip
, oob
, ops
);
1010 buf
= nand_transfer_oob(chip
, buf
, ops
);
1013 if (!(chip
->options
& NAND_NO_READRDY
)) {
1015 * Apply delay or wait for ready/busy pin. Do
1016 * this before the AUTOINCR check, so no
1017 * problems arise if a chip which does auto
1018 * increment is marked as NOAUTOINCR by the
1021 if (!chip
->dev_ready
)
1022 udelay(chip
->chip_delay
);
1024 nand_wait_ready(mtd
);
1027 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1036 /* For subsequent reads align to page boundary. */
1038 /* Increment page address */
1041 page
= realpage
& chip
->pagemask
;
1042 /* Check, if we cross a chip boundary */
1045 chip
->select_chip(mtd
, -1);
1046 chip
->select_chip(mtd
, chipnr
);
1049 /* Check, if the chip supports auto page increment
1050 * or if we have hit a block boundary.
1052 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1056 ops
->retlen
= ops
->len
- (size_t) readlen
;
1061 if (mtd
->ecc_stats
.failed
- stats
.failed
)
1064 return mtd
->ecc_stats
.corrected
- stats
.corrected
? -EUCLEAN
: 0;
1068 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1069 * @mtd: MTD device structure
1070 * @from: offset to read from
1071 * @len: number of bytes to read
1072 * @retlen: pointer to variable to store the number of read bytes
1073 * @buf: the databuffer to put data
1075 * Get hold of the chip and call nand_do_read
1077 static int nand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
1078 size_t *retlen
, uint8_t *buf
)
1080 struct nand_chip
*chip
= mtd
->priv
;
1083 /* Do not allow reads past end of device */
1084 if ((from
+ len
) > mtd
->size
)
1089 nand_get_device(chip
, mtd
, FL_READING
);
1091 chip
->ops
.len
= len
;
1092 chip
->ops
.datbuf
= buf
;
1093 chip
->ops
.oobbuf
= NULL
;
1095 ret
= nand_do_read_ops(mtd
, from
, &chip
->ops
);
1097 *retlen
= chip
->ops
.retlen
;
1099 nand_release_device(mtd
);
1105 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1106 * @mtd: mtd info structure
1107 * @chip: nand chip info structure
1108 * @page: page number to read
1109 * @sndcmd: flag whether to issue read command or not
1111 static int nand_read_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1112 int page
, int sndcmd
)
1115 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1118 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1123 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1125 * @mtd: mtd info structure
1126 * @chip: nand chip info structure
1127 * @page: page number to read
1128 * @sndcmd: flag whether to issue read command or not
1130 static int nand_read_oob_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1131 int page
, int sndcmd
)
1133 uint8_t *buf
= chip
->oob_poi
;
1134 int length
= mtd
->oobsize
;
1135 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1136 int eccsize
= chip
->ecc
.size
;
1137 uint8_t *bufpoi
= buf
;
1138 int i
, toread
, sndrnd
= 0, pos
;
1140 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, chip
->ecc
.size
, page
);
1141 for (i
= 0; i
< chip
->ecc
.steps
; i
++) {
1143 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1144 if (mtd
->writesize
> 512)
1145 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, pos
, -1);
1147 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, pos
, page
);
1150 toread
= min_t(int, length
, chunk
);
1151 chip
->read_buf(mtd
, bufpoi
, toread
);
1156 chip
->read_buf(mtd
, bufpoi
, length
);
1162 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1163 * @mtd: mtd info structure
1164 * @chip: nand chip info structure
1165 * @page: page number to write
1167 static int nand_write_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1171 const uint8_t *buf
= chip
->oob_poi
;
1172 int length
= mtd
->oobsize
;
1174 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, mtd
->writesize
, page
);
1175 chip
->write_buf(mtd
, buf
, length
);
1176 /* Send command to program the OOB data */
1177 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1179 status
= chip
->waitfunc(mtd
, chip
);
1181 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1185 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1186 * with syndrome - only for large page flash !
1187 * @mtd: mtd info structure
1188 * @chip: nand chip info structure
1189 * @page: page number to write
1191 static int nand_write_oob_syndrome(struct mtd_info
*mtd
,
1192 struct nand_chip
*chip
, int page
)
1194 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1195 int eccsize
= chip
->ecc
.size
, length
= mtd
->oobsize
;
1196 int i
, len
, pos
, status
= 0, sndcmd
= 0, steps
= chip
->ecc
.steps
;
1197 const uint8_t *bufpoi
= chip
->oob_poi
;
1200 * data-ecc-data-ecc ... ecc-oob
1202 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1204 if (!chip
->ecc
.prepad
&& !chip
->ecc
.postpad
) {
1205 pos
= steps
* (eccsize
+ chunk
);
1210 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, pos
, page
);
1211 for (i
= 0; i
< steps
; i
++) {
1213 if (mtd
->writesize
<= 512) {
1214 uint32_t fill
= 0xFFFFFFFF;
1218 int num
= min_t(int, len
, 4);
1219 chip
->write_buf(mtd
, (uint8_t *)&fill
,
1224 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1225 chip
->cmdfunc(mtd
, NAND_CMD_RNDIN
, pos
, -1);
1229 len
= min_t(int, length
, chunk
);
1230 chip
->write_buf(mtd
, bufpoi
, len
);
1235 chip
->write_buf(mtd
, bufpoi
, length
);
1237 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1238 status
= chip
->waitfunc(mtd
, chip
);
1240 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1244 * nand_do_read_oob - [Intern] NAND read out-of-band
1245 * @mtd: MTD device structure
1246 * @from: offset to read from
1247 * @ops: oob operations description structure
1249 * NAND read out-of-band data from the spare area
1251 static int nand_do_read_oob(struct mtd_info
*mtd
, loff_t from
,
1252 struct mtd_oob_ops
*ops
)
1254 int page
, realpage
, chipnr
, sndcmd
= 1;
1255 struct nand_chip
*chip
= mtd
->priv
;
1256 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1257 int readlen
= ops
->len
;
1258 uint8_t *buf
= ops
->oobbuf
;
1260 DEBUG(MTD_DEBUG_LEVEL3
, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1261 (unsigned long long)from
, readlen
);
1263 chipnr
= (int)(from
>> chip
->chip_shift
);
1264 chip
->select_chip(mtd
, chipnr
);
1266 /* Shift to get page */
1267 realpage
= (int)(from
>> chip
->page_shift
);
1268 page
= realpage
& chip
->pagemask
;
1270 chip
->oob_poi
= chip
->buffers
->oobrbuf
;
1273 sndcmd
= chip
->ecc
.read_oob(mtd
, chip
, page
, sndcmd
);
1274 buf
= nand_transfer_oob(chip
, buf
, ops
);
1276 if (!(chip
->options
& NAND_NO_READRDY
)) {
1278 * Apply delay or wait for ready/busy pin. Do this
1279 * before the AUTOINCR check, so no problems arise if a
1280 * chip which does auto increment is marked as
1281 * NOAUTOINCR by the board driver.
1283 if (!chip
->dev_ready
)
1284 udelay(chip
->chip_delay
);
1286 nand_wait_ready(mtd
);
1289 readlen
-= ops
->ooblen
;
1293 /* Increment page address */
1296 page
= realpage
& chip
->pagemask
;
1297 /* Check, if we cross a chip boundary */
1300 chip
->select_chip(mtd
, -1);
1301 chip
->select_chip(mtd
, chipnr
);
1304 /* Check, if the chip supports auto page increment
1305 * or if we have hit a block boundary.
1307 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1311 ops
->retlen
= ops
->len
;
1316 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1317 * @mtd: MTD device structure
1318 * @from: offset to read from
1319 * @ops: oob operation description structure
1321 * NAND read data and/or out-of-band data
1323 static int nand_read_oob(struct mtd_info
*mtd
, loff_t from
,
1324 struct mtd_oob_ops
*ops
)
1326 int (*read_page
)(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1327 uint8_t *buf
) = NULL
;
1328 struct nand_chip
*chip
= mtd
->priv
;
1329 int ret
= -ENOTSUPP
;
1333 /* Do not allow reads past end of device */
1334 if ((from
+ ops
->len
) > mtd
->size
) {
1335 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1336 "Attempt read beyond end of device\n");
1340 nand_get_device(chip
, mtd
, FL_READING
);
1348 /* Replace the read_page algorithm temporary */
1349 read_page
= chip
->ecc
.read_page
;
1350 chip
->ecc
.read_page
= nand_read_page_raw
;
1358 ret
= nand_do_read_oob(mtd
, from
, ops
);
1360 ret
= nand_do_read_ops(mtd
, from
, ops
);
1362 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
1363 chip
->ecc
.read_page
= read_page
;
1365 nand_release_device(mtd
);
1371 * nand_write_page_raw - [Intern] raw page write function
1372 * @mtd: mtd info structure
1373 * @chip: nand chip info structure
1376 static void nand_write_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1379 chip
->write_buf(mtd
, buf
, mtd
->writesize
);
1380 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1384 * nand_write_page_swecc - {REPLACABLE] software ecc based page write function
1385 * @mtd: mtd info structure
1386 * @chip: nand chip info structure
1389 static void nand_write_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1392 int i
, eccsize
= chip
->ecc
.size
;
1393 int eccbytes
= chip
->ecc
.bytes
;
1394 int eccsteps
= chip
->ecc
.steps
;
1395 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1396 const uint8_t *p
= buf
;
1397 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1399 /* Software ecc calculation */
1400 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1401 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1403 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1404 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1406 nand_write_page_raw(mtd
, chip
, buf
);
1410 * nand_write_page_hwecc - {REPLACABLE] hardware ecc based page write function
1411 * @mtd: mtd info structure
1412 * @chip: nand chip info structure
1415 static void nand_write_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1418 int i
, eccsize
= chip
->ecc
.size
;
1419 int eccbytes
= chip
->ecc
.bytes
;
1420 int eccsteps
= chip
->ecc
.steps
;
1421 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1422 const uint8_t *p
= buf
;
1423 int *eccpos
= chip
->ecc
.layout
->eccpos
;
1425 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1426 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1427 chip
->write_buf(mtd
, p
, eccsize
);
1428 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1431 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1432 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1434 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1438 * nand_write_page_syndrome - {REPLACABLE] hardware ecc syndrom based page write
1439 * @mtd: mtd info structure
1440 * @chip: nand chip info structure
1443 * The hw generator calculates the error syndrome automatically. Therefor
1444 * we need a special oob layout and handling.
1446 static void nand_write_page_syndrome(struct mtd_info
*mtd
,
1447 struct nand_chip
*chip
, const uint8_t *buf
)
1449 int i
, eccsize
= chip
->ecc
.size
;
1450 int eccbytes
= chip
->ecc
.bytes
;
1451 int eccsteps
= chip
->ecc
.steps
;
1452 const uint8_t *p
= buf
;
1453 uint8_t *oob
= chip
->oob_poi
;
1455 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1457 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1458 chip
->write_buf(mtd
, p
, eccsize
);
1460 if (chip
->ecc
.prepad
) {
1461 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1462 oob
+= chip
->ecc
.prepad
;
1465 chip
->ecc
.calculate(mtd
, p
, oob
);
1466 chip
->write_buf(mtd
, oob
, eccbytes
);
1469 if (chip
->ecc
.postpad
) {
1470 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
1471 oob
+= chip
->ecc
.postpad
;
1475 /* Calculate remaining oob bytes */
1476 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1478 chip
->write_buf(mtd
, oob
, i
);
1482 * nand_write_page - [INTERNAL] write one page
1483 * @mtd: MTD device structure
1484 * @chip: NAND chip descriptor
1485 * @buf: the data to write
1486 * @page: page number to write
1487 * @cached: cached programming
1489 static int nand_write_page(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1490 const uint8_t *buf
, int page
, int cached
)
1494 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, 0x00, page
);
1496 chip
->ecc
.write_page(mtd
, chip
, buf
);
1499 * Cached progamming disabled for now, Not sure if its worth the
1500 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1504 if (!cached
|| !(chip
->options
& NAND_CACHEPRG
)) {
1506 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1507 status
= chip
->waitfunc(mtd
, chip
);
1509 * See if operation failed and additional status checks are
1512 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1513 status
= chip
->errstat(mtd
, chip
, FL_WRITING
, status
,
1516 if (status
& NAND_STATUS_FAIL
)
1519 chip
->cmdfunc(mtd
, NAND_CMD_CACHEDPROG
, -1, -1);
1520 status
= chip
->waitfunc(mtd
, chip
);
1523 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1524 /* Send command to read back the data */
1525 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
1527 if (chip
->verify_buf(mtd
, buf
, mtd
->writesize
))
1534 * nand_fill_oob - [Internal] Transfer client buffer to oob
1535 * @chip: nand chip structure
1536 * @oob: oob data buffer
1537 * @ops: oob ops structure
1539 static uint8_t *nand_fill_oob(struct nand_chip
*chip
, uint8_t *oob
,
1540 struct mtd_oob_ops
*ops
)
1542 size_t len
= ops
->ooblen
;
1548 memcpy(chip
->oob_poi
+ ops
->ooboffs
, oob
, len
);
1551 case MTD_OOB_AUTO
: {
1552 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
1553 uint32_t boffs
= 0, woffs
= ops
->ooboffs
;
1556 for(; free
->length
&& len
; free
++, len
-= bytes
) {
1557 /* Write request not from offset 0 ? */
1558 if (unlikely(woffs
)) {
1559 if (woffs
>= free
->length
) {
1560 woffs
-= free
->length
;
1563 boffs
= free
->offset
+ woffs
;
1564 bytes
= min_t(size_t, len
,
1565 (free
->length
- woffs
));
1568 bytes
= min_t(size_t, len
, free
->length
);
1569 boffs
= free
->offset
;
1571 memcpy(chip
->oob_poi
+ boffs
, oob
, bytes
);
1582 #define NOTALIGNED(x) (x & (mtd->writesize-1)) != 0
1585 * nand_do_write_ops - [Internal] NAND write with ECC
1586 * @mtd: MTD device structure
1587 * @to: offset to write to
1588 * @ops: oob operations description structure
1590 * NAND write with ECC
1592 static int nand_do_write_ops(struct mtd_info
*mtd
, loff_t to
,
1593 struct mtd_oob_ops
*ops
)
1595 int chipnr
, realpage
, page
, blockmask
;
1596 struct nand_chip
*chip
= mtd
->priv
;
1597 uint32_t writelen
= ops
->len
;
1598 uint8_t *oob
= ops
->oobbuf
;
1599 uint8_t *buf
= ops
->datbuf
;
1600 int bytes
= mtd
->writesize
;
1605 /* reject writes, which are not page aligned */
1606 if (NOTALIGNED(to
) || NOTALIGNED(ops
->len
)) {
1607 printk(KERN_NOTICE
"nand_write: "
1608 "Attempt to write not page aligned data\n");
1615 chipnr
= (int)(to
>> chip
->chip_shift
);
1616 chip
->select_chip(mtd
, chipnr
);
1618 /* Check, if it is write protected */
1619 if (nand_check_wp(mtd
))
1622 realpage
= (int)(to
>> chip
->page_shift
);
1623 page
= realpage
& chip
->pagemask
;
1624 blockmask
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1626 /* Invalidate the page cache, when we write to the cached page */
1627 if (to
<= (chip
->pagebuf
<< chip
->page_shift
) &&
1628 (chip
->pagebuf
<< chip
->page_shift
) < (to
+ ops
->len
))
1631 chip
->oob_poi
= chip
->buffers
->oobwbuf
;
1634 int cached
= writelen
> bytes
&& page
!= blockmask
;
1637 oob
= nand_fill_oob(chip
, oob
, ops
);
1639 ret
= nand_write_page(mtd
, chip
, buf
, page
, cached
);
1650 page
= realpage
& chip
->pagemask
;
1651 /* Check, if we cross a chip boundary */
1654 chip
->select_chip(mtd
, -1);
1655 chip
->select_chip(mtd
, chipnr
);
1660 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1662 ops
->retlen
= ops
->len
- writelen
;
1667 * nand_write - [MTD Interface] NAND write with ECC
1668 * @mtd: MTD device structure
1669 * @to: offset to write to
1670 * @len: number of bytes to write
1671 * @retlen: pointer to variable to store the number of written bytes
1672 * @buf: the data to write
1674 * NAND write with ECC
1676 static int nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1677 size_t *retlen
, const uint8_t *buf
)
1679 struct nand_chip
*chip
= mtd
->priv
;
1682 /* Do not allow reads past end of device */
1683 if ((to
+ len
) > mtd
->size
)
1688 nand_get_device(chip
, mtd
, FL_WRITING
);
1690 chip
->ops
.len
= len
;
1691 chip
->ops
.datbuf
= (uint8_t *)buf
;
1692 chip
->ops
.oobbuf
= NULL
;
1694 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
1696 *retlen
= chip
->ops
.retlen
;
1698 nand_release_device(mtd
);
1704 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
1705 * @mtd: MTD device structure
1706 * @to: offset to write to
1707 * @ops: oob operation description structure
1709 * NAND write out-of-band
1711 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
1712 struct mtd_oob_ops
*ops
)
1714 int chipnr
, page
, status
;
1715 struct nand_chip
*chip
= mtd
->priv
;
1717 DEBUG(MTD_DEBUG_LEVEL3
, "nand_write_oob: to = 0x%08x, len = %i\n",
1718 (unsigned int)to
, (int)ops
->len
);
1720 /* Do not allow write past end of page */
1721 if ((ops
->ooboffs
+ ops
->len
) > mtd
->oobsize
) {
1722 DEBUG(MTD_DEBUG_LEVEL0
, "nand_write_oob: "
1723 "Attempt to write past end of page\n");
1727 chipnr
= (int)(to
>> chip
->chip_shift
);
1728 chip
->select_chip(mtd
, chipnr
);
1730 /* Shift to get page */
1731 page
= (int)(to
>> chip
->page_shift
);
1734 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
1735 * of my DiskOnChip 2000 test units) will clear the whole data page too
1736 * if we don't do this. I have no clue why, but I seem to have 'fixed'
1737 * it in the doc2000 driver in August 1999. dwmw2.
1739 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
1741 /* Check, if it is write protected */
1742 if (nand_check_wp(mtd
))
1745 /* Invalidate the page cache, if we write to the cached page */
1746 if (page
== chip
->pagebuf
)
1749 chip
->oob_poi
= chip
->buffers
->oobwbuf
;
1750 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1751 nand_fill_oob(chip
, ops
->oobbuf
, ops
);
1752 status
= chip
->ecc
.write_oob(mtd
, chip
, page
& chip
->pagemask
);
1753 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1758 ops
->retlen
= ops
->len
;
1764 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1765 * @mtd: MTD device structure
1766 * @to: offset to write to
1767 * @ops: oob operation description structure
1769 static int nand_write_oob(struct mtd_info
*mtd
, loff_t to
,
1770 struct mtd_oob_ops
*ops
)
1772 void (*write_page
)(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1773 const uint8_t *buf
) = NULL
;
1774 struct nand_chip
*chip
= mtd
->priv
;
1775 int ret
= -ENOTSUPP
;
1779 /* Do not allow writes past end of device */
1780 if ((to
+ ops
->len
) > mtd
->size
) {
1781 DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1782 "Attempt read beyond end of device\n");
1786 nand_get_device(chip
, mtd
, FL_WRITING
);
1794 /* Replace the write_page algorithm temporary */
1795 write_page
= chip
->ecc
.write_page
;
1796 chip
->ecc
.write_page
= nand_write_page_raw
;
1804 ret
= nand_do_write_oob(mtd
, to
, ops
);
1806 ret
= nand_do_write_ops(mtd
, to
, ops
);
1808 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
1809 chip
->ecc
.write_page
= write_page
;
1811 nand_release_device(mtd
);
1816 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1817 * @mtd: MTD device structure
1818 * @page: the page address of the block which will be erased
1820 * Standard erase command for NAND chips
1822 static void single_erase_cmd(struct mtd_info
*mtd
, int page
)
1824 struct nand_chip
*chip
= mtd
->priv
;
1825 /* Send commands to erase a block */
1826 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1827 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1831 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1832 * @mtd: MTD device structure
1833 * @page: the page address of the block which will be erased
1835 * AND multi block erase command function
1836 * Erase 4 consecutive blocks
1838 static void multi_erase_cmd(struct mtd_info
*mtd
, int page
)
1840 struct nand_chip
*chip
= mtd
->priv
;
1841 /* Send commands to erase a block */
1842 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1843 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1844 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1845 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1846 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1850 * nand_erase - [MTD Interface] erase block(s)
1851 * @mtd: MTD device structure
1852 * @instr: erase instruction
1854 * Erase one ore more blocks
1856 static int nand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
1858 return nand_erase_nand(mtd
, instr
, 0);
1861 #define BBT_PAGE_MASK 0xffffff3f
1863 * nand_erase_nand - [Internal] erase block(s)
1864 * @mtd: MTD device structure
1865 * @instr: erase instruction
1866 * @allowbbt: allow erasing the bbt area
1868 * Erase one ore more blocks
1870 int nand_erase_nand(struct mtd_info
*mtd
, struct erase_info
*instr
,
1873 int page
, len
, status
, pages_per_block
, ret
, chipnr
;
1874 struct nand_chip
*chip
= mtd
->priv
;
1875 int rewrite_bbt
[NAND_MAX_CHIPS
]={0};
1876 unsigned int bbt_masked_page
= 0xffffffff;
1878 DEBUG(MTD_DEBUG_LEVEL3
, "nand_erase: start = 0x%08x, len = %i\n",
1879 (unsigned int)instr
->addr
, (unsigned int)instr
->len
);
1881 /* Start address must align on block boundary */
1882 if (instr
->addr
& ((1 << chip
->phys_erase_shift
) - 1)) {
1883 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: Unaligned address\n");
1887 /* Length must align on block boundary */
1888 if (instr
->len
& ((1 << chip
->phys_erase_shift
) - 1)) {
1889 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1890 "Length not block aligned\n");
1894 /* Do not allow erase past end of device */
1895 if ((instr
->len
+ instr
->addr
) > mtd
->size
) {
1896 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1897 "Erase past end of device\n");
1901 instr
->fail_addr
= 0xffffffff;
1903 /* Grab the lock and see if the device is available */
1904 nand_get_device(chip
, mtd
, FL_ERASING
);
1906 /* Shift to get first page */
1907 page
= (int)(instr
->addr
>> chip
->page_shift
);
1908 chipnr
= (int)(instr
->addr
>> chip
->chip_shift
);
1910 /* Calculate pages in each block */
1911 pages_per_block
= 1 << (chip
->phys_erase_shift
- chip
->page_shift
);
1913 /* Select the NAND device */
1914 chip
->select_chip(mtd
, chipnr
);
1916 /* Check, if it is write protected */
1917 if (nand_check_wp(mtd
)) {
1918 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1919 "Device is write protected!!!\n");
1920 instr
->state
= MTD_ERASE_FAILED
;
1925 * If BBT requires refresh, set the BBT page mask to see if the BBT
1926 * should be rewritten. Otherwise the mask is set to 0xffffffff which
1927 * can not be matched. This is also done when the bbt is actually
1928 * erased to avoid recusrsive updates
1930 if (chip
->options
& BBT_AUTO_REFRESH
&& !allowbbt
)
1931 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] & BBT_PAGE_MASK
;
1933 /* Loop through the pages */
1936 instr
->state
= MTD_ERASING
;
1940 * heck if we have a bad block, we do not erase bad blocks !
1942 if (nand_block_checkbad(mtd
, ((loff_t
) page
) <<
1943 chip
->page_shift
, 0, allowbbt
)) {
1944 printk(KERN_WARNING
"nand_erase: attempt to erase a "
1945 "bad block at page 0x%08x\n", page
);
1946 instr
->state
= MTD_ERASE_FAILED
;
1951 * Invalidate the page cache, if we erase the block which
1952 * contains the current cached page
1954 if (page
<= chip
->pagebuf
&& chip
->pagebuf
<
1955 (page
+ pages_per_block
))
1958 chip
->erase_cmd(mtd
, page
& chip
->pagemask
);
1960 status
= chip
->waitfunc(mtd
, chip
);
1963 * See if operation failed and additional status checks are
1966 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1967 status
= chip
->errstat(mtd
, chip
, FL_ERASING
,
1970 /* See if block erase succeeded */
1971 if (status
& NAND_STATUS_FAIL
) {
1972 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1973 "Failed erase, page 0x%08x\n", page
);
1974 instr
->state
= MTD_ERASE_FAILED
;
1975 instr
->fail_addr
= (page
<< chip
->page_shift
);
1980 * If BBT requires refresh, set the BBT rewrite flag to the
1983 if (bbt_masked_page
!= 0xffffffff &&
1984 (page
& BBT_PAGE_MASK
) == bbt_masked_page
)
1985 rewrite_bbt
[chipnr
] = (page
<< chip
->page_shift
);
1987 /* Increment page address and decrement length */
1988 len
-= (1 << chip
->phys_erase_shift
);
1989 page
+= pages_per_block
;
1991 /* Check, if we cross a chip boundary */
1992 if (len
&& !(page
& chip
->pagemask
)) {
1994 chip
->select_chip(mtd
, -1);
1995 chip
->select_chip(mtd
, chipnr
);
1998 * If BBT requires refresh and BBT-PERCHIP, set the BBT
1999 * page mask to see if this BBT should be rewritten
2001 if (bbt_masked_page
!= 0xffffffff &&
2002 (chip
->bbt_td
->options
& NAND_BBT_PERCHIP
))
2003 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] &
2007 instr
->state
= MTD_ERASE_DONE
;
2011 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
2012 /* Do call back function */
2014 mtd_erase_callback(instr
);
2016 /* Deselect and wake up anyone waiting on the device */
2017 nand_release_device(mtd
);
2020 * If BBT requires refresh and erase was successful, rewrite any
2021 * selected bad block tables
2023 if (bbt_masked_page
== 0xffffffff || ret
)
2026 for (chipnr
= 0; chipnr
< chip
->numchips
; chipnr
++) {
2027 if (!rewrite_bbt
[chipnr
])
2029 /* update the BBT for chip */
2030 DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase_nand: nand_update_bbt "
2031 "(%d:0x%0x 0x%0x)\n", chipnr
, rewrite_bbt
[chipnr
],
2032 chip
->bbt_td
->pages
[chipnr
]);
2033 nand_update_bbt(mtd
, rewrite_bbt
[chipnr
]);
2036 /* Return more or less happy */
2041 * nand_sync - [MTD Interface] sync
2042 * @mtd: MTD device structure
2044 * Sync is actually a wait for chip ready function
2046 static void nand_sync(struct mtd_info
*mtd
)
2048 struct nand_chip
*chip
= mtd
->priv
;
2050 DEBUG(MTD_DEBUG_LEVEL3
, "nand_sync: called\n");
2052 /* Grab the lock and see if the device is available */
2053 nand_get_device(chip
, mtd
, FL_SYNCING
);
2054 /* Release it and go back */
2055 nand_release_device(mtd
);
2059 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2060 * @mtd: MTD device structure
2061 * @offs: offset relative to mtd start
2063 static int nand_block_isbad(struct mtd_info
*mtd
, loff_t offs
)
2065 /* Check for invalid offset */
2066 if (offs
> mtd
->size
)
2069 return nand_block_checkbad(mtd
, offs
, 1, 0);
2073 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2074 * @mtd: MTD device structure
2075 * @ofs: offset relative to mtd start
2077 static int nand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
2079 struct nand_chip
*chip
= mtd
->priv
;
2082 if ((ret
= nand_block_isbad(mtd
, ofs
))) {
2083 /* If it was bad already, return success and do nothing. */
2089 return chip
->block_markbad(mtd
, ofs
);
2093 * nand_suspend - [MTD Interface] Suspend the NAND flash
2094 * @mtd: MTD device structure
2096 static int nand_suspend(struct mtd_info
*mtd
)
2098 struct nand_chip
*chip
= mtd
->priv
;
2100 return nand_get_device(chip
, mtd
, FL_PM_SUSPENDED
);
2104 * nand_resume - [MTD Interface] Resume the NAND flash
2105 * @mtd: MTD device structure
2107 static void nand_resume(struct mtd_info
*mtd
)
2109 struct nand_chip
*chip
= mtd
->priv
;
2111 if (chip
->state
== FL_PM_SUSPENDED
)
2112 nand_release_device(mtd
);
2114 printk(KERN_ERR
"nand_resume() called for a chip which is not "
2115 "in suspended state\n");
2119 * Set default functions
2121 static void nand_set_defaults(struct nand_chip
*chip
, int busw
)
2123 /* check for proper chip_delay setup, set 20us if not */
2124 if (!chip
->chip_delay
)
2125 chip
->chip_delay
= 20;
2127 /* check, if a user supplied command function given */
2128 if (chip
->cmdfunc
== NULL
)
2129 chip
->cmdfunc
= nand_command
;
2131 /* check, if a user supplied wait function given */
2132 if (chip
->waitfunc
== NULL
)
2133 chip
->waitfunc
= nand_wait
;
2135 if (!chip
->select_chip
)
2136 chip
->select_chip
= nand_select_chip
;
2137 if (!chip
->read_byte
)
2138 chip
->read_byte
= busw
? nand_read_byte16
: nand_read_byte
;
2139 if (!chip
->read_word
)
2140 chip
->read_word
= nand_read_word
;
2141 if (!chip
->block_bad
)
2142 chip
->block_bad
= nand_block_bad
;
2143 if (!chip
->block_markbad
)
2144 chip
->block_markbad
= nand_default_block_markbad
;
2145 if (!chip
->write_buf
)
2146 chip
->write_buf
= busw
? nand_write_buf16
: nand_write_buf
;
2147 if (!chip
->read_buf
)
2148 chip
->read_buf
= busw
? nand_read_buf16
: nand_read_buf
;
2149 if (!chip
->verify_buf
)
2150 chip
->verify_buf
= busw
? nand_verify_buf16
: nand_verify_buf
;
2151 if (!chip
->scan_bbt
)
2152 chip
->scan_bbt
= nand_default_bbt
;
2154 if (!chip
->controller
) {
2155 chip
->controller
= &chip
->hwcontrol
;
2156 spin_lock_init(&chip
->controller
->lock
);
2157 init_waitqueue_head(&chip
->controller
->wq
);
2163 * Get the flash and manufacturer id and lookup if the type is supported
2165 static struct nand_flash_dev
*nand_get_flash_type(struct mtd_info
*mtd
,
2166 struct nand_chip
*chip
,
2167 int busw
, int *maf_id
)
2169 struct nand_flash_dev
*type
= NULL
;
2170 int i
, dev_id
, maf_idx
;
2172 /* Select the device */
2173 chip
->select_chip(mtd
, 0);
2175 /* Send the command for reading device ID */
2176 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2178 /* Read manufacturer and device IDs */
2179 *maf_id
= chip
->read_byte(mtd
);
2180 dev_id
= chip
->read_byte(mtd
);
2182 /* Lookup the flash id */
2183 for (i
= 0; nand_flash_ids
[i
].name
!= NULL
; i
++) {
2184 if (dev_id
== nand_flash_ids
[i
].id
) {
2185 type
= &nand_flash_ids
[i
];
2191 return ERR_PTR(-ENODEV
);
2194 mtd
->name
= type
->name
;
2196 chip
->chipsize
= type
->chipsize
<< 20;
2198 /* Newer devices have all the information in additional id bytes */
2199 if (!type
->pagesize
) {
2201 /* The 3rd id byte contains non relevant data ATM */
2202 extid
= chip
->read_byte(mtd
);
2203 /* The 4th id byte is the important one */
2204 extid
= chip
->read_byte(mtd
);
2206 mtd
->writesize
= 1024 << (extid
& 0x3);
2209 mtd
->oobsize
= (8 << (extid
& 0x01)) * (mtd
->writesize
>> 9);
2211 /* Calc blocksize. Blocksize is multiples of 64KiB */
2212 mtd
->erasesize
= (64 * 1024) << (extid
& 0x03);
2214 /* Get buswidth information */
2215 busw
= (extid
& 0x01) ? NAND_BUSWIDTH_16
: 0;
2219 * Old devices have chip data hardcoded in the device id table
2221 mtd
->erasesize
= type
->erasesize
;
2222 mtd
->writesize
= type
->pagesize
;
2223 mtd
->oobsize
= mtd
->writesize
/ 32;
2224 busw
= type
->options
& NAND_BUSWIDTH_16
;
2227 /* Try to identify manufacturer */
2228 for (maf_idx
= 0; nand_manuf_ids
[maf_idx
].id
!= 0x0; maf_idx
++) {
2229 if (nand_manuf_ids
[maf_idx
].id
== *maf_id
)
2234 * Check, if buswidth is correct. Hardware drivers should set
2237 if (busw
!= (chip
->options
& NAND_BUSWIDTH_16
)) {
2238 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2239 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
,
2240 dev_id
, nand_manuf_ids
[maf_idx
].name
, mtd
->name
);
2241 printk(KERN_WARNING
"NAND bus width %d instead %d bit\n",
2242 (chip
->options
& NAND_BUSWIDTH_16
) ? 16 : 8,
2244 return ERR_PTR(-EINVAL
);
2247 /* Calculate the address shift from the page size */
2248 chip
->page_shift
= ffs(mtd
->writesize
) - 1;
2249 /* Convert chipsize to number of pages per chip -1. */
2250 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2252 chip
->bbt_erase_shift
= chip
->phys_erase_shift
=
2253 ffs(mtd
->erasesize
) - 1;
2254 chip
->chip_shift
= ffs(chip
->chipsize
) - 1;
2256 /* Set the bad block position */
2257 chip
->badblockpos
= mtd
->writesize
> 512 ?
2258 NAND_LARGE_BADBLOCK_POS
: NAND_SMALL_BADBLOCK_POS
;
2260 /* Get chip options, preserve non chip based options */
2261 chip
->options
&= ~NAND_CHIPOPTIONS_MSK
;
2262 chip
->options
|= type
->options
& NAND_CHIPOPTIONS_MSK
;
2265 * Set chip as a default. Board drivers can override it, if necessary
2267 chip
->options
|= NAND_NO_AUTOINCR
;
2269 /* Check if chip is a not a samsung device. Do not clear the
2270 * options for chips which are not having an extended id.
2272 if (*maf_id
!= NAND_MFR_SAMSUNG
&& !type
->pagesize
)
2273 chip
->options
&= ~NAND_SAMSUNG_LP_OPTIONS
;
2275 /* Check for AND chips with 4 page planes */
2276 if (chip
->options
& NAND_4PAGE_ARRAY
)
2277 chip
->erase_cmd
= multi_erase_cmd
;
2279 chip
->erase_cmd
= single_erase_cmd
;
2281 /* Do not replace user supplied command function ! */
2282 if (mtd
->writesize
> 512 && chip
->cmdfunc
== nand_command
)
2283 chip
->cmdfunc
= nand_command_lp
;
2285 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2286 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
, dev_id
,
2287 nand_manuf_ids
[maf_idx
].name
, type
->name
);
2293 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2294 * @mtd: MTD device structure
2295 * @maxchips: Number of chips to scan for
2297 * This is the first phase of the normal nand_scan() function. It
2298 * reads the flash ID and sets up MTD fields accordingly.
2300 * The mtd->owner field must be set to the module of the caller.
2302 int nand_scan_ident(struct mtd_info
*mtd
, int maxchips
)
2304 int i
, busw
, nand_maf_id
;
2305 struct nand_chip
*chip
= mtd
->priv
;
2306 struct nand_flash_dev
*type
;
2308 /* Get buswidth to select the correct functions */
2309 busw
= chip
->options
& NAND_BUSWIDTH_16
;
2310 /* Set the default functions */
2311 nand_set_defaults(chip
, busw
);
2313 /* Read the flash type */
2314 type
= nand_get_flash_type(mtd
, chip
, busw
, &nand_maf_id
);
2317 printk(KERN_WARNING
"No NAND device found!!!\n");
2318 chip
->select_chip(mtd
, -1);
2319 return PTR_ERR(type
);
2322 /* Check for a chip array */
2323 for (i
= 1; i
< maxchips
; i
++) {
2324 chip
->select_chip(mtd
, i
);
2325 /* Send the command for reading device ID */
2326 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2327 /* Read manufacturer and device IDs */
2328 if (nand_maf_id
!= chip
->read_byte(mtd
) ||
2329 type
->id
!= chip
->read_byte(mtd
))
2333 printk(KERN_INFO
"%d NAND chips detected\n", i
);
2335 /* Store the number of chips and calc total size for mtd */
2337 mtd
->size
= i
* chip
->chipsize
;
2344 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2345 * @mtd: MTD device structure
2346 * @maxchips: Number of chips to scan for
2348 * This is the second phase of the normal nand_scan() function. It
2349 * fills out all the uninitialized function pointers with the defaults
2350 * and scans for a bad block table if appropriate.
2352 int nand_scan_tail(struct mtd_info
*mtd
)
2355 struct nand_chip
*chip
= mtd
->priv
;
2357 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2358 chip
->buffers
= kmalloc(sizeof(*chip
->buffers
), GFP_KERNEL
);
2362 /* Preset the internal oob write buffer */
2363 memset(chip
->buffers
->oobwbuf
, 0xff, mtd
->oobsize
);
2366 * If no default placement scheme is given, select an appropriate one
2368 if (!chip
->ecc
.layout
) {
2369 switch (mtd
->oobsize
) {
2371 chip
->ecc
.layout
= &nand_oob_8
;
2374 chip
->ecc
.layout
= &nand_oob_16
;
2377 chip
->ecc
.layout
= &nand_oob_64
;
2380 printk(KERN_WARNING
"No oob scheme defined for "
2381 "oobsize %d\n", mtd
->oobsize
);
2387 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2388 * selected and we have 256 byte pagesize fallback to software ECC
2390 switch (chip
->ecc
.mode
) {
2392 /* Use standard hwecc read page function ? */
2393 if (!chip
->ecc
.read_page
)
2394 chip
->ecc
.read_page
= nand_read_page_hwecc
;
2395 if (!chip
->ecc
.write_page
)
2396 chip
->ecc
.write_page
= nand_write_page_hwecc
;
2397 if (!chip
->ecc
.read_oob
)
2398 chip
->ecc
.read_oob
= nand_read_oob_std
;
2399 if (!chip
->ecc
.write_oob
)
2400 chip
->ecc
.write_oob
= nand_write_oob_std
;
2402 case NAND_ECC_HW_SYNDROME
:
2403 if (!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
2405 printk(KERN_WARNING
"No ECC functions supplied, "
2406 "Hardware ECC not possible\n");
2409 /* Use standard syndrome read/write page function ? */
2410 if (!chip
->ecc
.read_page
)
2411 chip
->ecc
.read_page
= nand_read_page_syndrome
;
2412 if (!chip
->ecc
.write_page
)
2413 chip
->ecc
.write_page
= nand_write_page_syndrome
;
2414 if (!chip
->ecc
.read_oob
)
2415 chip
->ecc
.read_oob
= nand_read_oob_syndrome
;
2416 if (!chip
->ecc
.write_oob
)
2417 chip
->ecc
.write_oob
= nand_write_oob_syndrome
;
2419 if (mtd
->writesize
>= chip
->ecc
.size
)
2421 printk(KERN_WARNING
"%d byte HW ECC not possible on "
2422 "%d byte page size, fallback to SW ECC\n",
2423 chip
->ecc
.size
, mtd
->writesize
);
2424 chip
->ecc
.mode
= NAND_ECC_SOFT
;
2427 chip
->ecc
.calculate
= nand_calculate_ecc
;
2428 chip
->ecc
.correct
= nand_correct_data
;
2429 chip
->ecc
.read_page
= nand_read_page_swecc
;
2430 chip
->ecc
.write_page
= nand_write_page_swecc
;
2431 chip
->ecc
.read_oob
= nand_read_oob_std
;
2432 chip
->ecc
.write_oob
= nand_write_oob_std
;
2433 chip
->ecc
.size
= 256;
2434 chip
->ecc
.bytes
= 3;
2438 printk(KERN_WARNING
"NAND_ECC_NONE selected by board driver. "
2439 "This is not recommended !!\n");
2440 chip
->ecc
.read_page
= nand_read_page_raw
;
2441 chip
->ecc
.write_page
= nand_write_page_raw
;
2442 chip
->ecc
.read_oob
= nand_read_oob_std
;
2443 chip
->ecc
.write_oob
= nand_write_oob_std
;
2444 chip
->ecc
.size
= mtd
->writesize
;
2445 chip
->ecc
.bytes
= 0;
2448 printk(KERN_WARNING
"Invalid NAND_ECC_MODE %d\n",
2454 * The number of bytes available for a client to place data into
2455 * the out of band area
2457 chip
->ecc
.layout
->oobavail
= 0;
2458 for (i
= 0; chip
->ecc
.layout
->oobfree
[i
].length
; i
++)
2459 chip
->ecc
.layout
->oobavail
+=
2460 chip
->ecc
.layout
->oobfree
[i
].length
;
2463 * Set the number of read / write steps for one page depending on ECC
2466 chip
->ecc
.steps
= mtd
->writesize
/ chip
->ecc
.size
;
2467 if(chip
->ecc
.steps
* chip
->ecc
.size
!= mtd
->writesize
) {
2468 printk(KERN_WARNING
"Invalid ecc parameters\n");
2471 chip
->ecc
.total
= chip
->ecc
.steps
* chip
->ecc
.bytes
;
2473 /* Initialize state */
2474 chip
->state
= FL_READY
;
2476 /* De-select the device */
2477 chip
->select_chip(mtd
, -1);
2479 /* Invalidate the pagebuffer reference */
2482 /* Fill in remaining MTD driver data */
2483 mtd
->type
= MTD_NANDFLASH
;
2484 mtd
->flags
= MTD_CAP_NANDFLASH
;
2485 mtd
->ecctype
= MTD_ECC_SW
;
2486 mtd
->erase
= nand_erase
;
2488 mtd
->unpoint
= NULL
;
2489 mtd
->read
= nand_read
;
2490 mtd
->write
= nand_write
;
2491 mtd
->read_oob
= nand_read_oob
;
2492 mtd
->write_oob
= nand_write_oob
;
2493 mtd
->sync
= nand_sync
;
2496 mtd
->suspend
= nand_suspend
;
2497 mtd
->resume
= nand_resume
;
2498 mtd
->block_isbad
= nand_block_isbad
;
2499 mtd
->block_markbad
= nand_block_markbad
;
2501 /* propagate ecc.layout to mtd_info */
2502 mtd
->ecclayout
= chip
->ecc
.layout
;
2504 /* Check, if we should skip the bad block table scan */
2505 if (chip
->options
& NAND_SKIP_BBTSCAN
)
2508 /* Build bad block table */
2509 return chip
->scan_bbt(mtd
);
2512 /* module_text_address() isn't exported, and it's mostly a pointless
2513 test if this is a module _anyway_ -- they'd have to try _really_ hard
2514 to call us from in-kernel code if the core NAND support is modular. */
2516 #define caller_is_module() (1)
2518 #define caller_is_module() \
2519 module_text_address((unsigned long)__builtin_return_address(0))
2523 * nand_scan - [NAND Interface] Scan for the NAND device
2524 * @mtd: MTD device structure
2525 * @maxchips: Number of chips to scan for
2527 * This fills out all the uninitialized function pointers
2528 * with the defaults.
2529 * The flash ID is read and the mtd/chip structures are
2530 * filled with the appropriate values.
2531 * The mtd->owner field must be set to the module of the caller
2534 int nand_scan(struct mtd_info
*mtd
, int maxchips
)
2538 /* Many callers got this wrong, so check for it for a while... */
2539 if (!mtd
->owner
&& caller_is_module()) {
2540 printk(KERN_CRIT
"nand_scan() called with NULL mtd->owner!\n");
2544 ret
= nand_scan_ident(mtd
, maxchips
);
2546 ret
= nand_scan_tail(mtd
);
2551 * nand_release - [NAND Interface] Free resources held by the NAND device
2552 * @mtd: MTD device structure
2554 void nand_release(struct mtd_info
*mtd
)
2556 struct nand_chip
*chip
= mtd
->priv
;
2558 #ifdef CONFIG_MTD_PARTITIONS
2559 /* Deregister partitions */
2560 del_mtd_partitions(mtd
);
2562 /* Deregister the device */
2563 del_mtd_device(mtd
);
2565 /* Free bad block table memory */
2567 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2568 kfree(chip
->buffers
);
2571 EXPORT_SYMBOL_GPL(nand_scan
);
2572 EXPORT_SYMBOL_GPL(nand_scan_ident
);
2573 EXPORT_SYMBOL_GPL(nand_scan_tail
);
2574 EXPORT_SYMBOL_GPL(nand_release
);
2576 static int __init
nand_base_init(void)
2578 led_trigger_register_simple("nand-disk", &nand_led_trigger
);
2582 static void __exit
nand_base_exit(void)
2584 led_trigger_unregister_simple(nand_led_trigger
);
2587 module_init(nand_base_init
);
2588 module_exit(nand_base_exit
);
2590 MODULE_LICENSE("GPL");
2591 MODULE_AUTHOR("Steven J. Hill <sjhill@realitydiluted.com>, Thomas Gleixner <tglx@linutronix.de>");
2592 MODULE_DESCRIPTION("Generic NAND flash driver code");