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KVM: MMU: Use different shadows when EFER.NXE changes
[linux-2.6/mini2440.git] / arch / x86 / kvm / x86.c
blobbbacdce35c4d51bd068375528c5acf4cecc5a61f
1 /*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * derived from drivers/kvm/kvm_main.c
5 *
6 * Copyright (C) 2006 Qumranet, Inc.
7 * Copyright (C) 2008 Qumranet, Inc.
8 * Copyright IBM Corporation, 2008
9 *
10 * Authors:
11 * Avi Kivity <avi@qumranet.com>
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Amit Shah <amit.shah@qumranet.com>
14 * Ben-Ami Yassour <benami@il.ibm.com>
15 *
16 * This work is licensed under the terms of the GNU GPL, version 2. See
17 * the COPYING file in the top-level directory.
18 *
19 */
20
21 #include <linux/kvm_host.h>
22 #include "irq.h"
23 #include "mmu.h"
24 #include "i8254.h"
25 #include "tss.h"
26 #include "kvm_cache_regs.h"
27 #include "x86.h"
28
29 #include <linux/clocksource.h>
30 #include <linux/interrupt.h>
31 #include <linux/kvm.h>
32 #include <linux/fs.h>
33 #include <linux/vmalloc.h>
34 #include <linux/module.h>
35 #include <linux/mman.h>
36 #include <linux/highmem.h>
37 #include <linux/iommu.h>
38 #include <linux/intel-iommu.h>
39 #include <linux/cpufreq.h>
40
41 #include <asm/uaccess.h>
42 #include <asm/msr.h>
43 #include <asm/desc.h>
44 #include <asm/mtrr.h>
45
46 #define MAX_IO_MSRS 256
47 #define CR0_RESERVED_BITS \
48 (~(unsigned long)(X86_CR0_PE | X86_CR0_MP | X86_CR0_EM | X86_CR0_TS \
49 | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM \
50 | X86_CR0_NW | X86_CR0_CD | X86_CR0_PG))
51 #define CR4_RESERVED_BITS \
52 (~(unsigned long)(X86_CR4_VME | X86_CR4_PVI | X86_CR4_TSD | X86_CR4_DE\
53 | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_MCE \
54 | X86_CR4_PGE | X86_CR4_PCE | X86_CR4_OSFXSR \
55 | X86_CR4_OSXMMEXCPT | X86_CR4_VMXE))
56
57 #define CR8_RESERVED_BITS (~(unsigned long)X86_CR8_TPR)
58 /* EFER defaults:
59 * - enable syscall per default because its emulated by KVM
60 * - enable LME and LMA per default on 64 bit KVM
61 */
62 #ifdef CONFIG_X86_64
63 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffafeULL;
64 #else
65 static u64 __read_mostly efer_reserved_bits = 0xfffffffffffffffeULL;
66 #endif
67
68 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
69 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
70
71 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
72 struct kvm_cpuid_entry2 __user *entries);
73 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
74 u32 function, u32 index);
75
76 struct kvm_x86_ops *kvm_x86_ops;
77 EXPORT_SYMBOL_GPL(kvm_x86_ops);
78
79 struct kvm_stats_debugfs_item debugfs_entries[] = {
80 { "pf_fixed", VCPU_STAT(pf_fixed) },
81 { "pf_guest", VCPU_STAT(pf_guest) },
82 { "tlb_flush", VCPU_STAT(tlb_flush) },
83 { "invlpg", VCPU_STAT(invlpg) },
84 { "exits", VCPU_STAT(exits) },
85 { "io_exits", VCPU_STAT(io_exits) },
86 { "mmio_exits", VCPU_STAT(mmio_exits) },
87 { "signal_exits", VCPU_STAT(signal_exits) },
88 { "irq_window", VCPU_STAT(irq_window_exits) },
89 { "nmi_window", VCPU_STAT(nmi_window_exits) },
90 { "halt_exits", VCPU_STAT(halt_exits) },
91 { "halt_wakeup", VCPU_STAT(halt_wakeup) },
92 { "hypercalls", VCPU_STAT(hypercalls) },
93 { "request_irq", VCPU_STAT(request_irq_exits) },
94 { "request_nmi", VCPU_STAT(request_nmi_exits) },
95 { "irq_exits", VCPU_STAT(irq_exits) },
96 { "host_state_reload", VCPU_STAT(host_state_reload) },
97 { "efer_reload", VCPU_STAT(efer_reload) },
98 { "fpu_reload", VCPU_STAT(fpu_reload) },
99 { "insn_emulation", VCPU_STAT(insn_emulation) },
100 { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
101 { "irq_injections", VCPU_STAT(irq_injections) },
102 { "nmi_injections", VCPU_STAT(nmi_injections) },
103 { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
104 { "mmu_pte_write", VM_STAT(mmu_pte_write) },
105 { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
106 { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
107 { "mmu_flooded", VM_STAT(mmu_flooded) },
108 { "mmu_recycled", VM_STAT(mmu_recycled) },
109 { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
110 { "mmu_unsync", VM_STAT(mmu_unsync) },
111 { "mmu_unsync_global", VM_STAT(mmu_unsync_global) },
112 { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
113 { "largepages", VM_STAT(lpages) },
114 { NULL }
115 };
116
117 unsigned long segment_base(u16 selector)
118 {
119 struct descriptor_table gdt;
120 struct desc_struct *d;
121 unsigned long table_base;
122 unsigned long v;
123
124 if (selector == 0)
125 return 0;
126
127 asm("sgdt %0" : "=m"(gdt));
128 table_base = gdt.base;
129
130 if (selector & 4) { /* from ldt */
131 u16 ldt_selector;
132
133 asm("sldt %0" : "=g"(ldt_selector));
134 table_base = segment_base(ldt_selector);
135 }
136 d = (struct desc_struct *)(table_base + (selector & ~7));
137 v = d->base0 | ((unsigned long)d->base1 << 16) |
138 ((unsigned long)d->base2 << 24);
139 #ifdef CONFIG_X86_64
140 if (d->s == 0 && (d->type == 2 || d->type == 9 || d->type == 11))
141 v |= ((unsigned long)((struct ldttss_desc64 *)d)->base3) << 32;
142 #endif
143 return v;
144 }
145 EXPORT_SYMBOL_GPL(segment_base);
146
147 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
148 {
149 if (irqchip_in_kernel(vcpu->kvm))
150 return vcpu->arch.apic_base;
151 else
152 return vcpu->arch.apic_base;
153 }
154 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
155
156 void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data)
157 {
158 /* TODO: reserve bits check */
159 if (irqchip_in_kernel(vcpu->kvm))
160 kvm_lapic_set_base(vcpu, data);
161 else
162 vcpu->arch.apic_base = data;
163 }
164 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
165
166 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
167 {
168 WARN_ON(vcpu->arch.exception.pending);
169 vcpu->arch.exception.pending = true;
170 vcpu->arch.exception.has_error_code = false;
171 vcpu->arch.exception.nr = nr;
172 }
173 EXPORT_SYMBOL_GPL(kvm_queue_exception);
174
175 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long addr,
176 u32 error_code)
177 {
178 ++vcpu->stat.pf_guest;
179
180 if (vcpu->arch.exception.pending) {
181 if (vcpu->arch.exception.nr == PF_VECTOR) {
182 printk(KERN_DEBUG "kvm: inject_page_fault:"
183 " double fault 0x%lx\n", addr);
184 vcpu->arch.exception.nr = DF_VECTOR;
185 vcpu->arch.exception.error_code = 0;
186 } else if (vcpu->arch.exception.nr == DF_VECTOR) {
187 /* triple fault -> shutdown */
188 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
189 }
190 return;
191 }
192 vcpu->arch.cr2 = addr;
193 kvm_queue_exception_e(vcpu, PF_VECTOR, error_code);
194 }
195
196 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
197 {
198 vcpu->arch.nmi_pending = 1;
199 }
200 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
201
202 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
203 {
204 WARN_ON(vcpu->arch.exception.pending);
205 vcpu->arch.exception.pending = true;
206 vcpu->arch.exception.has_error_code = true;
207 vcpu->arch.exception.nr = nr;
208 vcpu->arch.exception.error_code = error_code;
209 }
210 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
211
212 static void __queue_exception(struct kvm_vcpu *vcpu)
213 {
214 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
215 vcpu->arch.exception.has_error_code,
216 vcpu->arch.exception.error_code);
217 }
218
219 /*
220 * Load the pae pdptrs. Return true is they are all valid.
221 */
222 int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3)
223 {
224 gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
225 unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
226 int i;
227 int ret;
228 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
229
230 ret = kvm_read_guest_page(vcpu->kvm, pdpt_gfn, pdpte,
231 offset * sizeof(u64), sizeof(pdpte));
232 if (ret < 0) {
233 ret = 0;
234 goto out;
235 }
236 for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
237 if ((pdpte[i] & 1) && (pdpte[i] & 0xfffffff0000001e6ull)) {
238 ret = 0;
239 goto out;
240 }
241 }
242 ret = 1;
243
244 memcpy(vcpu->arch.pdptrs, pdpte, sizeof(vcpu->arch.pdptrs));
245 out:
246
247 return ret;
248 }
249 EXPORT_SYMBOL_GPL(load_pdptrs);
250
251 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
252 {
253 u64 pdpte[ARRAY_SIZE(vcpu->arch.pdptrs)];
254 bool changed = true;
255 int r;
256
257 if (is_long_mode(vcpu) || !is_pae(vcpu))
258 return false;
259
260 r = kvm_read_guest(vcpu->kvm, vcpu->arch.cr3 & ~31u, pdpte, sizeof(pdpte));
261 if (r < 0)
262 goto out;
263 changed = memcmp(pdpte, vcpu->arch.pdptrs, sizeof(pdpte)) != 0;
264 out:
265
266 return changed;
267 }
268
269 void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
270 {
271 if (cr0 & CR0_RESERVED_BITS) {
272 printk(KERN_DEBUG "set_cr0: 0x%lx #GP, reserved bits 0x%lx\n",
273 cr0, vcpu->arch.cr0);
274 kvm_inject_gp(vcpu, 0);
275 return;
276 }
277
278 if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD)) {
279 printk(KERN_DEBUG "set_cr0: #GP, CD == 0 && NW == 1\n");
280 kvm_inject_gp(vcpu, 0);
281 return;
282 }
283
284 if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE)) {
285 printk(KERN_DEBUG "set_cr0: #GP, set PG flag "
286 "and a clear PE flag\n");
287 kvm_inject_gp(vcpu, 0);
288 return;
289 }
290
291 if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
292 #ifdef CONFIG_X86_64
293 if ((vcpu->arch.shadow_efer & EFER_LME)) {
294 int cs_db, cs_l;
295
296 if (!is_pae(vcpu)) {
297 printk(KERN_DEBUG "set_cr0: #GP, start paging "
298 "in long mode while PAE is disabled\n");
299 kvm_inject_gp(vcpu, 0);
300 return;
301 }
302 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
303 if (cs_l) {
304 printk(KERN_DEBUG "set_cr0: #GP, start paging "
305 "in long mode while CS.L == 1\n");
306 kvm_inject_gp(vcpu, 0);
307 return;
308
309 }
310 } else
311 #endif
312 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
313 printk(KERN_DEBUG "set_cr0: #GP, pdptrs "
314 "reserved bits\n");
315 kvm_inject_gp(vcpu, 0);
316 return;
317 }
318
319 }
320
321 kvm_x86_ops->set_cr0(vcpu, cr0);
322 vcpu->arch.cr0 = cr0;
323
324 kvm_mmu_sync_global(vcpu);
325 kvm_mmu_reset_context(vcpu);
326 return;
327 }
328 EXPORT_SYMBOL_GPL(kvm_set_cr0);
329
330 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
331 {
332 kvm_set_cr0(vcpu, (vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f));
333 KVMTRACE_1D(LMSW, vcpu,
334 (u32)((vcpu->arch.cr0 & ~0x0ful) | (msw & 0x0f)),
335 handler);
336 }
337 EXPORT_SYMBOL_GPL(kvm_lmsw);
338
339 void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
340 {
341 unsigned long old_cr4 = vcpu->arch.cr4;
342 unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE;
343
344 if (cr4 & CR4_RESERVED_BITS) {
345 printk(KERN_DEBUG "set_cr4: #GP, reserved bits\n");
346 kvm_inject_gp(vcpu, 0);
347 return;
348 }
349
350 if (is_long_mode(vcpu)) {
351 if (!(cr4 & X86_CR4_PAE)) {
352 printk(KERN_DEBUG "set_cr4: #GP, clearing PAE while "
353 "in long mode\n");
354 kvm_inject_gp(vcpu, 0);
355 return;
356 }
357 } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
358 && ((cr4 ^ old_cr4) & pdptr_bits)
359 && !load_pdptrs(vcpu, vcpu->arch.cr3)) {
360 printk(KERN_DEBUG "set_cr4: #GP, pdptrs reserved bits\n");
361 kvm_inject_gp(vcpu, 0);
362 return;
363 }
364
365 if (cr4 & X86_CR4_VMXE) {
366 printk(KERN_DEBUG "set_cr4: #GP, setting VMXE\n");
367 kvm_inject_gp(vcpu, 0);
368 return;
369 }
370 kvm_x86_ops->set_cr4(vcpu, cr4);
371 vcpu->arch.cr4 = cr4;
372 vcpu->arch.mmu.base_role.cr4_pge = (cr4 & X86_CR4_PGE) && !tdp_enabled;
373 kvm_mmu_sync_global(vcpu);
374 kvm_mmu_reset_context(vcpu);
375 }
376 EXPORT_SYMBOL_GPL(kvm_set_cr4);
377
378 void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
379 {
380 if (cr3 == vcpu->arch.cr3 && !pdptrs_changed(vcpu)) {
381 kvm_mmu_sync_roots(vcpu);
382 kvm_mmu_flush_tlb(vcpu);
383 return;
384 }
385
386 if (is_long_mode(vcpu)) {
387 if (cr3 & CR3_L_MODE_RESERVED_BITS) {
388 printk(KERN_DEBUG "set_cr3: #GP, reserved bits\n");
389 kvm_inject_gp(vcpu, 0);
390 return;
391 }
392 } else {
393 if (is_pae(vcpu)) {
394 if (cr3 & CR3_PAE_RESERVED_BITS) {
395 printk(KERN_DEBUG
396 "set_cr3: #GP, reserved bits\n");
397 kvm_inject_gp(vcpu, 0);
398 return;
399 }
400 if (is_paging(vcpu) && !load_pdptrs(vcpu, cr3)) {
401 printk(KERN_DEBUG "set_cr3: #GP, pdptrs "
402 "reserved bits\n");
403 kvm_inject_gp(vcpu, 0);
404 return;
405 }
406 }
407 /*
408 * We don't check reserved bits in nonpae mode, because
409 * this isn't enforced, and VMware depends on this.
410 */
411 }
412
413 /*
414 * Does the new cr3 value map to physical memory? (Note, we
415 * catch an invalid cr3 even in real-mode, because it would
416 * cause trouble later on when we turn on paging anyway.)
417 *
418 * A real CPU would silently accept an invalid cr3 and would
419 * attempt to use it - with largely undefined (and often hard
420 * to debug) behavior on the guest side.
421 */
422 if (unlikely(!gfn_to_memslot(vcpu->kvm, cr3 >> PAGE_SHIFT)))
423 kvm_inject_gp(vcpu, 0);
424 else {
425 vcpu->arch.cr3 = cr3;
426 vcpu->arch.mmu.new_cr3(vcpu);
427 }
428 }
429 EXPORT_SYMBOL_GPL(kvm_set_cr3);
430
431 void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
432 {
433 if (cr8 & CR8_RESERVED_BITS) {
434 printk(KERN_DEBUG "set_cr8: #GP, reserved bits 0x%lx\n", cr8);
435 kvm_inject_gp(vcpu, 0);
436 return;
437 }
438 if (irqchip_in_kernel(vcpu->kvm))
439 kvm_lapic_set_tpr(vcpu, cr8);
440 else
441 vcpu->arch.cr8 = cr8;
442 }
443 EXPORT_SYMBOL_GPL(kvm_set_cr8);
444
445 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
446 {
447 if (irqchip_in_kernel(vcpu->kvm))
448 return kvm_lapic_get_cr8(vcpu);
449 else
450 return vcpu->arch.cr8;
451 }
452 EXPORT_SYMBOL_GPL(kvm_get_cr8);
453
454 static inline u32 bit(int bitno)
455 {
456 return 1 << (bitno & 31);
457 }
458
459 /*
460 * List of msr numbers which we expose to userspace through KVM_GET_MSRS
461 * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
462 *
463 * This list is modified at module load time to reflect the
464 * capabilities of the host cpu.
465 */
466 static u32 msrs_to_save[] = {
467 MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
468 MSR_K6_STAR,
469 #ifdef CONFIG_X86_64
470 MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
471 #endif
472 MSR_IA32_TIME_STAMP_COUNTER, MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
473 MSR_IA32_PERF_STATUS, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA
474 };
475
476 static unsigned num_msrs_to_save;
477
478 static u32 emulated_msrs[] = {
479 MSR_IA32_MISC_ENABLE,
480 };
481
482 static void set_efer(struct kvm_vcpu *vcpu, u64 efer)
483 {
484 if (efer & efer_reserved_bits) {
485 printk(KERN_DEBUG "set_efer: 0x%llx #GP, reserved bits\n",
486 efer);
487 kvm_inject_gp(vcpu, 0);
488 return;
489 }
490
491 if (is_paging(vcpu)
492 && (vcpu->arch.shadow_efer & EFER_LME) != (efer & EFER_LME)) {
493 printk(KERN_DEBUG "set_efer: #GP, change LME while paging\n");
494 kvm_inject_gp(vcpu, 0);
495 return;
496 }
497
498 if (efer & EFER_FFXSR) {
499 struct kvm_cpuid_entry2 *feat;
500
501 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
502 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT))) {
503 printk(KERN_DEBUG "set_efer: #GP, enable FFXSR w/o CPUID capability\n");
504 kvm_inject_gp(vcpu, 0);
505 return;
506 }
507 }
508
509 if (efer & EFER_SVME) {
510 struct kvm_cpuid_entry2 *feat;
511
512 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
513 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM))) {
514 printk(KERN_DEBUG "set_efer: #GP, enable SVM w/o SVM\n");
515 kvm_inject_gp(vcpu, 0);
516 return;
517 }
518 }
519
520 kvm_x86_ops->set_efer(vcpu, efer);
521
522 efer &= ~EFER_LMA;
523 efer |= vcpu->arch.shadow_efer & EFER_LMA;
524
525 vcpu->arch.shadow_efer = efer;
526
527 vcpu->arch.mmu.base_role.nxe = (efer & EFER_NX) && !tdp_enabled;
528 kvm_mmu_reset_context(vcpu);
529 }
530
531 void kvm_enable_efer_bits(u64 mask)
532 {
533 efer_reserved_bits &= ~mask;
534 }
535 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
536
537
538 /*
539 * Writes msr value into into the appropriate "register".
540 * Returns 0 on success, non-0 otherwise.
541 * Assumes vcpu_load() was already called.
542 */
543 int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
544 {
545 return kvm_x86_ops->set_msr(vcpu, msr_index, data);
546 }
547
548 /*
549 * Adapt set_msr() to msr_io()'s calling convention
550 */
551 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
552 {
553 return kvm_set_msr(vcpu, index, *data);
554 }
555
556 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
557 {
558 static int version;
559 struct pvclock_wall_clock wc;
560 struct timespec now, sys, boot;
561
562 if (!wall_clock)
563 return;
564
565 version++;
566
567 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
568
569 /*
570 * The guest calculates current wall clock time by adding
571 * system time (updated by kvm_write_guest_time below) to the
572 * wall clock specified here. guest system time equals host
573 * system time for us, thus we must fill in host boot time here.
574 */
575 now = current_kernel_time();
576 ktime_get_ts(&sys);
577 boot = ns_to_timespec(timespec_to_ns(&now) - timespec_to_ns(&sys));
578
579 wc.sec = boot.tv_sec;
580 wc.nsec = boot.tv_nsec;
581 wc.version = version;
582
583 kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
584
585 version++;
586 kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
587 }
588
589 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
590 {
591 uint32_t quotient, remainder;
592
593 /* Don't try to replace with do_div(), this one calculates
594 * "(dividend << 32) / divisor" */
595 __asm__ ( "divl %4"
596 : "=a" (quotient), "=d" (remainder)
597 : "0" (0), "1" (dividend), "r" (divisor) );
598 return quotient;
599 }
600
601 static void kvm_set_time_scale(uint32_t tsc_khz, struct pvclock_vcpu_time_info *hv_clock)
602 {
603 uint64_t nsecs = 1000000000LL;
604 int32_t shift = 0;
605 uint64_t tps64;
606 uint32_t tps32;
607
608 tps64 = tsc_khz * 1000LL;
609 while (tps64 > nsecs*2) {
610 tps64 >>= 1;
611 shift--;
612 }
613
614 tps32 = (uint32_t)tps64;
615 while (tps32 <= (uint32_t)nsecs) {
616 tps32 <<= 1;
617 shift++;
618 }
619
620 hv_clock->tsc_shift = shift;
621 hv_clock->tsc_to_system_mul = div_frac(nsecs, tps32);
622
623 pr_debug("%s: tsc_khz %u, tsc_shift %d, tsc_mul %u\n",
624 __func__, tsc_khz, hv_clock->tsc_shift,
625 hv_clock->tsc_to_system_mul);
626 }
627
628 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
629
630 static void kvm_write_guest_time(struct kvm_vcpu *v)
631 {
632 struct timespec ts;
633 unsigned long flags;
634 struct kvm_vcpu_arch *vcpu = &v->arch;
635 void *shared_kaddr;
636
637 if ((!vcpu->time_page))
638 return;
639
640 preempt_disable();
641 if (unlikely(vcpu->hv_clock_tsc_khz != __get_cpu_var(cpu_tsc_khz))) {
642 kvm_set_time_scale(__get_cpu_var(cpu_tsc_khz), &vcpu->hv_clock);
643 vcpu->hv_clock_tsc_khz = __get_cpu_var(cpu_tsc_khz);
644 }
645 preempt_enable();
646
647 /* Keep irq disabled to prevent changes to the clock */
648 local_irq_save(flags);
649 kvm_get_msr(v, MSR_IA32_TIME_STAMP_COUNTER,
650 &vcpu->hv_clock.tsc_timestamp);
651 ktime_get_ts(&ts);
652 local_irq_restore(flags);
653
654 /* With all the info we got, fill in the values */
655
656 vcpu->hv_clock.system_time = ts.tv_nsec +
657 (NSEC_PER_SEC * (u64)ts.tv_sec);
658 /*
659 * The interface expects us to write an even number signaling that the
660 * update is finished. Since the guest won't see the intermediate
661 * state, we just increase by 2 at the end.
662 */
663 vcpu->hv_clock.version += 2;
664
665 shared_kaddr = kmap_atomic(vcpu->time_page, KM_USER0);
666
667 memcpy(shared_kaddr + vcpu->time_offset, &vcpu->hv_clock,
668 sizeof(vcpu->hv_clock));
669
670 kunmap_atomic(shared_kaddr, KM_USER0);
671
672 mark_page_dirty(v->kvm, vcpu->time >> PAGE_SHIFT);
673 }
674
675 static int kvm_request_guest_time_update(struct kvm_vcpu *v)
676 {
677 struct kvm_vcpu_arch *vcpu = &v->arch;
678
679 if (!vcpu->time_page)
680 return 0;
681 set_bit(KVM_REQ_KVMCLOCK_UPDATE, &v->requests);
682 return 1;
683 }
684
685 static bool msr_mtrr_valid(unsigned msr)
686 {
687 switch (msr) {
688 case 0x200 ... 0x200 + 2 * KVM_NR_VAR_MTRR - 1:
689 case MSR_MTRRfix64K_00000:
690 case MSR_MTRRfix16K_80000:
691 case MSR_MTRRfix16K_A0000:
692 case MSR_MTRRfix4K_C0000:
693 case MSR_MTRRfix4K_C8000:
694 case MSR_MTRRfix4K_D0000:
695 case MSR_MTRRfix4K_D8000:
696 case MSR_MTRRfix4K_E0000:
697 case MSR_MTRRfix4K_E8000:
698 case MSR_MTRRfix4K_F0000:
699 case MSR_MTRRfix4K_F8000:
700 case MSR_MTRRdefType:
701 case MSR_IA32_CR_PAT:
702 return true;
703 case 0x2f8:
704 return true;
705 }
706 return false;
707 }
708
709 static int set_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 data)
710 {
711 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
712
713 if (!msr_mtrr_valid(msr))
714 return 1;
715
716 if (msr == MSR_MTRRdefType) {
717 vcpu->arch.mtrr_state.def_type = data;
718 vcpu->arch.mtrr_state.enabled = (data & 0xc00) >> 10;
719 } else if (msr == MSR_MTRRfix64K_00000)
720 p[0] = data;
721 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
722 p[1 + msr - MSR_MTRRfix16K_80000] = data;
723 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
724 p[3 + msr - MSR_MTRRfix4K_C0000] = data;
725 else if (msr == MSR_IA32_CR_PAT)
726 vcpu->arch.pat = data;
727 else { /* Variable MTRRs */
728 int idx, is_mtrr_mask;
729 u64 *pt;
730
731 idx = (msr - 0x200) / 2;
732 is_mtrr_mask = msr - 0x200 - 2 * idx;
733 if (!is_mtrr_mask)
734 pt =
735 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
736 else
737 pt =
738 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
739 *pt = data;
740 }
741
742 kvm_mmu_reset_context(vcpu);
743 return 0;
744 }
745
746 int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data)
747 {
748 switch (msr) {
749 case MSR_EFER:
750 set_efer(vcpu, data);
751 break;
752 case MSR_IA32_MC0_STATUS:
753 pr_unimpl(vcpu, "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n",
754 __func__, data);
755 break;
756 case MSR_IA32_MCG_STATUS:
757 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_STATUS 0x%llx, nop\n",
758 __func__, data);
759 break;
760 case MSR_IA32_MCG_CTL:
761 pr_unimpl(vcpu, "%s: MSR_IA32_MCG_CTL 0x%llx, nop\n",
762 __func__, data);
763 break;
764 case MSR_IA32_DEBUGCTLMSR:
765 if (!data) {
766 /* We support the non-activated case already */
767 break;
768 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
769 /* Values other than LBR and BTF are vendor-specific,
770 thus reserved and should throw a #GP */
771 return 1;
772 }
773 pr_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
774 __func__, data);
775 break;
776 case MSR_IA32_UCODE_REV:
777 case MSR_IA32_UCODE_WRITE:
778 case MSR_VM_HSAVE_PA:
779 break;
780 case 0x200 ... 0x2ff:
781 return set_msr_mtrr(vcpu, msr, data);
782 case MSR_IA32_APICBASE:
783 kvm_set_apic_base(vcpu, data);
784 break;
785 case MSR_IA32_MISC_ENABLE:
786 vcpu->arch.ia32_misc_enable_msr = data;
787 break;
788 case MSR_KVM_WALL_CLOCK:
789 vcpu->kvm->arch.wall_clock = data;
790 kvm_write_wall_clock(vcpu->kvm, data);
791 break;
792 case MSR_KVM_SYSTEM_TIME: {
793 if (vcpu->arch.time_page) {
794 kvm_release_page_dirty(vcpu->arch.time_page);
795 vcpu->arch.time_page = NULL;
796 }
797
798 vcpu->arch.time = data;
799
800 /* we verify if the enable bit is set... */
801 if (!(data & 1))
802 break;
803
804 /* ...but clean it before doing the actual write */
805 vcpu->arch.time_offset = data & ~(PAGE_MASK | 1);
806
807 vcpu->arch.time_page =
808 gfn_to_page(vcpu->kvm, data >> PAGE_SHIFT);
809
810 if (is_error_page(vcpu->arch.time_page)) {
811 kvm_release_page_clean(vcpu->arch.time_page);
812 vcpu->arch.time_page = NULL;
813 }
814
815 kvm_request_guest_time_update(vcpu);
816 break;
817 }
818 default:
819 pr_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n", msr, data);
820 return 1;
821 }
822 return 0;
823 }
824 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
825
826
827 /*
828 * Reads an msr value (of 'msr_index') into 'pdata'.
829 * Returns 0 on success, non-0 otherwise.
830 * Assumes vcpu_load() was already called.
831 */
832 int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
833 {
834 return kvm_x86_ops->get_msr(vcpu, msr_index, pdata);
835 }
836
837 static int get_msr_mtrr(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
838 {
839 u64 *p = (u64 *)&vcpu->arch.mtrr_state.fixed_ranges;
840
841 if (!msr_mtrr_valid(msr))
842 return 1;
843
844 if (msr == MSR_MTRRdefType)
845 *pdata = vcpu->arch.mtrr_state.def_type +
846 (vcpu->arch.mtrr_state.enabled << 10);
847 else if (msr == MSR_MTRRfix64K_00000)
848 *pdata = p[0];
849 else if (msr == MSR_MTRRfix16K_80000 || msr == MSR_MTRRfix16K_A0000)
850 *pdata = p[1 + msr - MSR_MTRRfix16K_80000];
851 else if (msr >= MSR_MTRRfix4K_C0000 && msr <= MSR_MTRRfix4K_F8000)
852 *pdata = p[3 + msr - MSR_MTRRfix4K_C0000];
853 else if (msr == MSR_IA32_CR_PAT)
854 *pdata = vcpu->arch.pat;
855 else { /* Variable MTRRs */
856 int idx, is_mtrr_mask;
857 u64 *pt;
858
859 idx = (msr - 0x200) / 2;
860 is_mtrr_mask = msr - 0x200 - 2 * idx;
861 if (!is_mtrr_mask)
862 pt =
863 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].base_lo;
864 else
865 pt =
866 (u64 *)&vcpu->arch.mtrr_state.var_ranges[idx].mask_lo;
867 *pdata = *pt;
868 }
869
870 return 0;
871 }
872
873 int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
874 {
875 u64 data;
876
877 switch (msr) {
878 case 0xc0010010: /* SYSCFG */
879 case 0xc0010015: /* HWCR */
880 case MSR_IA32_PLATFORM_ID:
881 case MSR_IA32_P5_MC_ADDR:
882 case MSR_IA32_P5_MC_TYPE:
883 case MSR_IA32_MC0_CTL:
884 case MSR_IA32_MCG_STATUS:
885 case MSR_IA32_MCG_CAP:
886 case MSR_IA32_MCG_CTL:
887 case MSR_IA32_MC0_MISC:
888 case MSR_IA32_MC0_MISC+4:
889 case MSR_IA32_MC0_MISC+8:
890 case MSR_IA32_MC0_MISC+12:
891 case MSR_IA32_MC0_MISC+16:
892 case MSR_IA32_MC0_MISC+20:
893 case MSR_IA32_UCODE_REV:
894 case MSR_IA32_EBL_CR_POWERON:
895 case MSR_IA32_DEBUGCTLMSR:
896 case MSR_IA32_LASTBRANCHFROMIP:
897 case MSR_IA32_LASTBRANCHTOIP:
898 case MSR_IA32_LASTINTFROMIP:
899 case MSR_IA32_LASTINTTOIP:
900 case MSR_VM_HSAVE_PA:
901 data = 0;
902 break;
903 case MSR_MTRRcap:
904 data = 0x500 | KVM_NR_VAR_MTRR;
905 break;
906 case 0x200 ... 0x2ff:
907 return get_msr_mtrr(vcpu, msr, pdata);
908 case 0xcd: /* fsb frequency */
909 data = 3;
910 break;
911 case MSR_IA32_APICBASE:
912 data = kvm_get_apic_base(vcpu);
913 break;
914 case MSR_IA32_MISC_ENABLE:
915 data = vcpu->arch.ia32_misc_enable_msr;
916 break;
917 case MSR_IA32_PERF_STATUS:
918 /* TSC increment by tick */
919 data = 1000ULL;
920 /* CPU multiplier */
921 data |= (((uint64_t)4ULL) << 40);
922 break;
923 case MSR_EFER:
924 data = vcpu->arch.shadow_efer;
925 break;
926 case MSR_KVM_WALL_CLOCK:
927 data = vcpu->kvm->arch.wall_clock;
928 break;
929 case MSR_KVM_SYSTEM_TIME:
930 data = vcpu->arch.time;
931 break;
932 default:
933 pr_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr);
934 return 1;
935 }
936 *pdata = data;
937 return 0;
938 }
939 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
940
941 /*
942 * Read or write a bunch of msrs. All parameters are kernel addresses.
943 *
944 * @return number of msrs set successfully.
945 */
946 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
947 struct kvm_msr_entry *entries,
948 int (*do_msr)(struct kvm_vcpu *vcpu,
949 unsigned index, u64 *data))
950 {
951 int i;
952
953 vcpu_load(vcpu);
954
955 down_read(&vcpu->kvm->slots_lock);
956 for (i = 0; i < msrs->nmsrs; ++i)
957 if (do_msr(vcpu, entries[i].index, &entries[i].data))
958 break;
959 up_read(&vcpu->kvm->slots_lock);
960
961 vcpu_put(vcpu);
962
963 return i;
964 }
965
966 /*
967 * Read or write a bunch of msrs. Parameters are user addresses.
968 *
969 * @return number of msrs set successfully.
970 */
971 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
972 int (*do_msr)(struct kvm_vcpu *vcpu,
973 unsigned index, u64 *data),
974 int writeback)
975 {
976 struct kvm_msrs msrs;
977 struct kvm_msr_entry *entries;
978 int r, n;
979 unsigned size;
980
981 r = -EFAULT;
982 if (copy_from_user(&msrs, user_msrs, sizeof msrs))
983 goto out;
984
985 r = -E2BIG;
986 if (msrs.nmsrs >= MAX_IO_MSRS)
987 goto out;
988
989 r = -ENOMEM;
990 size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
991 entries = vmalloc(size);
992 if (!entries)
993 goto out;
994
995 r = -EFAULT;
996 if (copy_from_user(entries, user_msrs->entries, size))
997 goto out_free;
998
999 r = n = __msr_io(vcpu, &msrs, entries, do_msr);
1000 if (r < 0)
1001 goto out_free;
1002
1003 r = -EFAULT;
1004 if (writeback && copy_to_user(user_msrs->entries, entries, size))
1005 goto out_free;
1006
1007 r = n;
1008
1009 out_free:
1010 vfree(entries);
1011 out:
1012 return r;
1013 }
1014
1015 int kvm_dev_ioctl_check_extension(long ext)
1016 {
1017 int r;
1018
1019 switch (ext) {
1020 case KVM_CAP_IRQCHIP:
1021 case KVM_CAP_HLT:
1022 case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
1023 case KVM_CAP_SET_TSS_ADDR:
1024 case KVM_CAP_EXT_CPUID:
1025 case KVM_CAP_CLOCKSOURCE:
1026 case KVM_CAP_PIT:
1027 case KVM_CAP_NOP_IO_DELAY:
1028 case KVM_CAP_MP_STATE:
1029 case KVM_CAP_SYNC_MMU:
1030 case KVM_CAP_REINJECT_CONTROL:
1031 case KVM_CAP_IRQ_INJECT_STATUS:
1032 r = 1;
1033 break;
1034 case KVM_CAP_COALESCED_MMIO:
1035 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
1036 break;
1037 case KVM_CAP_VAPIC:
1038 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
1039 break;
1040 case KVM_CAP_NR_VCPUS:
1041 r = KVM_MAX_VCPUS;
1042 break;
1043 case KVM_CAP_NR_MEMSLOTS:
1044 r = KVM_MEMORY_SLOTS;
1045 break;
1046 case KVM_CAP_PV_MMU:
1047 r = !tdp_enabled;
1048 break;
1049 case KVM_CAP_IOMMU:
1050 r = iommu_found();
1051 break;
1052 default:
1053 r = 0;
1054 break;
1055 }
1056 return r;
1057
1058 }
1059
1060 long kvm_arch_dev_ioctl(struct file *filp,
1061 unsigned int ioctl, unsigned long arg)
1062 {
1063 void __user *argp = (void __user *)arg;
1064 long r;
1065
1066 switch (ioctl) {
1067 case KVM_GET_MSR_INDEX_LIST: {
1068 struct kvm_msr_list __user *user_msr_list = argp;
1069 struct kvm_msr_list msr_list;
1070 unsigned n;
1071
1072 r = -EFAULT;
1073 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
1074 goto out;
1075 n = msr_list.nmsrs;
1076 msr_list.nmsrs = num_msrs_to_save + ARRAY_SIZE(emulated_msrs);
1077 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
1078 goto out;
1079 r = -E2BIG;
1080 if (n < num_msrs_to_save)
1081 goto out;
1082 r = -EFAULT;
1083 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
1084 num_msrs_to_save * sizeof(u32)))
1085 goto out;
1086 if (copy_to_user(user_msr_list->indices
1087 + num_msrs_to_save * sizeof(u32),
1088 &emulated_msrs,
1089 ARRAY_SIZE(emulated_msrs) * sizeof(u32)))
1090 goto out;
1091 r = 0;
1092 break;
1093 }
1094 case KVM_GET_SUPPORTED_CPUID: {
1095 struct kvm_cpuid2 __user *cpuid_arg = argp;
1096 struct kvm_cpuid2 cpuid;
1097
1098 r = -EFAULT;
1099 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1100 goto out;
1101 r = kvm_dev_ioctl_get_supported_cpuid(&cpuid,
1102 cpuid_arg->entries);
1103 if (r)
1104 goto out;
1105
1106 r = -EFAULT;
1107 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1108 goto out;
1109 r = 0;
1110 break;
1111 }
1112 default:
1113 r = -EINVAL;
1114 }
1115 out:
1116 return r;
1117 }
1118
1119 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
1120 {
1121 kvm_x86_ops->vcpu_load(vcpu, cpu);
1122 kvm_request_guest_time_update(vcpu);
1123 }
1124
1125 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
1126 {
1127 kvm_x86_ops->vcpu_put(vcpu);
1128 kvm_put_guest_fpu(vcpu);
1129 }
1130
1131 static int is_efer_nx(void)
1132 {
1133 unsigned long long efer = 0;
1134
1135 rdmsrl_safe(MSR_EFER, &efer);
1136 return efer & EFER_NX;
1137 }
1138
1139 static void cpuid_fix_nx_cap(struct kvm_vcpu *vcpu)
1140 {
1141 int i;
1142 struct kvm_cpuid_entry2 *e, *entry;
1143
1144 entry = NULL;
1145 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
1146 e = &vcpu->arch.cpuid_entries[i];
1147 if (e->function == 0x80000001) {
1148 entry = e;
1149 break;
1150 }
1151 }
1152 if (entry && (entry->edx & (1 << 20)) && !is_efer_nx()) {
1153 entry->edx &= ~(1 << 20);
1154 printk(KERN_INFO "kvm: guest NX capability removed\n");
1155 }
1156 }
1157
1158 /* when an old userspace process fills a new kernel module */
1159 static int kvm_vcpu_ioctl_set_cpuid(struct kvm_vcpu *vcpu,
1160 struct kvm_cpuid *cpuid,
1161 struct kvm_cpuid_entry __user *entries)
1162 {
1163 int r, i;
1164 struct kvm_cpuid_entry *cpuid_entries;
1165
1166 r = -E2BIG;
1167 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1168 goto out;
1169 r = -ENOMEM;
1170 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry) * cpuid->nent);
1171 if (!cpuid_entries)
1172 goto out;
1173 r = -EFAULT;
1174 if (copy_from_user(cpuid_entries, entries,
1175 cpuid->nent * sizeof(struct kvm_cpuid_entry)))
1176 goto out_free;
1177 for (i = 0; i < cpuid->nent; i++) {
1178 vcpu->arch.cpuid_entries[i].function = cpuid_entries[i].function;
1179 vcpu->arch.cpuid_entries[i].eax = cpuid_entries[i].eax;
1180 vcpu->arch.cpuid_entries[i].ebx = cpuid_entries[i].ebx;
1181 vcpu->arch.cpuid_entries[i].ecx = cpuid_entries[i].ecx;
1182 vcpu->arch.cpuid_entries[i].edx = cpuid_entries[i].edx;
1183 vcpu->arch.cpuid_entries[i].index = 0;
1184 vcpu->arch.cpuid_entries[i].flags = 0;
1185 vcpu->arch.cpuid_entries[i].padding[0] = 0;
1186 vcpu->arch.cpuid_entries[i].padding[1] = 0;
1187 vcpu->arch.cpuid_entries[i].padding[2] = 0;
1188 }
1189 vcpu->arch.cpuid_nent = cpuid->nent;
1190 cpuid_fix_nx_cap(vcpu);
1191 r = 0;
1192
1193 out_free:
1194 vfree(cpuid_entries);
1195 out:
1196 return r;
1197 }
1198
1199 static int kvm_vcpu_ioctl_set_cpuid2(struct kvm_vcpu *vcpu,
1200 struct kvm_cpuid2 *cpuid,
1201 struct kvm_cpuid_entry2 __user *entries)
1202 {
1203 int r;
1204
1205 r = -E2BIG;
1206 if (cpuid->nent > KVM_MAX_CPUID_ENTRIES)
1207 goto out;
1208 r = -EFAULT;
1209 if (copy_from_user(&vcpu->arch.cpuid_entries, entries,
1210 cpuid->nent * sizeof(struct kvm_cpuid_entry2)))
1211 goto out;
1212 vcpu->arch.cpuid_nent = cpuid->nent;
1213 return 0;
1214
1215 out:
1216 return r;
1217 }
1218
1219 static int kvm_vcpu_ioctl_get_cpuid2(struct kvm_vcpu *vcpu,
1220 struct kvm_cpuid2 *cpuid,
1221 struct kvm_cpuid_entry2 __user *entries)
1222 {
1223 int r;
1224
1225 r = -E2BIG;
1226 if (cpuid->nent < vcpu->arch.cpuid_nent)
1227 goto out;
1228 r = -EFAULT;
1229 if (copy_to_user(entries, &vcpu->arch.cpuid_entries,
1230 vcpu->arch.cpuid_nent * sizeof(struct kvm_cpuid_entry2)))
1231 goto out;
1232 return 0;
1233
1234 out:
1235 cpuid->nent = vcpu->arch.cpuid_nent;
1236 return r;
1237 }
1238
1239 static void do_cpuid_1_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1240 u32 index)
1241 {
1242 entry->function = function;
1243 entry->index = index;
1244 cpuid_count(entry->function, entry->index,
1245 &entry->eax, &entry->ebx, &entry->ecx, &entry->edx);
1246 entry->flags = 0;
1247 }
1248
1249 static void do_cpuid_ent(struct kvm_cpuid_entry2 *entry, u32 function,
1250 u32 index, int *nent, int maxnent)
1251 {
1252 const u32 kvm_supported_word0_x86_features = bit(X86_FEATURE_FPU) |
1253 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1254 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1255 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1256 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1257 bit(X86_FEATURE_SEP) | bit(X86_FEATURE_PGE) |
1258 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1259 bit(X86_FEATURE_CLFLSH) | bit(X86_FEATURE_MMX) |
1260 bit(X86_FEATURE_FXSR) | bit(X86_FEATURE_XMM) |
1261 bit(X86_FEATURE_XMM2) | bit(X86_FEATURE_SELFSNOOP);
1262 const u32 kvm_supported_word1_x86_features = bit(X86_FEATURE_FPU) |
1263 bit(X86_FEATURE_VME) | bit(X86_FEATURE_DE) |
1264 bit(X86_FEATURE_PSE) | bit(X86_FEATURE_TSC) |
1265 bit(X86_FEATURE_MSR) | bit(X86_FEATURE_PAE) |
1266 bit(X86_FEATURE_CX8) | bit(X86_FEATURE_APIC) |
1267 bit(X86_FEATURE_PGE) |
1268 bit(X86_FEATURE_CMOV) | bit(X86_FEATURE_PSE36) |
1269 bit(X86_FEATURE_MMX) | bit(X86_FEATURE_FXSR) |
1270 bit(X86_FEATURE_SYSCALL) |
1271 (is_efer_nx() ? bit(X86_FEATURE_NX) : 0) |
1272 #ifdef CONFIG_X86_64
1273 bit(X86_FEATURE_LM) |
1274 #endif
1275 bit(X86_FEATURE_FXSR_OPT) |
1276 bit(X86_FEATURE_MMXEXT) |
1277 bit(X86_FEATURE_3DNOWEXT) |
1278 bit(X86_FEATURE_3DNOW);
1279 const u32 kvm_supported_word3_x86_features =
1280 bit(X86_FEATURE_XMM3) | bit(X86_FEATURE_CX16);
1281 const u32 kvm_supported_word6_x86_features =
1282 bit(X86_FEATURE_LAHF_LM) | bit(X86_FEATURE_CMP_LEGACY) |
1283 bit(X86_FEATURE_SVM);
1284
1285 /* all calls to cpuid_count() should be made on the same cpu */
1286 get_cpu();
1287 do_cpuid_1_ent(entry, function, index);
1288 ++*nent;
1289
1290 switch (function) {
1291 case 0:
1292 entry->eax = min(entry->eax, (u32)0xb);
1293 break;
1294 case 1:
1295 entry->edx &= kvm_supported_word0_x86_features;
1296 entry->ecx &= kvm_supported_word3_x86_features;
1297 break;
1298 /* function 2 entries are STATEFUL. That is, repeated cpuid commands
1299 * may return different values. This forces us to get_cpu() before
1300 * issuing the first command, and also to emulate this annoying behavior
1301 * in kvm_emulate_cpuid() using KVM_CPUID_FLAG_STATE_READ_NEXT */
1302 case 2: {
1303 int t, times = entry->eax & 0xff;
1304
1305 entry->flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1306 entry->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
1307 for (t = 1; t < times && *nent < maxnent; ++t) {
1308 do_cpuid_1_ent(&entry[t], function, 0);
1309 entry[t].flags |= KVM_CPUID_FLAG_STATEFUL_FUNC;
1310 ++*nent;
1311 }
1312 break;
1313 }
1314 /* function 4 and 0xb have additional index. */
1315 case 4: {
1316 int i, cache_type;
1317
1318 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1319 /* read more entries until cache_type is zero */
1320 for (i = 1; *nent < maxnent; ++i) {
1321 cache_type = entry[i - 1].eax & 0x1f;
1322 if (!cache_type)
1323 break;
1324 do_cpuid_1_ent(&entry[i], function, i);
1325 entry[i].flags |=
1326 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1327 ++*nent;
1328 }
1329 break;
1330 }
1331 case 0xb: {
1332 int i, level_type;
1333
1334 entry->flags |= KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1335 /* read more entries until level_type is zero */
1336 for (i = 1; *nent < maxnent; ++i) {
1337 level_type = entry[i - 1].ecx & 0xff00;
1338 if (!level_type)
1339 break;
1340 do_cpuid_1_ent(&entry[i], function, i);
1341 entry[i].flags |=
1342 KVM_CPUID_FLAG_SIGNIFCANT_INDEX;
1343 ++*nent;
1344 }
1345 break;
1346 }
1347 case 0x80000000:
1348 entry->eax = min(entry->eax, 0x8000001a);
1349 break;
1350 case 0x80000001:
1351 entry->edx &= kvm_supported_word1_x86_features;
1352 entry->ecx &= kvm_supported_word6_x86_features;
1353 break;
1354 }
1355 put_cpu();
1356 }
1357
1358 static int kvm_dev_ioctl_get_supported_cpuid(struct kvm_cpuid2 *cpuid,
1359 struct kvm_cpuid_entry2 __user *entries)
1360 {
1361 struct kvm_cpuid_entry2 *cpuid_entries;
1362 int limit, nent = 0, r = -E2BIG;
1363 u32 func;
1364
1365 if (cpuid->nent < 1)
1366 goto out;
1367 r = -ENOMEM;
1368 cpuid_entries = vmalloc(sizeof(struct kvm_cpuid_entry2) * cpuid->nent);
1369 if (!cpuid_entries)
1370 goto out;
1371
1372 do_cpuid_ent(&cpuid_entries[0], 0, 0, &nent, cpuid->nent);
1373 limit = cpuid_entries[0].eax;
1374 for (func = 1; func <= limit && nent < cpuid->nent; ++func)
1375 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1376 &nent, cpuid->nent);
1377 r = -E2BIG;
1378 if (nent >= cpuid->nent)
1379 goto out_free;
1380
1381 do_cpuid_ent(&cpuid_entries[nent], 0x80000000, 0, &nent, cpuid->nent);
1382 limit = cpuid_entries[nent - 1].eax;
1383 for (func = 0x80000001; func <= limit && nent < cpuid->nent; ++func)
1384 do_cpuid_ent(&cpuid_entries[nent], func, 0,
1385 &nent, cpuid->nent);
1386 r = -EFAULT;
1387 if (copy_to_user(entries, cpuid_entries,
1388 nent * sizeof(struct kvm_cpuid_entry2)))
1389 goto out_free;
1390 cpuid->nent = nent;
1391 r = 0;
1392
1393 out_free:
1394 vfree(cpuid_entries);
1395 out:
1396 return r;
1397 }
1398
1399 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
1400 struct kvm_lapic_state *s)
1401 {
1402 vcpu_load(vcpu);
1403 memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
1404 vcpu_put(vcpu);
1405
1406 return 0;
1407 }
1408
1409 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
1410 struct kvm_lapic_state *s)
1411 {
1412 vcpu_load(vcpu);
1413 memcpy(vcpu->arch.apic->regs, s->regs, sizeof *s);
1414 kvm_apic_post_state_restore(vcpu);
1415 vcpu_put(vcpu);
1416
1417 return 0;
1418 }
1419
1420 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
1421 struct kvm_interrupt *irq)
1422 {
1423 if (irq->irq < 0 || irq->irq >= 256)
1424 return -EINVAL;
1425 if (irqchip_in_kernel(vcpu->kvm))
1426 return -ENXIO;
1427 vcpu_load(vcpu);
1428
1429 set_bit(irq->irq, vcpu->arch.irq_pending);
1430 set_bit(irq->irq / BITS_PER_LONG, &vcpu->arch.irq_summary);
1431
1432 vcpu_put(vcpu);
1433
1434 return 0;
1435 }
1436
1437 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
1438 {
1439 vcpu_load(vcpu);
1440 kvm_inject_nmi(vcpu);
1441 vcpu_put(vcpu);
1442
1443 return 0;
1444 }
1445
1446 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
1447 struct kvm_tpr_access_ctl *tac)
1448 {
1449 if (tac->flags)
1450 return -EINVAL;
1451 vcpu->arch.tpr_access_reporting = !!tac->enabled;
1452 return 0;
1453 }
1454
1455 long kvm_arch_vcpu_ioctl(struct file *filp,
1456 unsigned int ioctl, unsigned long arg)
1457 {
1458 struct kvm_vcpu *vcpu = filp->private_data;
1459 void __user *argp = (void __user *)arg;
1460 int r;
1461 struct kvm_lapic_state *lapic = NULL;
1462
1463 switch (ioctl) {
1464 case KVM_GET_LAPIC: {
1465 lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1466
1467 r = -ENOMEM;
1468 if (!lapic)
1469 goto out;
1470 r = kvm_vcpu_ioctl_get_lapic(vcpu, lapic);
1471 if (r)
1472 goto out;
1473 r = -EFAULT;
1474 if (copy_to_user(argp, lapic, sizeof(struct kvm_lapic_state)))
1475 goto out;
1476 r = 0;
1477 break;
1478 }
1479 case KVM_SET_LAPIC: {
1480 lapic = kmalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
1481 r = -ENOMEM;
1482 if (!lapic)
1483 goto out;
1484 r = -EFAULT;
1485 if (copy_from_user(lapic, argp, sizeof(struct kvm_lapic_state)))
1486 goto out;
1487 r = kvm_vcpu_ioctl_set_lapic(vcpu, lapic);
1488 if (r)
1489 goto out;
1490 r = 0;
1491 break;
1492 }
1493 case KVM_INTERRUPT: {
1494 struct kvm_interrupt irq;
1495
1496 r = -EFAULT;
1497 if (copy_from_user(&irq, argp, sizeof irq))
1498 goto out;
1499 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
1500 if (r)
1501 goto out;
1502 r = 0;
1503 break;
1504 }
1505 case KVM_NMI: {
1506 r = kvm_vcpu_ioctl_nmi(vcpu);
1507 if (r)
1508 goto out;
1509 r = 0;
1510 break;
1511 }
1512 case KVM_SET_CPUID: {
1513 struct kvm_cpuid __user *cpuid_arg = argp;
1514 struct kvm_cpuid cpuid;
1515
1516 r = -EFAULT;
1517 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1518 goto out;
1519 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
1520 if (r)
1521 goto out;
1522 break;
1523 }
1524 case KVM_SET_CPUID2: {
1525 struct kvm_cpuid2 __user *cpuid_arg = argp;
1526 struct kvm_cpuid2 cpuid;
1527
1528 r = -EFAULT;
1529 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1530 goto out;
1531 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
1532 cpuid_arg->entries);
1533 if (r)
1534 goto out;
1535 break;
1536 }
1537 case KVM_GET_CPUID2: {
1538 struct kvm_cpuid2 __user *cpuid_arg = argp;
1539 struct kvm_cpuid2 cpuid;
1540
1541 r = -EFAULT;
1542 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
1543 goto out;
1544 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
1545 cpuid_arg->entries);
1546 if (r)
1547 goto out;
1548 r = -EFAULT;
1549 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
1550 goto out;
1551 r = 0;
1552 break;
1553 }
1554 case KVM_GET_MSRS:
1555 r = msr_io(vcpu, argp, kvm_get_msr, 1);
1556 break;
1557 case KVM_SET_MSRS:
1558 r = msr_io(vcpu, argp, do_set_msr, 0);
1559 break;
1560 case KVM_TPR_ACCESS_REPORTING: {
1561 struct kvm_tpr_access_ctl tac;
1562
1563 r = -EFAULT;
1564 if (copy_from_user(&tac, argp, sizeof tac))
1565 goto out;
1566 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
1567 if (r)
1568 goto out;
1569 r = -EFAULT;
1570 if (copy_to_user(argp, &tac, sizeof tac))
1571 goto out;
1572 r = 0;
1573 break;
1574 };
1575 case KVM_SET_VAPIC_ADDR: {
1576 struct kvm_vapic_addr va;
1577
1578 r = -EINVAL;
1579 if (!irqchip_in_kernel(vcpu->kvm))
1580 goto out;
1581 r = -EFAULT;
1582 if (copy_from_user(&va, argp, sizeof va))
1583 goto out;
1584 r = 0;
1585 kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
1586 break;
1587 }
1588 default:
1589 r = -EINVAL;
1590 }
1591 out:
1592 if (lapic)
1593 kfree(lapic);
1594 return r;
1595 }
1596
1597 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
1598 {
1599 int ret;
1600
1601 if (addr > (unsigned int)(-3 * PAGE_SIZE))
1602 return -1;
1603 ret = kvm_x86_ops->set_tss_addr(kvm, addr);
1604 return ret;
1605 }
1606
1607 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
1608 u32 kvm_nr_mmu_pages)
1609 {
1610 if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
1611 return -EINVAL;
1612
1613 down_write(&kvm->slots_lock);
1614 spin_lock(&kvm->mmu_lock);
1615
1616 kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
1617 kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
1618
1619 spin_unlock(&kvm->mmu_lock);
1620 up_write(&kvm->slots_lock);
1621 return 0;
1622 }
1623
1624 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
1625 {
1626 return kvm->arch.n_alloc_mmu_pages;
1627 }
1628
1629 gfn_t unalias_gfn(struct kvm *kvm, gfn_t gfn)
1630 {
1631 int i;
1632 struct kvm_mem_alias *alias;
1633
1634 for (i = 0; i < kvm->arch.naliases; ++i) {
1635 alias = &kvm->arch.aliases[i];
1636 if (gfn >= alias->base_gfn
1637 && gfn < alias->base_gfn + alias->npages)
1638 return alias->target_gfn + gfn - alias->base_gfn;
1639 }
1640 return gfn;
1641 }
1642
1643 /*
1644 * Set a new alias region. Aliases map a portion of physical memory into
1645 * another portion. This is useful for memory windows, for example the PC
1646 * VGA region.
1647 */
1648 static int kvm_vm_ioctl_set_memory_alias(struct kvm *kvm,
1649 struct kvm_memory_alias *alias)
1650 {
1651 int r, n;
1652 struct kvm_mem_alias *p;
1653
1654 r = -EINVAL;
1655 /* General sanity checks */
1656 if (alias->memory_size & (PAGE_SIZE - 1))
1657 goto out;
1658 if (alias->guest_phys_addr & (PAGE_SIZE - 1))
1659 goto out;
1660 if (alias->slot >= KVM_ALIAS_SLOTS)
1661 goto out;
1662 if (alias->guest_phys_addr + alias->memory_size
1663 < alias->guest_phys_addr)
1664 goto out;
1665 if (alias->target_phys_addr + alias->memory_size
1666 < alias->target_phys_addr)
1667 goto out;
1668
1669 down_write(&kvm->slots_lock);
1670 spin_lock(&kvm->mmu_lock);
1671
1672 p = &kvm->arch.aliases[alias->slot];
1673 p->base_gfn = alias->guest_phys_addr >> PAGE_SHIFT;
1674 p->npages = alias->memory_size >> PAGE_SHIFT;
1675 p->target_gfn = alias->target_phys_addr >> PAGE_SHIFT;
1676
1677 for (n = KVM_ALIAS_SLOTS; n > 0; --n)
1678 if (kvm->arch.aliases[n - 1].npages)
1679 break;
1680 kvm->arch.naliases = n;
1681
1682 spin_unlock(&kvm->mmu_lock);
1683 kvm_mmu_zap_all(kvm);
1684
1685 up_write(&kvm->slots_lock);
1686
1687 return 0;
1688
1689 out:
1690 return r;
1691 }
1692
1693 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1694 {
1695 int r;
1696
1697 r = 0;
1698 switch (chip->chip_id) {
1699 case KVM_IRQCHIP_PIC_MASTER:
1700 memcpy(&chip->chip.pic,
1701 &pic_irqchip(kvm)->pics[0],
1702 sizeof(struct kvm_pic_state));
1703 break;
1704 case KVM_IRQCHIP_PIC_SLAVE:
1705 memcpy(&chip->chip.pic,
1706 &pic_irqchip(kvm)->pics[1],
1707 sizeof(struct kvm_pic_state));
1708 break;
1709 case KVM_IRQCHIP_IOAPIC:
1710 memcpy(&chip->chip.ioapic,
1711 ioapic_irqchip(kvm),
1712 sizeof(struct kvm_ioapic_state));
1713 break;
1714 default:
1715 r = -EINVAL;
1716 break;
1717 }
1718 return r;
1719 }
1720
1721 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
1722 {
1723 int r;
1724
1725 r = 0;
1726 switch (chip->chip_id) {
1727 case KVM_IRQCHIP_PIC_MASTER:
1728 memcpy(&pic_irqchip(kvm)->pics[0],
1729 &chip->chip.pic,
1730 sizeof(struct kvm_pic_state));
1731 break;
1732 case KVM_IRQCHIP_PIC_SLAVE:
1733 memcpy(&pic_irqchip(kvm)->pics[1],
1734 &chip->chip.pic,
1735 sizeof(struct kvm_pic_state));
1736 break;
1737 case KVM_IRQCHIP_IOAPIC:
1738 memcpy(ioapic_irqchip(kvm),
1739 &chip->chip.ioapic,
1740 sizeof(struct kvm_ioapic_state));
1741 break;
1742 default:
1743 r = -EINVAL;
1744 break;
1745 }
1746 kvm_pic_update_irq(pic_irqchip(kvm));
1747 return r;
1748 }
1749
1750 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1751 {
1752 int r = 0;
1753
1754 memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
1755 return r;
1756 }
1757
1758 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
1759 {
1760 int r = 0;
1761
1762 memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
1763 kvm_pit_load_count(kvm, 0, ps->channels[0].count);
1764 return r;
1765 }
1766
1767 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
1768 struct kvm_reinject_control *control)
1769 {
1770 if (!kvm->arch.vpit)
1771 return -ENXIO;
1772 kvm->arch.vpit->pit_state.pit_timer.reinject = control->pit_reinject;
1773 return 0;
1774 }
1775
1776 /*
1777 * Get (and clear) the dirty memory log for a memory slot.
1778 */
1779 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm,
1780 struct kvm_dirty_log *log)
1781 {
1782 int r;
1783 int n;
1784 struct kvm_memory_slot *memslot;
1785 int is_dirty = 0;
1786
1787 down_write(&kvm->slots_lock);
1788
1789 r = kvm_get_dirty_log(kvm, log, &is_dirty);
1790 if (r)
1791 goto out;
1792
1793 /* If nothing is dirty, don't bother messing with page tables. */
1794 if (is_dirty) {
1795 spin_lock(&kvm->mmu_lock);
1796 kvm_mmu_slot_remove_write_access(kvm, log->slot);
1797 spin_unlock(&kvm->mmu_lock);
1798 kvm_flush_remote_tlbs(kvm);
1799 memslot = &kvm->memslots[log->slot];
1800 n = ALIGN(memslot->npages, BITS_PER_LONG) / 8;
1801 memset(memslot->dirty_bitmap, 0, n);
1802 }
1803 r = 0;
1804 out:
1805 up_write(&kvm->slots_lock);
1806 return r;
1807 }
1808
1809 long kvm_arch_vm_ioctl(struct file *filp,
1810 unsigned int ioctl, unsigned long arg)
1811 {
1812 struct kvm *kvm = filp->private_data;
1813 void __user *argp = (void __user *)arg;
1814 int r = -EINVAL;
1815 /*
1816 * This union makes it completely explicit to gcc-3.x
1817 * that these two variables' stack usage should be
1818 * combined, not added together.
1819 */
1820 union {
1821 struct kvm_pit_state ps;
1822 struct kvm_memory_alias alias;
1823 } u;
1824
1825 switch (ioctl) {
1826 case KVM_SET_TSS_ADDR:
1827 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
1828 if (r < 0)
1829 goto out;
1830 break;
1831 case KVM_SET_MEMORY_REGION: {
1832 struct kvm_memory_region kvm_mem;
1833 struct kvm_userspace_memory_region kvm_userspace_mem;
1834
1835 r = -EFAULT;
1836 if (copy_from_user(&kvm_mem, argp, sizeof kvm_mem))
1837 goto out;
1838 kvm_userspace_mem.slot = kvm_mem.slot;
1839 kvm_userspace_mem.flags = kvm_mem.flags;
1840 kvm_userspace_mem.guest_phys_addr = kvm_mem.guest_phys_addr;
1841 kvm_userspace_mem.memory_size = kvm_mem.memory_size;
1842 r = kvm_vm_ioctl_set_memory_region(kvm, &kvm_userspace_mem, 0);
1843 if (r)
1844 goto out;
1845 break;
1846 }
1847 case KVM_SET_NR_MMU_PAGES:
1848 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
1849 if (r)
1850 goto out;
1851 break;
1852 case KVM_GET_NR_MMU_PAGES:
1853 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
1854 break;
1855 case KVM_SET_MEMORY_ALIAS:
1856 r = -EFAULT;
1857 if (copy_from_user(&u.alias, argp, sizeof(struct kvm_memory_alias)))
1858 goto out;
1859 r = kvm_vm_ioctl_set_memory_alias(kvm, &u.alias);
1860 if (r)
1861 goto out;
1862 break;
1863 case KVM_CREATE_IRQCHIP:
1864 r = -ENOMEM;
1865 kvm->arch.vpic = kvm_create_pic(kvm);
1866 if (kvm->arch.vpic) {
1867 r = kvm_ioapic_init(kvm);
1868 if (r) {
1869 kfree(kvm->arch.vpic);
1870 kvm->arch.vpic = NULL;
1871 goto out;
1872 }
1873 } else
1874 goto out;
1875 r = kvm_setup_default_irq_routing(kvm);
1876 if (r) {
1877 kfree(kvm->arch.vpic);
1878 kfree(kvm->arch.vioapic);
1879 goto out;
1880 }
1881 break;
1882 case KVM_CREATE_PIT:
1883 mutex_lock(&kvm->lock);
1884 r = -EEXIST;
1885 if (kvm->arch.vpit)
1886 goto create_pit_unlock;
1887 r = -ENOMEM;
1888 kvm->arch.vpit = kvm_create_pit(kvm);
1889 if (kvm->arch.vpit)
1890 r = 0;
1891 create_pit_unlock:
1892 mutex_unlock(&kvm->lock);
1893 break;
1894 case KVM_IRQ_LINE_STATUS:
1895 case KVM_IRQ_LINE: {
1896 struct kvm_irq_level irq_event;
1897
1898 r = -EFAULT;
1899 if (copy_from_user(&irq_event, argp, sizeof irq_event))
1900 goto out;
1901 if (irqchip_in_kernel(kvm)) {
1902 __s32 status;
1903 mutex_lock(&kvm->lock);
1904 status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
1905 irq_event.irq, irq_event.level);
1906 mutex_unlock(&kvm->lock);
1907 if (ioctl == KVM_IRQ_LINE_STATUS) {
1908 irq_event.status = status;
1909 if (copy_to_user(argp, &irq_event,
1910 sizeof irq_event))
1911 goto out;
1912 }
1913 r = 0;
1914 }
1915 break;
1916 }
1917 case KVM_GET_IRQCHIP: {
1918 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1919 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1920
1921 r = -ENOMEM;
1922 if (!chip)
1923 goto out;
1924 r = -EFAULT;
1925 if (copy_from_user(chip, argp, sizeof *chip))
1926 goto get_irqchip_out;
1927 r = -ENXIO;
1928 if (!irqchip_in_kernel(kvm))
1929 goto get_irqchip_out;
1930 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
1931 if (r)
1932 goto get_irqchip_out;
1933 r = -EFAULT;
1934 if (copy_to_user(argp, chip, sizeof *chip))
1935 goto get_irqchip_out;
1936 r = 0;
1937 get_irqchip_out:
1938 kfree(chip);
1939 if (r)
1940 goto out;
1941 break;
1942 }
1943 case KVM_SET_IRQCHIP: {
1944 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
1945 struct kvm_irqchip *chip = kmalloc(sizeof(*chip), GFP_KERNEL);
1946
1947 r = -ENOMEM;
1948 if (!chip)
1949 goto out;
1950 r = -EFAULT;
1951 if (copy_from_user(chip, argp, sizeof *chip))
1952 goto set_irqchip_out;
1953 r = -ENXIO;
1954 if (!irqchip_in_kernel(kvm))
1955 goto set_irqchip_out;
1956 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
1957 if (r)
1958 goto set_irqchip_out;
1959 r = 0;
1960 set_irqchip_out:
1961 kfree(chip);
1962 if (r)
1963 goto out;
1964 break;
1965 }
1966 case KVM_GET_PIT: {
1967 r = -EFAULT;
1968 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
1969 goto out;
1970 r = -ENXIO;
1971 if (!kvm->arch.vpit)
1972 goto out;
1973 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
1974 if (r)
1975 goto out;
1976 r = -EFAULT;
1977 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
1978 goto out;
1979 r = 0;
1980 break;
1981 }
1982 case KVM_SET_PIT: {
1983 r = -EFAULT;
1984 if (copy_from_user(&u.ps, argp, sizeof u.ps))
1985 goto out;
1986 r = -ENXIO;
1987 if (!kvm->arch.vpit)
1988 goto out;
1989 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
1990 if (r)
1991 goto out;
1992 r = 0;
1993 break;
1994 }
1995 case KVM_REINJECT_CONTROL: {
1996 struct kvm_reinject_control control;
1997 r = -EFAULT;
1998 if (copy_from_user(&control, argp, sizeof(control)))
1999 goto out;
2000 r = kvm_vm_ioctl_reinject(kvm, &control);
2001 if (r)
2002 goto out;
2003 r = 0;
2004 break;
2005 }
2006 default:
2007 ;
2008 }
2009 out:
2010 return r;
2011 }
2012
2013 static void kvm_init_msr_list(void)
2014 {
2015 u32 dummy[2];
2016 unsigned i, j;
2017
2018 for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
2019 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
2020 continue;
2021 if (j < i)
2022 msrs_to_save[j] = msrs_to_save[i];
2023 j++;
2024 }
2025 num_msrs_to_save = j;
2026 }
2027
2028 /*
2029 * Only apic need an MMIO device hook, so shortcut now..
2030 */
2031 static struct kvm_io_device *vcpu_find_pervcpu_dev(struct kvm_vcpu *vcpu,
2032 gpa_t addr, int len,
2033 int is_write)
2034 {
2035 struct kvm_io_device *dev;
2036
2037 if (vcpu->arch.apic) {
2038 dev = &vcpu->arch.apic->dev;
2039 if (dev->in_range(dev, addr, len, is_write))
2040 return dev;
2041 }
2042 return NULL;
2043 }
2044
2045
2046 static struct kvm_io_device *vcpu_find_mmio_dev(struct kvm_vcpu *vcpu,
2047 gpa_t addr, int len,
2048 int is_write)
2049 {
2050 struct kvm_io_device *dev;
2051
2052 dev = vcpu_find_pervcpu_dev(vcpu, addr, len, is_write);
2053 if (dev == NULL)
2054 dev = kvm_io_bus_find_dev(&vcpu->kvm->mmio_bus, addr, len,
2055 is_write);
2056 return dev;
2057 }
2058
2059 static int kvm_read_guest_virt(gva_t addr, void *val, unsigned int bytes,
2060 struct kvm_vcpu *vcpu)
2061 {
2062 void *data = val;
2063 int r = X86EMUL_CONTINUE;
2064
2065 while (bytes) {
2066 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2067 unsigned offset = addr & (PAGE_SIZE-1);
2068 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
2069 int ret;
2070
2071 if (gpa == UNMAPPED_GVA) {
2072 r = X86EMUL_PROPAGATE_FAULT;
2073 goto out;
2074 }
2075 ret = kvm_read_guest(vcpu->kvm, gpa, data, toread);
2076 if (ret < 0) {
2077 r = X86EMUL_UNHANDLEABLE;
2078 goto out;
2079 }
2080
2081 bytes -= toread;
2082 data += toread;
2083 addr += toread;
2084 }
2085 out:
2086 return r;
2087 }
2088
2089 static int kvm_write_guest_virt(gva_t addr, void *val, unsigned int bytes,
2090 struct kvm_vcpu *vcpu)
2091 {
2092 void *data = val;
2093 int r = X86EMUL_CONTINUE;
2094
2095 while (bytes) {
2096 gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2097 unsigned offset = addr & (PAGE_SIZE-1);
2098 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
2099 int ret;
2100
2101 if (gpa == UNMAPPED_GVA) {
2102 r = X86EMUL_PROPAGATE_FAULT;
2103 goto out;
2104 }
2105 ret = kvm_write_guest(vcpu->kvm, gpa, data, towrite);
2106 if (ret < 0) {
2107 r = X86EMUL_UNHANDLEABLE;
2108 goto out;
2109 }
2110
2111 bytes -= towrite;
2112 data += towrite;
2113 addr += towrite;
2114 }
2115 out:
2116 return r;
2117 }
2118
2119
2120 static int emulator_read_emulated(unsigned long addr,
2121 void *val,
2122 unsigned int bytes,
2123 struct kvm_vcpu *vcpu)
2124 {
2125 struct kvm_io_device *mmio_dev;
2126 gpa_t gpa;
2127
2128 if (vcpu->mmio_read_completed) {
2129 memcpy(val, vcpu->mmio_data, bytes);
2130 vcpu->mmio_read_completed = 0;
2131 return X86EMUL_CONTINUE;
2132 }
2133
2134 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2135
2136 /* For APIC access vmexit */
2137 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2138 goto mmio;
2139
2140 if (kvm_read_guest_virt(addr, val, bytes, vcpu)
2141 == X86EMUL_CONTINUE)
2142 return X86EMUL_CONTINUE;
2143 if (gpa == UNMAPPED_GVA)
2144 return X86EMUL_PROPAGATE_FAULT;
2145
2146 mmio:
2147 /*
2148 * Is this MMIO handled locally?
2149 */
2150 mutex_lock(&vcpu->kvm->lock);
2151 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 0);
2152 if (mmio_dev) {
2153 kvm_iodevice_read(mmio_dev, gpa, bytes, val);
2154 mutex_unlock(&vcpu->kvm->lock);
2155 return X86EMUL_CONTINUE;
2156 }
2157 mutex_unlock(&vcpu->kvm->lock);
2158
2159 vcpu->mmio_needed = 1;
2160 vcpu->mmio_phys_addr = gpa;
2161 vcpu->mmio_size = bytes;
2162 vcpu->mmio_is_write = 0;
2163
2164 return X86EMUL_UNHANDLEABLE;
2165 }
2166
2167 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
2168 const void *val, int bytes)
2169 {
2170 int ret;
2171
2172 ret = kvm_write_guest(vcpu->kvm, gpa, val, bytes);
2173 if (ret < 0)
2174 return 0;
2175 kvm_mmu_pte_write(vcpu, gpa, val, bytes, 1);
2176 return 1;
2177 }
2178
2179 static int emulator_write_emulated_onepage(unsigned long addr,
2180 const void *val,
2181 unsigned int bytes,
2182 struct kvm_vcpu *vcpu)
2183 {
2184 struct kvm_io_device *mmio_dev;
2185 gpa_t gpa;
2186
2187 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2188
2189 if (gpa == UNMAPPED_GVA) {
2190 kvm_inject_page_fault(vcpu, addr, 2);
2191 return X86EMUL_PROPAGATE_FAULT;
2192 }
2193
2194 /* For APIC access vmexit */
2195 if ((gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2196 goto mmio;
2197
2198 if (emulator_write_phys(vcpu, gpa, val, bytes))
2199 return X86EMUL_CONTINUE;
2200
2201 mmio:
2202 /*
2203 * Is this MMIO handled locally?
2204 */
2205 mutex_lock(&vcpu->kvm->lock);
2206 mmio_dev = vcpu_find_mmio_dev(vcpu, gpa, bytes, 1);
2207 if (mmio_dev) {
2208 kvm_iodevice_write(mmio_dev, gpa, bytes, val);
2209 mutex_unlock(&vcpu->kvm->lock);
2210 return X86EMUL_CONTINUE;
2211 }
2212 mutex_unlock(&vcpu->kvm->lock);
2213
2214 vcpu->mmio_needed = 1;
2215 vcpu->mmio_phys_addr = gpa;
2216 vcpu->mmio_size = bytes;
2217 vcpu->mmio_is_write = 1;
2218 memcpy(vcpu->mmio_data, val, bytes);
2219
2220 return X86EMUL_CONTINUE;
2221 }
2222
2223 int emulator_write_emulated(unsigned long addr,
2224 const void *val,
2225 unsigned int bytes,
2226 struct kvm_vcpu *vcpu)
2227 {
2228 /* Crossing a page boundary? */
2229 if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
2230 int rc, now;
2231
2232 now = -addr & ~PAGE_MASK;
2233 rc = emulator_write_emulated_onepage(addr, val, now, vcpu);
2234 if (rc != X86EMUL_CONTINUE)
2235 return rc;
2236 addr += now;
2237 val += now;
2238 bytes -= now;
2239 }
2240 return emulator_write_emulated_onepage(addr, val, bytes, vcpu);
2241 }
2242 EXPORT_SYMBOL_GPL(emulator_write_emulated);
2243
2244 static int emulator_cmpxchg_emulated(unsigned long addr,
2245 const void *old,
2246 const void *new,
2247 unsigned int bytes,
2248 struct kvm_vcpu *vcpu)
2249 {
2250 static int reported;
2251
2252 if (!reported) {
2253 reported = 1;
2254 printk(KERN_WARNING "kvm: emulating exchange as write\n");
2255 }
2256 #ifndef CONFIG_X86_64
2257 /* guests cmpxchg8b have to be emulated atomically */
2258 if (bytes == 8) {
2259 gpa_t gpa;
2260 struct page *page;
2261 char *kaddr;
2262 u64 val;
2263
2264 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, addr);
2265
2266 if (gpa == UNMAPPED_GVA ||
2267 (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
2268 goto emul_write;
2269
2270 if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
2271 goto emul_write;
2272
2273 val = *(u64 *)new;
2274
2275 page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2276
2277 kaddr = kmap_atomic(page, KM_USER0);
2278 set_64bit((u64 *)(kaddr + offset_in_page(gpa)), val);
2279 kunmap_atomic(kaddr, KM_USER0);
2280 kvm_release_page_dirty(page);
2281 }
2282 emul_write:
2283 #endif
2284
2285 return emulator_write_emulated(addr, new, bytes, vcpu);
2286 }
2287
2288 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
2289 {
2290 return kvm_x86_ops->get_segment_base(vcpu, seg);
2291 }
2292
2293 int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address)
2294 {
2295 kvm_mmu_invlpg(vcpu, address);
2296 return X86EMUL_CONTINUE;
2297 }
2298
2299 int emulate_clts(struct kvm_vcpu *vcpu)
2300 {
2301 KVMTRACE_0D(CLTS, vcpu, handler);
2302 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 & ~X86_CR0_TS);
2303 return X86EMUL_CONTINUE;
2304 }
2305
2306 int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long *dest)
2307 {
2308 struct kvm_vcpu *vcpu = ctxt->vcpu;
2309
2310 switch (dr) {
2311 case 0 ... 3:
2312 *dest = kvm_x86_ops->get_dr(vcpu, dr);
2313 return X86EMUL_CONTINUE;
2314 default:
2315 pr_unimpl(vcpu, "%s: unexpected dr %u\n", __func__, dr);
2316 return X86EMUL_UNHANDLEABLE;
2317 }
2318 }
2319
2320 int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr, unsigned long value)
2321 {
2322 unsigned long mask = (ctxt->mode == X86EMUL_MODE_PROT64) ? ~0ULL : ~0U;
2323 int exception;
2324
2325 kvm_x86_ops->set_dr(ctxt->vcpu, dr, value & mask, &exception);
2326 if (exception) {
2327 /* FIXME: better handling */
2328 return X86EMUL_UNHANDLEABLE;
2329 }
2330 return X86EMUL_CONTINUE;
2331 }
2332
2333 void kvm_report_emulation_failure(struct kvm_vcpu *vcpu, const char *context)
2334 {
2335 u8 opcodes[4];
2336 unsigned long rip = kvm_rip_read(vcpu);
2337 unsigned long rip_linear;
2338
2339 if (!printk_ratelimit())
2340 return;
2341
2342 rip_linear = rip + get_segment_base(vcpu, VCPU_SREG_CS);
2343
2344 kvm_read_guest_virt(rip_linear, (void *)opcodes, 4, vcpu);
2345
2346 printk(KERN_ERR "emulation failed (%s) rip %lx %02x %02x %02x %02x\n",
2347 context, rip, opcodes[0], opcodes[1], opcodes[2], opcodes[3]);
2348 }
2349 EXPORT_SYMBOL_GPL(kvm_report_emulation_failure);
2350
2351 static struct x86_emulate_ops emulate_ops = {
2352 .read_std = kvm_read_guest_virt,
2353 .read_emulated = emulator_read_emulated,
2354 .write_emulated = emulator_write_emulated,
2355 .cmpxchg_emulated = emulator_cmpxchg_emulated,
2356 };
2357
2358 static void cache_all_regs(struct kvm_vcpu *vcpu)
2359 {
2360 kvm_register_read(vcpu, VCPU_REGS_RAX);
2361 kvm_register_read(vcpu, VCPU_REGS_RSP);
2362 kvm_register_read(vcpu, VCPU_REGS_RIP);
2363 vcpu->arch.regs_dirty = ~0;
2364 }
2365
2366 int emulate_instruction(struct kvm_vcpu *vcpu,
2367 struct kvm_run *run,
2368 unsigned long cr2,
2369 u16 error_code,
2370 int emulation_type)
2371 {
2372 int r, shadow_mask;
2373 struct decode_cache *c;
2374
2375 kvm_clear_exception_queue(vcpu);
2376 vcpu->arch.mmio_fault_cr2 = cr2;
2377 /*
2378 * TODO: fix x86_emulate.c to use guest_read/write_register
2379 * instead of direct ->regs accesses, can save hundred cycles
2380 * on Intel for instructions that don't read/change RSP, for
2381 * for example.
2382 */
2383 cache_all_regs(vcpu);
2384
2385 vcpu->mmio_is_write = 0;
2386 vcpu->arch.pio.string = 0;
2387
2388 if (!(emulation_type & EMULTYPE_NO_DECODE)) {
2389 int cs_db, cs_l;
2390 kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
2391
2392 vcpu->arch.emulate_ctxt.vcpu = vcpu;
2393 vcpu->arch.emulate_ctxt.eflags = kvm_x86_ops->get_rflags(vcpu);
2394 vcpu->arch.emulate_ctxt.mode =
2395 (vcpu->arch.emulate_ctxt.eflags & X86_EFLAGS_VM)
2396 ? X86EMUL_MODE_REAL : cs_l
2397 ? X86EMUL_MODE_PROT64 : cs_db
2398 ? X86EMUL_MODE_PROT32 : X86EMUL_MODE_PROT16;
2399
2400 r = x86_decode_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2401
2402 /* Reject the instructions other than VMCALL/VMMCALL when
2403 * try to emulate invalid opcode */
2404 c = &vcpu->arch.emulate_ctxt.decode;
2405 if ((emulation_type & EMULTYPE_TRAP_UD) &&
2406 (!(c->twobyte && c->b == 0x01 &&
2407 (c->modrm_reg == 0 || c->modrm_reg == 3) &&
2408 c->modrm_mod == 3 && c->modrm_rm == 1)))
2409 return EMULATE_FAIL;
2410
2411 ++vcpu->stat.insn_emulation;
2412 if (r) {
2413 ++vcpu->stat.insn_emulation_fail;
2414 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2415 return EMULATE_DONE;
2416 return EMULATE_FAIL;
2417 }
2418 }
2419
2420 r = x86_emulate_insn(&vcpu->arch.emulate_ctxt, &emulate_ops);
2421 shadow_mask = vcpu->arch.emulate_ctxt.interruptibility;
2422
2423 if (r == 0)
2424 kvm_x86_ops->set_interrupt_shadow(vcpu, shadow_mask);
2425
2426 if (vcpu->arch.pio.string)
2427 return EMULATE_DO_MMIO;
2428
2429 if ((r || vcpu->mmio_is_write) && run) {
2430 run->exit_reason = KVM_EXIT_MMIO;
2431 run->mmio.phys_addr = vcpu->mmio_phys_addr;
2432 memcpy(run->mmio.data, vcpu->mmio_data, 8);
2433 run->mmio.len = vcpu->mmio_size;
2434 run->mmio.is_write = vcpu->mmio_is_write;
2435 }
2436
2437 if (r) {
2438 if (kvm_mmu_unprotect_page_virt(vcpu, cr2))
2439 return EMULATE_DONE;
2440 if (!vcpu->mmio_needed) {
2441 kvm_report_emulation_failure(vcpu, "mmio");
2442 return EMULATE_FAIL;
2443 }
2444 return EMULATE_DO_MMIO;
2445 }
2446
2447 kvm_x86_ops->set_rflags(vcpu, vcpu->arch.emulate_ctxt.eflags);
2448
2449 if (vcpu->mmio_is_write) {
2450 vcpu->mmio_needed = 0;
2451 return EMULATE_DO_MMIO;
2452 }
2453
2454 return EMULATE_DONE;
2455 }
2456 EXPORT_SYMBOL_GPL(emulate_instruction);
2457
2458 static int pio_copy_data(struct kvm_vcpu *vcpu)
2459 {
2460 void *p = vcpu->arch.pio_data;
2461 gva_t q = vcpu->arch.pio.guest_gva;
2462 unsigned bytes;
2463 int ret;
2464
2465 bytes = vcpu->arch.pio.size * vcpu->arch.pio.cur_count;
2466 if (vcpu->arch.pio.in)
2467 ret = kvm_write_guest_virt(q, p, bytes, vcpu);
2468 else
2469 ret = kvm_read_guest_virt(q, p, bytes, vcpu);
2470 return ret;
2471 }
2472
2473 int complete_pio(struct kvm_vcpu *vcpu)
2474 {
2475 struct kvm_pio_request *io = &vcpu->arch.pio;
2476 long delta;
2477 int r;
2478 unsigned long val;
2479
2480 if (!io->string) {
2481 if (io->in) {
2482 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2483 memcpy(&val, vcpu->arch.pio_data, io->size);
2484 kvm_register_write(vcpu, VCPU_REGS_RAX, val);
2485 }
2486 } else {
2487 if (io->in) {
2488 r = pio_copy_data(vcpu);
2489 if (r)
2490 return r;
2491 }
2492
2493 delta = 1;
2494 if (io->rep) {
2495 delta *= io->cur_count;
2496 /*
2497 * The size of the register should really depend on
2498 * current address size.
2499 */
2500 val = kvm_register_read(vcpu, VCPU_REGS_RCX);
2501 val -= delta;
2502 kvm_register_write(vcpu, VCPU_REGS_RCX, val);
2503 }
2504 if (io->down)
2505 delta = -delta;
2506 delta *= io->size;
2507 if (io->in) {
2508 val = kvm_register_read(vcpu, VCPU_REGS_RDI);
2509 val += delta;
2510 kvm_register_write(vcpu, VCPU_REGS_RDI, val);
2511 } else {
2512 val = kvm_register_read(vcpu, VCPU_REGS_RSI);
2513 val += delta;
2514 kvm_register_write(vcpu, VCPU_REGS_RSI, val);
2515 }
2516 }
2517
2518 io->count -= io->cur_count;
2519 io->cur_count = 0;
2520
2521 return 0;
2522 }
2523
2524 static void kernel_pio(struct kvm_io_device *pio_dev,
2525 struct kvm_vcpu *vcpu,
2526 void *pd)
2527 {
2528 /* TODO: String I/O for in kernel device */
2529
2530 mutex_lock(&vcpu->kvm->lock);
2531 if (vcpu->arch.pio.in)
2532 kvm_iodevice_read(pio_dev, vcpu->arch.pio.port,
2533 vcpu->arch.pio.size,
2534 pd);
2535 else
2536 kvm_iodevice_write(pio_dev, vcpu->arch.pio.port,
2537 vcpu->arch.pio.size,
2538 pd);
2539 mutex_unlock(&vcpu->kvm->lock);
2540 }
2541
2542 static void pio_string_write(struct kvm_io_device *pio_dev,
2543 struct kvm_vcpu *vcpu)
2544 {
2545 struct kvm_pio_request *io = &vcpu->arch.pio;
2546 void *pd = vcpu->arch.pio_data;
2547 int i;
2548
2549 mutex_lock(&vcpu->kvm->lock);
2550 for (i = 0; i < io->cur_count; i++) {
2551 kvm_iodevice_write(pio_dev, io->port,
2552 io->size,
2553 pd);
2554 pd += io->size;
2555 }
2556 mutex_unlock(&vcpu->kvm->lock);
2557 }
2558
2559 static struct kvm_io_device *vcpu_find_pio_dev(struct kvm_vcpu *vcpu,
2560 gpa_t addr, int len,
2561 int is_write)
2562 {
2563 return kvm_io_bus_find_dev(&vcpu->kvm->pio_bus, addr, len, is_write);
2564 }
2565
2566 int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2567 int size, unsigned port)
2568 {
2569 struct kvm_io_device *pio_dev;
2570 unsigned long val;
2571
2572 vcpu->run->exit_reason = KVM_EXIT_IO;
2573 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2574 vcpu->run->io.size = vcpu->arch.pio.size = size;
2575 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2576 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = 1;
2577 vcpu->run->io.port = vcpu->arch.pio.port = port;
2578 vcpu->arch.pio.in = in;
2579 vcpu->arch.pio.string = 0;
2580 vcpu->arch.pio.down = 0;
2581 vcpu->arch.pio.rep = 0;
2582
2583 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2584 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2585 handler);
2586 else
2587 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2588 handler);
2589
2590 val = kvm_register_read(vcpu, VCPU_REGS_RAX);
2591 memcpy(vcpu->arch.pio_data, &val, 4);
2592
2593 pio_dev = vcpu_find_pio_dev(vcpu, port, size, !in);
2594 if (pio_dev) {
2595 kernel_pio(pio_dev, vcpu, vcpu->arch.pio_data);
2596 complete_pio(vcpu);
2597 return 1;
2598 }
2599 return 0;
2600 }
2601 EXPORT_SYMBOL_GPL(kvm_emulate_pio);
2602
2603 int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
2604 int size, unsigned long count, int down,
2605 gva_t address, int rep, unsigned port)
2606 {
2607 unsigned now, in_page;
2608 int ret = 0;
2609 struct kvm_io_device *pio_dev;
2610
2611 vcpu->run->exit_reason = KVM_EXIT_IO;
2612 vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
2613 vcpu->run->io.size = vcpu->arch.pio.size = size;
2614 vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
2615 vcpu->run->io.count = vcpu->arch.pio.count = vcpu->arch.pio.cur_count = count;
2616 vcpu->run->io.port = vcpu->arch.pio.port = port;
2617 vcpu->arch.pio.in = in;
2618 vcpu->arch.pio.string = 1;
2619 vcpu->arch.pio.down = down;
2620 vcpu->arch.pio.rep = rep;
2621
2622 if (vcpu->run->io.direction == KVM_EXIT_IO_IN)
2623 KVMTRACE_2D(IO_READ, vcpu, vcpu->run->io.port, (u32)size,
2624 handler);
2625 else
2626 KVMTRACE_2D(IO_WRITE, vcpu, vcpu->run->io.port, (u32)size,
2627 handler);
2628
2629 if (!count) {
2630 kvm_x86_ops->skip_emulated_instruction(vcpu);
2631 return 1;
2632 }
2633
2634 if (!down)
2635 in_page = PAGE_SIZE - offset_in_page(address);
2636 else
2637 in_page = offset_in_page(address) + size;
2638 now = min(count, (unsigned long)in_page / size);
2639 if (!now)
2640 now = 1;
2641 if (down) {
2642 /*
2643 * String I/O in reverse. Yuck. Kill the guest, fix later.
2644 */
2645 pr_unimpl(vcpu, "guest string pio down\n");
2646 kvm_inject_gp(vcpu, 0);
2647 return 1;
2648 }
2649 vcpu->run->io.count = now;
2650 vcpu->arch.pio.cur_count = now;
2651
2652 if (vcpu->arch.pio.cur_count == vcpu->arch.pio.count)
2653 kvm_x86_ops->skip_emulated_instruction(vcpu);
2654
2655 vcpu->arch.pio.guest_gva = address;
2656
2657 pio_dev = vcpu_find_pio_dev(vcpu, port,
2658 vcpu->arch.pio.cur_count,
2659 !vcpu->arch.pio.in);
2660 if (!vcpu->arch.pio.in) {
2661 /* string PIO write */
2662 ret = pio_copy_data(vcpu);
2663 if (ret == X86EMUL_PROPAGATE_FAULT) {
2664 kvm_inject_gp(vcpu, 0);
2665 return 1;
2666 }
2667 if (ret == 0 && pio_dev) {
2668 pio_string_write(pio_dev, vcpu);
2669 complete_pio(vcpu);
2670 if (vcpu->arch.pio.count == 0)
2671 ret = 1;
2672 }
2673 } else if (pio_dev)
2674 pr_unimpl(vcpu, "no string pio read support yet, "
2675 "port %x size %d count %ld\n",
2676 port, size, count);
2677
2678 return ret;
2679 }
2680 EXPORT_SYMBOL_GPL(kvm_emulate_pio_string);
2681
2682 static void bounce_off(void *info)
2683 {
2684 /* nothing */
2685 }
2686
2687 static unsigned int ref_freq;
2688 static unsigned long tsc_khz_ref;
2689
2690 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
2691 void *data)
2692 {
2693 struct cpufreq_freqs *freq = data;
2694 struct kvm *kvm;
2695 struct kvm_vcpu *vcpu;
2696 int i, send_ipi = 0;
2697
2698 if (!ref_freq)
2699 ref_freq = freq->old;
2700
2701 if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
2702 return 0;
2703 if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
2704 return 0;
2705 per_cpu(cpu_tsc_khz, freq->cpu) = cpufreq_scale(tsc_khz_ref, ref_freq, freq->new);
2706
2707 spin_lock(&kvm_lock);
2708 list_for_each_entry(kvm, &vm_list, vm_list) {
2709 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
2710 vcpu = kvm->vcpus[i];
2711 if (!vcpu)
2712 continue;
2713 if (vcpu->cpu != freq->cpu)
2714 continue;
2715 if (!kvm_request_guest_time_update(vcpu))
2716 continue;
2717 if (vcpu->cpu != smp_processor_id())
2718 send_ipi++;
2719 }
2720 }
2721 spin_unlock(&kvm_lock);
2722
2723 if (freq->old < freq->new && send_ipi) {
2724 /*
2725 * We upscale the frequency. Must make the guest
2726 * doesn't see old kvmclock values while running with
2727 * the new frequency, otherwise we risk the guest sees
2728 * time go backwards.
2729 *
2730 * In case we update the frequency for another cpu
2731 * (which might be in guest context) send an interrupt
2732 * to kick the cpu out of guest context. Next time
2733 * guest context is entered kvmclock will be updated,
2734 * so the guest will not see stale values.
2735 */
2736 smp_call_function_single(freq->cpu, bounce_off, NULL, 1);
2737 }
2738 return 0;
2739 }
2740
2741 static struct notifier_block kvmclock_cpufreq_notifier_block = {
2742 .notifier_call = kvmclock_cpufreq_notifier
2743 };
2744
2745 int kvm_arch_init(void *opaque)
2746 {
2747 int r, cpu;
2748 struct kvm_x86_ops *ops = (struct kvm_x86_ops *)opaque;
2749
2750 if (kvm_x86_ops) {
2751 printk(KERN_ERR "kvm: already loaded the other module\n");
2752 r = -EEXIST;
2753 goto out;
2754 }
2755
2756 if (!ops->cpu_has_kvm_support()) {
2757 printk(KERN_ERR "kvm: no hardware support\n");
2758 r = -EOPNOTSUPP;
2759 goto out;
2760 }
2761 if (ops->disabled_by_bios()) {
2762 printk(KERN_ERR "kvm: disabled by bios\n");
2763 r = -EOPNOTSUPP;
2764 goto out;
2765 }
2766
2767 r = kvm_mmu_module_init();
2768 if (r)
2769 goto out;
2770
2771 kvm_init_msr_list();
2772
2773 kvm_x86_ops = ops;
2774 kvm_mmu_set_nonpresent_ptes(0ull, 0ull);
2775 kvm_mmu_set_base_ptes(PT_PRESENT_MASK);
2776 kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
2777 PT_DIRTY_MASK, PT64_NX_MASK, 0, 0);
2778
2779 for_each_possible_cpu(cpu)
2780 per_cpu(cpu_tsc_khz, cpu) = tsc_khz;
2781 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
2782 tsc_khz_ref = tsc_khz;
2783 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
2784 CPUFREQ_TRANSITION_NOTIFIER);
2785 }
2786
2787 return 0;
2788
2789 out:
2790 return r;
2791 }
2792
2793 void kvm_arch_exit(void)
2794 {
2795 if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
2796 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
2797 CPUFREQ_TRANSITION_NOTIFIER);
2798 kvm_x86_ops = NULL;
2799 kvm_mmu_module_exit();
2800 }
2801
2802 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
2803 {
2804 ++vcpu->stat.halt_exits;
2805 KVMTRACE_0D(HLT, vcpu, handler);
2806 if (irqchip_in_kernel(vcpu->kvm)) {
2807 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
2808 return 1;
2809 } else {
2810 vcpu->run->exit_reason = KVM_EXIT_HLT;
2811 return 0;
2812 }
2813 }
2814 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
2815
2816 static inline gpa_t hc_gpa(struct kvm_vcpu *vcpu, unsigned long a0,
2817 unsigned long a1)
2818 {
2819 if (is_long_mode(vcpu))
2820 return a0;
2821 else
2822 return a0 | ((gpa_t)a1 << 32);
2823 }
2824
2825 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
2826 {
2827 unsigned long nr, a0, a1, a2, a3, ret;
2828 int r = 1;
2829
2830 nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
2831 a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
2832 a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
2833 a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
2834 a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
2835
2836 KVMTRACE_1D(VMMCALL, vcpu, (u32)nr, handler);
2837
2838 if (!is_long_mode(vcpu)) {
2839 nr &= 0xFFFFFFFF;
2840 a0 &= 0xFFFFFFFF;
2841 a1 &= 0xFFFFFFFF;
2842 a2 &= 0xFFFFFFFF;
2843 a3 &= 0xFFFFFFFF;
2844 }
2845
2846 switch (nr) {
2847 case KVM_HC_VAPIC_POLL_IRQ:
2848 ret = 0;
2849 break;
2850 case KVM_HC_MMU_OP:
2851 r = kvm_pv_mmu_op(vcpu, a0, hc_gpa(vcpu, a1, a2), &ret);
2852 break;
2853 default:
2854 ret = -KVM_ENOSYS;
2855 break;
2856 }
2857 kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
2858 ++vcpu->stat.hypercalls;
2859 return r;
2860 }
2861 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
2862
2863 int kvm_fix_hypercall(struct kvm_vcpu *vcpu)
2864 {
2865 char instruction[3];
2866 int ret = 0;
2867 unsigned long rip = kvm_rip_read(vcpu);
2868
2869
2870 /*
2871 * Blow out the MMU to ensure that no other VCPU has an active mapping
2872 * to ensure that the updated hypercall appears atomically across all
2873 * VCPUs.
2874 */
2875 kvm_mmu_zap_all(vcpu->kvm);
2876
2877 kvm_x86_ops->patch_hypercall(vcpu, instruction);
2878 if (emulator_write_emulated(rip, instruction, 3, vcpu)
2879 != X86EMUL_CONTINUE)
2880 ret = -EFAULT;
2881
2882 return ret;
2883 }
2884
2885 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
2886 {
2887 return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
2888 }
2889
2890 void realmode_lgdt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2891 {
2892 struct descriptor_table dt = { limit, base };
2893
2894 kvm_x86_ops->set_gdt(vcpu, &dt);
2895 }
2896
2897 void realmode_lidt(struct kvm_vcpu *vcpu, u16 limit, unsigned long base)
2898 {
2899 struct descriptor_table dt = { limit, base };
2900
2901 kvm_x86_ops->set_idt(vcpu, &dt);
2902 }
2903
2904 void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
2905 unsigned long *rflags)
2906 {
2907 kvm_lmsw(vcpu, msw);
2908 *rflags = kvm_x86_ops->get_rflags(vcpu);
2909 }
2910
2911 unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr)
2912 {
2913 unsigned long value;
2914
2915 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
2916 switch (cr) {
2917 case 0:
2918 value = vcpu->arch.cr0;
2919 break;
2920 case 2:
2921 value = vcpu->arch.cr2;
2922 break;
2923 case 3:
2924 value = vcpu->arch.cr3;
2925 break;
2926 case 4:
2927 value = vcpu->arch.cr4;
2928 break;
2929 case 8:
2930 value = kvm_get_cr8(vcpu);
2931 break;
2932 default:
2933 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2934 return 0;
2935 }
2936 KVMTRACE_3D(CR_READ, vcpu, (u32)cr, (u32)value,
2937 (u32)((u64)value >> 32), handler);
2938
2939 return value;
2940 }
2941
2942 void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long val,
2943 unsigned long *rflags)
2944 {
2945 KVMTRACE_3D(CR_WRITE, vcpu, (u32)cr, (u32)val,
2946 (u32)((u64)val >> 32), handler);
2947
2948 switch (cr) {
2949 case 0:
2950 kvm_set_cr0(vcpu, mk_cr_64(vcpu->arch.cr0, val));
2951 *rflags = kvm_x86_ops->get_rflags(vcpu);
2952 break;
2953 case 2:
2954 vcpu->arch.cr2 = val;
2955 break;
2956 case 3:
2957 kvm_set_cr3(vcpu, val);
2958 break;
2959 case 4:
2960 kvm_set_cr4(vcpu, mk_cr_64(vcpu->arch.cr4, val));
2961 break;
2962 case 8:
2963 kvm_set_cr8(vcpu, val & 0xfUL);
2964 break;
2965 default:
2966 vcpu_printf(vcpu, "%s: unexpected cr %u\n", __func__, cr);
2967 }
2968 }
2969
2970 static int move_to_next_stateful_cpuid_entry(struct kvm_vcpu *vcpu, int i)
2971 {
2972 struct kvm_cpuid_entry2 *e = &vcpu->arch.cpuid_entries[i];
2973 int j, nent = vcpu->arch.cpuid_nent;
2974
2975 e->flags &= ~KVM_CPUID_FLAG_STATE_READ_NEXT;
2976 /* when no next entry is found, the current entry[i] is reselected */
2977 for (j = i + 1; ; j = (j + 1) % nent) {
2978 struct kvm_cpuid_entry2 *ej = &vcpu->arch.cpuid_entries[j];
2979 if (ej->function == e->function) {
2980 ej->flags |= KVM_CPUID_FLAG_STATE_READ_NEXT;
2981 return j;
2982 }
2983 }
2984 return 0; /* silence gcc, even though control never reaches here */
2985 }
2986
2987 /* find an entry with matching function, matching index (if needed), and that
2988 * should be read next (if it's stateful) */
2989 static int is_matching_cpuid_entry(struct kvm_cpuid_entry2 *e,
2990 u32 function, u32 index)
2991 {
2992 if (e->function != function)
2993 return 0;
2994 if ((e->flags & KVM_CPUID_FLAG_SIGNIFCANT_INDEX) && e->index != index)
2995 return 0;
2996 if ((e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC) &&
2997 !(e->flags & KVM_CPUID_FLAG_STATE_READ_NEXT))
2998 return 0;
2999 return 1;
3000 }
3001
3002 struct kvm_cpuid_entry2 *kvm_find_cpuid_entry(struct kvm_vcpu *vcpu,
3003 u32 function, u32 index)
3004 {
3005 int i;
3006 struct kvm_cpuid_entry2 *best = NULL;
3007
3008 for (i = 0; i < vcpu->arch.cpuid_nent; ++i) {
3009 struct kvm_cpuid_entry2 *e;
3010
3011 e = &vcpu->arch.cpuid_entries[i];
3012 if (is_matching_cpuid_entry(e, function, index)) {
3013 if (e->flags & KVM_CPUID_FLAG_STATEFUL_FUNC)
3014 move_to_next_stateful_cpuid_entry(vcpu, i);
3015 best = e;
3016 break;
3017 }
3018 /*
3019 * Both basic or both extended?
3020 */
3021 if (((e->function ^ function) & 0x80000000) == 0)
3022 if (!best || e->function > best->function)
3023 best = e;
3024 }
3025 return best;
3026 }
3027
3028 void kvm_emulate_cpuid(struct kvm_vcpu *vcpu)
3029 {
3030 u32 function, index;
3031 struct kvm_cpuid_entry2 *best;
3032
3033 function = kvm_register_read(vcpu, VCPU_REGS_RAX);
3034 index = kvm_register_read(vcpu, VCPU_REGS_RCX);
3035 kvm_register_write(vcpu, VCPU_REGS_RAX, 0);
3036 kvm_register_write(vcpu, VCPU_REGS_RBX, 0);
3037 kvm_register_write(vcpu, VCPU_REGS_RCX, 0);
3038 kvm_register_write(vcpu, VCPU_REGS_RDX, 0);
3039 best = kvm_find_cpuid_entry(vcpu, function, index);
3040 if (best) {
3041 kvm_register_write(vcpu, VCPU_REGS_RAX, best->eax);
3042 kvm_register_write(vcpu, VCPU_REGS_RBX, best->ebx);
3043 kvm_register_write(vcpu, VCPU_REGS_RCX, best->ecx);
3044 kvm_register_write(vcpu, VCPU_REGS_RDX, best->edx);
3045 }
3046 kvm_x86_ops->skip_emulated_instruction(vcpu);
3047 KVMTRACE_5D(CPUID, vcpu, function,
3048 (u32)kvm_register_read(vcpu, VCPU_REGS_RAX),
3049 (u32)kvm_register_read(vcpu, VCPU_REGS_RBX),
3050 (u32)kvm_register_read(vcpu, VCPU_REGS_RCX),
3051 (u32)kvm_register_read(vcpu, VCPU_REGS_RDX), handler);
3052 }
3053 EXPORT_SYMBOL_GPL(kvm_emulate_cpuid);
3054
3055 /*
3056 * Check if userspace requested an interrupt window, and that the
3057 * interrupt window is open.
3058 *
3059 * No need to exit to userspace if we already have an interrupt queued.
3060 */
3061 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu,
3062 struct kvm_run *kvm_run)
3063 {
3064 return (!vcpu->arch.irq_summary &&
3065 kvm_run->request_interrupt_window &&
3066 vcpu->arch.interrupt_window_open &&
3067 (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF));
3068 }
3069
3070 static void post_kvm_run_save(struct kvm_vcpu *vcpu,
3071 struct kvm_run *kvm_run)
3072 {
3073 kvm_run->if_flag = (kvm_x86_ops->get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
3074 kvm_run->cr8 = kvm_get_cr8(vcpu);
3075 kvm_run->apic_base = kvm_get_apic_base(vcpu);
3076 if (irqchip_in_kernel(vcpu->kvm))
3077 kvm_run->ready_for_interrupt_injection = 1;
3078 else
3079 kvm_run->ready_for_interrupt_injection =
3080 (vcpu->arch.interrupt_window_open &&
3081 vcpu->arch.irq_summary == 0);
3082 }
3083
3084 static void vapic_enter(struct kvm_vcpu *vcpu)
3085 {
3086 struct kvm_lapic *apic = vcpu->arch.apic;
3087 struct page *page;
3088
3089 if (!apic || !apic->vapic_addr)
3090 return;
3091
3092 page = gfn_to_page(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3093
3094 vcpu->arch.apic->vapic_page = page;
3095 }
3096
3097 static void vapic_exit(struct kvm_vcpu *vcpu)
3098 {
3099 struct kvm_lapic *apic = vcpu->arch.apic;
3100
3101 if (!apic || !apic->vapic_addr)
3102 return;
3103
3104 down_read(&vcpu->kvm->slots_lock);
3105 kvm_release_page_dirty(apic->vapic_page);
3106 mark_page_dirty(vcpu->kvm, apic->vapic_addr >> PAGE_SHIFT);
3107 up_read(&vcpu->kvm->slots_lock);
3108 }
3109
3110 static int vcpu_enter_guest(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3111 {
3112 int r;
3113
3114 if (vcpu->requests)
3115 if (test_and_clear_bit(KVM_REQ_MMU_RELOAD, &vcpu->requests))
3116 kvm_mmu_unload(vcpu);
3117
3118 r = kvm_mmu_reload(vcpu);
3119 if (unlikely(r))
3120 goto out;
3121
3122 if (vcpu->requests) {
3123 if (test_and_clear_bit(KVM_REQ_MIGRATE_TIMER, &vcpu->requests))
3124 __kvm_migrate_timers(vcpu);
3125 if (test_and_clear_bit(KVM_REQ_KVMCLOCK_UPDATE, &vcpu->requests))
3126 kvm_write_guest_time(vcpu);
3127 if (test_and_clear_bit(KVM_REQ_MMU_SYNC, &vcpu->requests))
3128 kvm_mmu_sync_roots(vcpu);
3129 if (test_and_clear_bit(KVM_REQ_TLB_FLUSH, &vcpu->requests))
3130 kvm_x86_ops->tlb_flush(vcpu);
3131 if (test_and_clear_bit(KVM_REQ_REPORT_TPR_ACCESS,
3132 &vcpu->requests)) {
3133 kvm_run->exit_reason = KVM_EXIT_TPR_ACCESS;
3134 r = 0;
3135 goto out;
3136 }
3137 if (test_and_clear_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests)) {
3138 kvm_run->exit_reason = KVM_EXIT_SHUTDOWN;
3139 r = 0;
3140 goto out;
3141 }
3142 }
3143
3144 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
3145 kvm_inject_pending_timer_irqs(vcpu);
3146
3147 preempt_disable();
3148
3149 kvm_x86_ops->prepare_guest_switch(vcpu);
3150 kvm_load_guest_fpu(vcpu);
3151
3152 local_irq_disable();
3153
3154 if (vcpu->requests || need_resched() || signal_pending(current)) {
3155 local_irq_enable();
3156 preempt_enable();
3157 r = 1;
3158 goto out;
3159 }
3160
3161 vcpu->guest_mode = 1;
3162 /*
3163 * Make sure that guest_mode assignment won't happen after
3164 * testing the pending IRQ vector bitmap.
3165 */
3166 smp_wmb();
3167
3168 if (vcpu->arch.exception.pending)
3169 __queue_exception(vcpu);
3170 else if (irqchip_in_kernel(vcpu->kvm))
3171 kvm_x86_ops->inject_pending_irq(vcpu);
3172 else
3173 kvm_x86_ops->inject_pending_vectors(vcpu, kvm_run);
3174
3175 kvm_lapic_sync_to_vapic(vcpu);
3176
3177 up_read(&vcpu->kvm->slots_lock);
3178
3179 kvm_guest_enter();
3180
3181 get_debugreg(vcpu->arch.host_dr6, 6);
3182 get_debugreg(vcpu->arch.host_dr7, 7);
3183 if (unlikely(vcpu->arch.switch_db_regs)) {
3184 get_debugreg(vcpu->arch.host_db[0], 0);
3185 get_debugreg(vcpu->arch.host_db[1], 1);
3186 get_debugreg(vcpu->arch.host_db[2], 2);
3187 get_debugreg(vcpu->arch.host_db[3], 3);
3188
3189 set_debugreg(0, 7);
3190 set_debugreg(vcpu->arch.eff_db[0], 0);
3191 set_debugreg(vcpu->arch.eff_db[1], 1);
3192 set_debugreg(vcpu->arch.eff_db[2], 2);
3193 set_debugreg(vcpu->arch.eff_db[3], 3);
3194 }
3195
3196 KVMTRACE_0D(VMENTRY, vcpu, entryexit);
3197 kvm_x86_ops->run(vcpu, kvm_run);
3198
3199 if (unlikely(vcpu->arch.switch_db_regs)) {
3200 set_debugreg(0, 7);
3201 set_debugreg(vcpu->arch.host_db[0], 0);
3202 set_debugreg(vcpu->arch.host_db[1], 1);
3203 set_debugreg(vcpu->arch.host_db[2], 2);
3204 set_debugreg(vcpu->arch.host_db[3], 3);
3205 }
3206 set_debugreg(vcpu->arch.host_dr6, 6);
3207 set_debugreg(vcpu->arch.host_dr7, 7);
3208
3209 vcpu->guest_mode = 0;
3210 local_irq_enable();
3211
3212 ++vcpu->stat.exits;
3213
3214 /*
3215 * We must have an instruction between local_irq_enable() and
3216 * kvm_guest_exit(), so the timer interrupt isn't delayed by
3217 * the interrupt shadow. The stat.exits increment will do nicely.
3218 * But we need to prevent reordering, hence this barrier():
3219 */
3220 barrier();
3221
3222 kvm_guest_exit();
3223
3224 preempt_enable();
3225
3226 down_read(&vcpu->kvm->slots_lock);
3227
3228 /*
3229 * Profile KVM exit RIPs:
3230 */
3231 if (unlikely(prof_on == KVM_PROFILING)) {
3232 unsigned long rip = kvm_rip_read(vcpu);
3233 profile_hit(KVM_PROFILING, (void *)rip);
3234 }
3235
3236 if (vcpu->arch.exception.pending && kvm_x86_ops->exception_injected(vcpu))
3237 vcpu->arch.exception.pending = false;
3238
3239 kvm_lapic_sync_from_vapic(vcpu);
3240
3241 r = kvm_x86_ops->handle_exit(kvm_run, vcpu);
3242 out:
3243 return r;
3244 }
3245
3246 static int __vcpu_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3247 {
3248 int r;
3249
3250 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED)) {
3251 pr_debug("vcpu %d received sipi with vector # %x\n",
3252 vcpu->vcpu_id, vcpu->arch.sipi_vector);
3253 kvm_lapic_reset(vcpu);
3254 r = kvm_arch_vcpu_reset(vcpu);
3255 if (r)
3256 return r;
3257 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
3258 }
3259
3260 down_read(&vcpu->kvm->slots_lock);
3261 vapic_enter(vcpu);
3262
3263 r = 1;
3264 while (r > 0) {
3265 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE)
3266 r = vcpu_enter_guest(vcpu, kvm_run);
3267 else {
3268 up_read(&vcpu->kvm->slots_lock);
3269 kvm_vcpu_block(vcpu);
3270 down_read(&vcpu->kvm->slots_lock);
3271 if (test_and_clear_bit(KVM_REQ_UNHALT, &vcpu->requests))
3272 if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED)
3273 vcpu->arch.mp_state =
3274 KVM_MP_STATE_RUNNABLE;
3275 if (vcpu->arch.mp_state != KVM_MP_STATE_RUNNABLE)
3276 r = -EINTR;
3277 }
3278
3279 if (r > 0) {
3280 if (dm_request_for_irq_injection(vcpu, kvm_run)) {
3281 r = -EINTR;
3282 kvm_run->exit_reason = KVM_EXIT_INTR;
3283 ++vcpu->stat.request_irq_exits;
3284 }
3285 if (signal_pending(current)) {
3286 r = -EINTR;
3287 kvm_run->exit_reason = KVM_EXIT_INTR;
3288 ++vcpu->stat.signal_exits;
3289 }
3290 if (need_resched()) {
3291 up_read(&vcpu->kvm->slots_lock);
3292 kvm_resched(vcpu);
3293 down_read(&vcpu->kvm->slots_lock);
3294 }
3295 }
3296 }
3297
3298 up_read(&vcpu->kvm->slots_lock);
3299 post_kvm_run_save(vcpu, kvm_run);
3300
3301 vapic_exit(vcpu);
3302
3303 return r;
3304 }
3305
3306 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
3307 {
3308 int r;
3309 sigset_t sigsaved;
3310
3311 vcpu_load(vcpu);
3312
3313 if (vcpu->sigset_active)
3314 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
3315
3316 if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
3317 kvm_vcpu_block(vcpu);
3318 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
3319 r = -EAGAIN;
3320 goto out;
3321 }
3322
3323 /* re-sync apic's tpr */
3324 if (!irqchip_in_kernel(vcpu->kvm))
3325 kvm_set_cr8(vcpu, kvm_run->cr8);
3326
3327 if (vcpu->arch.pio.cur_count) {
3328 r = complete_pio(vcpu);
3329 if (r)
3330 goto out;
3331 }
3332 #if CONFIG_HAS_IOMEM
3333 if (vcpu->mmio_needed) {
3334 memcpy(vcpu->mmio_data, kvm_run->mmio.data, 8);
3335 vcpu->mmio_read_completed = 1;
3336 vcpu->mmio_needed = 0;
3337
3338 down_read(&vcpu->kvm->slots_lock);
3339 r = emulate_instruction(vcpu, kvm_run,
3340 vcpu->arch.mmio_fault_cr2, 0,
3341 EMULTYPE_NO_DECODE);
3342 up_read(&vcpu->kvm->slots_lock);
3343 if (r == EMULATE_DO_MMIO) {
3344 /*
3345 * Read-modify-write. Back to userspace.
3346 */
3347 r = 0;
3348 goto out;
3349 }
3350 }
3351 #endif
3352 if (kvm_run->exit_reason == KVM_EXIT_HYPERCALL)
3353 kvm_register_write(vcpu, VCPU_REGS_RAX,
3354 kvm_run->hypercall.ret);
3355
3356 r = __vcpu_run(vcpu, kvm_run);
3357
3358 out:
3359 if (vcpu->sigset_active)
3360 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
3361
3362 vcpu_put(vcpu);
3363 return r;
3364 }
3365
3366 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3367 {
3368 vcpu_load(vcpu);
3369
3370 regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3371 regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3372 regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3373 regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3374 regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3375 regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3376 regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3377 regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3378 #ifdef CONFIG_X86_64
3379 regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
3380 regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
3381 regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
3382 regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
3383 regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
3384 regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
3385 regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
3386 regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
3387 #endif
3388
3389 regs->rip = kvm_rip_read(vcpu);
3390 regs->rflags = kvm_x86_ops->get_rflags(vcpu);
3391
3392 /*
3393 * Don't leak debug flags in case they were set for guest debugging
3394 */
3395 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
3396 regs->rflags &= ~(X86_EFLAGS_TF | X86_EFLAGS_RF);
3397
3398 vcpu_put(vcpu);
3399
3400 return 0;
3401 }
3402
3403 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
3404 {
3405 vcpu_load(vcpu);
3406
3407 kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
3408 kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
3409 kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
3410 kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
3411 kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
3412 kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
3413 kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
3414 kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
3415 #ifdef CONFIG_X86_64
3416 kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
3417 kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
3418 kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
3419 kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
3420 kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
3421 kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
3422 kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
3423 kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
3424
3425 #endif
3426
3427 kvm_rip_write(vcpu, regs->rip);
3428 kvm_x86_ops->set_rflags(vcpu, regs->rflags);
3429
3430
3431 vcpu->arch.exception.pending = false;
3432
3433 vcpu_put(vcpu);
3434
3435 return 0;
3436 }
3437
3438 void kvm_get_segment(struct kvm_vcpu *vcpu,
3439 struct kvm_segment *var, int seg)
3440 {
3441 kvm_x86_ops->get_segment(vcpu, var, seg);
3442 }
3443
3444 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
3445 {
3446 struct kvm_segment cs;
3447
3448 kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
3449 *db = cs.db;
3450 *l = cs.l;
3451 }
3452 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
3453
3454 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
3455 struct kvm_sregs *sregs)
3456 {
3457 struct descriptor_table dt;
3458 int pending_vec;
3459
3460 vcpu_load(vcpu);
3461
3462 kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
3463 kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
3464 kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
3465 kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
3466 kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
3467 kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
3468
3469 kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
3470 kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
3471
3472 kvm_x86_ops->get_idt(vcpu, &dt);
3473 sregs->idt.limit = dt.limit;
3474 sregs->idt.base = dt.base;
3475 kvm_x86_ops->get_gdt(vcpu, &dt);
3476 sregs->gdt.limit = dt.limit;
3477 sregs->gdt.base = dt.base;
3478
3479 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3480 sregs->cr0 = vcpu->arch.cr0;
3481 sregs->cr2 = vcpu->arch.cr2;
3482 sregs->cr3 = vcpu->arch.cr3;
3483 sregs->cr4 = vcpu->arch.cr4;
3484 sregs->cr8 = kvm_get_cr8(vcpu);
3485 sregs->efer = vcpu->arch.shadow_efer;
3486 sregs->apic_base = kvm_get_apic_base(vcpu);
3487
3488 if (irqchip_in_kernel(vcpu->kvm)) {
3489 memset(sregs->interrupt_bitmap, 0,
3490 sizeof sregs->interrupt_bitmap);
3491 pending_vec = kvm_x86_ops->get_irq(vcpu);
3492 if (pending_vec >= 0)
3493 set_bit(pending_vec,
3494 (unsigned long *)sregs->interrupt_bitmap);
3495 } else
3496 memcpy(sregs->interrupt_bitmap, vcpu->arch.irq_pending,
3497 sizeof sregs->interrupt_bitmap);
3498
3499 vcpu_put(vcpu);
3500
3501 return 0;
3502 }
3503
3504 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
3505 struct kvm_mp_state *mp_state)
3506 {
3507 vcpu_load(vcpu);
3508 mp_state->mp_state = vcpu->arch.mp_state;
3509 vcpu_put(vcpu);
3510 return 0;
3511 }
3512
3513 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
3514 struct kvm_mp_state *mp_state)
3515 {
3516 vcpu_load(vcpu);
3517 vcpu->arch.mp_state = mp_state->mp_state;
3518 vcpu_put(vcpu);
3519 return 0;
3520 }
3521
3522 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3523 struct kvm_segment *var, int seg)
3524 {
3525 kvm_x86_ops->set_segment(vcpu, var, seg);
3526 }
3527
3528 static void seg_desct_to_kvm_desct(struct desc_struct *seg_desc, u16 selector,
3529 struct kvm_segment *kvm_desct)
3530 {
3531 kvm_desct->base = seg_desc->base0;
3532 kvm_desct->base |= seg_desc->base1 << 16;
3533 kvm_desct->base |= seg_desc->base2 << 24;
3534 kvm_desct->limit = seg_desc->limit0;
3535 kvm_desct->limit |= seg_desc->limit << 16;
3536 if (seg_desc->g) {
3537 kvm_desct->limit <<= 12;
3538 kvm_desct->limit |= 0xfff;
3539 }
3540 kvm_desct->selector = selector;
3541 kvm_desct->type = seg_desc->type;
3542 kvm_desct->present = seg_desc->p;
3543 kvm_desct->dpl = seg_desc->dpl;
3544 kvm_desct->db = seg_desc->d;
3545 kvm_desct->s = seg_desc->s;
3546 kvm_desct->l = seg_desc->l;
3547 kvm_desct->g = seg_desc->g;
3548 kvm_desct->avl = seg_desc->avl;
3549 if (!selector)
3550 kvm_desct->unusable = 1;
3551 else
3552 kvm_desct->unusable = 0;
3553 kvm_desct->padding = 0;
3554 }
3555
3556 static void get_segment_descriptor_dtable(struct kvm_vcpu *vcpu,
3557 u16 selector,
3558 struct descriptor_table *dtable)
3559 {
3560 if (selector & 1 << 2) {
3561 struct kvm_segment kvm_seg;
3562
3563 kvm_get_segment(vcpu, &kvm_seg, VCPU_SREG_LDTR);
3564
3565 if (kvm_seg.unusable)
3566 dtable->limit = 0;
3567 else
3568 dtable->limit = kvm_seg.limit;
3569 dtable->base = kvm_seg.base;
3570 }
3571 else
3572 kvm_x86_ops->get_gdt(vcpu, dtable);
3573 }
3574
3575 /* allowed just for 8 bytes segments */
3576 static int load_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3577 struct desc_struct *seg_desc)
3578 {
3579 gpa_t gpa;
3580 struct descriptor_table dtable;
3581 u16 index = selector >> 3;
3582
3583 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3584
3585 if (dtable.limit < index * 8 + 7) {
3586 kvm_queue_exception_e(vcpu, GP_VECTOR, selector & 0xfffc);
3587 return 1;
3588 }
3589 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3590 gpa += index * 8;
3591 return kvm_read_guest(vcpu->kvm, gpa, seg_desc, 8);
3592 }
3593
3594 /* allowed just for 8 bytes segments */
3595 static int save_guest_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3596 struct desc_struct *seg_desc)
3597 {
3598 gpa_t gpa;
3599 struct descriptor_table dtable;
3600 u16 index = selector >> 3;
3601
3602 get_segment_descriptor_dtable(vcpu, selector, &dtable);
3603
3604 if (dtable.limit < index * 8 + 7)
3605 return 1;
3606 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, dtable.base);
3607 gpa += index * 8;
3608 return kvm_write_guest(vcpu->kvm, gpa, seg_desc, 8);
3609 }
3610
3611 static u32 get_tss_base_addr(struct kvm_vcpu *vcpu,
3612 struct desc_struct *seg_desc)
3613 {
3614 u32 base_addr;
3615
3616 base_addr = seg_desc->base0;
3617 base_addr |= (seg_desc->base1 << 16);
3618 base_addr |= (seg_desc->base2 << 24);
3619
3620 return vcpu->arch.mmu.gva_to_gpa(vcpu, base_addr);
3621 }
3622
3623 static u16 get_segment_selector(struct kvm_vcpu *vcpu, int seg)
3624 {
3625 struct kvm_segment kvm_seg;
3626
3627 kvm_get_segment(vcpu, &kvm_seg, seg);
3628 return kvm_seg.selector;
3629 }
3630
3631 static int load_segment_descriptor_to_kvm_desct(struct kvm_vcpu *vcpu,
3632 u16 selector,
3633 struct kvm_segment *kvm_seg)
3634 {
3635 struct desc_struct seg_desc;
3636
3637 if (load_guest_segment_descriptor(vcpu, selector, &seg_desc))
3638 return 1;
3639 seg_desct_to_kvm_desct(&seg_desc, selector, kvm_seg);
3640 return 0;
3641 }
3642
3643 static int kvm_load_realmode_segment(struct kvm_vcpu *vcpu, u16 selector, int seg)
3644 {
3645 struct kvm_segment segvar = {
3646 .base = selector << 4,
3647 .limit = 0xffff,
3648 .selector = selector,
3649 .type = 3,
3650 .present = 1,
3651 .dpl = 3,
3652 .db = 0,
3653 .s = 1,
3654 .l = 0,
3655 .g = 0,
3656 .avl = 0,
3657 .unusable = 0,
3658 };
3659 kvm_x86_ops->set_segment(vcpu, &segvar, seg);
3660 return 0;
3661 }
3662
3663 int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
3664 int type_bits, int seg)
3665 {
3666 struct kvm_segment kvm_seg;
3667
3668 if (!(vcpu->arch.cr0 & X86_CR0_PE))
3669 return kvm_load_realmode_segment(vcpu, selector, seg);
3670 if (load_segment_descriptor_to_kvm_desct(vcpu, selector, &kvm_seg))
3671 return 1;
3672 kvm_seg.type |= type_bits;
3673
3674 if (seg != VCPU_SREG_SS && seg != VCPU_SREG_CS &&
3675 seg != VCPU_SREG_LDTR)
3676 if (!kvm_seg.s)
3677 kvm_seg.unusable = 1;
3678
3679 kvm_set_segment(vcpu, &kvm_seg, seg);
3680 return 0;
3681 }
3682
3683 static void save_state_to_tss32(struct kvm_vcpu *vcpu,
3684 struct tss_segment_32 *tss)
3685 {
3686 tss->cr3 = vcpu->arch.cr3;
3687 tss->eip = kvm_rip_read(vcpu);
3688 tss->eflags = kvm_x86_ops->get_rflags(vcpu);
3689 tss->eax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3690 tss->ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3691 tss->edx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3692 tss->ebx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3693 tss->esp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3694 tss->ebp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3695 tss->esi = kvm_register_read(vcpu, VCPU_REGS_RSI);
3696 tss->edi = kvm_register_read(vcpu, VCPU_REGS_RDI);
3697 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3698 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3699 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3700 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3701 tss->fs = get_segment_selector(vcpu, VCPU_SREG_FS);
3702 tss->gs = get_segment_selector(vcpu, VCPU_SREG_GS);
3703 tss->ldt_selector = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3704 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3705 }
3706
3707 static int load_state_from_tss32(struct kvm_vcpu *vcpu,
3708 struct tss_segment_32 *tss)
3709 {
3710 kvm_set_cr3(vcpu, tss->cr3);
3711
3712 kvm_rip_write(vcpu, tss->eip);
3713 kvm_x86_ops->set_rflags(vcpu, tss->eflags | 2);
3714
3715 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->eax);
3716 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->ecx);
3717 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->edx);
3718 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->ebx);
3719 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->esp);
3720 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->ebp);
3721 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->esi);
3722 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->edi);
3723
3724 if (kvm_load_segment_descriptor(vcpu, tss->ldt_selector, 0, VCPU_SREG_LDTR))
3725 return 1;
3726
3727 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3728 return 1;
3729
3730 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3731 return 1;
3732
3733 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3734 return 1;
3735
3736 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3737 return 1;
3738
3739 if (kvm_load_segment_descriptor(vcpu, tss->fs, 1, VCPU_SREG_FS))
3740 return 1;
3741
3742 if (kvm_load_segment_descriptor(vcpu, tss->gs, 1, VCPU_SREG_GS))
3743 return 1;
3744 return 0;
3745 }
3746
3747 static void save_state_to_tss16(struct kvm_vcpu *vcpu,
3748 struct tss_segment_16 *tss)
3749 {
3750 tss->ip = kvm_rip_read(vcpu);
3751 tss->flag = kvm_x86_ops->get_rflags(vcpu);
3752 tss->ax = kvm_register_read(vcpu, VCPU_REGS_RAX);
3753 tss->cx = kvm_register_read(vcpu, VCPU_REGS_RCX);
3754 tss->dx = kvm_register_read(vcpu, VCPU_REGS_RDX);
3755 tss->bx = kvm_register_read(vcpu, VCPU_REGS_RBX);
3756 tss->sp = kvm_register_read(vcpu, VCPU_REGS_RSP);
3757 tss->bp = kvm_register_read(vcpu, VCPU_REGS_RBP);
3758 tss->si = kvm_register_read(vcpu, VCPU_REGS_RSI);
3759 tss->di = kvm_register_read(vcpu, VCPU_REGS_RDI);
3760
3761 tss->es = get_segment_selector(vcpu, VCPU_SREG_ES);
3762 tss->cs = get_segment_selector(vcpu, VCPU_SREG_CS);
3763 tss->ss = get_segment_selector(vcpu, VCPU_SREG_SS);
3764 tss->ds = get_segment_selector(vcpu, VCPU_SREG_DS);
3765 tss->ldt = get_segment_selector(vcpu, VCPU_SREG_LDTR);
3766 tss->prev_task_link = get_segment_selector(vcpu, VCPU_SREG_TR);
3767 }
3768
3769 static int load_state_from_tss16(struct kvm_vcpu *vcpu,
3770 struct tss_segment_16 *tss)
3771 {
3772 kvm_rip_write(vcpu, tss->ip);
3773 kvm_x86_ops->set_rflags(vcpu, tss->flag | 2);
3774 kvm_register_write(vcpu, VCPU_REGS_RAX, tss->ax);
3775 kvm_register_write(vcpu, VCPU_REGS_RCX, tss->cx);
3776 kvm_register_write(vcpu, VCPU_REGS_RDX, tss->dx);
3777 kvm_register_write(vcpu, VCPU_REGS_RBX, tss->bx);
3778 kvm_register_write(vcpu, VCPU_REGS_RSP, tss->sp);
3779 kvm_register_write(vcpu, VCPU_REGS_RBP, tss->bp);
3780 kvm_register_write(vcpu, VCPU_REGS_RSI, tss->si);
3781 kvm_register_write(vcpu, VCPU_REGS_RDI, tss->di);
3782
3783 if (kvm_load_segment_descriptor(vcpu, tss->ldt, 0, VCPU_SREG_LDTR))
3784 return 1;
3785
3786 if (kvm_load_segment_descriptor(vcpu, tss->es, 1, VCPU_SREG_ES))
3787 return 1;
3788
3789 if (kvm_load_segment_descriptor(vcpu, tss->cs, 9, VCPU_SREG_CS))
3790 return 1;
3791
3792 if (kvm_load_segment_descriptor(vcpu, tss->ss, 1, VCPU_SREG_SS))
3793 return 1;
3794
3795 if (kvm_load_segment_descriptor(vcpu, tss->ds, 1, VCPU_SREG_DS))
3796 return 1;
3797 return 0;
3798 }
3799
3800 static int kvm_task_switch_16(struct kvm_vcpu *vcpu, u16 tss_selector,
3801 u32 old_tss_base,
3802 struct desc_struct *nseg_desc)
3803 {
3804 struct tss_segment_16 tss_segment_16;
3805 int ret = 0;
3806
3807 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3808 sizeof tss_segment_16))
3809 goto out;
3810
3811 save_state_to_tss16(vcpu, &tss_segment_16);
3812
3813 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_16,
3814 sizeof tss_segment_16))
3815 goto out;
3816
3817 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3818 &tss_segment_16, sizeof tss_segment_16))
3819 goto out;
3820
3821 if (load_state_from_tss16(vcpu, &tss_segment_16))
3822 goto out;
3823
3824 ret = 1;
3825 out:
3826 return ret;
3827 }
3828
3829 static int kvm_task_switch_32(struct kvm_vcpu *vcpu, u16 tss_selector,
3830 u32 old_tss_base,
3831 struct desc_struct *nseg_desc)
3832 {
3833 struct tss_segment_32 tss_segment_32;
3834 int ret = 0;
3835
3836 if (kvm_read_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3837 sizeof tss_segment_32))
3838 goto out;
3839
3840 save_state_to_tss32(vcpu, &tss_segment_32);
3841
3842 if (kvm_write_guest(vcpu->kvm, old_tss_base, &tss_segment_32,
3843 sizeof tss_segment_32))
3844 goto out;
3845
3846 if (kvm_read_guest(vcpu->kvm, get_tss_base_addr(vcpu, nseg_desc),
3847 &tss_segment_32, sizeof tss_segment_32))
3848 goto out;
3849
3850 if (load_state_from_tss32(vcpu, &tss_segment_32))
3851 goto out;
3852
3853 ret = 1;
3854 out:
3855 return ret;
3856 }
3857
3858 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason)
3859 {
3860 struct kvm_segment tr_seg;
3861 struct desc_struct cseg_desc;
3862 struct desc_struct nseg_desc;
3863 int ret = 0;
3864 u32 old_tss_base = get_segment_base(vcpu, VCPU_SREG_TR);
3865 u16 old_tss_sel = get_segment_selector(vcpu, VCPU_SREG_TR);
3866
3867 old_tss_base = vcpu->arch.mmu.gva_to_gpa(vcpu, old_tss_base);
3868
3869 /* FIXME: Handle errors. Failure to read either TSS or their
3870 * descriptors should generate a pagefault.
3871 */
3872 if (load_guest_segment_descriptor(vcpu, tss_selector, &nseg_desc))
3873 goto out;
3874
3875 if (load_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc))
3876 goto out;
3877
3878 if (reason != TASK_SWITCH_IRET) {
3879 int cpl;
3880
3881 cpl = kvm_x86_ops->get_cpl(vcpu);
3882 if ((tss_selector & 3) > nseg_desc.dpl || cpl > nseg_desc.dpl) {
3883 kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
3884 return 1;
3885 }
3886 }
3887
3888 if (!nseg_desc.p || (nseg_desc.limit0 | nseg_desc.limit << 16) < 0x67) {
3889 kvm_queue_exception_e(vcpu, TS_VECTOR, tss_selector & 0xfffc);
3890 return 1;
3891 }
3892
3893 if (reason == TASK_SWITCH_IRET || reason == TASK_SWITCH_JMP) {
3894 cseg_desc.type &= ~(1 << 1); //clear the B flag
3895 save_guest_segment_descriptor(vcpu, old_tss_sel, &cseg_desc);
3896 }
3897
3898 if (reason == TASK_SWITCH_IRET) {
3899 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3900 kvm_x86_ops->set_rflags(vcpu, eflags & ~X86_EFLAGS_NT);
3901 }
3902
3903 kvm_x86_ops->skip_emulated_instruction(vcpu);
3904
3905 if (nseg_desc.type & 8)
3906 ret = kvm_task_switch_32(vcpu, tss_selector, old_tss_base,
3907 &nseg_desc);
3908 else
3909 ret = kvm_task_switch_16(vcpu, tss_selector, old_tss_base,
3910 &nseg_desc);
3911
3912 if (reason == TASK_SWITCH_CALL || reason == TASK_SWITCH_GATE) {
3913 u32 eflags = kvm_x86_ops->get_rflags(vcpu);
3914 kvm_x86_ops->set_rflags(vcpu, eflags | X86_EFLAGS_NT);
3915 }
3916
3917 if (reason != TASK_SWITCH_IRET) {
3918 nseg_desc.type |= (1 << 1);
3919 save_guest_segment_descriptor(vcpu, tss_selector,
3920 &nseg_desc);
3921 }
3922
3923 kvm_x86_ops->set_cr0(vcpu, vcpu->arch.cr0 | X86_CR0_TS);
3924 seg_desct_to_kvm_desct(&nseg_desc, tss_selector, &tr_seg);
3925 tr_seg.type = 11;
3926 kvm_set_segment(vcpu, &tr_seg, VCPU_SREG_TR);
3927 out:
3928 return ret;
3929 }
3930 EXPORT_SYMBOL_GPL(kvm_task_switch);
3931
3932 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
3933 struct kvm_sregs *sregs)
3934 {
3935 int mmu_reset_needed = 0;
3936 int i, pending_vec, max_bits;
3937 struct descriptor_table dt;
3938
3939 vcpu_load(vcpu);
3940
3941 dt.limit = sregs->idt.limit;
3942 dt.base = sregs->idt.base;
3943 kvm_x86_ops->set_idt(vcpu, &dt);
3944 dt.limit = sregs->gdt.limit;
3945 dt.base = sregs->gdt.base;
3946 kvm_x86_ops->set_gdt(vcpu, &dt);
3947
3948 vcpu->arch.cr2 = sregs->cr2;
3949 mmu_reset_needed |= vcpu->arch.cr3 != sregs->cr3;
3950
3951 down_read(&vcpu->kvm->slots_lock);
3952 if (gfn_to_memslot(vcpu->kvm, sregs->cr3 >> PAGE_SHIFT))
3953 vcpu->arch.cr3 = sregs->cr3;
3954 else
3955 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
3956 up_read(&vcpu->kvm->slots_lock);
3957
3958 kvm_set_cr8(vcpu, sregs->cr8);
3959
3960 mmu_reset_needed |= vcpu->arch.shadow_efer != sregs->efer;
3961 kvm_x86_ops->set_efer(vcpu, sregs->efer);
3962 kvm_set_apic_base(vcpu, sregs->apic_base);
3963
3964 kvm_x86_ops->decache_cr4_guest_bits(vcpu);
3965
3966 mmu_reset_needed |= vcpu->arch.cr0 != sregs->cr0;
3967 kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
3968 vcpu->arch.cr0 = sregs->cr0;
3969
3970 mmu_reset_needed |= vcpu->arch.cr4 != sregs->cr4;
3971 kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
3972 if (!is_long_mode(vcpu) && is_pae(vcpu))
3973 load_pdptrs(vcpu, vcpu->arch.cr3);
3974
3975 if (mmu_reset_needed)
3976 kvm_mmu_reset_context(vcpu);
3977
3978 if (!irqchip_in_kernel(vcpu->kvm)) {
3979 memcpy(vcpu->arch.irq_pending, sregs->interrupt_bitmap,
3980 sizeof vcpu->arch.irq_pending);
3981 vcpu->arch.irq_summary = 0;
3982 for (i = 0; i < ARRAY_SIZE(vcpu->arch.irq_pending); ++i)
3983 if (vcpu->arch.irq_pending[i])
3984 __set_bit(i, &vcpu->arch.irq_summary);
3985 } else {
3986 max_bits = (sizeof sregs->interrupt_bitmap) << 3;
3987 pending_vec = find_first_bit(
3988 (const unsigned long *)sregs->interrupt_bitmap,
3989 max_bits);
3990 /* Only pending external irq is handled here */
3991 if (pending_vec < max_bits) {
3992 kvm_x86_ops->set_irq(vcpu, pending_vec);
3993 pr_debug("Set back pending irq %d\n",
3994 pending_vec);
3995 }
3996 kvm_pic_clear_isr_ack(vcpu->kvm);
3997 }
3998
3999 kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
4000 kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
4001 kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
4002 kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
4003 kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
4004 kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
4005
4006 kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
4007 kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
4008
4009 /* Older userspace won't unhalt the vcpu on reset. */
4010 if (vcpu->vcpu_id == 0 && kvm_rip_read(vcpu) == 0xfff0 &&
4011 sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
4012 !(vcpu->arch.cr0 & X86_CR0_PE))
4013 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4014
4015 vcpu_put(vcpu);
4016
4017 return 0;
4018 }
4019
4020 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
4021 struct kvm_guest_debug *dbg)
4022 {
4023 int i, r;
4024
4025 vcpu_load(vcpu);
4026
4027 if ((dbg->control & (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) ==
4028 (KVM_GUESTDBG_ENABLE | KVM_GUESTDBG_USE_HW_BP)) {
4029 for (i = 0; i < KVM_NR_DB_REGS; ++i)
4030 vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
4031 vcpu->arch.switch_db_regs =
4032 (dbg->arch.debugreg[7] & DR7_BP_EN_MASK);
4033 } else {
4034 for (i = 0; i < KVM_NR_DB_REGS; i++)
4035 vcpu->arch.eff_db[i] = vcpu->arch.db[i];
4036 vcpu->arch.switch_db_regs = (vcpu->arch.dr7 & DR7_BP_EN_MASK);
4037 }
4038
4039 r = kvm_x86_ops->set_guest_debug(vcpu, dbg);
4040
4041 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
4042 kvm_queue_exception(vcpu, DB_VECTOR);
4043 else if (dbg->control & KVM_GUESTDBG_INJECT_BP)
4044 kvm_queue_exception(vcpu, BP_VECTOR);
4045
4046 vcpu_put(vcpu);
4047
4048 return r;
4049 }
4050
4051 /*
4052 * fxsave fpu state. Taken from x86_64/processor.h. To be killed when
4053 * we have asm/x86/processor.h
4054 */
4055 struct fxsave {
4056 u16 cwd;
4057 u16 swd;
4058 u16 twd;
4059 u16 fop;
4060 u64 rip;
4061 u64 rdp;
4062 u32 mxcsr;
4063 u32 mxcsr_mask;
4064 u32 st_space[32]; /* 8*16 bytes for each FP-reg = 128 bytes */
4065 #ifdef CONFIG_X86_64
4066 u32 xmm_space[64]; /* 16*16 bytes for each XMM-reg = 256 bytes */
4067 #else
4068 u32 xmm_space[32]; /* 8*16 bytes for each XMM-reg = 128 bytes */
4069 #endif
4070 };
4071
4072 /*
4073 * Translate a guest virtual address to a guest physical address.
4074 */
4075 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
4076 struct kvm_translation *tr)
4077 {
4078 unsigned long vaddr = tr->linear_address;
4079 gpa_t gpa;
4080
4081 vcpu_load(vcpu);
4082 down_read(&vcpu->kvm->slots_lock);
4083 gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, vaddr);
4084 up_read(&vcpu->kvm->slots_lock);
4085 tr->physical_address = gpa;
4086 tr->valid = gpa != UNMAPPED_GVA;
4087 tr->writeable = 1;
4088 tr->usermode = 0;
4089 vcpu_put(vcpu);
4090
4091 return 0;
4092 }
4093
4094 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4095 {
4096 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4097
4098 vcpu_load(vcpu);
4099
4100 memcpy(fpu->fpr, fxsave->st_space, 128);
4101 fpu->fcw = fxsave->cwd;
4102 fpu->fsw = fxsave->swd;
4103 fpu->ftwx = fxsave->twd;
4104 fpu->last_opcode = fxsave->fop;
4105 fpu->last_ip = fxsave->rip;
4106 fpu->last_dp = fxsave->rdp;
4107 memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
4108
4109 vcpu_put(vcpu);
4110
4111 return 0;
4112 }
4113
4114 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
4115 {
4116 struct fxsave *fxsave = (struct fxsave *)&vcpu->arch.guest_fx_image;
4117
4118 vcpu_load(vcpu);
4119
4120 memcpy(fxsave->st_space, fpu->fpr, 128);
4121 fxsave->cwd = fpu->fcw;
4122 fxsave->swd = fpu->fsw;
4123 fxsave->twd = fpu->ftwx;
4124 fxsave->fop = fpu->last_opcode;
4125 fxsave->rip = fpu->last_ip;
4126 fxsave->rdp = fpu->last_dp;
4127 memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
4128
4129 vcpu_put(vcpu);
4130
4131 return 0;
4132 }
4133
4134 void fx_init(struct kvm_vcpu *vcpu)
4135 {
4136 unsigned after_mxcsr_mask;
4137
4138 /*
4139 * Touch the fpu the first time in non atomic context as if
4140 * this is the first fpu instruction the exception handler
4141 * will fire before the instruction returns and it'll have to
4142 * allocate ram with GFP_KERNEL.
4143 */
4144 if (!used_math())
4145 kvm_fx_save(&vcpu->arch.host_fx_image);
4146
4147 /* Initialize guest FPU by resetting ours and saving into guest's */
4148 preempt_disable();
4149 kvm_fx_save(&vcpu->arch.host_fx_image);
4150 kvm_fx_finit();
4151 kvm_fx_save(&vcpu->arch.guest_fx_image);
4152 kvm_fx_restore(&vcpu->arch.host_fx_image);
4153 preempt_enable();
4154
4155 vcpu->arch.cr0 |= X86_CR0_ET;
4156 after_mxcsr_mask = offsetof(struct i387_fxsave_struct, st_space);
4157 vcpu->arch.guest_fx_image.mxcsr = 0x1f80;
4158 memset((void *)&vcpu->arch.guest_fx_image + after_mxcsr_mask,
4159 0, sizeof(struct i387_fxsave_struct) - after_mxcsr_mask);
4160 }
4161 EXPORT_SYMBOL_GPL(fx_init);
4162
4163 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
4164 {
4165 if (!vcpu->fpu_active || vcpu->guest_fpu_loaded)
4166 return;
4167
4168 vcpu->guest_fpu_loaded = 1;
4169 kvm_fx_save(&vcpu->arch.host_fx_image);
4170 kvm_fx_restore(&vcpu->arch.guest_fx_image);
4171 }
4172 EXPORT_SYMBOL_GPL(kvm_load_guest_fpu);
4173
4174 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
4175 {
4176 if (!vcpu->guest_fpu_loaded)
4177 return;
4178
4179 vcpu->guest_fpu_loaded = 0;
4180 kvm_fx_save(&vcpu->arch.guest_fx_image);
4181 kvm_fx_restore(&vcpu->arch.host_fx_image);
4182 ++vcpu->stat.fpu_reload;
4183 }
4184 EXPORT_SYMBOL_GPL(kvm_put_guest_fpu);
4185
4186 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
4187 {
4188 if (vcpu->arch.time_page) {
4189 kvm_release_page_dirty(vcpu->arch.time_page);
4190 vcpu->arch.time_page = NULL;
4191 }
4192
4193 kvm_x86_ops->vcpu_free(vcpu);
4194 }
4195
4196 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
4197 unsigned int id)
4198 {
4199 return kvm_x86_ops->vcpu_create(kvm, id);
4200 }
4201
4202 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
4203 {
4204 int r;
4205
4206 /* We do fxsave: this must be aligned. */
4207 BUG_ON((unsigned long)&vcpu->arch.host_fx_image & 0xF);
4208
4209 vcpu->arch.mtrr_state.have_fixed = 1;
4210 vcpu_load(vcpu);
4211 r = kvm_arch_vcpu_reset(vcpu);
4212 if (r == 0)
4213 r = kvm_mmu_setup(vcpu);
4214 vcpu_put(vcpu);
4215 if (r < 0)
4216 goto free_vcpu;
4217
4218 return 0;
4219 free_vcpu:
4220 kvm_x86_ops->vcpu_free(vcpu);
4221 return r;
4222 }
4223
4224 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
4225 {
4226 vcpu_load(vcpu);
4227 kvm_mmu_unload(vcpu);
4228 vcpu_put(vcpu);
4229
4230 kvm_x86_ops->vcpu_free(vcpu);
4231 }
4232
4233 int kvm_arch_vcpu_reset(struct kvm_vcpu *vcpu)
4234 {
4235 vcpu->arch.nmi_pending = false;
4236 vcpu->arch.nmi_injected = false;
4237
4238 vcpu->arch.switch_db_regs = 0;
4239 memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
4240 vcpu->arch.dr6 = DR6_FIXED_1;
4241 vcpu->arch.dr7 = DR7_FIXED_1;
4242
4243 return kvm_x86_ops->vcpu_reset(vcpu);
4244 }
4245
4246 void kvm_arch_hardware_enable(void *garbage)
4247 {
4248 kvm_x86_ops->hardware_enable(garbage);
4249 }
4250
4251 void kvm_arch_hardware_disable(void *garbage)
4252 {
4253 kvm_x86_ops->hardware_disable(garbage);
4254 }
4255
4256 int kvm_arch_hardware_setup(void)
4257 {
4258 return kvm_x86_ops->hardware_setup();
4259 }
4260
4261 void kvm_arch_hardware_unsetup(void)
4262 {
4263 kvm_x86_ops->hardware_unsetup();
4264 }
4265
4266 void kvm_arch_check_processor_compat(void *rtn)
4267 {
4268 kvm_x86_ops->check_processor_compatibility(rtn);
4269 }
4270
4271 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
4272 {
4273 struct page *page;
4274 struct kvm *kvm;
4275 int r;
4276
4277 BUG_ON(vcpu->kvm == NULL);
4278 kvm = vcpu->kvm;
4279
4280 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
4281 if (!irqchip_in_kernel(kvm) || vcpu->vcpu_id == 0)
4282 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
4283 else
4284 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
4285
4286 page = alloc_page(GFP_KERNEL | __GFP_ZERO);
4287 if (!page) {
4288 r = -ENOMEM;
4289 goto fail;
4290 }
4291 vcpu->arch.pio_data = page_address(page);
4292
4293 r = kvm_mmu_create(vcpu);
4294 if (r < 0)
4295 goto fail_free_pio_data;
4296
4297 if (irqchip_in_kernel(kvm)) {
4298 r = kvm_create_lapic(vcpu);
4299 if (r < 0)
4300 goto fail_mmu_destroy;
4301 }
4302
4303 return 0;
4304
4305 fail_mmu_destroy:
4306 kvm_mmu_destroy(vcpu);
4307 fail_free_pio_data:
4308 free_page((unsigned long)vcpu->arch.pio_data);
4309 fail:
4310 return r;
4311 }
4312
4313 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
4314 {
4315 kvm_free_lapic(vcpu);
4316 down_read(&vcpu->kvm->slots_lock);
4317 kvm_mmu_destroy(vcpu);
4318 up_read(&vcpu->kvm->slots_lock);
4319 free_page((unsigned long)vcpu->arch.pio_data);
4320 }
4321
4322 struct kvm *kvm_arch_create_vm(void)
4323 {
4324 struct kvm *kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
4325
4326 if (!kvm)
4327 return ERR_PTR(-ENOMEM);
4328
4329 INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
4330 INIT_LIST_HEAD(&kvm->arch.oos_global_pages);
4331 INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
4332
4333 /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
4334 set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
4335
4336 rdtscll(kvm->arch.vm_init_tsc);
4337
4338 return kvm;
4339 }
4340
4341 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
4342 {
4343 vcpu_load(vcpu);
4344 kvm_mmu_unload(vcpu);
4345 vcpu_put(vcpu);
4346 }
4347
4348 static void kvm_free_vcpus(struct kvm *kvm)
4349 {
4350 unsigned int i;
4351
4352 /*
4353 * Unpin any mmu pages first.
4354 */
4355 for (i = 0; i < KVM_MAX_VCPUS; ++i)
4356 if (kvm->vcpus[i])
4357 kvm_unload_vcpu_mmu(kvm->vcpus[i]);
4358 for (i = 0; i < KVM_MAX_VCPUS; ++i) {
4359 if (kvm->vcpus[i]) {
4360 kvm_arch_vcpu_free(kvm->vcpus[i]);
4361 kvm->vcpus[i] = NULL;
4362 }
4363 }
4364
4365 }
4366
4367 void kvm_arch_sync_events(struct kvm *kvm)
4368 {
4369 kvm_free_all_assigned_devices(kvm);
4370 }
4371
4372 void kvm_arch_destroy_vm(struct kvm *kvm)
4373 {
4374 kvm_iommu_unmap_guest(kvm);
4375 kvm_free_pit(kvm);
4376 kfree(kvm->arch.vpic);
4377 kfree(kvm->arch.vioapic);
4378 kvm_free_vcpus(kvm);
4379 kvm_free_physmem(kvm);
4380 if (kvm->arch.apic_access_page)
4381 put_page(kvm->arch.apic_access_page);
4382 if (kvm->arch.ept_identity_pagetable)
4383 put_page(kvm->arch.ept_identity_pagetable);
4384 kfree(kvm);
4385 }
4386
4387 int kvm_arch_set_memory_region(struct kvm *kvm,
4388 struct kvm_userspace_memory_region *mem,
4389 struct kvm_memory_slot old,
4390 int user_alloc)
4391 {
4392 int npages = mem->memory_size >> PAGE_SHIFT;
4393 struct kvm_memory_slot *memslot = &kvm->memslots[mem->slot];
4394
4395 /*To keep backward compatibility with older userspace,
4396 *x86 needs to hanlde !user_alloc case.
4397 */
4398 if (!user_alloc) {
4399 if (npages && !old.rmap) {
4400 unsigned long userspace_addr;
4401
4402 down_write(&current->mm->mmap_sem);
4403 userspace_addr = do_mmap(NULL, 0,
4404 npages * PAGE_SIZE,
4405 PROT_READ | PROT_WRITE,
4406 MAP_PRIVATE | MAP_ANONYMOUS,
4407 0);
4408 up_write(&current->mm->mmap_sem);
4409
4410 if (IS_ERR((void *)userspace_addr))
4411 return PTR_ERR((void *)userspace_addr);
4412
4413 /* set userspace_addr atomically for kvm_hva_to_rmapp */
4414 spin_lock(&kvm->mmu_lock);
4415 memslot->userspace_addr = userspace_addr;
4416 spin_unlock(&kvm->mmu_lock);
4417 } else {
4418 if (!old.user_alloc && old.rmap) {
4419 int ret;
4420
4421 down_write(&current->mm->mmap_sem);
4422 ret = do_munmap(current->mm, old.userspace_addr,
4423 old.npages * PAGE_SIZE);
4424 up_write(&current->mm->mmap_sem);
4425 if (ret < 0)
4426 printk(KERN_WARNING
4427 "kvm_vm_ioctl_set_memory_region: "
4428 "failed to munmap memory\n");
4429 }
4430 }
4431 }
4432
4433 spin_lock(&kvm->mmu_lock);
4434 if (!kvm->arch.n_requested_mmu_pages) {
4435 unsigned int nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
4436 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
4437 }
4438
4439 kvm_mmu_slot_remove_write_access(kvm, mem->slot);
4440 spin_unlock(&kvm->mmu_lock);
4441 kvm_flush_remote_tlbs(kvm);
4442
4443 return 0;
4444 }
4445
4446 void kvm_arch_flush_shadow(struct kvm *kvm)
4447 {
4448 kvm_mmu_zap_all(kvm);
4449 kvm_reload_remote_mmus(kvm);
4450 }
4451
4452 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
4453 {
4454 return vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE
4455 || vcpu->arch.mp_state == KVM_MP_STATE_SIPI_RECEIVED
4456 || vcpu->arch.nmi_pending;
4457 }
4458
4459 static void vcpu_kick_intr(void *info)
4460 {
4461 #ifdef DEBUG
4462 struct kvm_vcpu *vcpu = (struct kvm_vcpu *)info;
4463 printk(KERN_DEBUG "vcpu_kick_intr %p \n", vcpu);
4464 #endif
4465 }
4466
4467 void kvm_vcpu_kick(struct kvm_vcpu *vcpu)
4468 {
4469 int ipi_pcpu = vcpu->cpu;
4470 int cpu = get_cpu();
4471
4472 if (waitqueue_active(&vcpu->wq)) {
4473 wake_up_interruptible(&vcpu->wq);
4474 ++vcpu->stat.halt_wakeup;
4475 }
4476 /*
4477 * We may be called synchronously with irqs disabled in guest mode,
4478 * So need not to call smp_call_function_single() in that case.
4479 */
4480 if (vcpu->guest_mode && vcpu->cpu != cpu)
4481 smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0);
4482 put_cpu();
4483 }
Support for the Chinese Samsung S3C2440 based development boards