4 * Copyright (c) 2004 - 2009 Paul Mundt
5 * Copyright (c) 2002 M. R. Brown
7 * Modelled after arch/mips/pci/pci.c:
8 * Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
14 #include <linux/kernel.h>
16 #include <linux/pci.h>
17 #include <linux/init.h>
18 #include <linux/types.h>
19 #include <linux/dma-debug.h>
21 #include <linux/mutex.h>
22 #include <linux/spinlock.h>
23 #include <linux/export.h>
25 unsigned long PCIBIOS_MIN_IO
= 0x0000;
26 unsigned long PCIBIOS_MIN_MEM
= 0;
29 * The PCI controller list.
31 static struct pci_channel
*hose_head
, **hose_tail
= &hose_head
;
33 static int pci_initialized
;
35 static void __devinit
pcibios_scanbus(struct pci_channel
*hose
)
37 static int next_busno
;
38 static int need_domain_info
;
41 resource_size_t offset
;
45 for (i
= 0; i
< hose
->nr_resources
; i
++) {
46 res
= hose
->resources
+ i
;
48 if (res
->flags
& IORESOURCE_IO
)
49 offset
= hose
->io_offset
;
50 else if (res
->flags
& IORESOURCE_MEM
)
51 offset
= hose
->mem_offset
;
52 pci_add_resource_offset(&resources
, res
, offset
);
55 bus
= pci_scan_root_bus(NULL
, next_busno
, hose
->pci_ops
, hose
,
59 need_domain_info
= need_domain_info
|| hose
->index
;
60 hose
->need_domain_info
= need_domain_info
;
62 next_busno
= bus
->busn_res
.end
+ 1;
63 /* Don't allow 8-bit bus number overflow inside the hose -
64 reserve some space for bridges. */
65 if (next_busno
> 224) {
70 pci_bus_size_bridges(bus
);
71 pci_bus_assign_resources(bus
);
72 pci_enable_bridges(bus
);
74 pci_free_resource_list(&resources
);
79 * This interrupt-safe spinlock protects all accesses to PCI
80 * configuration space.
82 DEFINE_RAW_SPINLOCK(pci_config_lock
);
83 static DEFINE_MUTEX(pci_scan_mutex
);
85 int __devinit
register_pci_controller(struct pci_channel
*hose
)
89 for (i
= 0; i
< hose
->nr_resources
; i
++) {
90 struct resource
*res
= hose
->resources
+ i
;
92 if (res
->flags
& IORESOURCE_IO
) {
93 if (request_resource(&ioport_resource
, res
) < 0)
96 if (request_resource(&iomem_resource
, res
) < 0)
102 hose_tail
= &hose
->next
;
105 * Do not panic here but later - this might happen before console init.
107 if (!hose
->io_map_base
) {
109 "registering PCI controller with io_map_base unset\n");
113 * Setup the ERR/PERR and SERR timers, if available.
115 pcibios_enable_timers(hose
);
118 * Scan the bus if it is register after the PCI subsystem
121 if (pci_initialized
) {
122 mutex_lock(&pci_scan_mutex
);
123 pcibios_scanbus(hose
);
124 mutex_unlock(&pci_scan_mutex
);
130 for (--i
; i
>= 0; i
--)
131 release_resource(&hose
->resources
[i
]);
133 printk(KERN_WARNING
"Skipping PCI bus scan due to resource conflict\n");
137 static int __init
pcibios_init(void)
139 struct pci_channel
*hose
;
141 /* Scan all of the recorded PCI controllers. */
142 for (hose
= hose_head
; hose
; hose
= hose
->next
)
143 pcibios_scanbus(hose
);
145 pci_fixup_irqs(pci_common_swizzle
, pcibios_map_platform_irq
);
147 dma_debug_add_bus(&pci_bus_type
);
153 subsys_initcall(pcibios_init
);
156 * Called after each bus is probed, but before its children
159 void __devinit
pcibios_fixup_bus(struct pci_bus
*bus
)
164 * We need to avoid collisions with `mirrored' VGA ports
165 * and other strange ISA hardware, so we always want the
166 * addresses to be allocated in the 0x000-0x0ff region
169 resource_size_t
pcibios_align_resource(void *data
, const struct resource
*res
,
170 resource_size_t size
, resource_size_t align
)
172 struct pci_dev
*dev
= data
;
173 struct pci_channel
*hose
= dev
->sysdata
;
174 resource_size_t start
= res
->start
;
176 if (res
->flags
& IORESOURCE_IO
) {
177 if (start
< PCIBIOS_MIN_IO
+ hose
->resources
[0].start
)
178 start
= PCIBIOS_MIN_IO
+ hose
->resources
[0].start
;
181 * Put everything into 0x00-0xff region modulo 0x400.
184 start
= (start
+ 0x3ff) & ~0x3ff;
190 int pcibios_enable_device(struct pci_dev
*dev
, int mask
)
192 return pci_enable_resources(dev
, mask
);
196 pcibios_bus_report_status_early(struct pci_channel
*hose
,
197 int top_bus
, int current_bus
,
198 unsigned int status_mask
, int warn
)
200 unsigned int pci_devfn
;
204 for (pci_devfn
= 0; pci_devfn
< 0xff; pci_devfn
++) {
205 if (PCI_FUNC(pci_devfn
))
207 ret
= early_read_config_word(hose
, top_bus
, current_bus
,
208 pci_devfn
, PCI_STATUS
, &status
);
209 if (ret
!= PCIBIOS_SUCCESSFUL
)
211 if (status
== 0xffff)
214 early_write_config_word(hose
, top_bus
, current_bus
,
215 pci_devfn
, PCI_STATUS
,
216 status
& status_mask
);
218 printk("(%02x:%02x: %04X) ", current_bus
,
224 * We can't use pci_find_device() here since we are
225 * called from interrupt context.
227 static void __init_refok
228 pcibios_bus_report_status(struct pci_bus
*bus
, unsigned int status_mask
,
233 list_for_each_entry(dev
, &bus
->devices
, bus_list
) {
237 * ignore host bridge - we handle
240 if (dev
->bus
->number
== 0 && dev
->devfn
== 0)
243 pci_read_config_word(dev
, PCI_STATUS
, &status
);
244 if (status
== 0xffff)
247 if ((status
& status_mask
) == 0)
250 /* clear the status errors */
251 pci_write_config_word(dev
, PCI_STATUS
, status
& status_mask
);
254 printk("(%s: %04X) ", pci_name(dev
), status
);
257 list_for_each_entry(dev
, &bus
->devices
, bus_list
)
258 if (dev
->subordinate
)
259 pcibios_bus_report_status(dev
->subordinate
, status_mask
, warn
);
262 void __init_refok
pcibios_report_status(unsigned int status_mask
, int warn
)
264 struct pci_channel
*hose
;
266 for (hose
= hose_head
; hose
; hose
= hose
->next
) {
267 if (unlikely(!hose
->bus
))
268 pcibios_bus_report_status_early(hose
, hose_head
->index
,
269 hose
->index
, status_mask
, warn
);
271 pcibios_bus_report_status(hose
->bus
, status_mask
, warn
);
275 int pci_mmap_page_range(struct pci_dev
*dev
, struct vm_area_struct
*vma
,
276 enum pci_mmap_state mmap_state
, int write_combine
)
279 * I/O space can be accessed via normal processor loads and stores on
280 * this platform but for now we elect not to do this and portable
281 * drivers should not do this anyway.
283 if (mmap_state
== pci_mmap_io
)
287 * Ignore write-combine; for now only return uncached mappings.
289 vma
->vm_page_prot
= pgprot_noncached(vma
->vm_page_prot
);
291 return remap_pfn_range(vma
, vma
->vm_start
, vma
->vm_pgoff
,
292 vma
->vm_end
- vma
->vm_start
,
296 #ifndef CONFIG_GENERIC_IOMAP
298 void __iomem
*__pci_ioport_map(struct pci_dev
*dev
,
299 unsigned long port
, unsigned int nr
)
301 struct pci_channel
*chan
= dev
->sysdata
;
303 if (unlikely(!chan
->io_map_base
)) {
304 chan
->io_map_base
= sh_io_port_base
;
306 if (pci_domains_supported
)
307 panic("To avoid data corruption io_map_base MUST be "
308 "set with multiple PCI domains.");
311 return (void __iomem
*)(chan
->io_map_base
+ port
);
314 void pci_iounmap(struct pci_dev
*dev
, void __iomem
*addr
)
318 EXPORT_SYMBOL(pci_iounmap
);
320 #endif /* CONFIG_GENERIC_IOMAP */
322 #ifdef CONFIG_HOTPLUG
323 EXPORT_SYMBOL(PCIBIOS_MIN_IO
);
324 EXPORT_SYMBOL(PCIBIOS_MIN_MEM
);