arch/sh/drivers/pci/pci.c

   1 /*
   2  * New-style PCI core.
   3  *
   4  * Copyright (c) 2004 - 2009  Paul Mundt
   5  * Copyright (c) 2002  M. R. Brown
   6  *
   7  * Modelled after arch/mips/pci/pci.c:
   8  *  Copyright (C) 2003, 04 Ralf Baechle (ralf@linux-mips.org)
   9  *
  10  * This file is subject to the terms and conditions of the GNU General Public
  11  * License.  See the file "COPYING" in the main directory of this archive
  12  * for more details.
  13  */
  14 #include <linux/kernel.h>
  15 #include <linux/mm.h>
  16 #include <linux/pci.h>
  17 #include <linux/init.h>
  18 #include <linux/types.h>
  19 #include <linux/dma-debug.h>
  20 #include <linux/io.h>
  21 #include <linux/mutex.h>
  22 #include <linux/spinlock.h>
  23 #include <linux/export.h>
  24
  25 unsigned long PCIBIOS_MIN_IO = 0x0000;
  26 unsigned long PCIBIOS_MIN_MEM = 0;
  27
  28 /*
  29  * The PCI controller list.
  30  */
  31 static struct pci_channel *hose_head, **hose_tail = &hose_head;
  32
  33 static int pci_initialized;
  34
  35 static void pcibios_scanbus(struct pci_channel *hose)
  36 {
  37         static int next_busno;
  38         static int need_domain_info;
  39         LIST_HEAD(resources);
  40         struct resource *res;
  41         resource_size_t offset;
  42         int i;
  43         struct pci_bus *bus;
  44
  45         for (i = 0; i < hose->nr_resources; i++) {
  46                 res = hose->resources + i;
  47                 offset = 0;
  48                 if (res->flags & IORESOURCE_IO)
  49                         offset = hose->io_offset;
  50                 else if (res->flags & IORESOURCE_MEM)
  51                         offset = hose->mem_offset;
  52                 pci_add_resource_offset(&resources, res, offset);
  53         }
  54
  55         bus = pci_scan_root_bus(NULL, next_busno, hose->pci_ops, hose,
  56                                 &resources);
  57         hose->bus = bus;
  58
  59         need_domain_info = need_domain_info || hose->index;
  60         hose->need_domain_info = need_domain_info;
  61         if (bus) {
  62                 next_busno = bus->busn_res.end + 1;
  63                 /* Don't allow 8-bit bus number overflow inside the hose -
  64                    reserve some space for bridges. */
  65                 if (next_busno > 224) {
  66                         next_busno = 0;
  67                         need_domain_info = 1;
  68                 }
  69
  70                 pci_bus_size_bridges(bus);
  71                 pci_bus_assign_resources(bus);
  72                 pci_enable_bridges(bus);
  73         } else {
  74                 pci_free_resource_list(&resources);
  75         }
  76 }
  77
  78 /*
  79  * This interrupt-safe spinlock protects all accesses to PCI
  80  * configuration space.
  81  */
  82 DEFINE_RAW_SPINLOCK(pci_config_lock);
  83 static DEFINE_MUTEX(pci_scan_mutex);
  84
  85 int register_pci_controller(struct pci_channel *hose)
  86 {
  87         int i;
  88
  89         for (i = 0; i < hose->nr_resources; i++) {
  90                 struct resource *res = hose->resources + i;
  91
  92                 if (res->flags & IORESOURCE_IO) {
  93                         if (request_resource(&ioport_resource, res) < 0)
  94                                 goto out;
  95                 } else {
  96                         if (request_resource(&iomem_resource, res) < 0)
  97                                 goto out;
  98                 }
  99         }
 100
 101         *hose_tail = hose;
 102         hose_tail = &hose->next;
 103
 104         /*
 105          * Do not panic here but later - this might happen before console init.
 106          */
 107         if (!hose->io_map_base) {
 108                 printk(KERN_WARNING
 109                        "registering PCI controller with io_map_base unset\n");
 110         }
 111
 112         /*
 113          * Setup the ERR/PERR and SERR timers, if available.
 114          */
 115         pcibios_enable_timers(hose);
 116
 117         /*
 118          * Scan the bus if it is register after the PCI subsystem
 119          * initialization.
 120          */
 121         if (pci_initialized) {
 122                 mutex_lock(&pci_scan_mutex);
 123                 pcibios_scanbus(hose);
 124                 mutex_unlock(&pci_scan_mutex);
 125         }
 126
 127         return 0;
 128
 129 out:
 130         for (--i; i >= 0; i--)
 131                 release_resource(&hose->resources[i]);
 132
 133         printk(KERN_WARNING "Skipping PCI bus scan due to resource conflict\n");
 134         return -1;
 135 }
 136
 137 static int __init pcibios_init(void)
 138 {
 139         struct pci_channel *hose;
 140
 141         /* Scan all of the recorded PCI controllers.  */
 142         for (hose = hose_head; hose; hose = hose->next)
 143                 pcibios_scanbus(hose);
 144
 145         pci_fixup_irqs(pci_common_swizzle, pcibios_map_platform_irq);
 146
 147         dma_debug_add_bus(&pci_bus_type);
 148
 149         pci_initialized = 1;
 150
 151         return 0;
 152 }
 153 subsys_initcall(pcibios_init);
 154
 155 /*
 156  *  Called after each bus is probed, but before its children
 157  *  are examined.
 158  */
 159 void pcibios_fixup_bus(struct pci_bus *bus)
 160 {
 161 }
 162
 163 /*
 164  * We need to avoid collisions with `mirrored' VGA ports
 165  * and other strange ISA hardware, so we always want the
 166  * addresses to be allocated in the 0x000-0x0ff region
 167  * modulo 0x400.
 168  */
 169 resource_size_t pcibios_align_resource(void *data, const struct resource *res,
 170                                 resource_size_t size, resource_size_t align)
 171 {
 172         struct pci_dev *dev = data;
 173         struct pci_channel *hose = dev->sysdata;
 174         resource_size_t start = res->start;
 175
 176         if (res->flags & IORESOURCE_IO) {
 177                 if (start < PCIBIOS_MIN_IO + hose->resources[0].start)
 178                         start = PCIBIOS_MIN_IO + hose->resources[0].start;
 179
 180                 /*
 181                  * Put everything into 0x00-0xff region modulo 0x400.
 182                  */
 183                 if (start & 0x300)
 184                         start = (start + 0x3ff) & ~0x3ff;
 185         }
 186
 187         return start;
 188 }
 189
 190 int pcibios_enable_device(struct pci_dev *dev, int mask)
 191 {
 192         return pci_enable_resources(dev, mask);
 193 }
 194
 195 static void __init
 196 pcibios_bus_report_status_early(struct pci_channel *hose,
 197                                 int top_bus, int current_bus,
 198                                 unsigned int status_mask, int warn)
 199 {
 200         unsigned int pci_devfn;
 201         u16 status;
 202         int ret;
 203
 204         for (pci_devfn = 0; pci_devfn < 0xff; pci_devfn++) {
 205                 if (PCI_FUNC(pci_devfn))
 206                         continue;
 207                 ret = early_read_config_word(hose, top_bus, current_bus,
 208                                              pci_devfn, PCI_STATUS, &status);
 209                 if (ret != PCIBIOS_SUCCESSFUL)
 210                         continue;
 211                 if (status == 0xffff)
 212                         continue;
 213
 214                 early_write_config_word(hose, top_bus, current_bus,
 215                                         pci_devfn, PCI_STATUS,
 216                                         status & status_mask);
 217                 if (warn)
 218                         printk("(%02x:%02x: %04X) ", current_bus,
 219                                pci_devfn, status);
 220         }
 221 }
 222
 223 /*
 224  * We can't use pci_find_device() here since we are
 225  * called from interrupt context.
 226  */
 227 static void __init_refok
 228 pcibios_bus_report_status(struct pci_bus *bus, unsigned int status_mask,
 229                           int warn)
 230 {
 231         struct pci_dev *dev;
 232
 233         list_for_each_entry(dev, &bus->devices, bus_list) {
 234                 u16 status;
 235
 236                 /*
 237                  * ignore host bridge - we handle
 238                  * that separately
 239                  */
 240                 if (dev->bus->number == 0 && dev->devfn == 0)
 241                         continue;
 242
 243                 pci_read_config_word(dev, PCI_STATUS, &status);
 244                 if (status == 0xffff)
 245                         continue;
 246
 247                 if ((status & status_mask) == 0)
 248                         continue;
 249
 250                 /* clear the status errors */
 251                 pci_write_config_word(dev, PCI_STATUS, status & status_mask);
 252
 253                 if (warn)
 254                         printk("(%s: %04X) ", pci_name(dev), status);
 255         }
 256
 257         list_for_each_entry(dev, &bus->devices, bus_list)
 258                 if (dev->subordinate)
 259                         pcibios_bus_report_status(dev->subordinate, status_mask, warn);
 260 }
 261
 262 void __init_refok pcibios_report_status(unsigned int status_mask, int warn)
 263 {
 264         struct pci_channel *hose;
 265
 266         for (hose = hose_head; hose; hose = hose->next) {
 267                 if (unlikely(!hose->bus))
 268                         pcibios_bus_report_status_early(hose, hose_head->index,
 269                                         hose->index, status_mask, warn);
 270                 else
 271                         pcibios_bus_report_status(hose->bus, status_mask, warn);
 272         }
 273 }
 274
 275 int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
 276                         enum pci_mmap_state mmap_state, int write_combine)
 277 {
 278         /*
 279          * I/O space can be accessed via normal processor loads and stores on
 280          * this platform but for now we elect not to do this and portable
 281          * drivers should not do this anyway.
 282          */
 283         if (mmap_state == pci_mmap_io)
 284                 return -EINVAL;
 285
 286         /*
 287          * Ignore write-combine; for now only return uncached mappings.
 288          */
 289         vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 290
 291         return remap_pfn_range(vma, vma->vm_start, vma->vm_pgoff,
 292                                vma->vm_end - vma->vm_start,
 293                                vma->vm_page_prot);
 294 }
 295
 296 #ifndef CONFIG_GENERIC_IOMAP
 297
 298 void __iomem *__pci_ioport_map(struct pci_dev *dev,
 299                                unsigned long port, unsigned int nr)
 300 {
 301         struct pci_channel *chan = dev->sysdata;
 302
 303         if (unlikely(!chan->io_map_base)) {
 304                 chan->io_map_base = sh_io_port_base;
 305
 306                 if (pci_domains_supported)
 307                         panic("To avoid data corruption io_map_base MUST be "
 308                               "set with multiple PCI domains.");
 309         }
 310
 311         return (void __iomem *)(chan->io_map_base + port);
 312 }
 313
 314 void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
 315 {
 316         iounmap(addr);
 317 }
 318 EXPORT_SYMBOL(pci_iounmap);
 319
 320 #endif /* CONFIG_GENERIC_IOMAP */
 321
 322 EXPORT_SYMBOL(PCIBIOS_MIN_IO);
 323 EXPORT_SYMBOL(PCIBIOS_MIN_MEM);