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FRV: Fix no-hardware-breakpoint case
[linux-2.6/cjktty.git] / arch / powerpc / kernel / traps.c
blob804f0f30f227f692d949d49117b3c35da908fc6f
1 /*
2 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@samba.org)
11 */
12
13 /*
14 * This file handles the architecture-dependent parts of hardware exceptions
15 */
16
17 #include <linux/errno.h>
18 #include <linux/sched.h>
19 #include <linux/kernel.h>
20 #include <linux/mm.h>
21 #include <linux/stddef.h>
22 #include <linux/unistd.h>
23 #include <linux/ptrace.h>
24 #include <linux/slab.h>
25 #include <linux/user.h>
26 #include <linux/interrupt.h>
27 #include <linux/init.h>
28 #include <linux/module.h>
29 #include <linux/prctl.h>
30 #include <linux/delay.h>
31 #include <linux/kprobes.h>
32 #include <linux/kexec.h>
33 #include <linux/backlight.h>
34 #include <linux/bug.h>
35 #include <linux/kdebug.h>
36 #include <linux/debugfs.h>
37
38 #include <asm/emulated_ops.h>
39 #include <asm/pgtable.h>
40 #include <asm/uaccess.h>
41 #include <asm/system.h>
42 #include <asm/io.h>
43 #include <asm/machdep.h>
44 #include <asm/rtas.h>
45 #include <asm/pmc.h>
46 #ifdef CONFIG_PPC32
47 #include <asm/reg.h>
48 #endif
49 #ifdef CONFIG_PMAC_BACKLIGHT
50 #include <asm/backlight.h>
51 #endif
52 #ifdef CONFIG_PPC64
53 #include <asm/firmware.h>
54 #include <asm/processor.h>
55 #endif
56 #include <asm/kexec.h>
57 #include <asm/ppc-opcode.h>
58 #ifdef CONFIG_FSL_BOOKE
59 #include <asm/dbell.h>
60 #endif
61
62 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
63 int (*__debugger)(struct pt_regs *regs);
64 int (*__debugger_ipi)(struct pt_regs *regs);
65 int (*__debugger_bpt)(struct pt_regs *regs);
66 int (*__debugger_sstep)(struct pt_regs *regs);
67 int (*__debugger_iabr_match)(struct pt_regs *regs);
68 int (*__debugger_dabr_match)(struct pt_regs *regs);
69 int (*__debugger_fault_handler)(struct pt_regs *regs);
70
71 EXPORT_SYMBOL(__debugger);
72 EXPORT_SYMBOL(__debugger_ipi);
73 EXPORT_SYMBOL(__debugger_bpt);
74 EXPORT_SYMBOL(__debugger_sstep);
75 EXPORT_SYMBOL(__debugger_iabr_match);
76 EXPORT_SYMBOL(__debugger_dabr_match);
77 EXPORT_SYMBOL(__debugger_fault_handler);
78 #endif
79
80 /*
81 * Trap & Exception support
82 */
83
84 #ifdef CONFIG_PMAC_BACKLIGHT
85 static void pmac_backlight_unblank(void)
86 {
87 mutex_lock(&pmac_backlight_mutex);
88 if (pmac_backlight) {
89 struct backlight_properties *props;
90
91 props = &pmac_backlight->props;
92 props->brightness = props->max_brightness;
93 props->power = FB_BLANK_UNBLANK;
94 backlight_update_status(pmac_backlight);
95 }
96 mutex_unlock(&pmac_backlight_mutex);
97 }
98 #else
99 static inline void pmac_backlight_unblank(void) { }
100 #endif
101
102 int die(const char *str, struct pt_regs *regs, long err)
103 {
104 static struct {
105 spinlock_t lock;
106 u32 lock_owner;
107 int lock_owner_depth;
108 } die = {
109 .lock = __SPIN_LOCK_UNLOCKED(die.lock),
110 .lock_owner = -1,
111 .lock_owner_depth = 0
112 };
113 static int die_counter;
114 unsigned long flags;
115
116 if (debugger(regs))
117 return 1;
118
119 oops_enter();
120
121 if (die.lock_owner != raw_smp_processor_id()) {
122 console_verbose();
123 spin_lock_irqsave(&die.lock, flags);
124 die.lock_owner = smp_processor_id();
125 die.lock_owner_depth = 0;
126 bust_spinlocks(1);
127 if (machine_is(powermac))
128 pmac_backlight_unblank();
129 } else {
130 local_save_flags(flags);
131 }
132
133 if (++die.lock_owner_depth < 3) {
134 printk("Oops: %s, sig: %ld [#%d]\n", str, err, ++die_counter);
135 #ifdef CONFIG_PREEMPT
136 printk("PREEMPT ");
137 #endif
138 #ifdef CONFIG_SMP
139 printk("SMP NR_CPUS=%d ", NR_CPUS);
140 #endif
141 #ifdef CONFIG_DEBUG_PAGEALLOC
142 printk("DEBUG_PAGEALLOC ");
143 #endif
144 #ifdef CONFIG_NUMA
145 printk("NUMA ");
146 #endif
147 printk("%s\n", ppc_md.name ? ppc_md.name : "");
148
149 print_modules();
150 show_regs(regs);
151 } else {
152 printk("Recursive die() failure, output suppressed\n");
153 }
154
155 bust_spinlocks(0);
156 die.lock_owner = -1;
157 add_taint(TAINT_DIE);
158 spin_unlock_irqrestore(&die.lock, flags);
159
160 if (kexec_should_crash(current) ||
161 kexec_sr_activated(smp_processor_id()))
162 crash_kexec(regs);
163 crash_kexec_secondary(regs);
164
165 if (in_interrupt())
166 panic("Fatal exception in interrupt");
167
168 if (panic_on_oops)
169 panic("Fatal exception");
170
171 oops_exit();
172 do_exit(err);
173
174 return 0;
175 }
176
177 void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
178 {
179 siginfo_t info;
180 const char fmt32[] = KERN_INFO "%s[%d]: unhandled signal %d " \
181 "at %08lx nip %08lx lr %08lx code %x\n";
182 const char fmt64[] = KERN_INFO "%s[%d]: unhandled signal %d " \
183 "at %016lx nip %016lx lr %016lx code %x\n";
184
185 if (!user_mode(regs)) {
186 if (die("Exception in kernel mode", regs, signr))
187 return;
188 } else if (show_unhandled_signals &&
189 unhandled_signal(current, signr) &&
190 printk_ratelimit()) {
191 printk(regs->msr & MSR_SF ? fmt64 : fmt32,
192 current->comm, current->pid, signr,
193 addr, regs->nip, regs->link, code);
194 }
195
196 memset(&info, 0, sizeof(info));
197 info.si_signo = signr;
198 info.si_code = code;
199 info.si_addr = (void __user *) addr;
200 force_sig_info(signr, &info, current);
201 }
202
203 #ifdef CONFIG_PPC64
204 void system_reset_exception(struct pt_regs *regs)
205 {
206 /* See if any machine dependent calls */
207 if (ppc_md.system_reset_exception) {
208 if (ppc_md.system_reset_exception(regs))
209 return;
210 }
211
212 #ifdef CONFIG_KEXEC
213 cpu_set(smp_processor_id(), cpus_in_sr);
214 #endif
215
216 die("System Reset", regs, SIGABRT);
217
218 /*
219 * Some CPUs when released from the debugger will execute this path.
220 * These CPUs entered the debugger via a soft-reset. If the CPU was
221 * hung before entering the debugger it will return to the hung
222 * state when exiting this function. This causes a problem in
223 * kdump since the hung CPU(s) will not respond to the IPI sent
224 * from kdump. To prevent the problem we call crash_kexec_secondary()
225 * here. If a kdump had not been initiated or we exit the debugger
226 * with the "exit and recover" command (x) crash_kexec_secondary()
227 * will return after 5ms and the CPU returns to its previous state.
228 */
229 crash_kexec_secondary(regs);
230
231 /* Must die if the interrupt is not recoverable */
232 if (!(regs->msr & MSR_RI))
233 panic("Unrecoverable System Reset");
234
235 /* What should we do here? We could issue a shutdown or hard reset. */
236 }
237 #endif
238
239 /*
240 * I/O accesses can cause machine checks on powermacs.
241 * Check if the NIP corresponds to the address of a sync
242 * instruction for which there is an entry in the exception
243 * table.
244 * Note that the 601 only takes a machine check on TEA
245 * (transfer error ack) signal assertion, and does not
246 * set any of the top 16 bits of SRR1.
247 * -- paulus.
248 */
249 static inline int check_io_access(struct pt_regs *regs)
250 {
251 #ifdef CONFIG_PPC32
252 unsigned long msr = regs->msr;
253 const struct exception_table_entry *entry;
254 unsigned int *nip = (unsigned int *)regs->nip;
255
256 if (((msr & 0xffff0000) == 0 || (msr & (0x80000 | 0x40000)))
257 && (entry = search_exception_tables(regs->nip)) != NULL) {
258 /*
259 * Check that it's a sync instruction, or somewhere
260 * in the twi; isync; nop sequence that inb/inw/inl uses.
261 * As the address is in the exception table
262 * we should be able to read the instr there.
263 * For the debug message, we look at the preceding
264 * load or store.
265 */
266 if (*nip == 0x60000000) /* nop */
267 nip -= 2;
268 else if (*nip == 0x4c00012c) /* isync */
269 --nip;
270 if (*nip == 0x7c0004ac || (*nip >> 26) == 3) {
271 /* sync or twi */
272 unsigned int rb;
273
274 --nip;
275 rb = (*nip >> 11) & 0x1f;
276 printk(KERN_DEBUG "%s bad port %lx at %p\n",
277 (*nip & 0x100)? "OUT to": "IN from",
278 regs->gpr[rb] - _IO_BASE, nip);
279 regs->msr |= MSR_RI;
280 regs->nip = entry->fixup;
281 return 1;
282 }
283 }
284 #endif /* CONFIG_PPC32 */
285 return 0;
286 }
287
288 #if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
289 /* On 4xx, the reason for the machine check or program exception
290 is in the ESR. */
291 #define get_reason(regs) ((regs)->dsisr)
292 #ifndef CONFIG_FSL_BOOKE
293 #define get_mc_reason(regs) ((regs)->dsisr)
294 #else
295 #define get_mc_reason(regs) (mfspr(SPRN_MCSR) & MCSR_MASK)
296 #endif
297 #define REASON_FP ESR_FP
298 #define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
299 #define REASON_PRIVILEGED ESR_PPR
300 #define REASON_TRAP ESR_PTR
301
302 /* single-step stuff */
303 #define single_stepping(regs) (current->thread.dbcr0 & DBCR0_IC)
304 #define clear_single_step(regs) (current->thread.dbcr0 &= ~DBCR0_IC)
305
306 #else
307 /* On non-4xx, the reason for the machine check or program
308 exception is in the MSR. */
309 #define get_reason(regs) ((regs)->msr)
310 #define get_mc_reason(regs) ((regs)->msr)
311 #define REASON_FP 0x100000
312 #define REASON_ILLEGAL 0x80000
313 #define REASON_PRIVILEGED 0x40000
314 #define REASON_TRAP 0x20000
315
316 #define single_stepping(regs) ((regs)->msr & MSR_SE)
317 #define clear_single_step(regs) ((regs)->msr &= ~MSR_SE)
318 #endif
319
320 #if defined(CONFIG_4xx)
321 int machine_check_4xx(struct pt_regs *regs)
322 {
323 unsigned long reason = get_mc_reason(regs);
324
325 if (reason & ESR_IMCP) {
326 printk("Instruction");
327 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
328 } else
329 printk("Data");
330 printk(" machine check in kernel mode.\n");
331
332 return 0;
333 }
334
335 int machine_check_440A(struct pt_regs *regs)
336 {
337 unsigned long reason = get_mc_reason(regs);
338
339 printk("Machine check in kernel mode.\n");
340 if (reason & ESR_IMCP){
341 printk("Instruction Synchronous Machine Check exception\n");
342 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
343 }
344 else {
345 u32 mcsr = mfspr(SPRN_MCSR);
346 if (mcsr & MCSR_IB)
347 printk("Instruction Read PLB Error\n");
348 if (mcsr & MCSR_DRB)
349 printk("Data Read PLB Error\n");
350 if (mcsr & MCSR_DWB)
351 printk("Data Write PLB Error\n");
352 if (mcsr & MCSR_TLBP)
353 printk("TLB Parity Error\n");
354 if (mcsr & MCSR_ICP){
355 flush_instruction_cache();
356 printk("I-Cache Parity Error\n");
357 }
358 if (mcsr & MCSR_DCSP)
359 printk("D-Cache Search Parity Error\n");
360 if (mcsr & MCSR_DCFP)
361 printk("D-Cache Flush Parity Error\n");
362 if (mcsr & MCSR_IMPE)
363 printk("Machine Check exception is imprecise\n");
364
365 /* Clear MCSR */
366 mtspr(SPRN_MCSR, mcsr);
367 }
368 return 0;
369 }
370 #elif defined(CONFIG_E500)
371 int machine_check_e500(struct pt_regs *regs)
372 {
373 unsigned long reason = get_mc_reason(regs);
374
375 printk("Machine check in kernel mode.\n");
376 printk("Caused by (from MCSR=%lx): ", reason);
377
378 if (reason & MCSR_MCP)
379 printk("Machine Check Signal\n");
380 if (reason & MCSR_ICPERR)
381 printk("Instruction Cache Parity Error\n");
382 if (reason & MCSR_DCP_PERR)
383 printk("Data Cache Push Parity Error\n");
384 if (reason & MCSR_DCPERR)
385 printk("Data Cache Parity Error\n");
386 if (reason & MCSR_BUS_IAERR)
387 printk("Bus - Instruction Address Error\n");
388 if (reason & MCSR_BUS_RAERR)
389 printk("Bus - Read Address Error\n");
390 if (reason & MCSR_BUS_WAERR)
391 printk("Bus - Write Address Error\n");
392 if (reason & MCSR_BUS_IBERR)
393 printk("Bus - Instruction Data Error\n");
394 if (reason & MCSR_BUS_RBERR)
395 printk("Bus - Read Data Bus Error\n");
396 if (reason & MCSR_BUS_WBERR)
397 printk("Bus - Read Data Bus Error\n");
398 if (reason & MCSR_BUS_IPERR)
399 printk("Bus - Instruction Parity Error\n");
400 if (reason & MCSR_BUS_RPERR)
401 printk("Bus - Read Parity Error\n");
402
403 return 0;
404 }
405 #elif defined(CONFIG_E200)
406 int machine_check_e200(struct pt_regs *regs)
407 {
408 unsigned long reason = get_mc_reason(regs);
409
410 printk("Machine check in kernel mode.\n");
411 printk("Caused by (from MCSR=%lx): ", reason);
412
413 if (reason & MCSR_MCP)
414 printk("Machine Check Signal\n");
415 if (reason & MCSR_CP_PERR)
416 printk("Cache Push Parity Error\n");
417 if (reason & MCSR_CPERR)
418 printk("Cache Parity Error\n");
419 if (reason & MCSR_EXCP_ERR)
420 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
421 if (reason & MCSR_BUS_IRERR)
422 printk("Bus - Read Bus Error on instruction fetch\n");
423 if (reason & MCSR_BUS_DRERR)
424 printk("Bus - Read Bus Error on data load\n");
425 if (reason & MCSR_BUS_WRERR)
426 printk("Bus - Write Bus Error on buffered store or cache line push\n");
427
428 return 0;
429 }
430 #else
431 int machine_check_generic(struct pt_regs *regs)
432 {
433 unsigned long reason = get_mc_reason(regs);
434
435 printk("Machine check in kernel mode.\n");
436 printk("Caused by (from SRR1=%lx): ", reason);
437 switch (reason & 0x601F0000) {
438 case 0x80000:
439 printk("Machine check signal\n");
440 break;
441 case 0: /* for 601 */
442 case 0x40000:
443 case 0x140000: /* 7450 MSS error and TEA */
444 printk("Transfer error ack signal\n");
445 break;
446 case 0x20000:
447 printk("Data parity error signal\n");
448 break;
449 case 0x10000:
450 printk("Address parity error signal\n");
451 break;
452 case 0x20000000:
453 printk("L1 Data Cache error\n");
454 break;
455 case 0x40000000:
456 printk("L1 Instruction Cache error\n");
457 break;
458 case 0x00100000:
459 printk("L2 data cache parity error\n");
460 break;
461 default:
462 printk("Unknown values in msr\n");
463 }
464 return 0;
465 }
466 #endif /* everything else */
467
468 void machine_check_exception(struct pt_regs *regs)
469 {
470 int recover = 0;
471
472 /* See if any machine dependent calls. In theory, we would want
473 * to call the CPU first, and call the ppc_md. one if the CPU
474 * one returns a positive number. However there is existing code
475 * that assumes the board gets a first chance, so let's keep it
476 * that way for now and fix things later. --BenH.
477 */
478 if (ppc_md.machine_check_exception)
479 recover = ppc_md.machine_check_exception(regs);
480 else if (cur_cpu_spec->machine_check)
481 recover = cur_cpu_spec->machine_check(regs);
482
483 if (recover > 0)
484 return;
485
486 if (user_mode(regs)) {
487 regs->msr |= MSR_RI;
488 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
489 return;
490 }
491
492 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
493 /* the qspan pci read routines can cause machine checks -- Cort
494 *
495 * yuck !!! that totally needs to go away ! There are better ways
496 * to deal with that than having a wart in the mcheck handler.
497 * -- BenH
498 */
499 bad_page_fault(regs, regs->dar, SIGBUS);
500 return;
501 #endif
502
503 if (debugger_fault_handler(regs)) {
504 regs->msr |= MSR_RI;
505 return;
506 }
507
508 if (check_io_access(regs))
509 return;
510
511 if (debugger_fault_handler(regs))
512 return;
513 die("Machine check", regs, SIGBUS);
514
515 /* Must die if the interrupt is not recoverable */
516 if (!(regs->msr & MSR_RI))
517 panic("Unrecoverable Machine check");
518 }
519
520 void SMIException(struct pt_regs *regs)
521 {
522 die("System Management Interrupt", regs, SIGABRT);
523 }
524
525 void unknown_exception(struct pt_regs *regs)
526 {
527 printk("Bad trap at PC: %lx, SR: %lx, vector=%lx\n",
528 regs->nip, regs->msr, regs->trap);
529
530 _exception(SIGTRAP, regs, 0, 0);
531 }
532
533 void instruction_breakpoint_exception(struct pt_regs *regs)
534 {
535 if (notify_die(DIE_IABR_MATCH, "iabr_match", regs, 5,
536 5, SIGTRAP) == NOTIFY_STOP)
537 return;
538 if (debugger_iabr_match(regs))
539 return;
540 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
541 }
542
543 void RunModeException(struct pt_regs *regs)
544 {
545 _exception(SIGTRAP, regs, 0, 0);
546 }
547
548 void __kprobes single_step_exception(struct pt_regs *regs)
549 {
550 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
551
552 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
553 5, SIGTRAP) == NOTIFY_STOP)
554 return;
555 if (debugger_sstep(regs))
556 return;
557
558 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
559 }
560
561 /*
562 * After we have successfully emulated an instruction, we have to
563 * check if the instruction was being single-stepped, and if so,
564 * pretend we got a single-step exception. This was pointed out
565 * by Kumar Gala. -- paulus
566 */
567 static void emulate_single_step(struct pt_regs *regs)
568 {
569 if (single_stepping(regs)) {
570 clear_single_step(regs);
571 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
572 }
573 }
574
575 static inline int __parse_fpscr(unsigned long fpscr)
576 {
577 int ret = 0;
578
579 /* Invalid operation */
580 if ((fpscr & FPSCR_VE) && (fpscr & FPSCR_VX))
581 ret = FPE_FLTINV;
582
583 /* Overflow */
584 else if ((fpscr & FPSCR_OE) && (fpscr & FPSCR_OX))
585 ret = FPE_FLTOVF;
586
587 /* Underflow */
588 else if ((fpscr & FPSCR_UE) && (fpscr & FPSCR_UX))
589 ret = FPE_FLTUND;
590
591 /* Divide by zero */
592 else if ((fpscr & FPSCR_ZE) && (fpscr & FPSCR_ZX))
593 ret = FPE_FLTDIV;
594
595 /* Inexact result */
596 else if ((fpscr & FPSCR_XE) && (fpscr & FPSCR_XX))
597 ret = FPE_FLTRES;
598
599 return ret;
600 }
601
602 static void parse_fpe(struct pt_regs *regs)
603 {
604 int code = 0;
605
606 flush_fp_to_thread(current);
607
608 code = __parse_fpscr(current->thread.fpscr.val);
609
610 _exception(SIGFPE, regs, code, regs->nip);
611 }
612
613 /*
614 * Illegal instruction emulation support. Originally written to
615 * provide the PVR to user applications using the mfspr rd, PVR.
616 * Return non-zero if we can't emulate, or -EFAULT if the associated
617 * memory access caused an access fault. Return zero on success.
618 *
619 * There are a couple of ways to do this, either "decode" the instruction
620 * or directly match lots of bits. In this case, matching lots of
621 * bits is faster and easier.
622 *
623 */
624 static int emulate_string_inst(struct pt_regs *regs, u32 instword)
625 {
626 u8 rT = (instword >> 21) & 0x1f;
627 u8 rA = (instword >> 16) & 0x1f;
628 u8 NB_RB = (instword >> 11) & 0x1f;
629 u32 num_bytes;
630 unsigned long EA;
631 int pos = 0;
632
633 /* Early out if we are an invalid form of lswx */
634 if ((instword & PPC_INST_STRING_MASK) == PPC_INST_LSWX)
635 if ((rT == rA) || (rT == NB_RB))
636 return -EINVAL;
637
638 EA = (rA == 0) ? 0 : regs->gpr[rA];
639
640 switch (instword & PPC_INST_STRING_MASK) {
641 case PPC_INST_LSWX:
642 case PPC_INST_STSWX:
643 EA += NB_RB;
644 num_bytes = regs->xer & 0x7f;
645 break;
646 case PPC_INST_LSWI:
647 case PPC_INST_STSWI:
648 num_bytes = (NB_RB == 0) ? 32 : NB_RB;
649 break;
650 default:
651 return -EINVAL;
652 }
653
654 while (num_bytes != 0)
655 {
656 u8 val;
657 u32 shift = 8 * (3 - (pos & 0x3));
658
659 switch ((instword & PPC_INST_STRING_MASK)) {
660 case PPC_INST_LSWX:
661 case PPC_INST_LSWI:
662 if (get_user(val, (u8 __user *)EA))
663 return -EFAULT;
664 /* first time updating this reg,
665 * zero it out */
666 if (pos == 0)
667 regs->gpr[rT] = 0;
668 regs->gpr[rT] |= val << shift;
669 break;
670 case PPC_INST_STSWI:
671 case PPC_INST_STSWX:
672 val = regs->gpr[rT] >> shift;
673 if (put_user(val, (u8 __user *)EA))
674 return -EFAULT;
675 break;
676 }
677 /* move EA to next address */
678 EA += 1;
679 num_bytes--;
680
681 /* manage our position within the register */
682 if (++pos == 4) {
683 pos = 0;
684 if (++rT == 32)
685 rT = 0;
686 }
687 }
688
689 return 0;
690 }
691
692 static int emulate_popcntb_inst(struct pt_regs *regs, u32 instword)
693 {
694 u32 ra,rs;
695 unsigned long tmp;
696
697 ra = (instword >> 16) & 0x1f;
698 rs = (instword >> 21) & 0x1f;
699
700 tmp = regs->gpr[rs];
701 tmp = tmp - ((tmp >> 1) & 0x5555555555555555ULL);
702 tmp = (tmp & 0x3333333333333333ULL) + ((tmp >> 2) & 0x3333333333333333ULL);
703 tmp = (tmp + (tmp >> 4)) & 0x0f0f0f0f0f0f0f0fULL;
704 regs->gpr[ra] = tmp;
705
706 return 0;
707 }
708
709 static int emulate_isel(struct pt_regs *regs, u32 instword)
710 {
711 u8 rT = (instword >> 21) & 0x1f;
712 u8 rA = (instword >> 16) & 0x1f;
713 u8 rB = (instword >> 11) & 0x1f;
714 u8 BC = (instword >> 6) & 0x1f;
715 u8 bit;
716 unsigned long tmp;
717
718 tmp = (rA == 0) ? 0 : regs->gpr[rA];
719 bit = (regs->ccr >> (31 - BC)) & 0x1;
720
721 regs->gpr[rT] = bit ? tmp : regs->gpr[rB];
722
723 return 0;
724 }
725
726 static int emulate_instruction(struct pt_regs *regs)
727 {
728 u32 instword;
729 u32 rd;
730
731 if (!user_mode(regs) || (regs->msr & MSR_LE))
732 return -EINVAL;
733 CHECK_FULL_REGS(regs);
734
735 if (get_user(instword, (u32 __user *)(regs->nip)))
736 return -EFAULT;
737
738 /* Emulate the mfspr rD, PVR. */
739 if ((instword & PPC_INST_MFSPR_PVR_MASK) == PPC_INST_MFSPR_PVR) {
740 PPC_WARN_EMULATED(mfpvr, regs);
741 rd = (instword >> 21) & 0x1f;
742 regs->gpr[rd] = mfspr(SPRN_PVR);
743 return 0;
744 }
745
746 /* Emulating the dcba insn is just a no-op. */
747 if ((instword & PPC_INST_DCBA_MASK) == PPC_INST_DCBA) {
748 PPC_WARN_EMULATED(dcba, regs);
749 return 0;
750 }
751
752 /* Emulate the mcrxr insn. */
753 if ((instword & PPC_INST_MCRXR_MASK) == PPC_INST_MCRXR) {
754 int shift = (instword >> 21) & 0x1c;
755 unsigned long msk = 0xf0000000UL >> shift;
756
757 PPC_WARN_EMULATED(mcrxr, regs);
758 regs->ccr = (regs->ccr & ~msk) | ((regs->xer >> shift) & msk);
759 regs->xer &= ~0xf0000000UL;
760 return 0;
761 }
762
763 /* Emulate load/store string insn. */
764 if ((instword & PPC_INST_STRING_GEN_MASK) == PPC_INST_STRING) {
765 PPC_WARN_EMULATED(string, regs);
766 return emulate_string_inst(regs, instword);
767 }
768
769 /* Emulate the popcntb (Population Count Bytes) instruction. */
770 if ((instword & PPC_INST_POPCNTB_MASK) == PPC_INST_POPCNTB) {
771 PPC_WARN_EMULATED(popcntb, regs);
772 return emulate_popcntb_inst(regs, instword);
773 }
774
775 /* Emulate isel (Integer Select) instruction */
776 if ((instword & PPC_INST_ISEL_MASK) == PPC_INST_ISEL) {
777 PPC_WARN_EMULATED(isel, regs);
778 return emulate_isel(regs, instword);
779 }
780
781 return -EINVAL;
782 }
783
784 int is_valid_bugaddr(unsigned long addr)
785 {
786 return is_kernel_addr(addr);
787 }
788
789 void __kprobes program_check_exception(struct pt_regs *regs)
790 {
791 unsigned int reason = get_reason(regs);
792 extern int do_mathemu(struct pt_regs *regs);
793
794 /* We can now get here via a FP Unavailable exception if the core
795 * has no FPU, in that case the reason flags will be 0 */
796
797 if (reason & REASON_FP) {
798 /* IEEE FP exception */
799 parse_fpe(regs);
800 return;
801 }
802 if (reason & REASON_TRAP) {
803 /* trap exception */
804 if (notify_die(DIE_BPT, "breakpoint", regs, 5, 5, SIGTRAP)
805 == NOTIFY_STOP)
806 return;
807 if (debugger_bpt(regs))
808 return;
809
810 if (!(regs->msr & MSR_PR) && /* not user-mode */
811 report_bug(regs->nip, regs) == BUG_TRAP_TYPE_WARN) {
812 regs->nip += 4;
813 return;
814 }
815 _exception(SIGTRAP, regs, TRAP_BRKPT, regs->nip);
816 return;
817 }
818
819 local_irq_enable();
820
821 #ifdef CONFIG_MATH_EMULATION
822 /* (reason & REASON_ILLEGAL) would be the obvious thing here,
823 * but there seems to be a hardware bug on the 405GP (RevD)
824 * that means ESR is sometimes set incorrectly - either to
825 * ESR_DST (!?) or 0. In the process of chasing this with the
826 * hardware people - not sure if it can happen on any illegal
827 * instruction or only on FP instructions, whether there is a
828 * pattern to occurences etc. -dgibson 31/Mar/2003 */
829 switch (do_mathemu(regs)) {
830 case 0:
831 emulate_single_step(regs);
832 return;
833 case 1: {
834 int code = 0;
835 code = __parse_fpscr(current->thread.fpscr.val);
836 _exception(SIGFPE, regs, code, regs->nip);
837 return;
838 }
839 case -EFAULT:
840 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
841 return;
842 }
843 /* fall through on any other errors */
844 #endif /* CONFIG_MATH_EMULATION */
845
846 /* Try to emulate it if we should. */
847 if (reason & (REASON_ILLEGAL | REASON_PRIVILEGED)) {
848 switch (emulate_instruction(regs)) {
849 case 0:
850 regs->nip += 4;
851 emulate_single_step(regs);
852 return;
853 case -EFAULT:
854 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
855 return;
856 }
857 }
858
859 if (reason & REASON_PRIVILEGED)
860 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
861 else
862 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
863 }
864
865 void alignment_exception(struct pt_regs *regs)
866 {
867 int sig, code, fixed = 0;
868
869 /* we don't implement logging of alignment exceptions */
870 if (!(current->thread.align_ctl & PR_UNALIGN_SIGBUS))
871 fixed = fix_alignment(regs);
872
873 if (fixed == 1) {
874 regs->nip += 4; /* skip over emulated instruction */
875 emulate_single_step(regs);
876 return;
877 }
878
879 /* Operand address was bad */
880 if (fixed == -EFAULT) {
881 sig = SIGSEGV;
882 code = SEGV_ACCERR;
883 } else {
884 sig = SIGBUS;
885 code = BUS_ADRALN;
886 }
887 if (user_mode(regs))
888 _exception(sig, regs, code, regs->dar);
889 else
890 bad_page_fault(regs, regs->dar, sig);
891 }
892
893 void StackOverflow(struct pt_regs *regs)
894 {
895 printk(KERN_CRIT "Kernel stack overflow in process %p, r1=%lx\n",
896 current, regs->gpr[1]);
897 debugger(regs);
898 show_regs(regs);
899 panic("kernel stack overflow");
900 }
901
902 void nonrecoverable_exception(struct pt_regs *regs)
903 {
904 printk(KERN_ERR "Non-recoverable exception at PC=%lx MSR=%lx\n",
905 regs->nip, regs->msr);
906 debugger(regs);
907 die("nonrecoverable exception", regs, SIGKILL);
908 }
909
910 void trace_syscall(struct pt_regs *regs)
911 {
912 printk("Task: %p(%d), PC: %08lX/%08lX, Syscall: %3ld, Result: %s%ld %s\n",
913 current, task_pid_nr(current), regs->nip, regs->link, regs->gpr[0],
914 regs->ccr&0x10000000?"Error=":"", regs->gpr[3], print_tainted());
915 }
916
917 void kernel_fp_unavailable_exception(struct pt_regs *regs)
918 {
919 printk(KERN_EMERG "Unrecoverable FP Unavailable Exception "
920 "%lx at %lx\n", regs->trap, regs->nip);
921 die("Unrecoverable FP Unavailable Exception", regs, SIGABRT);
922 }
923
924 void altivec_unavailable_exception(struct pt_regs *regs)
925 {
926 if (user_mode(regs)) {
927 /* A user program has executed an altivec instruction,
928 but this kernel doesn't support altivec. */
929 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
930 return;
931 }
932
933 printk(KERN_EMERG "Unrecoverable VMX/Altivec Unavailable Exception "
934 "%lx at %lx\n", regs->trap, regs->nip);
935 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
936 }
937
938 void vsx_unavailable_exception(struct pt_regs *regs)
939 {
940 if (user_mode(regs)) {
941 /* A user program has executed an vsx instruction,
942 but this kernel doesn't support vsx. */
943 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
944 return;
945 }
946
947 printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception "
948 "%lx at %lx\n", regs->trap, regs->nip);
949 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
950 }
951
952 void performance_monitor_exception(struct pt_regs *regs)
953 {
954 perf_irq(regs);
955 }
956
957 #ifdef CONFIG_8xx
958 void SoftwareEmulation(struct pt_regs *regs)
959 {
960 extern int do_mathemu(struct pt_regs *);
961 extern int Soft_emulate_8xx(struct pt_regs *);
962 #if defined(CONFIG_MATH_EMULATION) || defined(CONFIG_8XX_MINIMAL_FPEMU)
963 int errcode;
964 #endif
965
966 CHECK_FULL_REGS(regs);
967
968 if (!user_mode(regs)) {
969 debugger(regs);
970 die("Kernel Mode Software FPU Emulation", regs, SIGFPE);
971 }
972
973 #ifdef CONFIG_MATH_EMULATION
974 errcode = do_mathemu(regs);
975 if (errcode >= 0)
976 PPC_WARN_EMULATED(math, regs);
977
978 switch (errcode) {
979 case 0:
980 emulate_single_step(regs);
981 return;
982 case 1: {
983 int code = 0;
984 code = __parse_fpscr(current->thread.fpscr.val);
985 _exception(SIGFPE, regs, code, regs->nip);
986 return;
987 }
988 case -EFAULT:
989 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
990 return;
991 default:
992 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
993 return;
994 }
995
996 #elif defined(CONFIG_8XX_MINIMAL_FPEMU)
997 errcode = Soft_emulate_8xx(regs);
998 if (errcode >= 0)
999 PPC_WARN_EMULATED(8xx, regs);
1000
1001 switch (errcode) {
1002 case 0:
1003 emulate_single_step(regs);
1004 return;
1005 case 1:
1006 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1007 return;
1008 case -EFAULT:
1009 _exception(SIGSEGV, regs, SEGV_MAPERR, regs->nip);
1010 return;
1011 }
1012 #else
1013 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1014 #endif
1015 }
1016 #endif /* CONFIG_8xx */
1017
1018 #if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
1019
1020 void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1021 {
1022 /* Hack alert: On BookE, Branch Taken stops on the branch itself, while
1023 * on server, it stops on the target of the branch. In order to simulate
1024 * the server behaviour, we thus restart right away with a single step
1025 * instead of stopping here when hitting a BT
1026 */
1027 if (debug_status & DBSR_BT) {
1028 regs->msr &= ~MSR_DE;
1029
1030 /* Disable BT */
1031 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_BT);
1032 /* Clear the BT event */
1033 mtspr(SPRN_DBSR, DBSR_BT);
1034
1035 /* Do the single step trick only when coming from userspace */
1036 if (user_mode(regs)) {
1037 current->thread.dbcr0 &= ~DBCR0_BT;
1038 current->thread.dbcr0 |= DBCR0_IDM | DBCR0_IC;
1039 regs->msr |= MSR_DE;
1040 return;
1041 }
1042
1043 if (notify_die(DIE_SSTEP, "block_step", regs, 5,
1044 5, SIGTRAP) == NOTIFY_STOP) {
1045 return;
1046 }
1047 if (debugger_sstep(regs))
1048 return;
1049 } else if (debug_status & DBSR_IC) { /* Instruction complete */
1050 regs->msr &= ~MSR_DE;
1051
1052 /* Disable instruction completion */
1053 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
1054 /* Clear the instruction completion event */
1055 mtspr(SPRN_DBSR, DBSR_IC);
1056
1057 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
1058 5, SIGTRAP) == NOTIFY_STOP) {
1059 return;
1060 }
1061
1062 if (debugger_sstep(regs))
1063 return;
1064
1065 if (user_mode(regs))
1066 current->thread.dbcr0 &= ~(DBCR0_IC);
1067
1068 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
1069 } else if (debug_status & (DBSR_DAC1R | DBSR_DAC1W)) {
1070 regs->msr &= ~MSR_DE;
1071
1072 if (user_mode(regs)) {
1073 current->thread.dbcr0 &= ~(DBSR_DAC1R | DBSR_DAC1W |
1074 DBCR0_IDM);
1075 } else {
1076 /* Disable DAC interupts */
1077 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~(DBSR_DAC1R |
1078 DBSR_DAC1W | DBCR0_IDM));
1079
1080 /* Clear the DAC event */
1081 mtspr(SPRN_DBSR, (DBSR_DAC1R | DBSR_DAC1W));
1082 }
1083 /* Setup and send the trap to the handler */
1084 do_dabr(regs, mfspr(SPRN_DAC1), debug_status);
1085 }
1086 }
1087 #endif /* CONFIG_4xx || CONFIG_BOOKE */
1088
1089 #if !defined(CONFIG_TAU_INT)
1090 void TAUException(struct pt_regs *regs)
1091 {
1092 printk("TAU trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
1093 regs->nip, regs->msr, regs->trap, print_tainted());
1094 }
1095 #endif /* CONFIG_INT_TAU */
1096
1097 #ifdef CONFIG_ALTIVEC
1098 void altivec_assist_exception(struct pt_regs *regs)
1099 {
1100 int err;
1101
1102 if (!user_mode(regs)) {
1103 printk(KERN_EMERG "VMX/Altivec assist exception in kernel mode"
1104 " at %lx\n", regs->nip);
1105 die("Kernel VMX/Altivec assist exception", regs, SIGILL);
1106 }
1107
1108 flush_altivec_to_thread(current);
1109
1110 PPC_WARN_EMULATED(altivec, regs);
1111 err = emulate_altivec(regs);
1112 if (err == 0) {
1113 regs->nip += 4; /* skip emulated instruction */
1114 emulate_single_step(regs);
1115 return;
1116 }
1117
1118 if (err == -EFAULT) {
1119 /* got an error reading the instruction */
1120 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1121 } else {
1122 /* didn't recognize the instruction */
1123 /* XXX quick hack for now: set the non-Java bit in the VSCR */
1124 if (printk_ratelimit())
1125 printk(KERN_ERR "Unrecognized altivec instruction "
1126 "in %s at %lx\n", current->comm, regs->nip);
1127 current->thread.vscr.u[3] |= 0x10000;
1128 }
1129 }
1130 #endif /* CONFIG_ALTIVEC */
1131
1132 #ifdef CONFIG_VSX
1133 void vsx_assist_exception(struct pt_regs *regs)
1134 {
1135 if (!user_mode(regs)) {
1136 printk(KERN_EMERG "VSX assist exception in kernel mode"
1137 " at %lx\n", regs->nip);
1138 die("Kernel VSX assist exception", regs, SIGILL);
1139 }
1140
1141 flush_vsx_to_thread(current);
1142 printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip);
1143 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1144 }
1145 #endif /* CONFIG_VSX */
1146
1147 #ifdef CONFIG_FSL_BOOKE
1148
1149 void doorbell_exception(struct pt_regs *regs)
1150 {
1151 #ifdef CONFIG_SMP
1152 int cpu = smp_processor_id();
1153 int msg;
1154
1155 if (num_online_cpus() < 2)
1156 return;
1157
1158 for (msg = 0; msg < 4; msg++)
1159 if (test_and_clear_bit(msg, &dbell_smp_message[cpu]))
1160 smp_message_recv(msg);
1161 #else
1162 printk(KERN_WARNING "Received doorbell on non-smp system\n");
1163 #endif
1164 }
1165
1166 void CacheLockingException(struct pt_regs *regs, unsigned long address,
1167 unsigned long error_code)
1168 {
1169 /* We treat cache locking instructions from the user
1170 * as priv ops, in the future we could try to do
1171 * something smarter
1172 */
1173 if (error_code & (ESR_DLK|ESR_ILK))
1174 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
1175 return;
1176 }
1177 #endif /* CONFIG_FSL_BOOKE */
1178
1179 #ifdef CONFIG_SPE
1180 void SPEFloatingPointException(struct pt_regs *regs)
1181 {
1182 extern int do_spe_mathemu(struct pt_regs *regs);
1183 unsigned long spefscr;
1184 int fpexc_mode;
1185 int code = 0;
1186 int err;
1187
1188 preempt_disable();
1189 if (regs->msr & MSR_SPE)
1190 giveup_spe(current);
1191 preempt_enable();
1192
1193 spefscr = current->thread.spefscr;
1194 fpexc_mode = current->thread.fpexc_mode;
1195
1196 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
1197 code = FPE_FLTOVF;
1198 }
1199 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
1200 code = FPE_FLTUND;
1201 }
1202 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
1203 code = FPE_FLTDIV;
1204 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
1205 code = FPE_FLTINV;
1206 }
1207 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
1208 code = FPE_FLTRES;
1209
1210 err = do_spe_mathemu(regs);
1211 if (err == 0) {
1212 regs->nip += 4; /* skip emulated instruction */
1213 emulate_single_step(regs);
1214 return;
1215 }
1216
1217 if (err == -EFAULT) {
1218 /* got an error reading the instruction */
1219 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1220 } else if (err == -EINVAL) {
1221 /* didn't recognize the instruction */
1222 printk(KERN_ERR "unrecognized spe instruction "
1223 "in %s at %lx\n", current->comm, regs->nip);
1224 } else {
1225 _exception(SIGFPE, regs, code, regs->nip);
1226 }
1227
1228 return;
1229 }
1230
1231 void SPEFloatingPointRoundException(struct pt_regs *regs)
1232 {
1233 extern int speround_handler(struct pt_regs *regs);
1234 int err;
1235
1236 preempt_disable();
1237 if (regs->msr & MSR_SPE)
1238 giveup_spe(current);
1239 preempt_enable();
1240
1241 regs->nip -= 4;
1242 err = speround_handler(regs);
1243 if (err == 0) {
1244 regs->nip += 4; /* skip emulated instruction */
1245 emulate_single_step(regs);
1246 return;
1247 }
1248
1249 if (err == -EFAULT) {
1250 /* got an error reading the instruction */
1251 _exception(SIGSEGV, regs, SEGV_ACCERR, regs->nip);
1252 } else if (err == -EINVAL) {
1253 /* didn't recognize the instruction */
1254 printk(KERN_ERR "unrecognized spe instruction "
1255 "in %s at %lx\n", current->comm, regs->nip);
1256 } else {
1257 _exception(SIGFPE, regs, 0, regs->nip);
1258 return;
1259 }
1260 }
1261 #endif
1262
1263 /*
1264 * We enter here if we get an unrecoverable exception, that is, one
1265 * that happened at a point where the RI (recoverable interrupt) bit
1266 * in the MSR is 0. This indicates that SRR0/1 are live, and that
1267 * we therefore lost state by taking this exception.
1268 */
1269 void unrecoverable_exception(struct pt_regs *regs)
1270 {
1271 printk(KERN_EMERG "Unrecoverable exception %lx at %lx\n",
1272 regs->trap, regs->nip);
1273 die("Unrecoverable exception", regs, SIGABRT);
1274 }
1275
1276 #ifdef CONFIG_BOOKE_WDT
1277 /*
1278 * Default handler for a Watchdog exception,
1279 * spins until a reboot occurs
1280 */
1281 void __attribute__ ((weak)) WatchdogHandler(struct pt_regs *regs)
1282 {
1283 /* Generic WatchdogHandler, implement your own */
1284 mtspr(SPRN_TCR, mfspr(SPRN_TCR)&(~TCR_WIE));
1285 return;
1286 }
1287
1288 void WatchdogException(struct pt_regs *regs)
1289 {
1290 printk (KERN_EMERG "PowerPC Book-E Watchdog Exception\n");
1291 WatchdogHandler(regs);
1292 }
1293 #endif
1294
1295 /*
1296 * We enter here if we discover during exception entry that we are
1297 * running in supervisor mode with a userspace value in the stack pointer.
1298 */
1299 void kernel_bad_stack(struct pt_regs *regs)
1300 {
1301 printk(KERN_EMERG "Bad kernel stack pointer %lx at %lx\n",
1302 regs->gpr[1], regs->nip);
1303 die("Bad kernel stack pointer", regs, SIGABRT);
1304 }
1305
1306 void __init trap_init(void)
1307 {
1308 }
1309
1310
1311 #ifdef CONFIG_PPC_EMULATED_STATS
1312
1313 #define WARN_EMULATED_SETUP(type) .type = { .name = #type }
1314
1315 struct ppc_emulated ppc_emulated = {
1316 #ifdef CONFIG_ALTIVEC
1317 WARN_EMULATED_SETUP(altivec),
1318 #endif
1319 WARN_EMULATED_SETUP(dcba),
1320 WARN_EMULATED_SETUP(dcbz),
1321 WARN_EMULATED_SETUP(fp_pair),
1322 WARN_EMULATED_SETUP(isel),
1323 WARN_EMULATED_SETUP(mcrxr),
1324 WARN_EMULATED_SETUP(mfpvr),
1325 WARN_EMULATED_SETUP(multiple),
1326 WARN_EMULATED_SETUP(popcntb),
1327 WARN_EMULATED_SETUP(spe),
1328 WARN_EMULATED_SETUP(string),
1329 WARN_EMULATED_SETUP(unaligned),
1330 #ifdef CONFIG_MATH_EMULATION
1331 WARN_EMULATED_SETUP(math),
1332 #elif defined(CONFIG_8XX_MINIMAL_FPEMU)
1333 WARN_EMULATED_SETUP(8xx),
1334 #endif
1335 #ifdef CONFIG_VSX
1336 WARN_EMULATED_SETUP(vsx),
1337 #endif
1338 };
1339
1340 u32 ppc_warn_emulated;
1341
1342 void ppc_warn_emulated_print(const char *type)
1343 {
1344 if (printk_ratelimit())
1345 pr_warning("%s used emulated %s instruction\n", current->comm,
1346 type);
1347 }
1348
1349 static int __init ppc_warn_emulated_init(void)
1350 {
1351 struct dentry *dir, *d;
1352 unsigned int i;
1353 struct ppc_emulated_entry *entries = (void *)&ppc_emulated;
1354
1355 if (!powerpc_debugfs_root)
1356 return -ENODEV;
1357
1358 dir = debugfs_create_dir("emulated_instructions",
1359 powerpc_debugfs_root);
1360 if (!dir)
1361 return -ENOMEM;
1362
1363 d = debugfs_create_u32("do_warn", S_IRUGO | S_IWUSR, dir,
1364 &ppc_warn_emulated);
1365 if (!d)
1366 goto fail;
1367
1368 for (i = 0; i < sizeof(ppc_emulated)/sizeof(*entries); i++) {
1369 d = debugfs_create_u32(entries[i].name, S_IRUGO | S_IWUSR, dir,
1370 (u32 *)&entries[i].val.counter);
1371 if (!d)
1372 goto fail;
1373 }
1374
1375 return 0;
1376
1377 fail:
1378 debugfs_remove_recursive(dir);
1379 return -ENOMEM;
1380 }
1381
1382 device_initcall(ppc_warn_emulated_init);
1383
1384 #endif /* CONFIG_PPC_EMULATED_STATS */
CJK support for tty framebuffer vt