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drm/i915: set "ret" correctly on error paths
[linux-2.6/btrfs-unstable.git] / drivers / gpu / drm / i915 / intel_panel.c
blobcb50c527401fe123b8ad76f7f1f831b8ccdd920a
1 /*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33 #include <linux/kernel.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pwm.h>
36 #include "intel_drv.h"
37
38 #define CRC_PMIC_PWM_PERIOD_NS 21333
39
40 void
41 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
42 struct drm_display_mode *adjusted_mode)
43 {
44 drm_mode_copy(adjusted_mode, fixed_mode);
45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
47 }
48
49 /**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev_priv: i915 device instance
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58 struct drm_display_mode *
59 intel_find_panel_downclock(struct drm_i915_private *dev_priv,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62 {
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
98 else
99 return NULL;
100 }
101
102 /* adjusted_mode has been preset to be the panel's fixed mode */
103 void
104 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
105 struct intel_crtc_state *pipe_config,
106 int fitting_mode)
107 {
108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
110
111 /* Native modes don't need fitting */
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
114 goto done;
115
116 switch (fitting_mode) {
117 case DRM_MODE_SCALE_CENTER:
118 width = pipe_config->pipe_src_w;
119 height = pipe_config->pipe_src_h;
120 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
121 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
122 break;
123
124 case DRM_MODE_SCALE_ASPECT:
125 /* Scale but preserve the aspect ratio */
126 {
127 u32 scaled_width = adjusted_mode->crtc_hdisplay
128 * pipe_config->pipe_src_h;
129 u32 scaled_height = pipe_config->pipe_src_w
130 * adjusted_mode->crtc_vdisplay;
131 if (scaled_width > scaled_height) { /* pillar */
132 width = scaled_height / pipe_config->pipe_src_h;
133 if (width & 1)
134 width++;
135 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
136 y = 0;
137 height = adjusted_mode->crtc_vdisplay;
138 } else if (scaled_width < scaled_height) { /* letter */
139 height = scaled_width / pipe_config->pipe_src_w;
140 if (height & 1)
141 height++;
142 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
143 x = 0;
144 width = adjusted_mode->crtc_hdisplay;
145 } else {
146 x = y = 0;
147 width = adjusted_mode->crtc_hdisplay;
148 height = adjusted_mode->crtc_vdisplay;
149 }
150 }
151 break;
152
153 case DRM_MODE_SCALE_FULLSCREEN:
154 x = y = 0;
155 width = adjusted_mode->crtc_hdisplay;
156 height = adjusted_mode->crtc_vdisplay;
157 break;
158
159 default:
160 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
161 return;
162 }
163
164 done:
165 pipe_config->pch_pfit.pos = (x << 16) | y;
166 pipe_config->pch_pfit.size = (width << 16) | height;
167 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
168 }
169
170 static void
171 centre_horizontally(struct drm_display_mode *adjusted_mode,
172 int width)
173 {
174 u32 border, sync_pos, blank_width, sync_width;
175
176 /* keep the hsync and hblank widths constant */
177 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
178 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
179 sync_pos = (blank_width - sync_width + 1) / 2;
180
181 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
182 border += border & 1; /* make the border even */
183
184 adjusted_mode->crtc_hdisplay = width;
185 adjusted_mode->crtc_hblank_start = width + border;
186 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
187
188 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
189 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
190 }
191
192 static void
193 centre_vertically(struct drm_display_mode *adjusted_mode,
194 int height)
195 {
196 u32 border, sync_pos, blank_width, sync_width;
197
198 /* keep the vsync and vblank widths constant */
199 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
200 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
201 sync_pos = (blank_width - sync_width + 1) / 2;
202
203 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
204
205 adjusted_mode->crtc_vdisplay = height;
206 adjusted_mode->crtc_vblank_start = height + border;
207 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
208
209 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
210 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
211 }
212
213 static inline u32 panel_fitter_scaling(u32 source, u32 target)
214 {
215 /*
216 * Floating point operation is not supported. So the FACTOR
217 * is defined, which can avoid the floating point computation
218 * when calculating the panel ratio.
219 */
220 #define ACCURACY 12
221 #define FACTOR (1 << ACCURACY)
222 u32 ratio = source * FACTOR / target;
223 return (FACTOR * ratio + FACTOR/2) / FACTOR;
224 }
225
226 static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
227 u32 *pfit_control)
228 {
229 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
230 u32 scaled_width = adjusted_mode->crtc_hdisplay *
231 pipe_config->pipe_src_h;
232 u32 scaled_height = pipe_config->pipe_src_w *
233 adjusted_mode->crtc_vdisplay;
234
235 /* 965+ is easy, it does everything in hw */
236 if (scaled_width > scaled_height)
237 *pfit_control |= PFIT_ENABLE |
238 PFIT_SCALING_PILLAR;
239 else if (scaled_width < scaled_height)
240 *pfit_control |= PFIT_ENABLE |
241 PFIT_SCALING_LETTER;
242 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
243 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
244 }
245
246 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
247 u32 *pfit_control, u32 *pfit_pgm_ratios,
248 u32 *border)
249 {
250 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
251 u32 scaled_width = adjusted_mode->crtc_hdisplay *
252 pipe_config->pipe_src_h;
253 u32 scaled_height = pipe_config->pipe_src_w *
254 adjusted_mode->crtc_vdisplay;
255 u32 bits;
256
257 /*
258 * For earlier chips we have to calculate the scaling
259 * ratio by hand and program it into the
260 * PFIT_PGM_RATIO register
261 */
262 if (scaled_width > scaled_height) { /* pillar */
263 centre_horizontally(adjusted_mode,
264 scaled_height /
265 pipe_config->pipe_src_h);
266
267 *border = LVDS_BORDER_ENABLE;
268 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
269 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
270 adjusted_mode->crtc_vdisplay);
271
272 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
273 bits << PFIT_VERT_SCALE_SHIFT);
274 *pfit_control |= (PFIT_ENABLE |
275 VERT_INTERP_BILINEAR |
276 HORIZ_INTERP_BILINEAR);
277 }
278 } else if (scaled_width < scaled_height) { /* letter */
279 centre_vertically(adjusted_mode,
280 scaled_width /
281 pipe_config->pipe_src_w);
282
283 *border = LVDS_BORDER_ENABLE;
284 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
285 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
286 adjusted_mode->crtc_hdisplay);
287
288 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
289 bits << PFIT_VERT_SCALE_SHIFT);
290 *pfit_control |= (PFIT_ENABLE |
291 VERT_INTERP_BILINEAR |
292 HORIZ_INTERP_BILINEAR);
293 }
294 } else {
295 /* Aspects match, Let hw scale both directions */
296 *pfit_control |= (PFIT_ENABLE |
297 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
298 VERT_INTERP_BILINEAR |
299 HORIZ_INTERP_BILINEAR);
300 }
301 }
302
303 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
304 struct intel_crtc_state *pipe_config,
305 int fitting_mode)
306 {
307 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
308 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
309 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
310
311 /* Native modes don't need fitting */
312 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
313 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
314 goto out;
315
316 switch (fitting_mode) {
317 case DRM_MODE_SCALE_CENTER:
318 /*
319 * For centered modes, we have to calculate border widths &
320 * heights and modify the values programmed into the CRTC.
321 */
322 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
323 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
324 border = LVDS_BORDER_ENABLE;
325 break;
326 case DRM_MODE_SCALE_ASPECT:
327 /* Scale but preserve the aspect ratio */
328 if (INTEL_GEN(dev_priv) >= 4)
329 i965_scale_aspect(pipe_config, &pfit_control);
330 else
331 i9xx_scale_aspect(pipe_config, &pfit_control,
332 &pfit_pgm_ratios, &border);
333 break;
334 case DRM_MODE_SCALE_FULLSCREEN:
335 /*
336 * Full scaling, even if it changes the aspect ratio.
337 * Fortunately this is all done for us in hw.
338 */
339 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
340 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
341 pfit_control |= PFIT_ENABLE;
342 if (INTEL_GEN(dev_priv) >= 4)
343 pfit_control |= PFIT_SCALING_AUTO;
344 else
345 pfit_control |= (VERT_AUTO_SCALE |
346 VERT_INTERP_BILINEAR |
347 HORIZ_AUTO_SCALE |
348 HORIZ_INTERP_BILINEAR);
349 }
350 break;
351 default:
352 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
353 return;
354 }
355
356 /* 965+ wants fuzzy fitting */
357 /* FIXME: handle multiple panels by failing gracefully */
358 if (INTEL_GEN(dev_priv) >= 4)
359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
360 PFIT_FILTER_FUZZY);
361
362 out:
363 if ((pfit_control & PFIT_ENABLE) == 0) {
364 pfit_control = 0;
365 pfit_pgm_ratios = 0;
366 }
367
368 /* Make sure pre-965 set dither correctly for 18bpp panels. */
369 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
370 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
371
372 pipe_config->gmch_pfit.control = pfit_control;
373 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
374 pipe_config->gmch_pfit.lvds_border_bits = border;
375 }
376
377 enum drm_connector_status
378 intel_panel_detect(struct drm_i915_private *dev_priv)
379 {
380 /* Assume that the BIOS does not lie through the OpRegion... */
381 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) {
382 return *dev_priv->opregion.lid_state & 0x1 ?
383 connector_status_connected :
384 connector_status_disconnected;
385 }
386
387 switch (i915.panel_ignore_lid) {
388 case -2:
389 return connector_status_connected;
390 case -1:
391 return connector_status_disconnected;
392 default:
393 return connector_status_unknown;
394 }
395 }
396
397 /**
398 * scale - scale values from one range to another
399 *
400 * @source_val: value in range [@source_min..@source_max]
401 *
402 * Return @source_val in range [@source_min..@source_max] scaled to range
403 * [@target_min..@target_max].
404 */
405 static uint32_t scale(uint32_t source_val,
406 uint32_t source_min, uint32_t source_max,
407 uint32_t target_min, uint32_t target_max)
408 {
409 uint64_t target_val;
410
411 WARN_ON(source_min > source_max);
412 WARN_ON(target_min > target_max);
413
414 /* defensive */
415 source_val = clamp(source_val, source_min, source_max);
416
417 /* avoid overflows */
418 target_val = DIV_ROUND_CLOSEST_ULL((uint64_t)(source_val - source_min) *
419 (target_max - target_min), source_max - source_min);
420 target_val += target_min;
421
422 return target_val;
423 }
424
425 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
426 static inline u32 scale_user_to_hw(struct intel_connector *connector,
427 u32 user_level, u32 user_max)
428 {
429 struct intel_panel *panel = &connector->panel;
430
431 return scale(user_level, 0, user_max,
432 panel->backlight.min, panel->backlight.max);
433 }
434
435 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
436 * to [hw_min..hw_max]. */
437 static inline u32 clamp_user_to_hw(struct intel_connector *connector,
438 u32 user_level, u32 user_max)
439 {
440 struct intel_panel *panel = &connector->panel;
441 u32 hw_level;
442
443 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
444 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
445
446 return hw_level;
447 }
448
449 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
450 static inline u32 scale_hw_to_user(struct intel_connector *connector,
451 u32 hw_level, u32 user_max)
452 {
453 struct intel_panel *panel = &connector->panel;
454
455 return scale(hw_level, panel->backlight.min, panel->backlight.max,
456 0, user_max);
457 }
458
459 static u32 intel_panel_compute_brightness(struct intel_connector *connector,
460 u32 val)
461 {
462 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
463 struct intel_panel *panel = &connector->panel;
464
465 WARN_ON(panel->backlight.max == 0);
466
467 if (i915.invert_brightness < 0)
468 return val;
469
470 if (i915.invert_brightness > 0 ||
471 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
472 return panel->backlight.max - val;
473 }
474
475 return val;
476 }
477
478 static u32 lpt_get_backlight(struct intel_connector *connector)
479 {
480 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
481
482 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
483 }
484
485 static u32 pch_get_backlight(struct intel_connector *connector)
486 {
487 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
488
489 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
490 }
491
492 static u32 i9xx_get_backlight(struct intel_connector *connector)
493 {
494 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
495 struct intel_panel *panel = &connector->panel;
496 u32 val;
497
498 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
499 if (INTEL_INFO(dev_priv)->gen < 4)
500 val >>= 1;
501
502 if (panel->backlight.combination_mode) {
503 u8 lbpc;
504
505 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
506 val *= lbpc;
507 }
508
509 return val;
510 }
511
512 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
513 {
514 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
515 return 0;
516
517 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
518 }
519
520 static u32 vlv_get_backlight(struct intel_connector *connector)
521 {
522 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
523 enum pipe pipe = intel_get_pipe_from_connector(connector);
524
525 return _vlv_get_backlight(dev_priv, pipe);
526 }
527
528 static u32 bxt_get_backlight(struct intel_connector *connector)
529 {
530 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
531 struct intel_panel *panel = &connector->panel;
532
533 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
534 }
535
536 static u32 pwm_get_backlight(struct intel_connector *connector)
537 {
538 struct intel_panel *panel = &connector->panel;
539 int duty_ns;
540
541 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
542 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
543 }
544
545 static u32 intel_panel_get_backlight(struct intel_connector *connector)
546 {
547 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
548 struct intel_panel *panel = &connector->panel;
549 u32 val = 0;
550
551 mutex_lock(&dev_priv->backlight_lock);
552
553 if (panel->backlight.enabled) {
554 val = panel->backlight.get(connector);
555 val = intel_panel_compute_brightness(connector, val);
556 }
557
558 mutex_unlock(&dev_priv->backlight_lock);
559
560 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
561 return val;
562 }
563
564 static void lpt_set_backlight(struct intel_connector *connector, u32 level)
565 {
566 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
567 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
568 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
569 }
570
571 static void pch_set_backlight(struct intel_connector *connector, u32 level)
572 {
573 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
574 u32 tmp;
575
576 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
577 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
578 }
579
580 static void i9xx_set_backlight(struct intel_connector *connector, u32 level)
581 {
582 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
583 struct intel_panel *panel = &connector->panel;
584 u32 tmp, mask;
585
586 WARN_ON(panel->backlight.max == 0);
587
588 if (panel->backlight.combination_mode) {
589 u8 lbpc;
590
591 lbpc = level * 0xfe / panel->backlight.max + 1;
592 level /= lbpc;
593 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
594 }
595
596 if (IS_GEN4(dev_priv)) {
597 mask = BACKLIGHT_DUTY_CYCLE_MASK;
598 } else {
599 level <<= 1;
600 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
601 }
602
603 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
604 I915_WRITE(BLC_PWM_CTL, tmp | level);
605 }
606
607 static void vlv_set_backlight(struct intel_connector *connector, u32 level)
608 {
609 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
610 enum pipe pipe = intel_get_pipe_from_connector(connector);
611 u32 tmp;
612
613 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
614 return;
615
616 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
617 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
618 }
619
620 static void bxt_set_backlight(struct intel_connector *connector, u32 level)
621 {
622 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
623 struct intel_panel *panel = &connector->panel;
624
625 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
626 }
627
628 static void pwm_set_backlight(struct intel_connector *connector, u32 level)
629 {
630 struct intel_panel *panel = &connector->panel;
631 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
632
633 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
634 }
635
636 static void
637 intel_panel_actually_set_backlight(struct intel_connector *connector, u32 level)
638 {
639 struct intel_panel *panel = &connector->panel;
640
641 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
642
643 level = intel_panel_compute_brightness(connector, level);
644 panel->backlight.set(connector, level);
645 }
646
647 /* set backlight brightness to level in range [0..max], scaling wrt hw min */
648 static void intel_panel_set_backlight(struct intel_connector *connector,
649 u32 user_level, u32 user_max)
650 {
651 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
652 struct intel_panel *panel = &connector->panel;
653 u32 hw_level;
654
655 if (!panel->backlight.present)
656 return;
657
658 mutex_lock(&dev_priv->backlight_lock);
659
660 WARN_ON(panel->backlight.max == 0);
661
662 hw_level = scale_user_to_hw(connector, user_level, user_max);
663 panel->backlight.level = hw_level;
664
665 if (panel->backlight.enabled)
666 intel_panel_actually_set_backlight(connector, hw_level);
667
668 mutex_unlock(&dev_priv->backlight_lock);
669 }
670
671 /* set backlight brightness to level in range [0..max], assuming hw min is
672 * respected.
673 */
674 void intel_panel_set_backlight_acpi(struct intel_connector *connector,
675 u32 user_level, u32 user_max)
676 {
677 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
678 struct intel_panel *panel = &connector->panel;
679 enum pipe pipe = intel_get_pipe_from_connector(connector);
680 u32 hw_level;
681
682 /*
683 * INVALID_PIPE may occur during driver init because
684 * connection_mutex isn't held across the entire backlight
685 * setup + modeset readout, and the BIOS can issue the
686 * requests at any time.
687 */
688 if (!panel->backlight.present || pipe == INVALID_PIPE)
689 return;
690
691 mutex_lock(&dev_priv->backlight_lock);
692
693 WARN_ON(panel->backlight.max == 0);
694
695 hw_level = clamp_user_to_hw(connector, user_level, user_max);
696 panel->backlight.level = hw_level;
697
698 if (panel->backlight.device)
699 panel->backlight.device->props.brightness =
700 scale_hw_to_user(connector,
701 panel->backlight.level,
702 panel->backlight.device->props.max_brightness);
703
704 if (panel->backlight.enabled)
705 intel_panel_actually_set_backlight(connector, hw_level);
706
707 mutex_unlock(&dev_priv->backlight_lock);
708 }
709
710 static void lpt_disable_backlight(struct intel_connector *connector)
711 {
712 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
713 u32 tmp;
714
715 intel_panel_actually_set_backlight(connector, 0);
716
717 /*
718 * Although we don't support or enable CPU PWM with LPT/SPT based
719 * systems, it may have been enabled prior to loading the
720 * driver. Disable to avoid warnings on LCPLL disable.
721 *
722 * This needs rework if we need to add support for CPU PWM on PCH split
723 * platforms.
724 */
725 tmp = I915_READ(BLC_PWM_CPU_CTL2);
726 if (tmp & BLM_PWM_ENABLE) {
727 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
728 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
729 }
730
731 tmp = I915_READ(BLC_PWM_PCH_CTL1);
732 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
733 }
734
735 static void pch_disable_backlight(struct intel_connector *connector)
736 {
737 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
738 u32 tmp;
739
740 intel_panel_actually_set_backlight(connector, 0);
741
742 tmp = I915_READ(BLC_PWM_CPU_CTL2);
743 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
744
745 tmp = I915_READ(BLC_PWM_PCH_CTL1);
746 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
747 }
748
749 static void i9xx_disable_backlight(struct intel_connector *connector)
750 {
751 intel_panel_actually_set_backlight(connector, 0);
752 }
753
754 static void i965_disable_backlight(struct intel_connector *connector)
755 {
756 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
757 u32 tmp;
758
759 intel_panel_actually_set_backlight(connector, 0);
760
761 tmp = I915_READ(BLC_PWM_CTL2);
762 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
763 }
764
765 static void vlv_disable_backlight(struct intel_connector *connector)
766 {
767 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
768 enum pipe pipe = intel_get_pipe_from_connector(connector);
769 u32 tmp;
770
771 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
772 return;
773
774 intel_panel_actually_set_backlight(connector, 0);
775
776 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
777 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
778 }
779
780 static void bxt_disable_backlight(struct intel_connector *connector)
781 {
782 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
783 struct intel_panel *panel = &connector->panel;
784 u32 tmp, val;
785
786 intel_panel_actually_set_backlight(connector, 0);
787
788 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
789 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
790 tmp & ~BXT_BLC_PWM_ENABLE);
791
792 if (panel->backlight.controller == 1) {
793 val = I915_READ(UTIL_PIN_CTL);
794 val &= ~UTIL_PIN_ENABLE;
795 I915_WRITE(UTIL_PIN_CTL, val);
796 }
797 }
798
799 static void pwm_disable_backlight(struct intel_connector *connector)
800 {
801 struct intel_panel *panel = &connector->panel;
802
803 /* Disable the backlight */
804 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
805 usleep_range(2000, 3000);
806 pwm_disable(panel->backlight.pwm);
807 }
808
809 void intel_panel_disable_backlight(struct intel_connector *connector)
810 {
811 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
812 struct intel_panel *panel = &connector->panel;
813
814 if (!panel->backlight.present)
815 return;
816
817 /*
818 * Do not disable backlight on the vga_switcheroo path. When switching
819 * away from i915, the other client may depend on i915 to handle the
820 * backlight. This will leave the backlight on unnecessarily when
821 * another client is not activated.
822 */
823 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
824 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
825 return;
826 }
827
828 mutex_lock(&dev_priv->backlight_lock);
829
830 if (panel->backlight.device)
831 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
832 panel->backlight.enabled = false;
833 panel->backlight.disable(connector);
834
835 mutex_unlock(&dev_priv->backlight_lock);
836 }
837
838 static void lpt_enable_backlight(struct intel_connector *connector)
839 {
840 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
841 struct intel_panel *panel = &connector->panel;
842 u32 pch_ctl1, pch_ctl2, schicken;
843
844 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
845 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
846 DRM_DEBUG_KMS("pch backlight already enabled\n");
847 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
848 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
849 }
850
851 if (HAS_PCH_LPT(dev_priv)) {
852 schicken = I915_READ(SOUTH_CHICKEN2);
853 if (panel->backlight.alternate_pwm_increment)
854 schicken |= LPT_PWM_GRANULARITY;
855 else
856 schicken &= ~LPT_PWM_GRANULARITY;
857 I915_WRITE(SOUTH_CHICKEN2, schicken);
858 } else {
859 schicken = I915_READ(SOUTH_CHICKEN1);
860 if (panel->backlight.alternate_pwm_increment)
861 schicken |= SPT_PWM_GRANULARITY;
862 else
863 schicken &= ~SPT_PWM_GRANULARITY;
864 I915_WRITE(SOUTH_CHICKEN1, schicken);
865 }
866
867 pch_ctl2 = panel->backlight.max << 16;
868 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
869
870 pch_ctl1 = 0;
871 if (panel->backlight.active_low_pwm)
872 pch_ctl1 |= BLM_PCH_POLARITY;
873
874 /* After LPT, override is the default. */
875 if (HAS_PCH_LPT(dev_priv))
876 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
877
878 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
879 POSTING_READ(BLC_PWM_PCH_CTL1);
880 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
881
882 /* This won't stick until the above enable. */
883 intel_panel_actually_set_backlight(connector, panel->backlight.level);
884 }
885
886 static void pch_enable_backlight(struct intel_connector *connector)
887 {
888 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
889 struct intel_panel *panel = &connector->panel;
890 enum pipe pipe = intel_get_pipe_from_connector(connector);
891 enum transcoder cpu_transcoder =
892 intel_pipe_to_cpu_transcoder(dev_priv, pipe);
893 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
894
895 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
896 if (cpu_ctl2 & BLM_PWM_ENABLE) {
897 DRM_DEBUG_KMS("cpu backlight already enabled\n");
898 cpu_ctl2 &= ~BLM_PWM_ENABLE;
899 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
900 }
901
902 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
903 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
904 DRM_DEBUG_KMS("pch backlight already enabled\n");
905 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
906 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
907 }
908
909 if (cpu_transcoder == TRANSCODER_EDP)
910 cpu_ctl2 = BLM_TRANSCODER_EDP;
911 else
912 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
913 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
914 POSTING_READ(BLC_PWM_CPU_CTL2);
915 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
916
917 /* This won't stick until the above enable. */
918 intel_panel_actually_set_backlight(connector, panel->backlight.level);
919
920 pch_ctl2 = panel->backlight.max << 16;
921 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
922
923 pch_ctl1 = 0;
924 if (panel->backlight.active_low_pwm)
925 pch_ctl1 |= BLM_PCH_POLARITY;
926
927 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
928 POSTING_READ(BLC_PWM_PCH_CTL1);
929 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
930 }
931
932 static void i9xx_enable_backlight(struct intel_connector *connector)
933 {
934 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
935 struct intel_panel *panel = &connector->panel;
936 u32 ctl, freq;
937
938 ctl = I915_READ(BLC_PWM_CTL);
939 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
940 DRM_DEBUG_KMS("backlight already enabled\n");
941 I915_WRITE(BLC_PWM_CTL, 0);
942 }
943
944 freq = panel->backlight.max;
945 if (panel->backlight.combination_mode)
946 freq /= 0xff;
947
948 ctl = freq << 17;
949 if (panel->backlight.combination_mode)
950 ctl |= BLM_LEGACY_MODE;
951 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
952 ctl |= BLM_POLARITY_PNV;
953
954 I915_WRITE(BLC_PWM_CTL, ctl);
955 POSTING_READ(BLC_PWM_CTL);
956
957 /* XXX: combine this into above write? */
958 intel_panel_actually_set_backlight(connector, panel->backlight.level);
959
960 /*
961 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
962 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
963 * that has backlight.
964 */
965 if (IS_GEN2(dev_priv))
966 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
967 }
968
969 static void i965_enable_backlight(struct intel_connector *connector)
970 {
971 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
972 struct intel_panel *panel = &connector->panel;
973 enum pipe pipe = intel_get_pipe_from_connector(connector);
974 u32 ctl, ctl2, freq;
975
976 ctl2 = I915_READ(BLC_PWM_CTL2);
977 if (ctl2 & BLM_PWM_ENABLE) {
978 DRM_DEBUG_KMS("backlight already enabled\n");
979 ctl2 &= ~BLM_PWM_ENABLE;
980 I915_WRITE(BLC_PWM_CTL2, ctl2);
981 }
982
983 freq = panel->backlight.max;
984 if (panel->backlight.combination_mode)
985 freq /= 0xff;
986
987 ctl = freq << 16;
988 I915_WRITE(BLC_PWM_CTL, ctl);
989
990 ctl2 = BLM_PIPE(pipe);
991 if (panel->backlight.combination_mode)
992 ctl2 |= BLM_COMBINATION_MODE;
993 if (panel->backlight.active_low_pwm)
994 ctl2 |= BLM_POLARITY_I965;
995 I915_WRITE(BLC_PWM_CTL2, ctl2);
996 POSTING_READ(BLC_PWM_CTL2);
997 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
998
999 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1000 }
1001
1002 static void vlv_enable_backlight(struct intel_connector *connector)
1003 {
1004 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1005 struct intel_panel *panel = &connector->panel;
1006 enum pipe pipe = intel_get_pipe_from_connector(connector);
1007 u32 ctl, ctl2;
1008
1009 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1010 return;
1011
1012 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1013 if (ctl2 & BLM_PWM_ENABLE) {
1014 DRM_DEBUG_KMS("backlight already enabled\n");
1015 ctl2 &= ~BLM_PWM_ENABLE;
1016 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1017 }
1018
1019 ctl = panel->backlight.max << 16;
1020 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
1021
1022 /* XXX: combine this into above write? */
1023 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1024
1025 ctl2 = 0;
1026 if (panel->backlight.active_low_pwm)
1027 ctl2 |= BLM_POLARITY_I965;
1028 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
1029 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
1030 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
1031 }
1032
1033 static void bxt_enable_backlight(struct intel_connector *connector)
1034 {
1035 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1036 struct intel_panel *panel = &connector->panel;
1037 enum pipe pipe = intel_get_pipe_from_connector(connector);
1038 u32 pwm_ctl, val;
1039
1040 /* Controller 1 uses the utility pin. */
1041 if (panel->backlight.controller == 1) {
1042 val = I915_READ(UTIL_PIN_CTL);
1043 if (val & UTIL_PIN_ENABLE) {
1044 DRM_DEBUG_KMS("util pin already enabled\n");
1045 val &= ~UTIL_PIN_ENABLE;
1046 I915_WRITE(UTIL_PIN_CTL, val);
1047 }
1048
1049 val = 0;
1050 if (panel->backlight.util_pin_active_low)
1051 val |= UTIL_PIN_POLARITY;
1052 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1053 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1054 }
1055
1056 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1057 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1058 DRM_DEBUG_KMS("backlight already enabled\n");
1059 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1060 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1061 pwm_ctl);
1062 }
1063
1064 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1065 panel->backlight.max);
1066
1067 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1068
1069 pwm_ctl = 0;
1070 if (panel->backlight.active_low_pwm)
1071 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1072
1073 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1074 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1075 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1076 pwm_ctl | BXT_BLC_PWM_ENABLE);
1077 }
1078
1079 static void pwm_enable_backlight(struct intel_connector *connector)
1080 {
1081 struct intel_panel *panel = &connector->panel;
1082
1083 pwm_enable(panel->backlight.pwm);
1084 intel_panel_actually_set_backlight(connector, panel->backlight.level);
1085 }
1086
1087 void intel_panel_enable_backlight(struct intel_connector *connector)
1088 {
1089 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1090 struct intel_panel *panel = &connector->panel;
1091 enum pipe pipe = intel_get_pipe_from_connector(connector);
1092
1093 if (!panel->backlight.present)
1094 return;
1095
1096 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1097
1098 mutex_lock(&dev_priv->backlight_lock);
1099
1100 WARN_ON(panel->backlight.max == 0);
1101
1102 if (panel->backlight.level <= panel->backlight.min) {
1103 panel->backlight.level = panel->backlight.max;
1104 if (panel->backlight.device)
1105 panel->backlight.device->props.brightness =
1106 scale_hw_to_user(connector,
1107 panel->backlight.level,
1108 panel->backlight.device->props.max_brightness);
1109 }
1110
1111 panel->backlight.enable(connector);
1112 panel->backlight.enabled = true;
1113 if (panel->backlight.device)
1114 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1115
1116 mutex_unlock(&dev_priv->backlight_lock);
1117 }
1118
1119 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1120 static int intel_backlight_device_update_status(struct backlight_device *bd)
1121 {
1122 struct intel_connector *connector = bl_get_data(bd);
1123 struct intel_panel *panel = &connector->panel;
1124 struct drm_device *dev = connector->base.dev;
1125
1126 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1127 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1128 bd->props.brightness, bd->props.max_brightness);
1129 intel_panel_set_backlight(connector, bd->props.brightness,
1130 bd->props.max_brightness);
1131
1132 /*
1133 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1134 * backlight class device does not make it easy to to differentiate
1135 * between callbacks for brightness and bl_power, so our backlight_power
1136 * callback needs to take this into account.
1137 */
1138 if (panel->backlight.enabled) {
1139 if (panel->backlight.power) {
1140 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1141 bd->props.brightness != 0;
1142 panel->backlight.power(connector, enable);
1143 }
1144 } else {
1145 bd->props.power = FB_BLANK_POWERDOWN;
1146 }
1147
1148 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1149 return 0;
1150 }
1151
1152 static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1153 {
1154 struct intel_connector *connector = bl_get_data(bd);
1155 struct drm_device *dev = connector->base.dev;
1156 struct drm_i915_private *dev_priv = to_i915(dev);
1157 u32 hw_level;
1158 int ret;
1159
1160 intel_runtime_pm_get(dev_priv);
1161 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1162
1163 hw_level = intel_panel_get_backlight(connector);
1164 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1165
1166 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1167 intel_runtime_pm_put(dev_priv);
1168
1169 return ret;
1170 }
1171
1172 static const struct backlight_ops intel_backlight_device_ops = {
1173 .update_status = intel_backlight_device_update_status,
1174 .get_brightness = intel_backlight_device_get_brightness,
1175 };
1176
1177 int intel_backlight_device_register(struct intel_connector *connector)
1178 {
1179 struct intel_panel *panel = &connector->panel;
1180 struct backlight_properties props;
1181
1182 if (WARN_ON(panel->backlight.device))
1183 return -ENODEV;
1184
1185 if (!panel->backlight.present)
1186 return 0;
1187
1188 WARN_ON(panel->backlight.max == 0);
1189
1190 memset(&props, 0, sizeof(props));
1191 props.type = BACKLIGHT_RAW;
1192
1193 /*
1194 * Note: Everything should work even if the backlight device max
1195 * presented to the userspace is arbitrarily chosen.
1196 */
1197 props.max_brightness = panel->backlight.max;
1198 props.brightness = scale_hw_to_user(connector,
1199 panel->backlight.level,
1200 props.max_brightness);
1201
1202 if (panel->backlight.enabled)
1203 props.power = FB_BLANK_UNBLANK;
1204 else
1205 props.power = FB_BLANK_POWERDOWN;
1206
1207 /*
1208 * Note: using the same name independent of the connector prevents
1209 * registration of multiple backlight devices in the driver.
1210 */
1211 panel->backlight.device =
1212 backlight_device_register("intel_backlight",
1213 connector->base.kdev,
1214 connector,
1215 &intel_backlight_device_ops, &props);
1216
1217 if (IS_ERR(panel->backlight.device)) {
1218 DRM_ERROR("Failed to register backlight: %ld\n",
1219 PTR_ERR(panel->backlight.device));
1220 panel->backlight.device = NULL;
1221 return -ENODEV;
1222 }
1223
1224 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1225 connector->base.name);
1226
1227 return 0;
1228 }
1229
1230 void intel_backlight_device_unregister(struct intel_connector *connector)
1231 {
1232 struct intel_panel *panel = &connector->panel;
1233
1234 if (panel->backlight.device) {
1235 backlight_device_unregister(panel->backlight.device);
1236 panel->backlight.device = NULL;
1237 }
1238 }
1239 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1240
1241 /*
1242 * BXT: PWM clock frequency = 19.2 MHz.
1243 */
1244 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1245 {
1246 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1247 }
1248
1249 /*
1250 * SPT: This value represents the period of the PWM stream in clock periods
1251 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1252 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1253 */
1254 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1255 {
1256 struct intel_panel *panel = &connector->panel;
1257 u32 mul;
1258
1259 if (panel->backlight.alternate_pwm_increment)
1260 mul = 128;
1261 else
1262 mul = 16;
1263
1264 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1265 }
1266
1267 /*
1268 * LPT: This value represents the period of the PWM stream in clock periods
1269 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1270 * LPT SOUTH_CHICKEN2 register bit 5).
1271 */
1272 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1273 {
1274 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1275 struct intel_panel *panel = &connector->panel;
1276 u32 mul, clock;
1277
1278 if (panel->backlight.alternate_pwm_increment)
1279 mul = 16;
1280 else
1281 mul = 128;
1282
1283 if (HAS_PCH_LPT_H(dev_priv))
1284 clock = MHz(135); /* LPT:H */
1285 else
1286 clock = MHz(24); /* LPT:LP */
1287
1288 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1289 }
1290
1291 /*
1292 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1293 * display raw clocks multiplied by 128.
1294 */
1295 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1296 {
1297 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1298
1299 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1300 }
1301
1302 /*
1303 * Gen2: This field determines the number of time base events (display core
1304 * clock frequency/32) in total for a complete cycle of modulated backlight
1305 * control.
1306 *
1307 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1308 * divided by 32.
1309 */
1310 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1311 {
1312 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1313 int clock;
1314
1315 if (IS_PINEVIEW(dev_priv))
1316 clock = KHz(dev_priv->rawclk_freq);
1317 else
1318 clock = KHz(dev_priv->cdclk.hw.cdclk);
1319
1320 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1321 }
1322
1323 /*
1324 * Gen4: This value represents the period of the PWM stream in display core
1325 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1326 *
1327 */
1328 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1329 {
1330 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1331 int clock;
1332
1333 if (IS_G4X(dev_priv))
1334 clock = KHz(dev_priv->rawclk_freq);
1335 else
1336 clock = KHz(dev_priv->cdclk.hw.cdclk);
1337
1338 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1339 }
1340
1341 /*
1342 * VLV: This value represents the period of the PWM stream in display core
1343 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1344 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1345 */
1346 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1347 {
1348 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1349 int mul, clock;
1350
1351 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1352 if (IS_CHERRYVIEW(dev_priv))
1353 clock = KHz(19200);
1354 else
1355 clock = MHz(25);
1356 mul = 16;
1357 } else {
1358 clock = KHz(dev_priv->rawclk_freq);
1359 mul = 128;
1360 }
1361
1362 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1363 }
1364
1365 static u32 get_backlight_max_vbt(struct intel_connector *connector)
1366 {
1367 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1368 struct intel_panel *panel = &connector->panel;
1369 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1370 u32 pwm;
1371
1372 if (!panel->backlight.hz_to_pwm) {
1373 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1374 return 0;
1375 }
1376
1377 if (pwm_freq_hz) {
1378 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1379 pwm_freq_hz);
1380 } else {
1381 pwm_freq_hz = 200;
1382 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1383 pwm_freq_hz);
1384 }
1385
1386 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1387 if (!pwm) {
1388 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1389 return 0;
1390 }
1391
1392 return pwm;
1393 }
1394
1395 /*
1396 * Note: The setup hooks can't assume pipe is set!
1397 */
1398 static u32 get_backlight_min_vbt(struct intel_connector *connector)
1399 {
1400 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1401 struct intel_panel *panel = &connector->panel;
1402 int min;
1403
1404 WARN_ON(panel->backlight.max == 0);
1405
1406 /*
1407 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1408 * to problems. There are such machines out there. Either our
1409 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1410 * against this by letting the minimum be at most (arbitrarily chosen)
1411 * 25% of the max.
1412 */
1413 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1414 if (min != dev_priv->vbt.backlight.min_brightness) {
1415 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1416 dev_priv->vbt.backlight.min_brightness, min);
1417 }
1418
1419 /* vbt value is a coefficient in range [0..255] */
1420 return scale(min, 0, 255, 0, panel->backlight.max);
1421 }
1422
1423 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1424 {
1425 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1426 struct intel_panel *panel = &connector->panel;
1427 u32 pch_ctl1, pch_ctl2, val;
1428 bool alt;
1429
1430 if (HAS_PCH_LPT(dev_priv))
1431 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1432 else
1433 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1434 panel->backlight.alternate_pwm_increment = alt;
1435
1436 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1437 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1438
1439 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1440 panel->backlight.max = pch_ctl2 >> 16;
1441
1442 if (!panel->backlight.max)
1443 panel->backlight.max = get_backlight_max_vbt(connector);
1444
1445 if (!panel->backlight.max)
1446 return -ENODEV;
1447
1448 panel->backlight.min = get_backlight_min_vbt(connector);
1449
1450 val = lpt_get_backlight(connector);
1451 val = intel_panel_compute_brightness(connector, val);
1452 panel->backlight.level = clamp(val, panel->backlight.min,
1453 panel->backlight.max);
1454
1455 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1456
1457 return 0;
1458 }
1459
1460 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1461 {
1462 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1463 struct intel_panel *panel = &connector->panel;
1464 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1465
1466 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1467 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1468
1469 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1470 panel->backlight.max = pch_ctl2 >> 16;
1471
1472 if (!panel->backlight.max)
1473 panel->backlight.max = get_backlight_max_vbt(connector);
1474
1475 if (!panel->backlight.max)
1476 return -ENODEV;
1477
1478 panel->backlight.min = get_backlight_min_vbt(connector);
1479
1480 val = pch_get_backlight(connector);
1481 val = intel_panel_compute_brightness(connector, val);
1482 panel->backlight.level = clamp(val, panel->backlight.min,
1483 panel->backlight.max);
1484
1485 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1486 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1487 (pch_ctl1 & BLM_PCH_PWM_ENABLE);
1488
1489 return 0;
1490 }
1491
1492 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1493 {
1494 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1495 struct intel_panel *panel = &connector->panel;
1496 u32 ctl, val;
1497
1498 ctl = I915_READ(BLC_PWM_CTL);
1499
1500 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1501 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1502
1503 if (IS_PINEVIEW(dev_priv))
1504 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1505
1506 panel->backlight.max = ctl >> 17;
1507
1508 if (!panel->backlight.max) {
1509 panel->backlight.max = get_backlight_max_vbt(connector);
1510 panel->backlight.max >>= 1;
1511 }
1512
1513 if (!panel->backlight.max)
1514 return -ENODEV;
1515
1516 if (panel->backlight.combination_mode)
1517 panel->backlight.max *= 0xff;
1518
1519 panel->backlight.min = get_backlight_min_vbt(connector);
1520
1521 val = i9xx_get_backlight(connector);
1522 val = intel_panel_compute_brightness(connector, val);
1523 panel->backlight.level = clamp(val, panel->backlight.min,
1524 panel->backlight.max);
1525
1526 panel->backlight.enabled = val != 0;
1527
1528 return 0;
1529 }
1530
1531 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1532 {
1533 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1534 struct intel_panel *panel = &connector->panel;
1535 u32 ctl, ctl2, val;
1536
1537 ctl2 = I915_READ(BLC_PWM_CTL2);
1538 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1539 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1540
1541 ctl = I915_READ(BLC_PWM_CTL);
1542 panel->backlight.max = ctl >> 16;
1543
1544 if (!panel->backlight.max)
1545 panel->backlight.max = get_backlight_max_vbt(connector);
1546
1547 if (!panel->backlight.max)
1548 return -ENODEV;
1549
1550 if (panel->backlight.combination_mode)
1551 panel->backlight.max *= 0xff;
1552
1553 panel->backlight.min = get_backlight_min_vbt(connector);
1554
1555 val = i9xx_get_backlight(connector);
1556 val = intel_panel_compute_brightness(connector, val);
1557 panel->backlight.level = clamp(val, panel->backlight.min,
1558 panel->backlight.max);
1559
1560 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1561
1562 return 0;
1563 }
1564
1565 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1566 {
1567 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1568 struct intel_panel *panel = &connector->panel;
1569 u32 ctl, ctl2, val;
1570
1571 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1572 return -ENODEV;
1573
1574 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1575 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1576
1577 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1578 panel->backlight.max = ctl >> 16;
1579
1580 if (!panel->backlight.max)
1581 panel->backlight.max = get_backlight_max_vbt(connector);
1582
1583 if (!panel->backlight.max)
1584 return -ENODEV;
1585
1586 panel->backlight.min = get_backlight_min_vbt(connector);
1587
1588 val = _vlv_get_backlight(dev_priv, pipe);
1589 val = intel_panel_compute_brightness(connector, val);
1590 panel->backlight.level = clamp(val, panel->backlight.min,
1591 panel->backlight.max);
1592
1593 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1594
1595 return 0;
1596 }
1597
1598 static int
1599 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1600 {
1601 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1602 struct intel_panel *panel = &connector->panel;
1603 u32 pwm_ctl, val;
1604
1605 panel->backlight.controller = dev_priv->vbt.backlight.controller;
1606
1607 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1608
1609 /* Controller 1 uses the utility pin. */
1610 if (panel->backlight.controller == 1) {
1611 val = I915_READ(UTIL_PIN_CTL);
1612 panel->backlight.util_pin_active_low =
1613 val & UTIL_PIN_POLARITY;
1614 }
1615
1616 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1617 panel->backlight.max =
1618 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1619
1620 if (!panel->backlight.max)
1621 panel->backlight.max = get_backlight_max_vbt(connector);
1622
1623 if (!panel->backlight.max)
1624 return -ENODEV;
1625
1626 val = bxt_get_backlight(connector);
1627 val = intel_panel_compute_brightness(connector, val);
1628 panel->backlight.level = clamp(val, panel->backlight.min,
1629 panel->backlight.max);
1630
1631 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1632
1633 return 0;
1634 }
1635
1636 static int pwm_setup_backlight(struct intel_connector *connector,
1637 enum pipe pipe)
1638 {
1639 struct drm_device *dev = connector->base.dev;
1640 struct intel_panel *panel = &connector->panel;
1641 int retval;
1642
1643 /* Get the PWM chip for backlight control */
1644 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1645 if (IS_ERR(panel->backlight.pwm)) {
1646 DRM_ERROR("Failed to own the pwm chip\n");
1647 panel->backlight.pwm = NULL;
1648 return -ENODEV;
1649 }
1650
1651 /*
1652 * FIXME: pwm_apply_args() should be removed when switching to
1653 * the atomic PWM API.
1654 */
1655 pwm_apply_args(panel->backlight.pwm);
1656
1657 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1658 CRC_PMIC_PWM_PERIOD_NS);
1659 if (retval < 0) {
1660 DRM_ERROR("Failed to configure the pwm chip\n");
1661 pwm_put(panel->backlight.pwm);
1662 panel->backlight.pwm = NULL;
1663 return retval;
1664 }
1665
1666 panel->backlight.min = 0; /* 0% */
1667 panel->backlight.max = 100; /* 100% */
1668 panel->backlight.level = DIV_ROUND_UP(
1669 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1670 CRC_PMIC_PWM_PERIOD_NS);
1671 panel->backlight.enabled = panel->backlight.level != 0;
1672
1673 return 0;
1674 }
1675
1676 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1677 {
1678 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1679 struct intel_connector *intel_connector = to_intel_connector(connector);
1680 struct intel_panel *panel = &intel_connector->panel;
1681 int ret;
1682
1683 if (!dev_priv->vbt.backlight.present) {
1684 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1685 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1686 } else {
1687 DRM_DEBUG_KMS("no backlight present per VBT\n");
1688 return 0;
1689 }
1690 }
1691
1692 /* ensure intel_panel has been initialized first */
1693 if (WARN_ON(!panel->backlight.setup))
1694 return -ENODEV;
1695
1696 /* set level and max in panel struct */
1697 mutex_lock(&dev_priv->backlight_lock);
1698 ret = panel->backlight.setup(intel_connector, pipe);
1699 mutex_unlock(&dev_priv->backlight_lock);
1700
1701 if (ret) {
1702 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1703 connector->name);
1704 return ret;
1705 }
1706
1707 panel->backlight.present = true;
1708
1709 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1710 connector->name,
1711 enableddisabled(panel->backlight.enabled),
1712 panel->backlight.level, panel->backlight.max);
1713
1714 return 0;
1715 }
1716
1717 void intel_panel_destroy_backlight(struct drm_connector *connector)
1718 {
1719 struct intel_connector *intel_connector = to_intel_connector(connector);
1720 struct intel_panel *panel = &intel_connector->panel;
1721
1722 /* dispose of the pwm */
1723 if (panel->backlight.pwm)
1724 pwm_put(panel->backlight.pwm);
1725
1726 panel->backlight.present = false;
1727 }
1728
1729 /* Set up chip specific backlight functions */
1730 static void
1731 intel_panel_init_backlight_funcs(struct intel_panel *panel)
1732 {
1733 struct intel_connector *connector =
1734 container_of(panel, struct intel_connector, panel);
1735 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1736
1737 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
1738 intel_dp_aux_init_backlight_funcs(connector) == 0)
1739 return;
1740
1741 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
1742 intel_dsi_dcs_init_backlight_funcs(connector) == 0)
1743 return;
1744
1745 if (IS_GEN9_LP(dev_priv)) {
1746 panel->backlight.setup = bxt_setup_backlight;
1747 panel->backlight.enable = bxt_enable_backlight;
1748 panel->backlight.disable = bxt_disable_backlight;
1749 panel->backlight.set = bxt_set_backlight;
1750 panel->backlight.get = bxt_get_backlight;
1751 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1752 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
1753 HAS_PCH_KBP(dev_priv)) {
1754 panel->backlight.setup = lpt_setup_backlight;
1755 panel->backlight.enable = lpt_enable_backlight;
1756 panel->backlight.disable = lpt_disable_backlight;
1757 panel->backlight.set = lpt_set_backlight;
1758 panel->backlight.get = lpt_get_backlight;
1759 if (HAS_PCH_LPT(dev_priv))
1760 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1761 else
1762 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1763 } else if (HAS_PCH_SPLIT(dev_priv)) {
1764 panel->backlight.setup = pch_setup_backlight;
1765 panel->backlight.enable = pch_enable_backlight;
1766 panel->backlight.disable = pch_disable_backlight;
1767 panel->backlight.set = pch_set_backlight;
1768 panel->backlight.get = pch_get_backlight;
1769 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1770 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1771 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
1772 panel->backlight.setup = pwm_setup_backlight;
1773 panel->backlight.enable = pwm_enable_backlight;
1774 panel->backlight.disable = pwm_disable_backlight;
1775 panel->backlight.set = pwm_set_backlight;
1776 panel->backlight.get = pwm_get_backlight;
1777 } else {
1778 panel->backlight.setup = vlv_setup_backlight;
1779 panel->backlight.enable = vlv_enable_backlight;
1780 panel->backlight.disable = vlv_disable_backlight;
1781 panel->backlight.set = vlv_set_backlight;
1782 panel->backlight.get = vlv_get_backlight;
1783 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1784 }
1785 } else if (IS_GEN4(dev_priv)) {
1786 panel->backlight.setup = i965_setup_backlight;
1787 panel->backlight.enable = i965_enable_backlight;
1788 panel->backlight.disable = i965_disable_backlight;
1789 panel->backlight.set = i9xx_set_backlight;
1790 panel->backlight.get = i9xx_get_backlight;
1791 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1792 } else {
1793 panel->backlight.setup = i9xx_setup_backlight;
1794 panel->backlight.enable = i9xx_enable_backlight;
1795 panel->backlight.disable = i9xx_disable_backlight;
1796 panel->backlight.set = i9xx_set_backlight;
1797 panel->backlight.get = i9xx_get_backlight;
1798 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1799 }
1800 }
1801
1802 int intel_panel_init(struct intel_panel *panel,
1803 struct drm_display_mode *fixed_mode,
1804 struct drm_display_mode *downclock_mode)
1805 {
1806 intel_panel_init_backlight_funcs(panel);
1807
1808 panel->fixed_mode = fixed_mode;
1809 panel->downclock_mode = downclock_mode;
1810
1811 return 0;
1812 }
1813
1814 void intel_panel_fini(struct intel_panel *panel)
1815 {
1816 struct intel_connector *intel_connector =
1817 container_of(panel, struct intel_connector, panel);
1818
1819 if (panel->fixed_mode)
1820 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1821
1822 if (panel->downclock_mode)
1823 drm_mode_destroy(intel_connector->base.dev,
1824 panel->downclock_mode);
1825 }
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