?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Linux 4.19-rc7
[linux-2.6/btrfs-unstable.git] / drivers / gpu / drm / i915 / intel_panel.c
blob4a9f139e7b7383c8f244bac833679c3b5302214b
1 /*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
31 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
33 #include <linux/kernel.h>
34 #include <linux/moduleparam.h>
35 #include <linux/pwm.h>
36 #include "intel_drv.h"
37
38 #define CRC_PMIC_PWM_PERIOD_NS 21333
39
40 void
41 intel_fixed_panel_mode(const struct drm_display_mode *fixed_mode,
42 struct drm_display_mode *adjusted_mode)
43 {
44 drm_mode_copy(adjusted_mode, fixed_mode);
45
46 drm_mode_set_crtcinfo(adjusted_mode, 0);
47 }
48
49 /**
50 * intel_find_panel_downclock - find the reduced downclock for LVDS in EDID
51 * @dev_priv: i915 device instance
52 * @fixed_mode : panel native mode
53 * @connector: LVDS/eDP connector
54 *
55 * Return downclock_avail
56 * Find the reduced downclock for LVDS/eDP in EDID.
57 */
58 struct drm_display_mode *
59 intel_find_panel_downclock(struct drm_i915_private *dev_priv,
60 struct drm_display_mode *fixed_mode,
61 struct drm_connector *connector)
62 {
63 struct drm_display_mode *scan, *tmp_mode;
64 int temp_downclock;
65
66 temp_downclock = fixed_mode->clock;
67 tmp_mode = NULL;
68
69 list_for_each_entry(scan, &connector->probed_modes, head) {
70 /*
71 * If one mode has the same resolution with the fixed_panel
72 * mode while they have the different refresh rate, it means
73 * that the reduced downclock is found. In such
74 * case we can set the different FPx0/1 to dynamically select
75 * between low and high frequency.
76 */
77 if (scan->hdisplay == fixed_mode->hdisplay &&
78 scan->hsync_start == fixed_mode->hsync_start &&
79 scan->hsync_end == fixed_mode->hsync_end &&
80 scan->htotal == fixed_mode->htotal &&
81 scan->vdisplay == fixed_mode->vdisplay &&
82 scan->vsync_start == fixed_mode->vsync_start &&
83 scan->vsync_end == fixed_mode->vsync_end &&
84 scan->vtotal == fixed_mode->vtotal) {
85 if (scan->clock < temp_downclock) {
86 /*
87 * The downclock is already found. But we
88 * expect to find the lower downclock.
89 */
90 temp_downclock = scan->clock;
91 tmp_mode = scan;
92 }
93 }
94 }
95
96 if (temp_downclock < fixed_mode->clock)
97 return drm_mode_duplicate(&dev_priv->drm, tmp_mode);
98 else
99 return NULL;
100 }
101
102 /* adjusted_mode has been preset to be the panel's fixed mode */
103 void
104 intel_pch_panel_fitting(struct intel_crtc *intel_crtc,
105 struct intel_crtc_state *pipe_config,
106 int fitting_mode)
107 {
108 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
109 int x = 0, y = 0, width = 0, height = 0;
110
111 /* Native modes don't need fitting */
112 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
113 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h &&
114 !pipe_config->ycbcr420)
115 goto done;
116
117 switch (fitting_mode) {
118 case DRM_MODE_SCALE_CENTER:
119 width = pipe_config->pipe_src_w;
120 height = pipe_config->pipe_src_h;
121 x = (adjusted_mode->crtc_hdisplay - width + 1)/2;
122 y = (adjusted_mode->crtc_vdisplay - height + 1)/2;
123 break;
124
125 case DRM_MODE_SCALE_ASPECT:
126 /* Scale but preserve the aspect ratio */
127 {
128 u32 scaled_width = adjusted_mode->crtc_hdisplay
129 * pipe_config->pipe_src_h;
130 u32 scaled_height = pipe_config->pipe_src_w
131 * adjusted_mode->crtc_vdisplay;
132 if (scaled_width > scaled_height) { /* pillar */
133 width = scaled_height / pipe_config->pipe_src_h;
134 if (width & 1)
135 width++;
136 x = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
137 y = 0;
138 height = adjusted_mode->crtc_vdisplay;
139 } else if (scaled_width < scaled_height) { /* letter */
140 height = scaled_width / pipe_config->pipe_src_w;
141 if (height & 1)
142 height++;
143 y = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
144 x = 0;
145 width = adjusted_mode->crtc_hdisplay;
146 } else {
147 x = y = 0;
148 width = adjusted_mode->crtc_hdisplay;
149 height = adjusted_mode->crtc_vdisplay;
150 }
151 }
152 break;
153
154 case DRM_MODE_SCALE_FULLSCREEN:
155 x = y = 0;
156 width = adjusted_mode->crtc_hdisplay;
157 height = adjusted_mode->crtc_vdisplay;
158 break;
159
160 default:
161 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
162 return;
163 }
164
165 done:
166 pipe_config->pch_pfit.pos = (x << 16) | y;
167 pipe_config->pch_pfit.size = (width << 16) | height;
168 pipe_config->pch_pfit.enabled = pipe_config->pch_pfit.size != 0;
169 }
170
171 static void
172 centre_horizontally(struct drm_display_mode *adjusted_mode,
173 int width)
174 {
175 u32 border, sync_pos, blank_width, sync_width;
176
177 /* keep the hsync and hblank widths constant */
178 sync_width = adjusted_mode->crtc_hsync_end - adjusted_mode->crtc_hsync_start;
179 blank_width = adjusted_mode->crtc_hblank_end - adjusted_mode->crtc_hblank_start;
180 sync_pos = (blank_width - sync_width + 1) / 2;
181
182 border = (adjusted_mode->crtc_hdisplay - width + 1) / 2;
183 border += border & 1; /* make the border even */
184
185 adjusted_mode->crtc_hdisplay = width;
186 adjusted_mode->crtc_hblank_start = width + border;
187 adjusted_mode->crtc_hblank_end = adjusted_mode->crtc_hblank_start + blank_width;
188
189 adjusted_mode->crtc_hsync_start = adjusted_mode->crtc_hblank_start + sync_pos;
190 adjusted_mode->crtc_hsync_end = adjusted_mode->crtc_hsync_start + sync_width;
191 }
192
193 static void
194 centre_vertically(struct drm_display_mode *adjusted_mode,
195 int height)
196 {
197 u32 border, sync_pos, blank_width, sync_width;
198
199 /* keep the vsync and vblank widths constant */
200 sync_width = adjusted_mode->crtc_vsync_end - adjusted_mode->crtc_vsync_start;
201 blank_width = adjusted_mode->crtc_vblank_end - adjusted_mode->crtc_vblank_start;
202 sync_pos = (blank_width - sync_width + 1) / 2;
203
204 border = (adjusted_mode->crtc_vdisplay - height + 1) / 2;
205
206 adjusted_mode->crtc_vdisplay = height;
207 adjusted_mode->crtc_vblank_start = height + border;
208 adjusted_mode->crtc_vblank_end = adjusted_mode->crtc_vblank_start + blank_width;
209
210 adjusted_mode->crtc_vsync_start = adjusted_mode->crtc_vblank_start + sync_pos;
211 adjusted_mode->crtc_vsync_end = adjusted_mode->crtc_vsync_start + sync_width;
212 }
213
214 static inline u32 panel_fitter_scaling(u32 source, u32 target)
215 {
216 /*
217 * Floating point operation is not supported. So the FACTOR
218 * is defined, which can avoid the floating point computation
219 * when calculating the panel ratio.
220 */
221 #define ACCURACY 12
222 #define FACTOR (1 << ACCURACY)
223 u32 ratio = source * FACTOR / target;
224 return (FACTOR * ratio + FACTOR/2) / FACTOR;
225 }
226
227 static void i965_scale_aspect(struct intel_crtc_state *pipe_config,
228 u32 *pfit_control)
229 {
230 const struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
231 u32 scaled_width = adjusted_mode->crtc_hdisplay *
232 pipe_config->pipe_src_h;
233 u32 scaled_height = pipe_config->pipe_src_w *
234 adjusted_mode->crtc_vdisplay;
235
236 /* 965+ is easy, it does everything in hw */
237 if (scaled_width > scaled_height)
238 *pfit_control |= PFIT_ENABLE |
239 PFIT_SCALING_PILLAR;
240 else if (scaled_width < scaled_height)
241 *pfit_control |= PFIT_ENABLE |
242 PFIT_SCALING_LETTER;
243 else if (adjusted_mode->crtc_hdisplay != pipe_config->pipe_src_w)
244 *pfit_control |= PFIT_ENABLE | PFIT_SCALING_AUTO;
245 }
246
247 static void i9xx_scale_aspect(struct intel_crtc_state *pipe_config,
248 u32 *pfit_control, u32 *pfit_pgm_ratios,
249 u32 *border)
250 {
251 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
252 u32 scaled_width = adjusted_mode->crtc_hdisplay *
253 pipe_config->pipe_src_h;
254 u32 scaled_height = pipe_config->pipe_src_w *
255 adjusted_mode->crtc_vdisplay;
256 u32 bits;
257
258 /*
259 * For earlier chips we have to calculate the scaling
260 * ratio by hand and program it into the
261 * PFIT_PGM_RATIO register
262 */
263 if (scaled_width > scaled_height) { /* pillar */
264 centre_horizontally(adjusted_mode,
265 scaled_height /
266 pipe_config->pipe_src_h);
267
268 *border = LVDS_BORDER_ENABLE;
269 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay) {
270 bits = panel_fitter_scaling(pipe_config->pipe_src_h,
271 adjusted_mode->crtc_vdisplay);
272
273 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
274 bits << PFIT_VERT_SCALE_SHIFT);
275 *pfit_control |= (PFIT_ENABLE |
276 VERT_INTERP_BILINEAR |
277 HORIZ_INTERP_BILINEAR);
278 }
279 } else if (scaled_width < scaled_height) { /* letter */
280 centre_vertically(adjusted_mode,
281 scaled_width /
282 pipe_config->pipe_src_w);
283
284 *border = LVDS_BORDER_ENABLE;
285 if (pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
286 bits = panel_fitter_scaling(pipe_config->pipe_src_w,
287 adjusted_mode->crtc_hdisplay);
288
289 *pfit_pgm_ratios |= (bits << PFIT_HORIZ_SCALE_SHIFT |
290 bits << PFIT_VERT_SCALE_SHIFT);
291 *pfit_control |= (PFIT_ENABLE |
292 VERT_INTERP_BILINEAR |
293 HORIZ_INTERP_BILINEAR);
294 }
295 } else {
296 /* Aspects match, Let hw scale both directions */
297 *pfit_control |= (PFIT_ENABLE |
298 VERT_AUTO_SCALE | HORIZ_AUTO_SCALE |
299 VERT_INTERP_BILINEAR |
300 HORIZ_INTERP_BILINEAR);
301 }
302 }
303
304 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc,
305 struct intel_crtc_state *pipe_config,
306 int fitting_mode)
307 {
308 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
309 u32 pfit_control = 0, pfit_pgm_ratios = 0, border = 0;
310 struct drm_display_mode *adjusted_mode = &pipe_config->base.adjusted_mode;
311
312 /* Native modes don't need fitting */
313 if (adjusted_mode->crtc_hdisplay == pipe_config->pipe_src_w &&
314 adjusted_mode->crtc_vdisplay == pipe_config->pipe_src_h)
315 goto out;
316
317 switch (fitting_mode) {
318 case DRM_MODE_SCALE_CENTER:
319 /*
320 * For centered modes, we have to calculate border widths &
321 * heights and modify the values programmed into the CRTC.
322 */
323 centre_horizontally(adjusted_mode, pipe_config->pipe_src_w);
324 centre_vertically(adjusted_mode, pipe_config->pipe_src_h);
325 border = LVDS_BORDER_ENABLE;
326 break;
327 case DRM_MODE_SCALE_ASPECT:
328 /* Scale but preserve the aspect ratio */
329 if (INTEL_GEN(dev_priv) >= 4)
330 i965_scale_aspect(pipe_config, &pfit_control);
331 else
332 i9xx_scale_aspect(pipe_config, &pfit_control,
333 &pfit_pgm_ratios, &border);
334 break;
335 case DRM_MODE_SCALE_FULLSCREEN:
336 /*
337 * Full scaling, even if it changes the aspect ratio.
338 * Fortunately this is all done for us in hw.
339 */
340 if (pipe_config->pipe_src_h != adjusted_mode->crtc_vdisplay ||
341 pipe_config->pipe_src_w != adjusted_mode->crtc_hdisplay) {
342 pfit_control |= PFIT_ENABLE;
343 if (INTEL_GEN(dev_priv) >= 4)
344 pfit_control |= PFIT_SCALING_AUTO;
345 else
346 pfit_control |= (VERT_AUTO_SCALE |
347 VERT_INTERP_BILINEAR |
348 HORIZ_AUTO_SCALE |
349 HORIZ_INTERP_BILINEAR);
350 }
351 break;
352 default:
353 WARN(1, "bad panel fit mode: %d\n", fitting_mode);
354 return;
355 }
356
357 /* 965+ wants fuzzy fitting */
358 /* FIXME: handle multiple panels by failing gracefully */
359 if (INTEL_GEN(dev_priv) >= 4)
360 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) |
361 PFIT_FILTER_FUZZY);
362
363 out:
364 if ((pfit_control & PFIT_ENABLE) == 0) {
365 pfit_control = 0;
366 pfit_pgm_ratios = 0;
367 }
368
369 /* Make sure pre-965 set dither correctly for 18bpp panels. */
370 if (INTEL_GEN(dev_priv) < 4 && pipe_config->pipe_bpp == 18)
371 pfit_control |= PANEL_8TO6_DITHER_ENABLE;
372
373 pipe_config->gmch_pfit.control = pfit_control;
374 pipe_config->gmch_pfit.pgm_ratios = pfit_pgm_ratios;
375 pipe_config->gmch_pfit.lvds_border_bits = border;
376 }
377
378 /**
379 * scale - scale values from one range to another
380 * @source_val: value in range [@source_min..@source_max]
381 * @source_min: minimum legal value for @source_val
382 * @source_max: maximum legal value for @source_val
383 * @target_min: corresponding target value for @source_min
384 * @target_max: corresponding target value for @source_max
385 *
386 * Return @source_val in range [@source_min..@source_max] scaled to range
387 * [@target_min..@target_max].
388 */
389 static u32 scale(u32 source_val,
390 u32 source_min, u32 source_max,
391 u32 target_min, u32 target_max)
392 {
393 u64 target_val;
394
395 WARN_ON(source_min > source_max);
396 WARN_ON(target_min > target_max);
397
398 /* defensive */
399 source_val = clamp(source_val, source_min, source_max);
400
401 /* avoid overflows */
402 target_val = mul_u32_u32(source_val - source_min,
403 target_max - target_min);
404 target_val = DIV_ROUND_CLOSEST_ULL(target_val, source_max - source_min);
405 target_val += target_min;
406
407 return target_val;
408 }
409
410 /* Scale user_level in range [0..user_max] to [hw_min..hw_max]. */
411 static inline u32 scale_user_to_hw(struct intel_connector *connector,
412 u32 user_level, u32 user_max)
413 {
414 struct intel_panel *panel = &connector->panel;
415
416 return scale(user_level, 0, user_max,
417 panel->backlight.min, panel->backlight.max);
418 }
419
420 /* Scale user_level in range [0..user_max] to [0..hw_max], clamping the result
421 * to [hw_min..hw_max]. */
422 static inline u32 clamp_user_to_hw(struct intel_connector *connector,
423 u32 user_level, u32 user_max)
424 {
425 struct intel_panel *panel = &connector->panel;
426 u32 hw_level;
427
428 hw_level = scale(user_level, 0, user_max, 0, panel->backlight.max);
429 hw_level = clamp(hw_level, panel->backlight.min, panel->backlight.max);
430
431 return hw_level;
432 }
433
434 /* Scale hw_level in range [hw_min..hw_max] to [0..user_max]. */
435 static inline u32 scale_hw_to_user(struct intel_connector *connector,
436 u32 hw_level, u32 user_max)
437 {
438 struct intel_panel *panel = &connector->panel;
439
440 return scale(hw_level, panel->backlight.min, panel->backlight.max,
441 0, user_max);
442 }
443
444 static u32 intel_panel_compute_brightness(struct intel_connector *connector,
445 u32 val)
446 {
447 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
448 struct intel_panel *panel = &connector->panel;
449
450 WARN_ON(panel->backlight.max == 0);
451
452 if (i915_modparams.invert_brightness < 0)
453 return val;
454
455 if (i915_modparams.invert_brightness > 0 ||
456 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) {
457 return panel->backlight.max - val + panel->backlight.min;
458 }
459
460 return val;
461 }
462
463 static u32 lpt_get_backlight(struct intel_connector *connector)
464 {
465 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
466
467 return I915_READ(BLC_PWM_PCH_CTL2) & BACKLIGHT_DUTY_CYCLE_MASK;
468 }
469
470 static u32 pch_get_backlight(struct intel_connector *connector)
471 {
472 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
473
474 return I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
475 }
476
477 static u32 i9xx_get_backlight(struct intel_connector *connector)
478 {
479 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
480 struct intel_panel *panel = &connector->panel;
481 u32 val;
482
483 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
484 if (INTEL_GEN(dev_priv) < 4)
485 val >>= 1;
486
487 if (panel->backlight.combination_mode) {
488 u8 lbpc;
489
490 pci_read_config_byte(dev_priv->drm.pdev, LBPC, &lbpc);
491 val *= lbpc;
492 }
493
494 return val;
495 }
496
497 static u32 _vlv_get_backlight(struct drm_i915_private *dev_priv, enum pipe pipe)
498 {
499 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
500 return 0;
501
502 return I915_READ(VLV_BLC_PWM_CTL(pipe)) & BACKLIGHT_DUTY_CYCLE_MASK;
503 }
504
505 static u32 vlv_get_backlight(struct intel_connector *connector)
506 {
507 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
508 enum pipe pipe = intel_get_pipe_from_connector(connector);
509
510 return _vlv_get_backlight(dev_priv, pipe);
511 }
512
513 static u32 bxt_get_backlight(struct intel_connector *connector)
514 {
515 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
516 struct intel_panel *panel = &connector->panel;
517
518 return I915_READ(BXT_BLC_PWM_DUTY(panel->backlight.controller));
519 }
520
521 static u32 pwm_get_backlight(struct intel_connector *connector)
522 {
523 struct intel_panel *panel = &connector->panel;
524 int duty_ns;
525
526 duty_ns = pwm_get_duty_cycle(panel->backlight.pwm);
527 return DIV_ROUND_UP(duty_ns * 100, CRC_PMIC_PWM_PERIOD_NS);
528 }
529
530 static void lpt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
531 {
532 struct intel_connector *connector = to_intel_connector(conn_state->connector);
533 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
534
535 u32 val = I915_READ(BLC_PWM_PCH_CTL2) & ~BACKLIGHT_DUTY_CYCLE_MASK;
536 I915_WRITE(BLC_PWM_PCH_CTL2, val | level);
537 }
538
539 static void pch_set_backlight(const struct drm_connector_state *conn_state, u32 level)
540 {
541 struct intel_connector *connector = to_intel_connector(conn_state->connector);
542 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
543 u32 tmp;
544
545 tmp = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
546 I915_WRITE(BLC_PWM_CPU_CTL, tmp | level);
547 }
548
549 static void i9xx_set_backlight(const struct drm_connector_state *conn_state, u32 level)
550 {
551 struct intel_connector *connector = to_intel_connector(conn_state->connector);
552 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
553 struct intel_panel *panel = &connector->panel;
554 u32 tmp, mask;
555
556 WARN_ON(panel->backlight.max == 0);
557
558 if (panel->backlight.combination_mode) {
559 u8 lbpc;
560
561 lbpc = level * 0xfe / panel->backlight.max + 1;
562 level /= lbpc;
563 pci_write_config_byte(dev_priv->drm.pdev, LBPC, lbpc);
564 }
565
566 if (IS_GEN4(dev_priv)) {
567 mask = BACKLIGHT_DUTY_CYCLE_MASK;
568 } else {
569 level <<= 1;
570 mask = BACKLIGHT_DUTY_CYCLE_MASK_PNV;
571 }
572
573 tmp = I915_READ(BLC_PWM_CTL) & ~mask;
574 I915_WRITE(BLC_PWM_CTL, tmp | level);
575 }
576
577 static void vlv_set_backlight(const struct drm_connector_state *conn_state, u32 level)
578 {
579 struct intel_connector *connector = to_intel_connector(conn_state->connector);
580 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
581 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
582 u32 tmp;
583
584 tmp = I915_READ(VLV_BLC_PWM_CTL(pipe)) & ~BACKLIGHT_DUTY_CYCLE_MASK;
585 I915_WRITE(VLV_BLC_PWM_CTL(pipe), tmp | level);
586 }
587
588 static void bxt_set_backlight(const struct drm_connector_state *conn_state, u32 level)
589 {
590 struct intel_connector *connector = to_intel_connector(conn_state->connector);
591 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
592 struct intel_panel *panel = &connector->panel;
593
594 I915_WRITE(BXT_BLC_PWM_DUTY(panel->backlight.controller), level);
595 }
596
597 static void pwm_set_backlight(const struct drm_connector_state *conn_state, u32 level)
598 {
599 struct intel_panel *panel = &to_intel_connector(conn_state->connector)->panel;
600 int duty_ns = DIV_ROUND_UP(level * CRC_PMIC_PWM_PERIOD_NS, 100);
601
602 pwm_config(panel->backlight.pwm, duty_ns, CRC_PMIC_PWM_PERIOD_NS);
603 }
604
605 static void
606 intel_panel_actually_set_backlight(const struct drm_connector_state *conn_state, u32 level)
607 {
608 struct intel_connector *connector = to_intel_connector(conn_state->connector);
609 struct intel_panel *panel = &connector->panel;
610
611 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
612
613 level = intel_panel_compute_brightness(connector, level);
614 panel->backlight.set(conn_state, level);
615 }
616
617 /* set backlight brightness to level in range [0..max], assuming hw min is
618 * respected.
619 */
620 void intel_panel_set_backlight_acpi(const struct drm_connector_state *conn_state,
621 u32 user_level, u32 user_max)
622 {
623 struct intel_connector *connector = to_intel_connector(conn_state->connector);
624 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
625 struct intel_panel *panel = &connector->panel;
626 u32 hw_level;
627
628 /*
629 * Lack of crtc may occur during driver init because
630 * connection_mutex isn't held across the entire backlight
631 * setup + modeset readout, and the BIOS can issue the
632 * requests at any time.
633 */
634 if (!panel->backlight.present || !conn_state->crtc)
635 return;
636
637 mutex_lock(&dev_priv->backlight_lock);
638
639 WARN_ON(panel->backlight.max == 0);
640
641 hw_level = clamp_user_to_hw(connector, user_level, user_max);
642 panel->backlight.level = hw_level;
643
644 if (panel->backlight.device)
645 panel->backlight.device->props.brightness =
646 scale_hw_to_user(connector,
647 panel->backlight.level,
648 panel->backlight.device->props.max_brightness);
649
650 if (panel->backlight.enabled)
651 intel_panel_actually_set_backlight(conn_state, hw_level);
652
653 mutex_unlock(&dev_priv->backlight_lock);
654 }
655
656 static void lpt_disable_backlight(const struct drm_connector_state *old_conn_state)
657 {
658 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
659 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
660 u32 tmp;
661
662 intel_panel_actually_set_backlight(old_conn_state, 0);
663
664 /*
665 * Although we don't support or enable CPU PWM with LPT/SPT based
666 * systems, it may have been enabled prior to loading the
667 * driver. Disable to avoid warnings on LCPLL disable.
668 *
669 * This needs rework if we need to add support for CPU PWM on PCH split
670 * platforms.
671 */
672 tmp = I915_READ(BLC_PWM_CPU_CTL2);
673 if (tmp & BLM_PWM_ENABLE) {
674 DRM_DEBUG_KMS("cpu backlight was enabled, disabling\n");
675 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
676 }
677
678 tmp = I915_READ(BLC_PWM_PCH_CTL1);
679 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
680 }
681
682 static void pch_disable_backlight(const struct drm_connector_state *old_conn_state)
683 {
684 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
685 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
686 u32 tmp;
687
688 intel_panel_actually_set_backlight(old_conn_state, 0);
689
690 tmp = I915_READ(BLC_PWM_CPU_CTL2);
691 I915_WRITE(BLC_PWM_CPU_CTL2, tmp & ~BLM_PWM_ENABLE);
692
693 tmp = I915_READ(BLC_PWM_PCH_CTL1);
694 I915_WRITE(BLC_PWM_PCH_CTL1, tmp & ~BLM_PCH_PWM_ENABLE);
695 }
696
697 static void i9xx_disable_backlight(const struct drm_connector_state *old_conn_state)
698 {
699 intel_panel_actually_set_backlight(old_conn_state, 0);
700 }
701
702 static void i965_disable_backlight(const struct drm_connector_state *old_conn_state)
703 {
704 struct drm_i915_private *dev_priv = to_i915(old_conn_state->connector->dev);
705 u32 tmp;
706
707 intel_panel_actually_set_backlight(old_conn_state, 0);
708
709 tmp = I915_READ(BLC_PWM_CTL2);
710 I915_WRITE(BLC_PWM_CTL2, tmp & ~BLM_PWM_ENABLE);
711 }
712
713 static void vlv_disable_backlight(const struct drm_connector_state *old_conn_state)
714 {
715 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
716 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
717 enum pipe pipe = to_intel_crtc(old_conn_state->crtc)->pipe;
718 u32 tmp;
719
720 intel_panel_actually_set_backlight(old_conn_state, 0);
721
722 tmp = I915_READ(VLV_BLC_PWM_CTL2(pipe));
723 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), tmp & ~BLM_PWM_ENABLE);
724 }
725
726 static void bxt_disable_backlight(const struct drm_connector_state *old_conn_state)
727 {
728 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
729 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
730 struct intel_panel *panel = &connector->panel;
731 u32 tmp, val;
732
733 intel_panel_actually_set_backlight(old_conn_state, 0);
734
735 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
736 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
737 tmp & ~BXT_BLC_PWM_ENABLE);
738
739 if (panel->backlight.controller == 1) {
740 val = I915_READ(UTIL_PIN_CTL);
741 val &= ~UTIL_PIN_ENABLE;
742 I915_WRITE(UTIL_PIN_CTL, val);
743 }
744 }
745
746 static void cnp_disable_backlight(const struct drm_connector_state *old_conn_state)
747 {
748 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
749 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
750 struct intel_panel *panel = &connector->panel;
751 u32 tmp;
752
753 intel_panel_actually_set_backlight(old_conn_state, 0);
754
755 tmp = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
756 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
757 tmp & ~BXT_BLC_PWM_ENABLE);
758 }
759
760 static void pwm_disable_backlight(const struct drm_connector_state *old_conn_state)
761 {
762 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
763 struct intel_panel *panel = &connector->panel;
764
765 /* Disable the backlight */
766 pwm_config(panel->backlight.pwm, 0, CRC_PMIC_PWM_PERIOD_NS);
767 usleep_range(2000, 3000);
768 pwm_disable(panel->backlight.pwm);
769 }
770
771 void intel_panel_disable_backlight(const struct drm_connector_state *old_conn_state)
772 {
773 struct intel_connector *connector = to_intel_connector(old_conn_state->connector);
774 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
775 struct intel_panel *panel = &connector->panel;
776
777 if (!panel->backlight.present)
778 return;
779
780 /*
781 * Do not disable backlight on the vga_switcheroo path. When switching
782 * away from i915, the other client may depend on i915 to handle the
783 * backlight. This will leave the backlight on unnecessarily when
784 * another client is not activated.
785 */
786 if (dev_priv->drm.switch_power_state == DRM_SWITCH_POWER_CHANGING) {
787 DRM_DEBUG_DRIVER("Skipping backlight disable on vga switch\n");
788 return;
789 }
790
791 mutex_lock(&dev_priv->backlight_lock);
792
793 if (panel->backlight.device)
794 panel->backlight.device->props.power = FB_BLANK_POWERDOWN;
795 panel->backlight.enabled = false;
796 panel->backlight.disable(old_conn_state);
797
798 mutex_unlock(&dev_priv->backlight_lock);
799 }
800
801 static void lpt_enable_backlight(const struct intel_crtc_state *crtc_state,
802 const struct drm_connector_state *conn_state)
803 {
804 struct intel_connector *connector = to_intel_connector(conn_state->connector);
805 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
806 struct intel_panel *panel = &connector->panel;
807 u32 pch_ctl1, pch_ctl2, schicken;
808
809 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
810 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
811 DRM_DEBUG_KMS("pch backlight already enabled\n");
812 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
813 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
814 }
815
816 if (HAS_PCH_LPT(dev_priv)) {
817 schicken = I915_READ(SOUTH_CHICKEN2);
818 if (panel->backlight.alternate_pwm_increment)
819 schicken |= LPT_PWM_GRANULARITY;
820 else
821 schicken &= ~LPT_PWM_GRANULARITY;
822 I915_WRITE(SOUTH_CHICKEN2, schicken);
823 } else {
824 schicken = I915_READ(SOUTH_CHICKEN1);
825 if (panel->backlight.alternate_pwm_increment)
826 schicken |= SPT_PWM_GRANULARITY;
827 else
828 schicken &= ~SPT_PWM_GRANULARITY;
829 I915_WRITE(SOUTH_CHICKEN1, schicken);
830 }
831
832 pch_ctl2 = panel->backlight.max << 16;
833 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
834
835 pch_ctl1 = 0;
836 if (panel->backlight.active_low_pwm)
837 pch_ctl1 |= BLM_PCH_POLARITY;
838
839 /* After LPT, override is the default. */
840 if (HAS_PCH_LPT(dev_priv))
841 pch_ctl1 |= BLM_PCH_OVERRIDE_ENABLE;
842
843 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
844 POSTING_READ(BLC_PWM_PCH_CTL1);
845 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
846
847 /* This won't stick until the above enable. */
848 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
849 }
850
851 static void pch_enable_backlight(const struct intel_crtc_state *crtc_state,
852 const struct drm_connector_state *conn_state)
853 {
854 struct intel_connector *connector = to_intel_connector(conn_state->connector);
855 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
856 struct intel_panel *panel = &connector->panel;
857 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder;
858 u32 cpu_ctl2, pch_ctl1, pch_ctl2;
859
860 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
861 if (cpu_ctl2 & BLM_PWM_ENABLE) {
862 DRM_DEBUG_KMS("cpu backlight already enabled\n");
863 cpu_ctl2 &= ~BLM_PWM_ENABLE;
864 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
865 }
866
867 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
868 if (pch_ctl1 & BLM_PCH_PWM_ENABLE) {
869 DRM_DEBUG_KMS("pch backlight already enabled\n");
870 pch_ctl1 &= ~BLM_PCH_PWM_ENABLE;
871 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
872 }
873
874 if (cpu_transcoder == TRANSCODER_EDP)
875 cpu_ctl2 = BLM_TRANSCODER_EDP;
876 else
877 cpu_ctl2 = BLM_PIPE(cpu_transcoder);
878 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2);
879 POSTING_READ(BLC_PWM_CPU_CTL2);
880 I915_WRITE(BLC_PWM_CPU_CTL2, cpu_ctl2 | BLM_PWM_ENABLE);
881
882 /* This won't stick until the above enable. */
883 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
884
885 pch_ctl2 = panel->backlight.max << 16;
886 I915_WRITE(BLC_PWM_PCH_CTL2, pch_ctl2);
887
888 pch_ctl1 = 0;
889 if (panel->backlight.active_low_pwm)
890 pch_ctl1 |= BLM_PCH_POLARITY;
891
892 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1);
893 POSTING_READ(BLC_PWM_PCH_CTL1);
894 I915_WRITE(BLC_PWM_PCH_CTL1, pch_ctl1 | BLM_PCH_PWM_ENABLE);
895 }
896
897 static void i9xx_enable_backlight(const struct intel_crtc_state *crtc_state,
898 const struct drm_connector_state *conn_state)
899 {
900 struct intel_connector *connector = to_intel_connector(conn_state->connector);
901 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
902 struct intel_panel *panel = &connector->panel;
903 u32 ctl, freq;
904
905 ctl = I915_READ(BLC_PWM_CTL);
906 if (ctl & BACKLIGHT_DUTY_CYCLE_MASK_PNV) {
907 DRM_DEBUG_KMS("backlight already enabled\n");
908 I915_WRITE(BLC_PWM_CTL, 0);
909 }
910
911 freq = panel->backlight.max;
912 if (panel->backlight.combination_mode)
913 freq /= 0xff;
914
915 ctl = freq << 17;
916 if (panel->backlight.combination_mode)
917 ctl |= BLM_LEGACY_MODE;
918 if (IS_PINEVIEW(dev_priv) && panel->backlight.active_low_pwm)
919 ctl |= BLM_POLARITY_PNV;
920
921 I915_WRITE(BLC_PWM_CTL, ctl);
922 POSTING_READ(BLC_PWM_CTL);
923
924 /* XXX: combine this into above write? */
925 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
926
927 /*
928 * Needed to enable backlight on some 855gm models. BLC_HIST_CTL is
929 * 855gm only, but checking for gen2 is safe, as 855gm is the only gen2
930 * that has backlight.
931 */
932 if (IS_GEN2(dev_priv))
933 I915_WRITE(BLC_HIST_CTL, BLM_HISTOGRAM_ENABLE);
934 }
935
936 static void i965_enable_backlight(const struct intel_crtc_state *crtc_state,
937 const struct drm_connector_state *conn_state)
938 {
939 struct intel_connector *connector = to_intel_connector(conn_state->connector);
940 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
941 struct intel_panel *panel = &connector->panel;
942 enum pipe pipe = to_intel_crtc(conn_state->crtc)->pipe;
943 u32 ctl, ctl2, freq;
944
945 ctl2 = I915_READ(BLC_PWM_CTL2);
946 if (ctl2 & BLM_PWM_ENABLE) {
947 DRM_DEBUG_KMS("backlight already enabled\n");
948 ctl2 &= ~BLM_PWM_ENABLE;
949 I915_WRITE(BLC_PWM_CTL2, ctl2);
950 }
951
952 freq = panel->backlight.max;
953 if (panel->backlight.combination_mode)
954 freq /= 0xff;
955
956 ctl = freq << 16;
957 I915_WRITE(BLC_PWM_CTL, ctl);
958
959 ctl2 = BLM_PIPE(pipe);
960 if (panel->backlight.combination_mode)
961 ctl2 |= BLM_COMBINATION_MODE;
962 if (panel->backlight.active_low_pwm)
963 ctl2 |= BLM_POLARITY_I965;
964 I915_WRITE(BLC_PWM_CTL2, ctl2);
965 POSTING_READ(BLC_PWM_CTL2);
966 I915_WRITE(BLC_PWM_CTL2, ctl2 | BLM_PWM_ENABLE);
967
968 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
969 }
970
971 static void vlv_enable_backlight(const struct intel_crtc_state *crtc_state,
972 const struct drm_connector_state *conn_state)
973 {
974 struct intel_connector *connector = to_intel_connector(conn_state->connector);
975 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
976 struct intel_panel *panel = &connector->panel;
977 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
978 u32 ctl, ctl2;
979
980 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
981 if (ctl2 & BLM_PWM_ENABLE) {
982 DRM_DEBUG_KMS("backlight already enabled\n");
983 ctl2 &= ~BLM_PWM_ENABLE;
984 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
985 }
986
987 ctl = panel->backlight.max << 16;
988 I915_WRITE(VLV_BLC_PWM_CTL(pipe), ctl);
989
990 /* XXX: combine this into above write? */
991 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
992
993 ctl2 = 0;
994 if (panel->backlight.active_low_pwm)
995 ctl2 |= BLM_POLARITY_I965;
996 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2);
997 POSTING_READ(VLV_BLC_PWM_CTL2(pipe));
998 I915_WRITE(VLV_BLC_PWM_CTL2(pipe), ctl2 | BLM_PWM_ENABLE);
999 }
1000
1001 static void bxt_enable_backlight(const struct intel_crtc_state *crtc_state,
1002 const struct drm_connector_state *conn_state)
1003 {
1004 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1005 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1006 struct intel_panel *panel = &connector->panel;
1007 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1008 u32 pwm_ctl, val;
1009
1010 /* Controller 1 uses the utility pin. */
1011 if (panel->backlight.controller == 1) {
1012 val = I915_READ(UTIL_PIN_CTL);
1013 if (val & UTIL_PIN_ENABLE) {
1014 DRM_DEBUG_KMS("util pin already enabled\n");
1015 val &= ~UTIL_PIN_ENABLE;
1016 I915_WRITE(UTIL_PIN_CTL, val);
1017 }
1018
1019 val = 0;
1020 if (panel->backlight.util_pin_active_low)
1021 val |= UTIL_PIN_POLARITY;
1022 I915_WRITE(UTIL_PIN_CTL, val | UTIL_PIN_PIPE(pipe) |
1023 UTIL_PIN_MODE_PWM | UTIL_PIN_ENABLE);
1024 }
1025
1026 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1027 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1028 DRM_DEBUG_KMS("backlight already enabled\n");
1029 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1030 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1031 pwm_ctl);
1032 }
1033
1034 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1035 panel->backlight.max);
1036
1037 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1038
1039 pwm_ctl = 0;
1040 if (panel->backlight.active_low_pwm)
1041 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1042
1043 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1044 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1045 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1046 pwm_ctl | BXT_BLC_PWM_ENABLE);
1047 }
1048
1049 static void cnp_enable_backlight(const struct intel_crtc_state *crtc_state,
1050 const struct drm_connector_state *conn_state)
1051 {
1052 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1053 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1054 struct intel_panel *panel = &connector->panel;
1055 u32 pwm_ctl;
1056
1057 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1058 if (pwm_ctl & BXT_BLC_PWM_ENABLE) {
1059 DRM_DEBUG_KMS("backlight already enabled\n");
1060 pwm_ctl &= ~BXT_BLC_PWM_ENABLE;
1061 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1062 pwm_ctl);
1063 }
1064
1065 I915_WRITE(BXT_BLC_PWM_FREQ(panel->backlight.controller),
1066 panel->backlight.max);
1067
1068 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1069
1070 pwm_ctl = 0;
1071 if (panel->backlight.active_low_pwm)
1072 pwm_ctl |= BXT_BLC_PWM_POLARITY;
1073
1074 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller), pwm_ctl);
1075 POSTING_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1076 I915_WRITE(BXT_BLC_PWM_CTL(panel->backlight.controller),
1077 pwm_ctl | BXT_BLC_PWM_ENABLE);
1078 }
1079
1080 static void pwm_enable_backlight(const struct intel_crtc_state *crtc_state,
1081 const struct drm_connector_state *conn_state)
1082 {
1083 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1084 struct intel_panel *panel = &connector->panel;
1085
1086 pwm_enable(panel->backlight.pwm);
1087 intel_panel_actually_set_backlight(conn_state, panel->backlight.level);
1088 }
1089
1090 void intel_panel_enable_backlight(const struct intel_crtc_state *crtc_state,
1091 const struct drm_connector_state *conn_state)
1092 {
1093 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1094 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1095 struct intel_panel *panel = &connector->panel;
1096 enum pipe pipe = to_intel_crtc(crtc_state->base.crtc)->pipe;
1097
1098 if (!panel->backlight.present)
1099 return;
1100
1101 DRM_DEBUG_KMS("pipe %c\n", pipe_name(pipe));
1102
1103 mutex_lock(&dev_priv->backlight_lock);
1104
1105 WARN_ON(panel->backlight.max == 0);
1106
1107 if (panel->backlight.level <= panel->backlight.min) {
1108 panel->backlight.level = panel->backlight.max;
1109 if (panel->backlight.device)
1110 panel->backlight.device->props.brightness =
1111 scale_hw_to_user(connector,
1112 panel->backlight.level,
1113 panel->backlight.device->props.max_brightness);
1114 }
1115
1116 panel->backlight.enable(crtc_state, conn_state);
1117 panel->backlight.enabled = true;
1118 if (panel->backlight.device)
1119 panel->backlight.device->props.power = FB_BLANK_UNBLANK;
1120
1121 mutex_unlock(&dev_priv->backlight_lock);
1122 }
1123
1124 #if IS_ENABLED(CONFIG_BACKLIGHT_CLASS_DEVICE)
1125 static u32 intel_panel_get_backlight(struct intel_connector *connector)
1126 {
1127 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1128 struct intel_panel *panel = &connector->panel;
1129 u32 val = 0;
1130
1131 mutex_lock(&dev_priv->backlight_lock);
1132
1133 if (panel->backlight.enabled) {
1134 val = panel->backlight.get(connector);
1135 val = intel_panel_compute_brightness(connector, val);
1136 }
1137
1138 mutex_unlock(&dev_priv->backlight_lock);
1139
1140 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
1141 return val;
1142 }
1143
1144 /* set backlight brightness to level in range [0..max], scaling wrt hw min */
1145 static void intel_panel_set_backlight(const struct drm_connector_state *conn_state,
1146 u32 user_level, u32 user_max)
1147 {
1148 struct intel_connector *connector = to_intel_connector(conn_state->connector);
1149 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1150 struct intel_panel *panel = &connector->panel;
1151 u32 hw_level;
1152
1153 if (!panel->backlight.present)
1154 return;
1155
1156 mutex_lock(&dev_priv->backlight_lock);
1157
1158 WARN_ON(panel->backlight.max == 0);
1159
1160 hw_level = scale_user_to_hw(connector, user_level, user_max);
1161 panel->backlight.level = hw_level;
1162
1163 if (panel->backlight.enabled)
1164 intel_panel_actually_set_backlight(conn_state, hw_level);
1165
1166 mutex_unlock(&dev_priv->backlight_lock);
1167 }
1168
1169 static int intel_backlight_device_update_status(struct backlight_device *bd)
1170 {
1171 struct intel_connector *connector = bl_get_data(bd);
1172 struct intel_panel *panel = &connector->panel;
1173 struct drm_device *dev = connector->base.dev;
1174
1175 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1176 DRM_DEBUG_KMS("updating intel_backlight, brightness=%d/%d\n",
1177 bd->props.brightness, bd->props.max_brightness);
1178 intel_panel_set_backlight(connector->base.state, bd->props.brightness,
1179 bd->props.max_brightness);
1180
1181 /*
1182 * Allow flipping bl_power as a sub-state of enabled. Sadly the
1183 * backlight class device does not make it easy to to differentiate
1184 * between callbacks for brightness and bl_power, so our backlight_power
1185 * callback needs to take this into account.
1186 */
1187 if (panel->backlight.enabled) {
1188 if (panel->backlight.power) {
1189 bool enable = bd->props.power == FB_BLANK_UNBLANK &&
1190 bd->props.brightness != 0;
1191 panel->backlight.power(connector, enable);
1192 }
1193 } else {
1194 bd->props.power = FB_BLANK_POWERDOWN;
1195 }
1196
1197 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1198 return 0;
1199 }
1200
1201 static int intel_backlight_device_get_brightness(struct backlight_device *bd)
1202 {
1203 struct intel_connector *connector = bl_get_data(bd);
1204 struct drm_device *dev = connector->base.dev;
1205 struct drm_i915_private *dev_priv = to_i915(dev);
1206 u32 hw_level;
1207 int ret;
1208
1209 intel_runtime_pm_get(dev_priv);
1210 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
1211
1212 hw_level = intel_panel_get_backlight(connector);
1213 ret = scale_hw_to_user(connector, hw_level, bd->props.max_brightness);
1214
1215 drm_modeset_unlock(&dev->mode_config.connection_mutex);
1216 intel_runtime_pm_put(dev_priv);
1217
1218 return ret;
1219 }
1220
1221 static const struct backlight_ops intel_backlight_device_ops = {
1222 .update_status = intel_backlight_device_update_status,
1223 .get_brightness = intel_backlight_device_get_brightness,
1224 };
1225
1226 int intel_backlight_device_register(struct intel_connector *connector)
1227 {
1228 struct intel_panel *panel = &connector->panel;
1229 struct backlight_properties props;
1230
1231 if (WARN_ON(panel->backlight.device))
1232 return -ENODEV;
1233
1234 if (!panel->backlight.present)
1235 return 0;
1236
1237 WARN_ON(panel->backlight.max == 0);
1238
1239 memset(&props, 0, sizeof(props));
1240 props.type = BACKLIGHT_RAW;
1241
1242 /*
1243 * Note: Everything should work even if the backlight device max
1244 * presented to the userspace is arbitrarily chosen.
1245 */
1246 props.max_brightness = panel->backlight.max;
1247 props.brightness = scale_hw_to_user(connector,
1248 panel->backlight.level,
1249 props.max_brightness);
1250
1251 if (panel->backlight.enabled)
1252 props.power = FB_BLANK_UNBLANK;
1253 else
1254 props.power = FB_BLANK_POWERDOWN;
1255
1256 /*
1257 * Note: using the same name independent of the connector prevents
1258 * registration of multiple backlight devices in the driver.
1259 */
1260 panel->backlight.device =
1261 backlight_device_register("intel_backlight",
1262 connector->base.kdev,
1263 connector,
1264 &intel_backlight_device_ops, &props);
1265
1266 if (IS_ERR(panel->backlight.device)) {
1267 DRM_ERROR("Failed to register backlight: %ld\n",
1268 PTR_ERR(panel->backlight.device));
1269 panel->backlight.device = NULL;
1270 return -ENODEV;
1271 }
1272
1273 DRM_DEBUG_KMS("Connector %s backlight sysfs interface registered\n",
1274 connector->base.name);
1275
1276 return 0;
1277 }
1278
1279 void intel_backlight_device_unregister(struct intel_connector *connector)
1280 {
1281 struct intel_panel *panel = &connector->panel;
1282
1283 if (panel->backlight.device) {
1284 backlight_device_unregister(panel->backlight.device);
1285 panel->backlight.device = NULL;
1286 }
1287 }
1288 #endif /* CONFIG_BACKLIGHT_CLASS_DEVICE */
1289
1290 /*
1291 * CNP: PWM clock frequency is 19.2 MHz or 24 MHz.
1292 * PWM increment = 1
1293 */
1294 static u32 cnp_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1295 {
1296 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1297
1298 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz);
1299 }
1300
1301 /*
1302 * BXT: PWM clock frequency = 19.2 MHz.
1303 */
1304 static u32 bxt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1305 {
1306 return DIV_ROUND_CLOSEST(KHz(19200), pwm_freq_hz);
1307 }
1308
1309 /*
1310 * SPT: This value represents the period of the PWM stream in clock periods
1311 * multiplied by 16 (default increment) or 128 (alternate increment selected in
1312 * SCHICKEN_1 bit 0). PWM clock is 24 MHz.
1313 */
1314 static u32 spt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1315 {
1316 struct intel_panel *panel = &connector->panel;
1317 u32 mul;
1318
1319 if (panel->backlight.alternate_pwm_increment)
1320 mul = 128;
1321 else
1322 mul = 16;
1323
1324 return DIV_ROUND_CLOSEST(MHz(24), pwm_freq_hz * mul);
1325 }
1326
1327 /*
1328 * LPT: This value represents the period of the PWM stream in clock periods
1329 * multiplied by 128 (default increment) or 16 (alternate increment, selected in
1330 * LPT SOUTH_CHICKEN2 register bit 5).
1331 */
1332 static u32 lpt_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1333 {
1334 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1335 struct intel_panel *panel = &connector->panel;
1336 u32 mul, clock;
1337
1338 if (panel->backlight.alternate_pwm_increment)
1339 mul = 16;
1340 else
1341 mul = 128;
1342
1343 if (HAS_PCH_LPT_H(dev_priv))
1344 clock = MHz(135); /* LPT:H */
1345 else
1346 clock = MHz(24); /* LPT:LP */
1347
1348 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1349 }
1350
1351 /*
1352 * ILK/SNB/IVB: This value represents the period of the PWM stream in PCH
1353 * display raw clocks multiplied by 128.
1354 */
1355 static u32 pch_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1356 {
1357 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1358
1359 return DIV_ROUND_CLOSEST(KHz(dev_priv->rawclk_freq), pwm_freq_hz * 128);
1360 }
1361
1362 /*
1363 * Gen2: This field determines the number of time base events (display core
1364 * clock frequency/32) in total for a complete cycle of modulated backlight
1365 * control.
1366 *
1367 * Gen3: A time base event equals the display core clock ([DevPNV] HRAW clock)
1368 * divided by 32.
1369 */
1370 static u32 i9xx_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1371 {
1372 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1373 int clock;
1374
1375 if (IS_PINEVIEW(dev_priv))
1376 clock = KHz(dev_priv->rawclk_freq);
1377 else
1378 clock = KHz(dev_priv->cdclk.hw.cdclk);
1379
1380 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 32);
1381 }
1382
1383 /*
1384 * Gen4: This value represents the period of the PWM stream in display core
1385 * clocks ([DevCTG] HRAW clocks) multiplied by 128.
1386 *
1387 */
1388 static u32 i965_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1389 {
1390 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1391 int clock;
1392
1393 if (IS_G4X(dev_priv))
1394 clock = KHz(dev_priv->rawclk_freq);
1395 else
1396 clock = KHz(dev_priv->cdclk.hw.cdclk);
1397
1398 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * 128);
1399 }
1400
1401 /*
1402 * VLV: This value represents the period of the PWM stream in display core
1403 * clocks ([DevCTG] 200MHz HRAW clocks) multiplied by 128 or 25MHz S0IX clocks
1404 * multiplied by 16. CHV uses a 19.2MHz S0IX clock.
1405 */
1406 static u32 vlv_hz_to_pwm(struct intel_connector *connector, u32 pwm_freq_hz)
1407 {
1408 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1409 int mul, clock;
1410
1411 if ((I915_READ(CBR1_VLV) & CBR_PWM_CLOCK_MUX_SELECT) == 0) {
1412 if (IS_CHERRYVIEW(dev_priv))
1413 clock = KHz(19200);
1414 else
1415 clock = MHz(25);
1416 mul = 16;
1417 } else {
1418 clock = KHz(dev_priv->rawclk_freq);
1419 mul = 128;
1420 }
1421
1422 return DIV_ROUND_CLOSEST(clock, pwm_freq_hz * mul);
1423 }
1424
1425 static u32 get_backlight_max_vbt(struct intel_connector *connector)
1426 {
1427 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1428 struct intel_panel *panel = &connector->panel;
1429 u16 pwm_freq_hz = dev_priv->vbt.backlight.pwm_freq_hz;
1430 u32 pwm;
1431
1432 if (!panel->backlight.hz_to_pwm) {
1433 DRM_DEBUG_KMS("backlight frequency conversion not supported\n");
1434 return 0;
1435 }
1436
1437 if (pwm_freq_hz) {
1438 DRM_DEBUG_KMS("VBT defined backlight frequency %u Hz\n",
1439 pwm_freq_hz);
1440 } else {
1441 pwm_freq_hz = 200;
1442 DRM_DEBUG_KMS("default backlight frequency %u Hz\n",
1443 pwm_freq_hz);
1444 }
1445
1446 pwm = panel->backlight.hz_to_pwm(connector, pwm_freq_hz);
1447 if (!pwm) {
1448 DRM_DEBUG_KMS("backlight frequency conversion failed\n");
1449 return 0;
1450 }
1451
1452 return pwm;
1453 }
1454
1455 /*
1456 * Note: The setup hooks can't assume pipe is set!
1457 */
1458 static u32 get_backlight_min_vbt(struct intel_connector *connector)
1459 {
1460 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1461 struct intel_panel *panel = &connector->panel;
1462 int min;
1463
1464 WARN_ON(panel->backlight.max == 0);
1465
1466 /*
1467 * XXX: If the vbt value is 255, it makes min equal to max, which leads
1468 * to problems. There are such machines out there. Either our
1469 * interpretation is wrong or the vbt has bogus data. Or both. Safeguard
1470 * against this by letting the minimum be at most (arbitrarily chosen)
1471 * 25% of the max.
1472 */
1473 min = clamp_t(int, dev_priv->vbt.backlight.min_brightness, 0, 64);
1474 if (min != dev_priv->vbt.backlight.min_brightness) {
1475 DRM_DEBUG_KMS("clamping VBT min backlight %d/255 to %d/255\n",
1476 dev_priv->vbt.backlight.min_brightness, min);
1477 }
1478
1479 /* vbt value is a coefficient in range [0..255] */
1480 return scale(min, 0, 255, 0, panel->backlight.max);
1481 }
1482
1483 static int lpt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1484 {
1485 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1486 struct intel_panel *panel = &connector->panel;
1487 u32 pch_ctl1, pch_ctl2, val;
1488 bool alt;
1489
1490 if (HAS_PCH_LPT(dev_priv))
1491 alt = I915_READ(SOUTH_CHICKEN2) & LPT_PWM_GRANULARITY;
1492 else
1493 alt = I915_READ(SOUTH_CHICKEN1) & SPT_PWM_GRANULARITY;
1494 panel->backlight.alternate_pwm_increment = alt;
1495
1496 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1497 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1498
1499 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1500 panel->backlight.max = pch_ctl2 >> 16;
1501
1502 if (!panel->backlight.max)
1503 panel->backlight.max = get_backlight_max_vbt(connector);
1504
1505 if (!panel->backlight.max)
1506 return -ENODEV;
1507
1508 panel->backlight.min = get_backlight_min_vbt(connector);
1509
1510 val = lpt_get_backlight(connector);
1511 val = intel_panel_compute_brightness(connector, val);
1512 panel->backlight.level = clamp(val, panel->backlight.min,
1513 panel->backlight.max);
1514
1515 panel->backlight.enabled = pch_ctl1 & BLM_PCH_PWM_ENABLE;
1516
1517 return 0;
1518 }
1519
1520 static int pch_setup_backlight(struct intel_connector *connector, enum pipe unused)
1521 {
1522 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1523 struct intel_panel *panel = &connector->panel;
1524 u32 cpu_ctl2, pch_ctl1, pch_ctl2, val;
1525
1526 pch_ctl1 = I915_READ(BLC_PWM_PCH_CTL1);
1527 panel->backlight.active_low_pwm = pch_ctl1 & BLM_PCH_POLARITY;
1528
1529 pch_ctl2 = I915_READ(BLC_PWM_PCH_CTL2);
1530 panel->backlight.max = pch_ctl2 >> 16;
1531
1532 if (!panel->backlight.max)
1533 panel->backlight.max = get_backlight_max_vbt(connector);
1534
1535 if (!panel->backlight.max)
1536 return -ENODEV;
1537
1538 panel->backlight.min = get_backlight_min_vbt(connector);
1539
1540 val = pch_get_backlight(connector);
1541 val = intel_panel_compute_brightness(connector, val);
1542 panel->backlight.level = clamp(val, panel->backlight.min,
1543 panel->backlight.max);
1544
1545 cpu_ctl2 = I915_READ(BLC_PWM_CPU_CTL2);
1546 panel->backlight.enabled = (cpu_ctl2 & BLM_PWM_ENABLE) &&
1547 (pch_ctl1 & BLM_PCH_PWM_ENABLE);
1548
1549 return 0;
1550 }
1551
1552 static int i9xx_setup_backlight(struct intel_connector *connector, enum pipe unused)
1553 {
1554 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1555 struct intel_panel *panel = &connector->panel;
1556 u32 ctl, val;
1557
1558 ctl = I915_READ(BLC_PWM_CTL);
1559
1560 if (IS_GEN2(dev_priv) || IS_I915GM(dev_priv) || IS_I945GM(dev_priv))
1561 panel->backlight.combination_mode = ctl & BLM_LEGACY_MODE;
1562
1563 if (IS_PINEVIEW(dev_priv))
1564 panel->backlight.active_low_pwm = ctl & BLM_POLARITY_PNV;
1565
1566 panel->backlight.max = ctl >> 17;
1567
1568 if (!panel->backlight.max) {
1569 panel->backlight.max = get_backlight_max_vbt(connector);
1570 panel->backlight.max >>= 1;
1571 }
1572
1573 if (!panel->backlight.max)
1574 return -ENODEV;
1575
1576 if (panel->backlight.combination_mode)
1577 panel->backlight.max *= 0xff;
1578
1579 panel->backlight.min = get_backlight_min_vbt(connector);
1580
1581 val = i9xx_get_backlight(connector);
1582 val = intel_panel_compute_brightness(connector, val);
1583 panel->backlight.level = clamp(val, panel->backlight.min,
1584 panel->backlight.max);
1585
1586 panel->backlight.enabled = val != 0;
1587
1588 return 0;
1589 }
1590
1591 static int i965_setup_backlight(struct intel_connector *connector, enum pipe unused)
1592 {
1593 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1594 struct intel_panel *panel = &connector->panel;
1595 u32 ctl, ctl2, val;
1596
1597 ctl2 = I915_READ(BLC_PWM_CTL2);
1598 panel->backlight.combination_mode = ctl2 & BLM_COMBINATION_MODE;
1599 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1600
1601 ctl = I915_READ(BLC_PWM_CTL);
1602 panel->backlight.max = ctl >> 16;
1603
1604 if (!panel->backlight.max)
1605 panel->backlight.max = get_backlight_max_vbt(connector);
1606
1607 if (!panel->backlight.max)
1608 return -ENODEV;
1609
1610 if (panel->backlight.combination_mode)
1611 panel->backlight.max *= 0xff;
1612
1613 panel->backlight.min = get_backlight_min_vbt(connector);
1614
1615 val = i9xx_get_backlight(connector);
1616 val = intel_panel_compute_brightness(connector, val);
1617 panel->backlight.level = clamp(val, panel->backlight.min,
1618 panel->backlight.max);
1619
1620 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1621
1622 return 0;
1623 }
1624
1625 static int vlv_setup_backlight(struct intel_connector *connector, enum pipe pipe)
1626 {
1627 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1628 struct intel_panel *panel = &connector->panel;
1629 u32 ctl, ctl2, val;
1630
1631 if (WARN_ON(pipe != PIPE_A && pipe != PIPE_B))
1632 return -ENODEV;
1633
1634 ctl2 = I915_READ(VLV_BLC_PWM_CTL2(pipe));
1635 panel->backlight.active_low_pwm = ctl2 & BLM_POLARITY_I965;
1636
1637 ctl = I915_READ(VLV_BLC_PWM_CTL(pipe));
1638 panel->backlight.max = ctl >> 16;
1639
1640 if (!panel->backlight.max)
1641 panel->backlight.max = get_backlight_max_vbt(connector);
1642
1643 if (!panel->backlight.max)
1644 return -ENODEV;
1645
1646 panel->backlight.min = get_backlight_min_vbt(connector);
1647
1648 val = _vlv_get_backlight(dev_priv, pipe);
1649 val = intel_panel_compute_brightness(connector, val);
1650 panel->backlight.level = clamp(val, panel->backlight.min,
1651 panel->backlight.max);
1652
1653 panel->backlight.enabled = ctl2 & BLM_PWM_ENABLE;
1654
1655 return 0;
1656 }
1657
1658 static int
1659 bxt_setup_backlight(struct intel_connector *connector, enum pipe unused)
1660 {
1661 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1662 struct intel_panel *panel = &connector->panel;
1663 u32 pwm_ctl, val;
1664
1665 panel->backlight.controller = dev_priv->vbt.backlight.controller;
1666
1667 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1668
1669 /* Controller 1 uses the utility pin. */
1670 if (panel->backlight.controller == 1) {
1671 val = I915_READ(UTIL_PIN_CTL);
1672 panel->backlight.util_pin_active_low =
1673 val & UTIL_PIN_POLARITY;
1674 }
1675
1676 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1677 panel->backlight.max =
1678 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1679
1680 if (!panel->backlight.max)
1681 panel->backlight.max = get_backlight_max_vbt(connector);
1682
1683 if (!panel->backlight.max)
1684 return -ENODEV;
1685
1686 panel->backlight.min = get_backlight_min_vbt(connector);
1687
1688 val = bxt_get_backlight(connector);
1689 val = intel_panel_compute_brightness(connector, val);
1690 panel->backlight.level = clamp(val, panel->backlight.min,
1691 panel->backlight.max);
1692
1693 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1694
1695 return 0;
1696 }
1697
1698 static int
1699 cnp_setup_backlight(struct intel_connector *connector, enum pipe unused)
1700 {
1701 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1702 struct intel_panel *panel = &connector->panel;
1703 u32 pwm_ctl, val;
1704
1705 /*
1706 * CNP has the BXT implementation of backlight, but with only one
1707 * controller. TODO: ICP has multiple controllers but we only use
1708 * controller 0 for now.
1709 */
1710 panel->backlight.controller = 0;
1711
1712 pwm_ctl = I915_READ(BXT_BLC_PWM_CTL(panel->backlight.controller));
1713
1714 panel->backlight.active_low_pwm = pwm_ctl & BXT_BLC_PWM_POLARITY;
1715 panel->backlight.max =
1716 I915_READ(BXT_BLC_PWM_FREQ(panel->backlight.controller));
1717
1718 if (!panel->backlight.max)
1719 panel->backlight.max = get_backlight_max_vbt(connector);
1720
1721 if (!panel->backlight.max)
1722 return -ENODEV;
1723
1724 panel->backlight.min = get_backlight_min_vbt(connector);
1725
1726 val = bxt_get_backlight(connector);
1727 val = intel_panel_compute_brightness(connector, val);
1728 panel->backlight.level = clamp(val, panel->backlight.min,
1729 panel->backlight.max);
1730
1731 panel->backlight.enabled = pwm_ctl & BXT_BLC_PWM_ENABLE;
1732
1733 return 0;
1734 }
1735
1736 static int pwm_setup_backlight(struct intel_connector *connector,
1737 enum pipe pipe)
1738 {
1739 struct drm_device *dev = connector->base.dev;
1740 struct intel_panel *panel = &connector->panel;
1741 int retval;
1742
1743 /* Get the PWM chip for backlight control */
1744 panel->backlight.pwm = pwm_get(dev->dev, "pwm_backlight");
1745 if (IS_ERR(panel->backlight.pwm)) {
1746 DRM_ERROR("Failed to own the pwm chip\n");
1747 panel->backlight.pwm = NULL;
1748 return -ENODEV;
1749 }
1750
1751 /*
1752 * FIXME: pwm_apply_args() should be removed when switching to
1753 * the atomic PWM API.
1754 */
1755 pwm_apply_args(panel->backlight.pwm);
1756
1757 retval = pwm_config(panel->backlight.pwm, CRC_PMIC_PWM_PERIOD_NS,
1758 CRC_PMIC_PWM_PERIOD_NS);
1759 if (retval < 0) {
1760 DRM_ERROR("Failed to configure the pwm chip\n");
1761 pwm_put(panel->backlight.pwm);
1762 panel->backlight.pwm = NULL;
1763 return retval;
1764 }
1765
1766 panel->backlight.min = 0; /* 0% */
1767 panel->backlight.max = 100; /* 100% */
1768 panel->backlight.level = DIV_ROUND_UP(
1769 pwm_get_duty_cycle(panel->backlight.pwm) * 100,
1770 CRC_PMIC_PWM_PERIOD_NS);
1771 panel->backlight.enabled = panel->backlight.level != 0;
1772
1773 return 0;
1774 }
1775
1776 int intel_panel_setup_backlight(struct drm_connector *connector, enum pipe pipe)
1777 {
1778 struct drm_i915_private *dev_priv = to_i915(connector->dev);
1779 struct intel_connector *intel_connector = to_intel_connector(connector);
1780 struct intel_panel *panel = &intel_connector->panel;
1781 int ret;
1782
1783 if (!dev_priv->vbt.backlight.present) {
1784 if (dev_priv->quirks & QUIRK_BACKLIGHT_PRESENT) {
1785 DRM_DEBUG_KMS("no backlight present per VBT, but present per quirk\n");
1786 } else {
1787 DRM_DEBUG_KMS("no backlight present per VBT\n");
1788 return 0;
1789 }
1790 }
1791
1792 /* ensure intel_panel has been initialized first */
1793 if (WARN_ON(!panel->backlight.setup))
1794 return -ENODEV;
1795
1796 /* set level and max in panel struct */
1797 mutex_lock(&dev_priv->backlight_lock);
1798 ret = panel->backlight.setup(intel_connector, pipe);
1799 mutex_unlock(&dev_priv->backlight_lock);
1800
1801 if (ret) {
1802 DRM_DEBUG_KMS("failed to setup backlight for connector %s\n",
1803 connector->name);
1804 return ret;
1805 }
1806
1807 panel->backlight.present = true;
1808
1809 DRM_DEBUG_KMS("Connector %s backlight initialized, %s, brightness %u/%u\n",
1810 connector->name,
1811 enableddisabled(panel->backlight.enabled),
1812 panel->backlight.level, panel->backlight.max);
1813
1814 return 0;
1815 }
1816
1817 void intel_panel_destroy_backlight(struct drm_connector *connector)
1818 {
1819 struct intel_connector *intel_connector = to_intel_connector(connector);
1820 struct intel_panel *panel = &intel_connector->panel;
1821
1822 /* dispose of the pwm */
1823 if (panel->backlight.pwm)
1824 pwm_put(panel->backlight.pwm);
1825
1826 panel->backlight.present = false;
1827 }
1828
1829 /* Set up chip specific backlight functions */
1830 static void
1831 intel_panel_init_backlight_funcs(struct intel_panel *panel)
1832 {
1833 struct intel_connector *connector =
1834 container_of(panel, struct intel_connector, panel);
1835 struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
1836
1837 if (connector->base.connector_type == DRM_MODE_CONNECTOR_eDP &&
1838 intel_dp_aux_init_backlight_funcs(connector) == 0)
1839 return;
1840
1841 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI &&
1842 intel_dsi_dcs_init_backlight_funcs(connector) == 0)
1843 return;
1844
1845 if (IS_GEN9_LP(dev_priv)) {
1846 panel->backlight.setup = bxt_setup_backlight;
1847 panel->backlight.enable = bxt_enable_backlight;
1848 panel->backlight.disable = bxt_disable_backlight;
1849 panel->backlight.set = bxt_set_backlight;
1850 panel->backlight.get = bxt_get_backlight;
1851 panel->backlight.hz_to_pwm = bxt_hz_to_pwm;
1852 } else if (HAS_PCH_CNP(dev_priv) || HAS_PCH_ICP(dev_priv)) {
1853 panel->backlight.setup = cnp_setup_backlight;
1854 panel->backlight.enable = cnp_enable_backlight;
1855 panel->backlight.disable = cnp_disable_backlight;
1856 panel->backlight.set = bxt_set_backlight;
1857 panel->backlight.get = bxt_get_backlight;
1858 panel->backlight.hz_to_pwm = cnp_hz_to_pwm;
1859 } else if (HAS_PCH_LPT(dev_priv) || HAS_PCH_SPT(dev_priv) ||
1860 HAS_PCH_KBP(dev_priv)) {
1861 panel->backlight.setup = lpt_setup_backlight;
1862 panel->backlight.enable = lpt_enable_backlight;
1863 panel->backlight.disable = lpt_disable_backlight;
1864 panel->backlight.set = lpt_set_backlight;
1865 panel->backlight.get = lpt_get_backlight;
1866 if (HAS_PCH_LPT(dev_priv))
1867 panel->backlight.hz_to_pwm = lpt_hz_to_pwm;
1868 else
1869 panel->backlight.hz_to_pwm = spt_hz_to_pwm;
1870 } else if (HAS_PCH_SPLIT(dev_priv)) {
1871 panel->backlight.setup = pch_setup_backlight;
1872 panel->backlight.enable = pch_enable_backlight;
1873 panel->backlight.disable = pch_disable_backlight;
1874 panel->backlight.set = pch_set_backlight;
1875 panel->backlight.get = pch_get_backlight;
1876 panel->backlight.hz_to_pwm = pch_hz_to_pwm;
1877 } else if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
1878 if (connector->base.connector_type == DRM_MODE_CONNECTOR_DSI) {
1879 panel->backlight.setup = pwm_setup_backlight;
1880 panel->backlight.enable = pwm_enable_backlight;
1881 panel->backlight.disable = pwm_disable_backlight;
1882 panel->backlight.set = pwm_set_backlight;
1883 panel->backlight.get = pwm_get_backlight;
1884 } else {
1885 panel->backlight.setup = vlv_setup_backlight;
1886 panel->backlight.enable = vlv_enable_backlight;
1887 panel->backlight.disable = vlv_disable_backlight;
1888 panel->backlight.set = vlv_set_backlight;
1889 panel->backlight.get = vlv_get_backlight;
1890 panel->backlight.hz_to_pwm = vlv_hz_to_pwm;
1891 }
1892 } else if (IS_GEN4(dev_priv)) {
1893 panel->backlight.setup = i965_setup_backlight;
1894 panel->backlight.enable = i965_enable_backlight;
1895 panel->backlight.disable = i965_disable_backlight;
1896 panel->backlight.set = i9xx_set_backlight;
1897 panel->backlight.get = i9xx_get_backlight;
1898 panel->backlight.hz_to_pwm = i965_hz_to_pwm;
1899 } else {
1900 panel->backlight.setup = i9xx_setup_backlight;
1901 panel->backlight.enable = i9xx_enable_backlight;
1902 panel->backlight.disable = i9xx_disable_backlight;
1903 panel->backlight.set = i9xx_set_backlight;
1904 panel->backlight.get = i9xx_get_backlight;
1905 panel->backlight.hz_to_pwm = i9xx_hz_to_pwm;
1906 }
1907 }
1908
1909 int intel_panel_init(struct intel_panel *panel,
1910 struct drm_display_mode *fixed_mode,
1911 struct drm_display_mode *downclock_mode)
1912 {
1913 intel_panel_init_backlight_funcs(panel);
1914
1915 panel->fixed_mode = fixed_mode;
1916 panel->downclock_mode = downclock_mode;
1917
1918 return 0;
1919 }
1920
1921 void intel_panel_fini(struct intel_panel *panel)
1922 {
1923 struct intel_connector *intel_connector =
1924 container_of(panel, struct intel_connector, panel);
1925
1926 if (panel->fixed_mode)
1927 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
1928
1929 if (panel->downclock_mode)
1930 drm_mode_destroy(intel_connector->base.dev,
1931 panel->downclock_mode);
1932 }
(deprecated) Btrfs devel tree