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[linux-2.6/btrfs-unstable.git] / drivers / usb / host / xhci.c
blob2b8d9a24af09ef2edb6269e3fefbecda59bc5e4e
1 /*
2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
6 * Author: Sarah Sharp
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 * for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
32 #include "xhci.h"
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk;
40 module_param(link_quirk, int, S_IRUGO | S_IWUSR);
41 MODULE_PARM_DESC(link_quirk, "Don't clear the chain bit on a link TRB");
43 static unsigned int quirks;
44 module_param(quirks, uint, S_IRUGO);
45 MODULE_PARM_DESC(quirks, "Bit flags for quirks to be enabled as default");
47 /* TODO: copied from ehci-hcd.c - can this be refactored? */
49 * xhci_handshake - spin reading hc until handshake completes or fails
50 * @ptr: address of hc register to be read
51 * @mask: bits to look at in result of read
52 * @done: value of those bits when handshake succeeds
53 * @usec: timeout in microseconds
55 * Returns negative errno, or zero on success
57 * Success happens when the "mask" bits have the specified value (hardware
58 * handshake done). There are two failure modes: "usec" have passed (major
59 * hardware flakeout), or the register reads as all-ones (hardware removed).
61 int xhci_handshake(struct xhci_hcd *xhci, void __iomem *ptr,
62 u32 mask, u32 done, int usec)
64 u32 result;
66 do {
67 result = readl(ptr);
68 if (result == ~(u32)0) /* card removed */
69 return -ENODEV;
70 result &= mask;
71 if (result == done)
72 return 0;
73 udelay(1);
74 usec--;
75 } while (usec > 0);
76 return -ETIMEDOUT;
80 * Disable interrupts and begin the xHCI halting process.
82 void xhci_quiesce(struct xhci_hcd *xhci)
84 u32 halted;
85 u32 cmd;
86 u32 mask;
88 mask = ~(XHCI_IRQS);
89 halted = readl(&xhci->op_regs->status) & STS_HALT;
90 if (!halted)
91 mask &= ~CMD_RUN;
93 cmd = readl(&xhci->op_regs->command);
94 cmd &= mask;
95 writel(cmd, &xhci->op_regs->command);
99 * Force HC into halt state.
101 * Disable any IRQs and clear the run/stop bit.
102 * HC will complete any current and actively pipelined transactions, and
103 * should halt within 16 ms of the run/stop bit being cleared.
104 * Read HC Halted bit in the status register to see when the HC is finished.
106 int xhci_halt(struct xhci_hcd *xhci)
108 int ret;
109 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Halt the HC");
110 xhci_quiesce(xhci);
112 ret = xhci_handshake(xhci, &xhci->op_regs->status,
113 STS_HALT, STS_HALT, XHCI_MAX_HALT_USEC);
114 if (!ret) {
115 xhci->xhc_state |= XHCI_STATE_HALTED;
116 xhci->cmd_ring_state = CMD_RING_STATE_STOPPED;
117 } else
118 xhci_warn(xhci, "Host not halted after %u microseconds.\n",
119 XHCI_MAX_HALT_USEC);
120 return ret;
124 * Set the run bit and wait for the host to be running.
126 static int xhci_start(struct xhci_hcd *xhci)
128 u32 temp;
129 int ret;
131 temp = readl(&xhci->op_regs->command);
132 temp |= (CMD_RUN);
133 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Turn on HC, cmd = 0x%x.",
134 temp);
135 writel(temp, &xhci->op_regs->command);
138 * Wait for the HCHalted Status bit to be 0 to indicate the host is
139 * running.
141 ret = xhci_handshake(xhci, &xhci->op_regs->status,
142 STS_HALT, 0, XHCI_MAX_HALT_USEC);
143 if (ret == -ETIMEDOUT)
144 xhci_err(xhci, "Host took too long to start, "
145 "waited %u microseconds.\n",
146 XHCI_MAX_HALT_USEC);
147 if (!ret)
148 xhci->xhc_state &= ~XHCI_STATE_HALTED;
149 return ret;
153 * Reset a halted HC.
155 * This resets pipelines, timers, counters, state machines, etc.
156 * Transactions will be terminated immediately, and operational registers
157 * will be set to their defaults.
159 int xhci_reset(struct xhci_hcd *xhci)
161 u32 command;
162 u32 state;
163 int ret, i;
165 state = readl(&xhci->op_regs->status);
166 if ((state & STS_HALT) == 0) {
167 xhci_warn(xhci, "Host controller not halted, aborting reset.\n");
168 return 0;
171 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "// Reset the HC");
172 command = readl(&xhci->op_regs->command);
173 command |= CMD_RESET;
174 writel(command, &xhci->op_regs->command);
176 ret = xhci_handshake(xhci, &xhci->op_regs->command,
177 CMD_RESET, 0, 10 * 1000 * 1000);
178 if (ret)
179 return ret;
181 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
182 "Wait for controller to be ready for doorbell rings");
184 * xHCI cannot write to any doorbells or operational registers other
185 * than status until the "Controller Not Ready" flag is cleared.
187 ret = xhci_handshake(xhci, &xhci->op_regs->status,
188 STS_CNR, 0, 10 * 1000 * 1000);
190 for (i = 0; i < 2; ++i) {
191 xhci->bus_state[i].port_c_suspend = 0;
192 xhci->bus_state[i].suspended_ports = 0;
193 xhci->bus_state[i].resuming_ports = 0;
196 return ret;
199 #ifdef CONFIG_PCI
200 static int xhci_free_msi(struct xhci_hcd *xhci)
202 int i;
204 if (!xhci->msix_entries)
205 return -EINVAL;
207 for (i = 0; i < xhci->msix_count; i++)
208 if (xhci->msix_entries[i].vector)
209 free_irq(xhci->msix_entries[i].vector,
210 xhci_to_hcd(xhci));
211 return 0;
215 * Set up MSI
217 static int xhci_setup_msi(struct xhci_hcd *xhci)
219 int ret;
220 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
222 ret = pci_enable_msi(pdev);
223 if (ret) {
224 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
225 "failed to allocate MSI entry");
226 return ret;
229 ret = request_irq(pdev->irq, xhci_msi_irq,
230 0, "xhci_hcd", xhci_to_hcd(xhci));
231 if (ret) {
232 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
233 "disable MSI interrupt");
234 pci_disable_msi(pdev);
237 return ret;
241 * Free IRQs
242 * free all IRQs request
244 static void xhci_free_irq(struct xhci_hcd *xhci)
246 struct pci_dev *pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
247 int ret;
249 /* return if using legacy interrupt */
250 if (xhci_to_hcd(xhci)->irq > 0)
251 return;
253 ret = xhci_free_msi(xhci);
254 if (!ret)
255 return;
256 if (pdev->irq > 0)
257 free_irq(pdev->irq, xhci_to_hcd(xhci));
259 return;
263 * Set up MSI-X
265 static int xhci_setup_msix(struct xhci_hcd *xhci)
267 int i, ret = 0;
268 struct usb_hcd *hcd = xhci_to_hcd(xhci);
269 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
272 * calculate number of msi-x vectors supported.
273 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
274 * with max number of interrupters based on the xhci HCSPARAMS1.
275 * - num_online_cpus: maximum msi-x vectors per CPUs core.
276 * Add additional 1 vector to ensure always available interrupt.
278 xhci->msix_count = min(num_online_cpus() + 1,
279 HCS_MAX_INTRS(xhci->hcs_params1));
281 xhci->msix_entries =
282 kmalloc((sizeof(struct msix_entry))*xhci->msix_count,
283 GFP_KERNEL);
284 if (!xhci->msix_entries) {
285 xhci_err(xhci, "Failed to allocate MSI-X entries\n");
286 return -ENOMEM;
289 for (i = 0; i < xhci->msix_count; i++) {
290 xhci->msix_entries[i].entry = i;
291 xhci->msix_entries[i].vector = 0;
294 ret = pci_enable_msix_exact(pdev, xhci->msix_entries, xhci->msix_count);
295 if (ret) {
296 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
297 "Failed to enable MSI-X");
298 goto free_entries;
301 for (i = 0; i < xhci->msix_count; i++) {
302 ret = request_irq(xhci->msix_entries[i].vector,
303 xhci_msi_irq,
304 0, "xhci_hcd", xhci_to_hcd(xhci));
305 if (ret)
306 goto disable_msix;
309 hcd->msix_enabled = 1;
310 return ret;
312 disable_msix:
313 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "disable MSI-X interrupt");
314 xhci_free_irq(xhci);
315 pci_disable_msix(pdev);
316 free_entries:
317 kfree(xhci->msix_entries);
318 xhci->msix_entries = NULL;
319 return ret;
322 /* Free any IRQs and disable MSI-X */
323 static void xhci_cleanup_msix(struct xhci_hcd *xhci)
325 struct usb_hcd *hcd = xhci_to_hcd(xhci);
326 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
328 if (xhci->quirks & XHCI_PLAT)
329 return;
331 xhci_free_irq(xhci);
333 if (xhci->msix_entries) {
334 pci_disable_msix(pdev);
335 kfree(xhci->msix_entries);
336 xhci->msix_entries = NULL;
337 } else {
338 pci_disable_msi(pdev);
341 hcd->msix_enabled = 0;
342 return;
345 static void __maybe_unused xhci_msix_sync_irqs(struct xhci_hcd *xhci)
347 int i;
349 if (xhci->msix_entries) {
350 for (i = 0; i < xhci->msix_count; i++)
351 synchronize_irq(xhci->msix_entries[i].vector);
355 static int xhci_try_enable_msi(struct usb_hcd *hcd)
357 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
358 struct pci_dev *pdev;
359 int ret;
361 /* The xhci platform device has set up IRQs through usb_add_hcd. */
362 if (xhci->quirks & XHCI_PLAT)
363 return 0;
365 pdev = to_pci_dev(xhci_to_hcd(xhci)->self.controller);
367 * Some Fresco Logic host controllers advertise MSI, but fail to
368 * generate interrupts. Don't even try to enable MSI.
370 if (xhci->quirks & XHCI_BROKEN_MSI)
371 goto legacy_irq;
373 /* unregister the legacy interrupt */
374 if (hcd->irq)
375 free_irq(hcd->irq, hcd);
376 hcd->irq = 0;
378 ret = xhci_setup_msix(xhci);
379 if (ret)
380 /* fall back to msi*/
381 ret = xhci_setup_msi(xhci);
383 if (!ret)
384 /* hcd->irq is 0, we have MSI */
385 return 0;
387 if (!pdev->irq) {
388 xhci_err(xhci, "No msi-x/msi found and no IRQ in BIOS\n");
389 return -EINVAL;
392 legacy_irq:
393 if (!strlen(hcd->irq_descr))
394 snprintf(hcd->irq_descr, sizeof(hcd->irq_descr), "%s:usb%d",
395 hcd->driver->description, hcd->self.busnum);
397 /* fall back to legacy interrupt*/
398 ret = request_irq(pdev->irq, &usb_hcd_irq, IRQF_SHARED,
399 hcd->irq_descr, hcd);
400 if (ret) {
401 xhci_err(xhci, "request interrupt %d failed\n",
402 pdev->irq);
403 return ret;
405 hcd->irq = pdev->irq;
406 return 0;
409 #else
411 static inline int xhci_try_enable_msi(struct usb_hcd *hcd)
413 return 0;
416 static inline void xhci_cleanup_msix(struct xhci_hcd *xhci)
420 static inline void xhci_msix_sync_irqs(struct xhci_hcd *xhci)
424 #endif
426 static void compliance_mode_recovery(unsigned long arg)
428 struct xhci_hcd *xhci;
429 struct usb_hcd *hcd;
430 u32 temp;
431 int i;
433 xhci = (struct xhci_hcd *)arg;
435 for (i = 0; i < xhci->num_usb3_ports; i++) {
436 temp = readl(xhci->usb3_ports[i]);
437 if ((temp & PORT_PLS_MASK) == USB_SS_PORT_LS_COMP_MOD) {
439 * Compliance Mode Detected. Letting USB Core
440 * handle the Warm Reset
442 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
443 "Compliance mode detected->port %d",
444 i + 1);
445 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
446 "Attempting compliance mode recovery");
447 hcd = xhci->shared_hcd;
449 if (hcd->state == HC_STATE_SUSPENDED)
450 usb_hcd_resume_root_hub(hcd);
452 usb_hcd_poll_rh_status(hcd);
456 if (xhci->port_status_u0 != ((1 << xhci->num_usb3_ports)-1))
457 mod_timer(&xhci->comp_mode_recovery_timer,
458 jiffies + msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
462 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
463 * that causes ports behind that hardware to enter compliance mode sometimes.
464 * The quirk creates a timer that polls every 2 seconds the link state of
465 * each host controller's port and recovers it by issuing a Warm reset
466 * if Compliance mode is detected, otherwise the port will become "dead" (no
467 * device connections or disconnections will be detected anymore). Becasue no
468 * status event is generated when entering compliance mode (per xhci spec),
469 * this quirk is needed on systems that have the failing hardware installed.
471 static void compliance_mode_recovery_timer_init(struct xhci_hcd *xhci)
473 xhci->port_status_u0 = 0;
474 init_timer(&xhci->comp_mode_recovery_timer);
476 xhci->comp_mode_recovery_timer.data = (unsigned long) xhci;
477 xhci->comp_mode_recovery_timer.function = compliance_mode_recovery;
478 xhci->comp_mode_recovery_timer.expires = jiffies +
479 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS);
481 set_timer_slack(&xhci->comp_mode_recovery_timer,
482 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS));
483 add_timer(&xhci->comp_mode_recovery_timer);
484 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
485 "Compliance mode recovery timer initialized");
489 * This function identifies the systems that have installed the SN65LVPE502CP
490 * USB3.0 re-driver and that need the Compliance Mode Quirk.
491 * Systems:
492 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
494 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
496 const char *dmi_product_name, *dmi_sys_vendor;
498 dmi_product_name = dmi_get_system_info(DMI_PRODUCT_NAME);
499 dmi_sys_vendor = dmi_get_system_info(DMI_SYS_VENDOR);
500 if (!dmi_product_name || !dmi_sys_vendor)
501 return false;
503 if (!(strstr(dmi_sys_vendor, "Hewlett-Packard")))
504 return false;
506 if (strstr(dmi_product_name, "Z420") ||
507 strstr(dmi_product_name, "Z620") ||
508 strstr(dmi_product_name, "Z820") ||
509 strstr(dmi_product_name, "Z1 Workstation"))
510 return true;
512 return false;
515 static int xhci_all_ports_seen_u0(struct xhci_hcd *xhci)
517 return (xhci->port_status_u0 == ((1 << xhci->num_usb3_ports)-1));
522 * Initialize memory for HCD and xHC (one-time init).
524 * Program the PAGESIZE register, initialize the device context array, create
525 * device contexts (?), set up a command ring segment (or two?), create event
526 * ring (one for now).
528 int xhci_init(struct usb_hcd *hcd)
530 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
531 int retval = 0;
533 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_init");
534 spin_lock_init(&xhci->lock);
535 if (xhci->hci_version == 0x95 && link_quirk) {
536 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
537 "QUIRK: Not clearing Link TRB chain bits.");
538 xhci->quirks |= XHCI_LINK_TRB_QUIRK;
539 } else {
540 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
541 "xHCI doesn't need link TRB QUIRK");
543 retval = xhci_mem_init(xhci, GFP_KERNEL);
544 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "Finished xhci_init");
546 /* Initializing Compliance Mode Recovery Data If Needed */
547 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
548 xhci->quirks |= XHCI_COMP_MODE_QUIRK;
549 compliance_mode_recovery_timer_init(xhci);
552 return retval;
555 /*-------------------------------------------------------------------------*/
558 static int xhci_run_finished(struct xhci_hcd *xhci)
560 if (xhci_start(xhci)) {
561 xhci_halt(xhci);
562 return -ENODEV;
564 xhci->shared_hcd->state = HC_STATE_RUNNING;
565 xhci->cmd_ring_state = CMD_RING_STATE_RUNNING;
567 if (xhci->quirks & XHCI_NEC_HOST)
568 xhci_ring_cmd_db(xhci);
570 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
571 "Finished xhci_run for USB3 roothub");
572 return 0;
576 * Start the HC after it was halted.
578 * This function is called by the USB core when the HC driver is added.
579 * Its opposite is xhci_stop().
581 * xhci_init() must be called once before this function can be called.
582 * Reset the HC, enable device slot contexts, program DCBAAP, and
583 * set command ring pointer and event ring pointer.
585 * Setup MSI-X vectors and enable interrupts.
587 int xhci_run(struct usb_hcd *hcd)
589 u32 temp;
590 u64 temp_64;
591 int ret;
592 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
594 /* Start the xHCI host controller running only after the USB 2.0 roothub
595 * is setup.
598 hcd->uses_new_polling = 1;
599 if (!usb_hcd_is_primary_hcd(hcd))
600 return xhci_run_finished(xhci);
602 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "xhci_run");
604 ret = xhci_try_enable_msi(hcd);
605 if (ret)
606 return ret;
608 xhci_dbg(xhci, "Command ring memory map follows:\n");
609 xhci_debug_ring(xhci, xhci->cmd_ring);
610 xhci_dbg_ring_ptrs(xhci, xhci->cmd_ring);
611 xhci_dbg_cmd_ptrs(xhci);
613 xhci_dbg(xhci, "ERST memory map follows:\n");
614 xhci_dbg_erst(xhci, &xhci->erst);
615 xhci_dbg(xhci, "Event ring:\n");
616 xhci_debug_ring(xhci, xhci->event_ring);
617 xhci_dbg_ring_ptrs(xhci, xhci->event_ring);
618 temp_64 = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
619 temp_64 &= ~ERST_PTR_MASK;
620 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
621 "ERST deq = 64'h%0lx", (long unsigned int) temp_64);
623 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
624 "// Set the interrupt modulation register");
625 temp = readl(&xhci->ir_set->irq_control);
626 temp &= ~ER_IRQ_INTERVAL_MASK;
627 temp |= (u32) 160;
628 writel(temp, &xhci->ir_set->irq_control);
630 /* Set the HCD state before we enable the irqs */
631 temp = readl(&xhci->op_regs->command);
632 temp |= (CMD_EIE);
633 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
634 "// Enable interrupts, cmd = 0x%x.", temp);
635 writel(temp, &xhci->op_regs->command);
637 temp = readl(&xhci->ir_set->irq_pending);
638 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
639 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
640 xhci->ir_set, (unsigned int) ER_IRQ_ENABLE(temp));
641 writel(ER_IRQ_ENABLE(temp), &xhci->ir_set->irq_pending);
642 xhci_print_ir_set(xhci, 0);
644 if (xhci->quirks & XHCI_NEC_HOST) {
645 struct xhci_command *command;
646 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
647 if (!command)
648 return -ENOMEM;
649 xhci_queue_vendor_command(xhci, command, 0, 0, 0,
650 TRB_TYPE(TRB_NEC_GET_FW));
652 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
653 "Finished xhci_run for USB2 roothub");
654 return 0;
657 static void xhci_only_stop_hcd(struct usb_hcd *hcd)
659 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
661 spin_lock_irq(&xhci->lock);
662 xhci_halt(xhci);
664 /* The shared_hcd is going to be deallocated shortly (the USB core only
665 * calls this function when allocation fails in usb_add_hcd(), or
666 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
668 xhci->shared_hcd = NULL;
669 spin_unlock_irq(&xhci->lock);
673 * Stop xHCI driver.
675 * This function is called by the USB core when the HC driver is removed.
676 * Its opposite is xhci_run().
678 * Disable device contexts, disable IRQs, and quiesce the HC.
679 * Reset the HC, finish any completed transactions, and cleanup memory.
681 void xhci_stop(struct usb_hcd *hcd)
683 u32 temp;
684 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
686 if (!usb_hcd_is_primary_hcd(hcd)) {
687 xhci_only_stop_hcd(xhci->shared_hcd);
688 return;
691 spin_lock_irq(&xhci->lock);
692 /* Make sure the xHC is halted for a USB3 roothub
693 * (xhci_stop() could be called as part of failed init).
695 xhci_halt(xhci);
696 xhci_reset(xhci);
697 spin_unlock_irq(&xhci->lock);
699 xhci_cleanup_msix(xhci);
701 /* Deleting Compliance Mode Recovery Timer */
702 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
703 (!(xhci_all_ports_seen_u0(xhci)))) {
704 del_timer_sync(&xhci->comp_mode_recovery_timer);
705 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
706 "%s: compliance mode recovery timer deleted",
707 __func__);
710 if (xhci->quirks & XHCI_AMD_PLL_FIX)
711 usb_amd_dev_put();
713 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
714 "// Disabling event ring interrupts");
715 temp = readl(&xhci->op_regs->status);
716 writel(temp & ~STS_EINT, &xhci->op_regs->status);
717 temp = readl(&xhci->ir_set->irq_pending);
718 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
719 xhci_print_ir_set(xhci, 0);
721 xhci_dbg_trace(xhci, trace_xhci_dbg_init, "cleaning up memory");
722 xhci_mem_cleanup(xhci);
723 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
724 "xhci_stop completed - status = %x",
725 readl(&xhci->op_regs->status));
729 * Shutdown HC (not bus-specific)
731 * This is called when the machine is rebooting or halting. We assume that the
732 * machine will be powered off, and the HC's internal state will be reset.
733 * Don't bother to free memory.
735 * This will only ever be called with the main usb_hcd (the USB3 roothub).
737 void xhci_shutdown(struct usb_hcd *hcd)
739 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
741 if (xhci->quirks & XHCI_SPURIOUS_REBOOT)
742 usb_disable_xhci_ports(to_pci_dev(hcd->self.controller));
744 spin_lock_irq(&xhci->lock);
745 xhci_halt(xhci);
746 /* Workaround for spurious wakeups at shutdown with HSW */
747 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
748 xhci_reset(xhci);
749 spin_unlock_irq(&xhci->lock);
751 xhci_cleanup_msix(xhci);
753 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
754 "xhci_shutdown completed - status = %x",
755 readl(&xhci->op_regs->status));
757 /* Yet another workaround for spurious wakeups at shutdown with HSW */
758 if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
759 pci_set_power_state(to_pci_dev(hcd->self.controller), PCI_D3hot);
762 #ifdef CONFIG_PM
763 static void xhci_save_registers(struct xhci_hcd *xhci)
765 xhci->s3.command = readl(&xhci->op_regs->command);
766 xhci->s3.dev_nt = readl(&xhci->op_regs->dev_notification);
767 xhci->s3.dcbaa_ptr = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
768 xhci->s3.config_reg = readl(&xhci->op_regs->config_reg);
769 xhci->s3.erst_size = readl(&xhci->ir_set->erst_size);
770 xhci->s3.erst_base = xhci_read_64(xhci, &xhci->ir_set->erst_base);
771 xhci->s3.erst_dequeue = xhci_read_64(xhci, &xhci->ir_set->erst_dequeue);
772 xhci->s3.irq_pending = readl(&xhci->ir_set->irq_pending);
773 xhci->s3.irq_control = readl(&xhci->ir_set->irq_control);
776 static void xhci_restore_registers(struct xhci_hcd *xhci)
778 writel(xhci->s3.command, &xhci->op_regs->command);
779 writel(xhci->s3.dev_nt, &xhci->op_regs->dev_notification);
780 xhci_write_64(xhci, xhci->s3.dcbaa_ptr, &xhci->op_regs->dcbaa_ptr);
781 writel(xhci->s3.config_reg, &xhci->op_regs->config_reg);
782 writel(xhci->s3.erst_size, &xhci->ir_set->erst_size);
783 xhci_write_64(xhci, xhci->s3.erst_base, &xhci->ir_set->erst_base);
784 xhci_write_64(xhci, xhci->s3.erst_dequeue, &xhci->ir_set->erst_dequeue);
785 writel(xhci->s3.irq_pending, &xhci->ir_set->irq_pending);
786 writel(xhci->s3.irq_control, &xhci->ir_set->irq_control);
789 static void xhci_set_cmd_ring_deq(struct xhci_hcd *xhci)
791 u64 val_64;
793 /* step 2: initialize command ring buffer */
794 val_64 = xhci_read_64(xhci, &xhci->op_regs->cmd_ring);
795 val_64 = (val_64 & (u64) CMD_RING_RSVD_BITS) |
796 (xhci_trb_virt_to_dma(xhci->cmd_ring->deq_seg,
797 xhci->cmd_ring->dequeue) &
798 (u64) ~CMD_RING_RSVD_BITS) |
799 xhci->cmd_ring->cycle_state;
800 xhci_dbg_trace(xhci, trace_xhci_dbg_init,
801 "// Setting command ring address to 0x%llx",
802 (long unsigned long) val_64);
803 xhci_write_64(xhci, val_64, &xhci->op_regs->cmd_ring);
807 * The whole command ring must be cleared to zero when we suspend the host.
809 * The host doesn't save the command ring pointer in the suspend well, so we
810 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
811 * aligned, because of the reserved bits in the command ring dequeue pointer
812 * register. Therefore, we can't just set the dequeue pointer back in the
813 * middle of the ring (TRBs are 16-byte aligned).
815 static void xhci_clear_command_ring(struct xhci_hcd *xhci)
817 struct xhci_ring *ring;
818 struct xhci_segment *seg;
820 ring = xhci->cmd_ring;
821 seg = ring->deq_seg;
822 do {
823 memset(seg->trbs, 0,
824 sizeof(union xhci_trb) * (TRBS_PER_SEGMENT - 1));
825 seg->trbs[TRBS_PER_SEGMENT - 1].link.control &=
826 cpu_to_le32(~TRB_CYCLE);
827 seg = seg->next;
828 } while (seg != ring->deq_seg);
830 /* Reset the software enqueue and dequeue pointers */
831 ring->deq_seg = ring->first_seg;
832 ring->dequeue = ring->first_seg->trbs;
833 ring->enq_seg = ring->deq_seg;
834 ring->enqueue = ring->dequeue;
836 ring->num_trbs_free = ring->num_segs * (TRBS_PER_SEGMENT - 1) - 1;
838 * Ring is now zeroed, so the HW should look for change of ownership
839 * when the cycle bit is set to 1.
841 ring->cycle_state = 1;
844 * Reset the hardware dequeue pointer.
845 * Yes, this will need to be re-written after resume, but we're paranoid
846 * and want to make sure the hardware doesn't access bogus memory
847 * because, say, the BIOS or an SMI started the host without changing
848 * the command ring pointers.
850 xhci_set_cmd_ring_deq(xhci);
854 * Stop HC (not bus-specific)
856 * This is called when the machine transition into S3/S4 mode.
859 int xhci_suspend(struct xhci_hcd *xhci)
861 int rc = 0;
862 unsigned int delay = XHCI_MAX_HALT_USEC;
863 struct usb_hcd *hcd = xhci_to_hcd(xhci);
864 u32 command;
866 if (hcd->state != HC_STATE_SUSPENDED ||
867 xhci->shared_hcd->state != HC_STATE_SUSPENDED)
868 return -EINVAL;
870 /* Don't poll the roothubs on bus suspend. */
871 xhci_dbg(xhci, "%s: stopping port polling.\n", __func__);
872 clear_bit(HCD_FLAG_POLL_RH, &hcd->flags);
873 del_timer_sync(&hcd->rh_timer);
875 spin_lock_irq(&xhci->lock);
876 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
877 clear_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
878 /* step 1: stop endpoint */
879 /* skipped assuming that port suspend has done */
881 /* step 2: clear Run/Stop bit */
882 command = readl(&xhci->op_regs->command);
883 command &= ~CMD_RUN;
884 writel(command, &xhci->op_regs->command);
886 /* Some chips from Fresco Logic need an extraordinary delay */
887 delay *= (xhci->quirks & XHCI_SLOW_SUSPEND) ? 10 : 1;
889 if (xhci_handshake(xhci, &xhci->op_regs->status,
890 STS_HALT, STS_HALT, delay)) {
891 xhci_warn(xhci, "WARN: xHC CMD_RUN timeout\n");
892 spin_unlock_irq(&xhci->lock);
893 return -ETIMEDOUT;
895 xhci_clear_command_ring(xhci);
897 /* step 3: save registers */
898 xhci_save_registers(xhci);
900 /* step 4: set CSS flag */
901 command = readl(&xhci->op_regs->command);
902 command |= CMD_CSS;
903 writel(command, &xhci->op_regs->command);
904 if (xhci_handshake(xhci, &xhci->op_regs->status,
905 STS_SAVE, 0, 10 * 1000)) {
906 xhci_warn(xhci, "WARN: xHC save state timeout\n");
907 spin_unlock_irq(&xhci->lock);
908 return -ETIMEDOUT;
910 spin_unlock_irq(&xhci->lock);
913 * Deleting Compliance Mode Recovery Timer because the xHCI Host
914 * is about to be suspended.
916 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
917 (!(xhci_all_ports_seen_u0(xhci)))) {
918 del_timer_sync(&xhci->comp_mode_recovery_timer);
919 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
920 "%s: compliance mode recovery timer deleted",
921 __func__);
924 /* step 5: remove core well power */
925 /* synchronize irq when using MSI-X */
926 xhci_msix_sync_irqs(xhci);
928 return rc;
932 * start xHC (not bus-specific)
934 * This is called when the machine transition from S3/S4 mode.
937 int xhci_resume(struct xhci_hcd *xhci, bool hibernated)
939 u32 command, temp = 0;
940 struct usb_hcd *hcd = xhci_to_hcd(xhci);
941 struct usb_hcd *secondary_hcd;
942 int retval = 0;
943 bool comp_timer_running = false;
945 /* Wait a bit if either of the roothubs need to settle from the
946 * transition into bus suspend.
948 if (time_before(jiffies, xhci->bus_state[0].next_statechange) ||
949 time_before(jiffies,
950 xhci->bus_state[1].next_statechange))
951 msleep(100);
953 set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags);
954 set_bit(HCD_FLAG_HW_ACCESSIBLE, &xhci->shared_hcd->flags);
956 spin_lock_irq(&xhci->lock);
957 if (xhci->quirks & XHCI_RESET_ON_RESUME)
958 hibernated = true;
960 if (!hibernated) {
961 /* step 1: restore register */
962 xhci_restore_registers(xhci);
963 /* step 2: initialize command ring buffer */
964 xhci_set_cmd_ring_deq(xhci);
965 /* step 3: restore state and start state*/
966 /* step 3: set CRS flag */
967 command = readl(&xhci->op_regs->command);
968 command |= CMD_CRS;
969 writel(command, &xhci->op_regs->command);
970 if (xhci_handshake(xhci, &xhci->op_regs->status,
971 STS_RESTORE, 0, 10 * 1000)) {
972 xhci_warn(xhci, "WARN: xHC restore state timeout\n");
973 spin_unlock_irq(&xhci->lock);
974 return -ETIMEDOUT;
976 temp = readl(&xhci->op_regs->status);
979 /* If restore operation fails, re-initialize the HC during resume */
980 if ((temp & STS_SRE) || hibernated) {
982 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) &&
983 !(xhci_all_ports_seen_u0(xhci))) {
984 del_timer_sync(&xhci->comp_mode_recovery_timer);
985 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
986 "Compliance Mode Recovery Timer deleted!");
989 /* Let the USB core know _both_ roothubs lost power. */
990 usb_root_hub_lost_power(xhci->main_hcd->self.root_hub);
991 usb_root_hub_lost_power(xhci->shared_hcd->self.root_hub);
993 xhci_dbg(xhci, "Stop HCD\n");
994 xhci_halt(xhci);
995 xhci_reset(xhci);
996 spin_unlock_irq(&xhci->lock);
997 xhci_cleanup_msix(xhci);
999 xhci_dbg(xhci, "// Disabling event ring interrupts\n");
1000 temp = readl(&xhci->op_regs->status);
1001 writel(temp & ~STS_EINT, &xhci->op_regs->status);
1002 temp = readl(&xhci->ir_set->irq_pending);
1003 writel(ER_IRQ_DISABLE(temp), &xhci->ir_set->irq_pending);
1004 xhci_print_ir_set(xhci, 0);
1006 xhci_dbg(xhci, "cleaning up memory\n");
1007 xhci_mem_cleanup(xhci);
1008 xhci_dbg(xhci, "xhci_stop completed - status = %x\n",
1009 readl(&xhci->op_regs->status));
1011 /* USB core calls the PCI reinit and start functions twice:
1012 * first with the primary HCD, and then with the secondary HCD.
1013 * If we don't do the same, the host will never be started.
1015 if (!usb_hcd_is_primary_hcd(hcd))
1016 secondary_hcd = hcd;
1017 else
1018 secondary_hcd = xhci->shared_hcd;
1020 xhci_dbg(xhci, "Initialize the xhci_hcd\n");
1021 retval = xhci_init(hcd->primary_hcd);
1022 if (retval)
1023 return retval;
1024 comp_timer_running = true;
1026 xhci_dbg(xhci, "Start the primary HCD\n");
1027 retval = xhci_run(hcd->primary_hcd);
1028 if (!retval) {
1029 xhci_dbg(xhci, "Start the secondary HCD\n");
1030 retval = xhci_run(secondary_hcd);
1032 hcd->state = HC_STATE_SUSPENDED;
1033 xhci->shared_hcd->state = HC_STATE_SUSPENDED;
1034 goto done;
1037 /* step 4: set Run/Stop bit */
1038 command = readl(&xhci->op_regs->command);
1039 command |= CMD_RUN;
1040 writel(command, &xhci->op_regs->command);
1041 xhci_handshake(xhci, &xhci->op_regs->status, STS_HALT,
1042 0, 250 * 1000);
1044 /* step 5: walk topology and initialize portsc,
1045 * portpmsc and portli
1047 /* this is done in bus_resume */
1049 /* step 6: restart each of the previously
1050 * Running endpoints by ringing their doorbells
1053 spin_unlock_irq(&xhci->lock);
1055 done:
1056 if (retval == 0) {
1057 usb_hcd_resume_root_hub(hcd);
1058 usb_hcd_resume_root_hub(xhci->shared_hcd);
1062 * If system is subject to the Quirk, Compliance Mode Timer needs to
1063 * be re-initialized Always after a system resume. Ports are subject
1064 * to suffer the Compliance Mode issue again. It doesn't matter if
1065 * ports have entered previously to U0 before system's suspension.
1067 if ((xhci->quirks & XHCI_COMP_MODE_QUIRK) && !comp_timer_running)
1068 compliance_mode_recovery_timer_init(xhci);
1070 /* Re-enable port polling. */
1071 xhci_dbg(xhci, "%s: starting port polling.\n", __func__);
1072 set_bit(HCD_FLAG_POLL_RH, &hcd->flags);
1073 usb_hcd_poll_rh_status(hcd);
1075 return retval;
1077 #endif /* CONFIG_PM */
1079 /*-------------------------------------------------------------------------*/
1082 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1083 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1084 * value to right shift 1 for the bitmask.
1086 * Index = (epnum * 2) + direction - 1,
1087 * where direction = 0 for OUT, 1 for IN.
1088 * For control endpoints, the IN index is used (OUT index is unused), so
1089 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1091 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor *desc)
1093 unsigned int index;
1094 if (usb_endpoint_xfer_control(desc))
1095 index = (unsigned int) (usb_endpoint_num(desc)*2);
1096 else
1097 index = (unsigned int) (usb_endpoint_num(desc)*2) +
1098 (usb_endpoint_dir_in(desc) ? 1 : 0) - 1;
1099 return index;
1102 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1103 * address from the XHCI endpoint index.
1105 unsigned int xhci_get_endpoint_address(unsigned int ep_index)
1107 unsigned int number = DIV_ROUND_UP(ep_index, 2);
1108 unsigned int direction = ep_index % 2 ? USB_DIR_OUT : USB_DIR_IN;
1109 return direction | number;
1112 /* Find the flag for this endpoint (for use in the control context). Use the
1113 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1114 * bit 1, etc.
1116 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor *desc)
1118 return 1 << (xhci_get_endpoint_index(desc) + 1);
1121 /* Find the flag for this endpoint (for use in the control context). Use the
1122 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1123 * bit 1, etc.
1125 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index)
1127 return 1 << (ep_index + 1);
1130 /* Compute the last valid endpoint context index. Basically, this is the
1131 * endpoint index plus one. For slot contexts with more than valid endpoint,
1132 * we find the most significant bit set in the added contexts flags.
1133 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1134 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1136 unsigned int xhci_last_valid_endpoint(u32 added_ctxs)
1138 return fls(added_ctxs) - 1;
1141 /* Returns 1 if the arguments are OK;
1142 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1144 static int xhci_check_args(struct usb_hcd *hcd, struct usb_device *udev,
1145 struct usb_host_endpoint *ep, int check_ep, bool check_virt_dev,
1146 const char *func) {
1147 struct xhci_hcd *xhci;
1148 struct xhci_virt_device *virt_dev;
1150 if (!hcd || (check_ep && !ep) || !udev) {
1151 pr_debug("xHCI %s called with invalid args\n", func);
1152 return -EINVAL;
1154 if (!udev->parent) {
1155 pr_debug("xHCI %s called for root hub\n", func);
1156 return 0;
1159 xhci = hcd_to_xhci(hcd);
1160 if (check_virt_dev) {
1161 if (!udev->slot_id || !xhci->devs[udev->slot_id]) {
1162 xhci_dbg(xhci, "xHCI %s called with unaddressed device\n",
1163 func);
1164 return -EINVAL;
1167 virt_dev = xhci->devs[udev->slot_id];
1168 if (virt_dev->udev != udev) {
1169 xhci_dbg(xhci, "xHCI %s called with udev and "
1170 "virt_dev does not match\n", func);
1171 return -EINVAL;
1175 if (xhci->xhc_state & XHCI_STATE_HALTED)
1176 return -ENODEV;
1178 return 1;
1181 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
1182 struct usb_device *udev, struct xhci_command *command,
1183 bool ctx_change, bool must_succeed);
1186 * Full speed devices may have a max packet size greater than 8 bytes, but the
1187 * USB core doesn't know that until it reads the first 8 bytes of the
1188 * descriptor. If the usb_device's max packet size changes after that point,
1189 * we need to issue an evaluate context command and wait on it.
1191 static int xhci_check_maxpacket(struct xhci_hcd *xhci, unsigned int slot_id,
1192 unsigned int ep_index, struct urb *urb)
1194 struct xhci_container_ctx *out_ctx;
1195 struct xhci_input_control_ctx *ctrl_ctx;
1196 struct xhci_ep_ctx *ep_ctx;
1197 struct xhci_command *command;
1198 int max_packet_size;
1199 int hw_max_packet_size;
1200 int ret = 0;
1202 out_ctx = xhci->devs[slot_id]->out_ctx;
1203 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1204 hw_max_packet_size = MAX_PACKET_DECODED(le32_to_cpu(ep_ctx->ep_info2));
1205 max_packet_size = usb_endpoint_maxp(&urb->dev->ep0.desc);
1206 if (hw_max_packet_size != max_packet_size) {
1207 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1208 "Max Packet Size for ep 0 changed.");
1209 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1210 "Max packet size in usb_device = %d",
1211 max_packet_size);
1212 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1213 "Max packet size in xHCI HW = %d",
1214 hw_max_packet_size);
1215 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1216 "Issuing evaluate context command.");
1218 /* Set up the input context flags for the command */
1219 /* FIXME: This won't work if a non-default control endpoint
1220 * changes max packet sizes.
1223 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
1224 if (!command)
1225 return -ENOMEM;
1227 command->in_ctx = xhci->devs[slot_id]->in_ctx;
1228 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
1229 if (!ctrl_ctx) {
1230 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1231 __func__);
1232 ret = -ENOMEM;
1233 goto command_cleanup;
1235 /* Set up the modified control endpoint 0 */
1236 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
1237 xhci->devs[slot_id]->out_ctx, ep_index);
1239 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
1240 ep_ctx->ep_info2 &= cpu_to_le32(~MAX_PACKET_MASK);
1241 ep_ctx->ep_info2 |= cpu_to_le32(MAX_PACKET(max_packet_size));
1243 ctrl_ctx->add_flags = cpu_to_le32(EP0_FLAG);
1244 ctrl_ctx->drop_flags = 0;
1246 xhci_dbg(xhci, "Slot %d input context\n", slot_id);
1247 xhci_dbg_ctx(xhci, command->in_ctx, ep_index);
1248 xhci_dbg(xhci, "Slot %d output context\n", slot_id);
1249 xhci_dbg_ctx(xhci, out_ctx, ep_index);
1251 ret = xhci_configure_endpoint(xhci, urb->dev, command,
1252 true, false);
1254 /* Clean up the input context for later use by bandwidth
1255 * functions.
1257 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG);
1258 command_cleanup:
1259 kfree(command->completion);
1260 kfree(command);
1262 return ret;
1266 * non-error returns are a promise to giveback() the urb later
1267 * we drop ownership so next owner (or urb unlink) can get it
1269 int xhci_urb_enqueue(struct usb_hcd *hcd, struct urb *urb, gfp_t mem_flags)
1271 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
1272 struct xhci_td *buffer;
1273 unsigned long flags;
1274 int ret = 0;
1275 unsigned int slot_id, ep_index;
1276 struct urb_priv *urb_priv;
1277 int size, i;
1279 if (!urb || xhci_check_args(hcd, urb->dev, urb->ep,
1280 true, true, __func__) <= 0)
1281 return -EINVAL;
1283 slot_id = urb->dev->slot_id;
1284 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1286 if (!HCD_HW_ACCESSIBLE(hcd)) {
1287 if (!in_interrupt())
1288 xhci_dbg(xhci, "urb submitted during PCI suspend\n");
1289 ret = -ESHUTDOWN;
1290 goto exit;
1293 if (usb_endpoint_xfer_isoc(&urb->ep->desc))
1294 size = urb->number_of_packets;
1295 else
1296 size = 1;
1298 urb_priv = kzalloc(sizeof(struct urb_priv) +
1299 size * sizeof(struct xhci_td *), mem_flags);
1300 if (!urb_priv)
1301 return -ENOMEM;
1303 buffer = kzalloc(size * sizeof(struct xhci_td), mem_flags);
1304 if (!buffer) {
1305 kfree(urb_priv);
1306 return -ENOMEM;
1309 for (i = 0; i < size; i++) {
1310 urb_priv->td[i] = buffer;
1311 buffer++;
1314 urb_priv->length = size;
1315 urb_priv->td_cnt = 0;
1316 urb->hcpriv = urb_priv;
1318 if (usb_endpoint_xfer_control(&urb->ep->desc)) {
1319 /* Check to see if the max packet size for the default control
1320 * endpoint changed during FS device enumeration
1322 if (urb->dev->speed == USB_SPEED_FULL) {
1323 ret = xhci_check_maxpacket(xhci, slot_id,
1324 ep_index, urb);
1325 if (ret < 0) {
1326 xhci_urb_free_priv(xhci, urb_priv);
1327 urb->hcpriv = NULL;
1328 return ret;
1332 /* We have a spinlock and interrupts disabled, so we must pass
1333 * atomic context to this function, which may allocate memory.
1335 spin_lock_irqsave(&xhci->lock, flags);
1336 if (xhci->xhc_state & XHCI_STATE_DYING)
1337 goto dying;
1338 ret = xhci_queue_ctrl_tx(xhci, GFP_ATOMIC, urb,
1339 slot_id, ep_index);
1340 if (ret)
1341 goto free_priv;
1342 spin_unlock_irqrestore(&xhci->lock, flags);
1343 } else if (usb_endpoint_xfer_bulk(&urb->ep->desc)) {
1344 spin_lock_irqsave(&xhci->lock, flags);
1345 if (xhci->xhc_state & XHCI_STATE_DYING)
1346 goto dying;
1347 if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1348 EP_GETTING_STREAMS) {
1349 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1350 "is transitioning to using streams.\n");
1351 ret = -EINVAL;
1352 } else if (xhci->devs[slot_id]->eps[ep_index].ep_state &
1353 EP_GETTING_NO_STREAMS) {
1354 xhci_warn(xhci, "WARN: Can't enqueue URB while bulk ep "
1355 "is transitioning to "
1356 "not having streams.\n");
1357 ret = -EINVAL;
1358 } else {
1359 ret = xhci_queue_bulk_tx(xhci, GFP_ATOMIC, urb,
1360 slot_id, ep_index);
1362 if (ret)
1363 goto free_priv;
1364 spin_unlock_irqrestore(&xhci->lock, flags);
1365 } else if (usb_endpoint_xfer_int(&urb->ep->desc)) {
1366 spin_lock_irqsave(&xhci->lock, flags);
1367 if (xhci->xhc_state & XHCI_STATE_DYING)
1368 goto dying;
1369 ret = xhci_queue_intr_tx(xhci, GFP_ATOMIC, urb,
1370 slot_id, ep_index);
1371 if (ret)
1372 goto free_priv;
1373 spin_unlock_irqrestore(&xhci->lock, flags);
1374 } else {
1375 spin_lock_irqsave(&xhci->lock, flags);
1376 if (xhci->xhc_state & XHCI_STATE_DYING)
1377 goto dying;
1378 ret = xhci_queue_isoc_tx_prepare(xhci, GFP_ATOMIC, urb,
1379 slot_id, ep_index);
1380 if (ret)
1381 goto free_priv;
1382 spin_unlock_irqrestore(&xhci->lock, flags);
1384 exit:
1385 return ret;
1386 dying:
1387 xhci_dbg(xhci, "Ep 0x%x: URB %p submitted for "
1388 "non-responsive xHCI host.\n",
1389 urb->ep->desc.bEndpointAddress, urb);
1390 ret = -ESHUTDOWN;
1391 free_priv:
1392 xhci_urb_free_priv(xhci, urb_priv);
1393 urb->hcpriv = NULL;
1394 spin_unlock_irqrestore(&xhci->lock, flags);
1395 return ret;
1398 /* Get the right ring for the given URB.
1399 * If the endpoint supports streams, boundary check the URB's stream ID.
1400 * If the endpoint doesn't support streams, return the singular endpoint ring.
1402 static struct xhci_ring *xhci_urb_to_transfer_ring(struct xhci_hcd *xhci,
1403 struct urb *urb)
1405 unsigned int slot_id;
1406 unsigned int ep_index;
1407 unsigned int stream_id;
1408 struct xhci_virt_ep *ep;
1410 slot_id = urb->dev->slot_id;
1411 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1412 stream_id = urb->stream_id;
1413 ep = &xhci->devs[slot_id]->eps[ep_index];
1414 /* Common case: no streams */
1415 if (!(ep->ep_state & EP_HAS_STREAMS))
1416 return ep->ring;
1418 if (stream_id == 0) {
1419 xhci_warn(xhci,
1420 "WARN: Slot ID %u, ep index %u has streams, "
1421 "but URB has no stream ID.\n",
1422 slot_id, ep_index);
1423 return NULL;
1426 if (stream_id < ep->stream_info->num_streams)
1427 return ep->stream_info->stream_rings[stream_id];
1429 xhci_warn(xhci,
1430 "WARN: Slot ID %u, ep index %u has "
1431 "stream IDs 1 to %u allocated, "
1432 "but stream ID %u is requested.\n",
1433 slot_id, ep_index,
1434 ep->stream_info->num_streams - 1,
1435 stream_id);
1436 return NULL;
1440 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1441 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1442 * should pick up where it left off in the TD, unless a Set Transfer Ring
1443 * Dequeue Pointer is issued.
1445 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1446 * the ring. Since the ring is a contiguous structure, they can't be physically
1447 * removed. Instead, there are two options:
1449 * 1) If the HC is in the middle of processing the URB to be canceled, we
1450 * simply move the ring's dequeue pointer past those TRBs using the Set
1451 * Transfer Ring Dequeue Pointer command. This will be the common case,
1452 * when drivers timeout on the last submitted URB and attempt to cancel.
1454 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1455 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1456 * HC will need to invalidate the any TRBs it has cached after the stop
1457 * endpoint command, as noted in the xHCI 0.95 errata.
1459 * 3) The TD may have completed by the time the Stop Endpoint Command
1460 * completes, so software needs to handle that case too.
1462 * This function should protect against the TD enqueueing code ringing the
1463 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1464 * It also needs to account for multiple cancellations on happening at the same
1465 * time for the same endpoint.
1467 * Note that this function can be called in any context, or so says
1468 * usb_hcd_unlink_urb()
1470 int xhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status)
1472 unsigned long flags;
1473 int ret, i;
1474 u32 temp;
1475 struct xhci_hcd *xhci;
1476 struct urb_priv *urb_priv;
1477 struct xhci_td *td;
1478 unsigned int ep_index;
1479 struct xhci_ring *ep_ring;
1480 struct xhci_virt_ep *ep;
1481 struct xhci_command *command;
1483 xhci = hcd_to_xhci(hcd);
1484 spin_lock_irqsave(&xhci->lock, flags);
1485 /* Make sure the URB hasn't completed or been unlinked already */
1486 ret = usb_hcd_check_unlink_urb(hcd, urb, status);
1487 if (ret || !urb->hcpriv)
1488 goto done;
1489 temp = readl(&xhci->op_regs->status);
1490 if (temp == 0xffffffff || (xhci->xhc_state & XHCI_STATE_HALTED)) {
1491 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1492 "HW died, freeing TD.");
1493 urb_priv = urb->hcpriv;
1494 for (i = urb_priv->td_cnt; i < urb_priv->length; i++) {
1495 td = urb_priv->td[i];
1496 if (!list_empty(&td->td_list))
1497 list_del_init(&td->td_list);
1498 if (!list_empty(&td->cancelled_td_list))
1499 list_del_init(&td->cancelled_td_list);
1502 usb_hcd_unlink_urb_from_ep(hcd, urb);
1503 spin_unlock_irqrestore(&xhci->lock, flags);
1504 usb_hcd_giveback_urb(hcd, urb, -ESHUTDOWN);
1505 xhci_urb_free_priv(xhci, urb_priv);
1506 return ret;
1508 if ((xhci->xhc_state & XHCI_STATE_DYING) ||
1509 (xhci->xhc_state & XHCI_STATE_HALTED)) {
1510 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1511 "Ep 0x%x: URB %p to be canceled on "
1512 "non-responsive xHCI host.",
1513 urb->ep->desc.bEndpointAddress, urb);
1514 /* Let the stop endpoint command watchdog timer (which set this
1515 * state) finish cleaning up the endpoint TD lists. We must
1516 * have caught it in the middle of dropping a lock and giving
1517 * back an URB.
1519 goto done;
1522 ep_index = xhci_get_endpoint_index(&urb->ep->desc);
1523 ep = &xhci->devs[urb->dev->slot_id]->eps[ep_index];
1524 ep_ring = xhci_urb_to_transfer_ring(xhci, urb);
1525 if (!ep_ring) {
1526 ret = -EINVAL;
1527 goto done;
1530 urb_priv = urb->hcpriv;
1531 i = urb_priv->td_cnt;
1532 if (i < urb_priv->length)
1533 xhci_dbg_trace(xhci, trace_xhci_dbg_cancel_urb,
1534 "Cancel URB %p, dev %s, ep 0x%x, "
1535 "starting at offset 0x%llx",
1536 urb, urb->dev->devpath,
1537 urb->ep->desc.bEndpointAddress,
1538 (unsigned long long) xhci_trb_virt_to_dma(
1539 urb_priv->td[i]->start_seg,
1540 urb_priv->td[i]->first_trb));
1542 for (; i < urb_priv->length; i++) {
1543 td = urb_priv->td[i];
1544 list_add_tail(&td->cancelled_td_list, &ep->cancelled_td_list);
1547 /* Queue a stop endpoint command, but only if this is
1548 * the first cancellation to be handled.
1550 if (!(ep->ep_state & EP_HALT_PENDING)) {
1551 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
1552 ep->ep_state |= EP_HALT_PENDING;
1553 ep->stop_cmds_pending++;
1554 ep->stop_cmd_timer.expires = jiffies +
1555 XHCI_STOP_EP_CMD_TIMEOUT * HZ;
1556 add_timer(&ep->stop_cmd_timer);
1557 xhci_queue_stop_endpoint(xhci, command, urb->dev->slot_id,
1558 ep_index, 0);
1559 xhci_ring_cmd_db(xhci);
1561 done:
1562 spin_unlock_irqrestore(&xhci->lock, flags);
1563 return ret;
1566 /* Drop an endpoint from a new bandwidth configuration for this device.
1567 * Only one call to this function is allowed per endpoint before
1568 * check_bandwidth() or reset_bandwidth() must be called.
1569 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1570 * add the endpoint to the schedule with possibly new parameters denoted by a
1571 * different endpoint descriptor in usb_host_endpoint.
1572 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1573 * not allowed.
1575 * The USB core will not allow URBs to be queued to an endpoint that is being
1576 * disabled, so there's no need for mutual exclusion to protect
1577 * the xhci->devs[slot_id] structure.
1579 int xhci_drop_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1580 struct usb_host_endpoint *ep)
1582 struct xhci_hcd *xhci;
1583 struct xhci_container_ctx *in_ctx, *out_ctx;
1584 struct xhci_input_control_ctx *ctrl_ctx;
1585 struct xhci_slot_ctx *slot_ctx;
1586 unsigned int last_ctx;
1587 unsigned int ep_index;
1588 struct xhci_ep_ctx *ep_ctx;
1589 u32 drop_flag;
1590 u32 new_add_flags, new_drop_flags, new_slot_info;
1591 int ret;
1593 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1594 if (ret <= 0)
1595 return ret;
1596 xhci = hcd_to_xhci(hcd);
1597 if (xhci->xhc_state & XHCI_STATE_DYING)
1598 return -ENODEV;
1600 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
1601 drop_flag = xhci_get_endpoint_flag(&ep->desc);
1602 if (drop_flag == SLOT_FLAG || drop_flag == EP0_FLAG) {
1603 xhci_dbg(xhci, "xHCI %s - can't drop slot or ep 0 %#x\n",
1604 __func__, drop_flag);
1605 return 0;
1608 in_ctx = xhci->devs[udev->slot_id]->in_ctx;
1609 out_ctx = xhci->devs[udev->slot_id]->out_ctx;
1610 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1611 if (!ctrl_ctx) {
1612 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1613 __func__);
1614 return 0;
1617 ep_index = xhci_get_endpoint_index(&ep->desc);
1618 ep_ctx = xhci_get_ep_ctx(xhci, out_ctx, ep_index);
1619 /* If the HC already knows the endpoint is disabled,
1620 * or the HCD has noted it is disabled, ignore this request
1622 if (((ep_ctx->ep_info & cpu_to_le32(EP_STATE_MASK)) ==
1623 cpu_to_le32(EP_STATE_DISABLED)) ||
1624 le32_to_cpu(ctrl_ctx->drop_flags) &
1625 xhci_get_endpoint_flag(&ep->desc)) {
1626 xhci_warn(xhci, "xHCI %s called with disabled ep %p\n",
1627 __func__, ep);
1628 return 0;
1631 ctrl_ctx->drop_flags |= cpu_to_le32(drop_flag);
1632 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1634 ctrl_ctx->add_flags &= cpu_to_le32(~drop_flag);
1635 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1637 last_ctx = xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx->add_flags));
1638 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1639 /* Update the last valid endpoint context, if we deleted the last one */
1640 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) >
1641 LAST_CTX(last_ctx)) {
1642 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1643 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1645 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1647 xhci_endpoint_zero(xhci, xhci->devs[udev->slot_id], ep);
1649 xhci_dbg(xhci, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1650 (unsigned int) ep->desc.bEndpointAddress,
1651 udev->slot_id,
1652 (unsigned int) new_drop_flags,
1653 (unsigned int) new_add_flags,
1654 (unsigned int) new_slot_info);
1655 return 0;
1658 /* Add an endpoint to a new possible bandwidth configuration for this device.
1659 * Only one call to this function is allowed per endpoint before
1660 * check_bandwidth() or reset_bandwidth() must be called.
1661 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1662 * add the endpoint to the schedule with possibly new parameters denoted by a
1663 * different endpoint descriptor in usb_host_endpoint.
1664 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1665 * not allowed.
1667 * The USB core will not allow URBs to be queued to an endpoint until the
1668 * configuration or alt setting is installed in the device, so there's no need
1669 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1671 int xhci_add_endpoint(struct usb_hcd *hcd, struct usb_device *udev,
1672 struct usb_host_endpoint *ep)
1674 struct xhci_hcd *xhci;
1675 struct xhci_container_ctx *in_ctx, *out_ctx;
1676 unsigned int ep_index;
1677 struct xhci_slot_ctx *slot_ctx;
1678 struct xhci_input_control_ctx *ctrl_ctx;
1679 u32 added_ctxs;
1680 unsigned int last_ctx;
1681 u32 new_add_flags, new_drop_flags, new_slot_info;
1682 struct xhci_virt_device *virt_dev;
1683 int ret = 0;
1685 ret = xhci_check_args(hcd, udev, ep, 1, true, __func__);
1686 if (ret <= 0) {
1687 /* So we won't queue a reset ep command for a root hub */
1688 ep->hcpriv = NULL;
1689 return ret;
1691 xhci = hcd_to_xhci(hcd);
1692 if (xhci->xhc_state & XHCI_STATE_DYING)
1693 return -ENODEV;
1695 added_ctxs = xhci_get_endpoint_flag(&ep->desc);
1696 last_ctx = xhci_last_valid_endpoint(added_ctxs);
1697 if (added_ctxs == SLOT_FLAG || added_ctxs == EP0_FLAG) {
1698 /* FIXME when we have to issue an evaluate endpoint command to
1699 * deal with ep0 max packet size changing once we get the
1700 * descriptors
1702 xhci_dbg(xhci, "xHCI %s - can't add slot or ep 0 %#x\n",
1703 __func__, added_ctxs);
1704 return 0;
1707 virt_dev = xhci->devs[udev->slot_id];
1708 in_ctx = virt_dev->in_ctx;
1709 out_ctx = virt_dev->out_ctx;
1710 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
1711 if (!ctrl_ctx) {
1712 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1713 __func__);
1714 return 0;
1717 ep_index = xhci_get_endpoint_index(&ep->desc);
1718 /* If this endpoint is already in use, and the upper layers are trying
1719 * to add it again without dropping it, reject the addition.
1721 if (virt_dev->eps[ep_index].ring &&
1722 !(le32_to_cpu(ctrl_ctx->drop_flags) &
1723 xhci_get_endpoint_flag(&ep->desc))) {
1724 xhci_warn(xhci, "Trying to add endpoint 0x%x "
1725 "without dropping it.\n",
1726 (unsigned int) ep->desc.bEndpointAddress);
1727 return -EINVAL;
1730 /* If the HCD has already noted the endpoint is enabled,
1731 * ignore this request.
1733 if (le32_to_cpu(ctrl_ctx->add_flags) &
1734 xhci_get_endpoint_flag(&ep->desc)) {
1735 xhci_warn(xhci, "xHCI %s called with enabled ep %p\n",
1736 __func__, ep);
1737 return 0;
1741 * Configuration and alternate setting changes must be done in
1742 * process context, not interrupt context (or so documenation
1743 * for usb_set_interface() and usb_set_configuration() claim).
1745 if (xhci_endpoint_init(xhci, virt_dev, udev, ep, GFP_NOIO) < 0) {
1746 dev_dbg(&udev->dev, "%s - could not initialize ep %#x\n",
1747 __func__, ep->desc.bEndpointAddress);
1748 return -ENOMEM;
1751 ctrl_ctx->add_flags |= cpu_to_le32(added_ctxs);
1752 new_add_flags = le32_to_cpu(ctrl_ctx->add_flags);
1754 /* If xhci_endpoint_disable() was called for this endpoint, but the
1755 * xHC hasn't been notified yet through the check_bandwidth() call,
1756 * this re-adds a new state for the endpoint from the new endpoint
1757 * descriptors. We must drop and re-add this endpoint, so we leave the
1758 * drop flags alone.
1760 new_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags);
1762 slot_ctx = xhci_get_slot_ctx(xhci, in_ctx);
1763 /* Update the last valid endpoint context, if we just added one past */
1764 if ((le32_to_cpu(slot_ctx->dev_info) & LAST_CTX_MASK) <
1765 LAST_CTX(last_ctx)) {
1766 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1767 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(last_ctx));
1769 new_slot_info = le32_to_cpu(slot_ctx->dev_info);
1771 /* Store the usb_device pointer for later use */
1772 ep->hcpriv = udev;
1774 xhci_dbg(xhci, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1775 (unsigned int) ep->desc.bEndpointAddress,
1776 udev->slot_id,
1777 (unsigned int) new_drop_flags,
1778 (unsigned int) new_add_flags,
1779 (unsigned int) new_slot_info);
1780 return 0;
1783 static void xhci_zero_in_ctx(struct xhci_hcd *xhci, struct xhci_virt_device *virt_dev)
1785 struct xhci_input_control_ctx *ctrl_ctx;
1786 struct xhci_ep_ctx *ep_ctx;
1787 struct xhci_slot_ctx *slot_ctx;
1788 int i;
1790 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
1791 if (!ctrl_ctx) {
1792 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
1793 __func__);
1794 return;
1797 /* When a device's add flag and drop flag are zero, any subsequent
1798 * configure endpoint command will leave that endpoint's state
1799 * untouched. Make sure we don't leave any old state in the input
1800 * endpoint contexts.
1802 ctrl_ctx->drop_flags = 0;
1803 ctrl_ctx->add_flags = 0;
1804 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
1805 slot_ctx->dev_info &= cpu_to_le32(~LAST_CTX_MASK);
1806 /* Endpoint 0 is always valid */
1807 slot_ctx->dev_info |= cpu_to_le32(LAST_CTX(1));
1808 for (i = 1; i < 31; ++i) {
1809 ep_ctx = xhci_get_ep_ctx(xhci, virt_dev->in_ctx, i);
1810 ep_ctx->ep_info = 0;
1811 ep_ctx->ep_info2 = 0;
1812 ep_ctx->deq = 0;
1813 ep_ctx->tx_info = 0;
1817 static int xhci_configure_endpoint_result(struct xhci_hcd *xhci,
1818 struct usb_device *udev, u32 *cmd_status)
1820 int ret;
1822 switch (*cmd_status) {
1823 case COMP_CMD_ABORT:
1824 case COMP_CMD_STOP:
1825 xhci_warn(xhci, "Timeout while waiting for configure endpoint command\n");
1826 ret = -ETIME;
1827 break;
1828 case COMP_ENOMEM:
1829 dev_warn(&udev->dev, "Not enough host controller resources "
1830 "for new device state.\n");
1831 ret = -ENOMEM;
1832 /* FIXME: can we allocate more resources for the HC? */
1833 break;
1834 case COMP_BW_ERR:
1835 case COMP_2ND_BW_ERR:
1836 dev_warn(&udev->dev, "Not enough bandwidth "
1837 "for new device state.\n");
1838 ret = -ENOSPC;
1839 /* FIXME: can we go back to the old state? */
1840 break;
1841 case COMP_TRB_ERR:
1842 /* the HCD set up something wrong */
1843 dev_warn(&udev->dev, "ERROR: Endpoint drop flag = 0, "
1844 "add flag = 1, "
1845 "and endpoint is not disabled.\n");
1846 ret = -EINVAL;
1847 break;
1848 case COMP_DEV_ERR:
1849 dev_warn(&udev->dev, "ERROR: Incompatible device for endpoint "
1850 "configure command.\n");
1851 ret = -ENODEV;
1852 break;
1853 case COMP_SUCCESS:
1854 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1855 "Successful Endpoint Configure command");
1856 ret = 0;
1857 break;
1858 default:
1859 xhci_err(xhci, "ERROR: unexpected command completion "
1860 "code 0x%x.\n", *cmd_status);
1861 ret = -EINVAL;
1862 break;
1864 return ret;
1867 static int xhci_evaluate_context_result(struct xhci_hcd *xhci,
1868 struct usb_device *udev, u32 *cmd_status)
1870 int ret;
1871 struct xhci_virt_device *virt_dev = xhci->devs[udev->slot_id];
1873 switch (*cmd_status) {
1874 case COMP_CMD_ABORT:
1875 case COMP_CMD_STOP:
1876 xhci_warn(xhci, "Timeout while waiting for evaluate context command\n");
1877 ret = -ETIME;
1878 break;
1879 case COMP_EINVAL:
1880 dev_warn(&udev->dev, "WARN: xHCI driver setup invalid evaluate "
1881 "context command.\n");
1882 ret = -EINVAL;
1883 break;
1884 case COMP_EBADSLT:
1885 dev_warn(&udev->dev, "WARN: slot not enabled for"
1886 "evaluate context command.\n");
1887 ret = -EINVAL;
1888 break;
1889 case COMP_CTX_STATE:
1890 dev_warn(&udev->dev, "WARN: invalid context state for "
1891 "evaluate context command.\n");
1892 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 1);
1893 ret = -EINVAL;
1894 break;
1895 case COMP_DEV_ERR:
1896 dev_warn(&udev->dev, "ERROR: Incompatible device for evaluate "
1897 "context command.\n");
1898 ret = -ENODEV;
1899 break;
1900 case COMP_MEL_ERR:
1901 /* Max Exit Latency too large error */
1902 dev_warn(&udev->dev, "WARN: Max Exit Latency too large\n");
1903 ret = -EINVAL;
1904 break;
1905 case COMP_SUCCESS:
1906 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
1907 "Successful evaluate context command");
1908 ret = 0;
1909 break;
1910 default:
1911 xhci_err(xhci, "ERROR: unexpected command completion "
1912 "code 0x%x.\n", *cmd_status);
1913 ret = -EINVAL;
1914 break;
1916 return ret;
1919 static u32 xhci_count_num_new_endpoints(struct xhci_hcd *xhci,
1920 struct xhci_input_control_ctx *ctrl_ctx)
1922 u32 valid_add_flags;
1923 u32 valid_drop_flags;
1925 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1926 * (bit 1). The default control endpoint is added during the Address
1927 * Device command and is never removed until the slot is disabled.
1929 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1930 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1932 /* Use hweight32 to count the number of ones in the add flags, or
1933 * number of endpoints added. Don't count endpoints that are changed
1934 * (both added and dropped).
1936 return hweight32(valid_add_flags) -
1937 hweight32(valid_add_flags & valid_drop_flags);
1940 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd *xhci,
1941 struct xhci_input_control_ctx *ctrl_ctx)
1943 u32 valid_add_flags;
1944 u32 valid_drop_flags;
1946 valid_add_flags = le32_to_cpu(ctrl_ctx->add_flags) >> 2;
1947 valid_drop_flags = le32_to_cpu(ctrl_ctx->drop_flags) >> 2;
1949 return hweight32(valid_drop_flags) -
1950 hweight32(valid_add_flags & valid_drop_flags);
1954 * We need to reserve the new number of endpoints before the configure endpoint
1955 * command completes. We can't subtract the dropped endpoints from the number
1956 * of active endpoints until the command completes because we can oversubscribe
1957 * the host in this case:
1959 * - the first configure endpoint command drops more endpoints than it adds
1960 * - a second configure endpoint command that adds more endpoints is queued
1961 * - the first configure endpoint command fails, so the config is unchanged
1962 * - the second command may succeed, even though there isn't enough resources
1964 * Must be called with xhci->lock held.
1966 static int xhci_reserve_host_resources(struct xhci_hcd *xhci,
1967 struct xhci_input_control_ctx *ctrl_ctx)
1969 u32 added_eps;
1971 added_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1972 if (xhci->num_active_eps + added_eps > xhci->limit_active_eps) {
1973 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1974 "Not enough ep ctxs: "
1975 "%u active, need to add %u, limit is %u.",
1976 xhci->num_active_eps, added_eps,
1977 xhci->limit_active_eps);
1978 return -ENOMEM;
1980 xhci->num_active_eps += added_eps;
1981 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
1982 "Adding %u ep ctxs, %u now active.", added_eps,
1983 xhci->num_active_eps);
1984 return 0;
1988 * The configure endpoint was failed by the xHC for some other reason, so we
1989 * need to revert the resources that failed configuration would have used.
1991 * Must be called with xhci->lock held.
1993 static void xhci_free_host_resources(struct xhci_hcd *xhci,
1994 struct xhci_input_control_ctx *ctrl_ctx)
1996 u32 num_failed_eps;
1998 num_failed_eps = xhci_count_num_new_endpoints(xhci, ctrl_ctx);
1999 xhci->num_active_eps -= num_failed_eps;
2000 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2001 "Removing %u failed ep ctxs, %u now active.",
2002 num_failed_eps,
2003 xhci->num_active_eps);
2007 * Now that the command has completed, clean up the active endpoint count by
2008 * subtracting out the endpoints that were dropped (but not changed).
2010 * Must be called with xhci->lock held.
2012 static void xhci_finish_resource_reservation(struct xhci_hcd *xhci,
2013 struct xhci_input_control_ctx *ctrl_ctx)
2015 u32 num_dropped_eps;
2017 num_dropped_eps = xhci_count_num_dropped_endpoints(xhci, ctrl_ctx);
2018 xhci->num_active_eps -= num_dropped_eps;
2019 if (num_dropped_eps)
2020 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2021 "Removing %u dropped ep ctxs, %u now active.",
2022 num_dropped_eps,
2023 xhci->num_active_eps);
2026 static unsigned int xhci_get_block_size(struct usb_device *udev)
2028 switch (udev->speed) {
2029 case USB_SPEED_LOW:
2030 case USB_SPEED_FULL:
2031 return FS_BLOCK;
2032 case USB_SPEED_HIGH:
2033 return HS_BLOCK;
2034 case USB_SPEED_SUPER:
2035 return SS_BLOCK;
2036 case USB_SPEED_UNKNOWN:
2037 case USB_SPEED_WIRELESS:
2038 default:
2039 /* Should never happen */
2040 return 1;
2044 static unsigned int
2045 xhci_get_largest_overhead(struct xhci_interval_bw *interval_bw)
2047 if (interval_bw->overhead[LS_OVERHEAD_TYPE])
2048 return LS_OVERHEAD;
2049 if (interval_bw->overhead[FS_OVERHEAD_TYPE])
2050 return FS_OVERHEAD;
2051 return HS_OVERHEAD;
2054 /* If we are changing a LS/FS device under a HS hub,
2055 * make sure (if we are activating a new TT) that the HS bus has enough
2056 * bandwidth for this new TT.
2058 static int xhci_check_tt_bw_table(struct xhci_hcd *xhci,
2059 struct xhci_virt_device *virt_dev,
2060 int old_active_eps)
2062 struct xhci_interval_bw_table *bw_table;
2063 struct xhci_tt_bw_info *tt_info;
2065 /* Find the bandwidth table for the root port this TT is attached to. */
2066 bw_table = &xhci->rh_bw[virt_dev->real_port - 1].bw_table;
2067 tt_info = virt_dev->tt_info;
2068 /* If this TT already had active endpoints, the bandwidth for this TT
2069 * has already been added. Removing all periodic endpoints (and thus
2070 * making the TT enactive) will only decrease the bandwidth used.
2072 if (old_active_eps)
2073 return 0;
2074 if (old_active_eps == 0 && tt_info->active_eps != 0) {
2075 if (bw_table->bw_used + TT_HS_OVERHEAD > HS_BW_LIMIT)
2076 return -ENOMEM;
2077 return 0;
2079 /* Not sure why we would have no new active endpoints...
2081 * Maybe because of an Evaluate Context change for a hub update or a
2082 * control endpoint 0 max packet size change?
2083 * FIXME: skip the bandwidth calculation in that case.
2085 return 0;
2088 static int xhci_check_ss_bw(struct xhci_hcd *xhci,
2089 struct xhci_virt_device *virt_dev)
2091 unsigned int bw_reserved;
2093 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_IN, 100);
2094 if (virt_dev->bw_table->ss_bw_in > (SS_BW_LIMIT_IN - bw_reserved))
2095 return -ENOMEM;
2097 bw_reserved = DIV_ROUND_UP(SS_BW_RESERVED*SS_BW_LIMIT_OUT, 100);
2098 if (virt_dev->bw_table->ss_bw_out > (SS_BW_LIMIT_OUT - bw_reserved))
2099 return -ENOMEM;
2101 return 0;
2105 * This algorithm is a very conservative estimate of the worst-case scheduling
2106 * scenario for any one interval. The hardware dynamically schedules the
2107 * packets, so we can't tell which microframe could be the limiting factor in
2108 * the bandwidth scheduling. This only takes into account periodic endpoints.
2110 * Obviously, we can't solve an NP complete problem to find the minimum worst
2111 * case scenario. Instead, we come up with an estimate that is no less than
2112 * the worst case bandwidth used for any one microframe, but may be an
2113 * over-estimate.
2115 * We walk the requirements for each endpoint by interval, starting with the
2116 * smallest interval, and place packets in the schedule where there is only one
2117 * possible way to schedule packets for that interval. In order to simplify
2118 * this algorithm, we record the largest max packet size for each interval, and
2119 * assume all packets will be that size.
2121 * For interval 0, we obviously must schedule all packets for each interval.
2122 * The bandwidth for interval 0 is just the amount of data to be transmitted
2123 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2124 * the number of packets).
2126 * For interval 1, we have two possible microframes to schedule those packets
2127 * in. For this algorithm, if we can schedule the same number of packets for
2128 * each possible scheduling opportunity (each microframe), we will do so. The
2129 * remaining number of packets will be saved to be transmitted in the gaps in
2130 * the next interval's scheduling sequence.
2132 * As we move those remaining packets to be scheduled with interval 2 packets,
2133 * we have to double the number of remaining packets to transmit. This is
2134 * because the intervals are actually powers of 2, and we would be transmitting
2135 * the previous interval's packets twice in this interval. We also have to be
2136 * sure that when we look at the largest max packet size for this interval, we
2137 * also look at the largest max packet size for the remaining packets and take
2138 * the greater of the two.
2140 * The algorithm continues to evenly distribute packets in each scheduling
2141 * opportunity, and push the remaining packets out, until we get to the last
2142 * interval. Then those packets and their associated overhead are just added
2143 * to the bandwidth used.
2145 static int xhci_check_bw_table(struct xhci_hcd *xhci,
2146 struct xhci_virt_device *virt_dev,
2147 int old_active_eps)
2149 unsigned int bw_reserved;
2150 unsigned int max_bandwidth;
2151 unsigned int bw_used;
2152 unsigned int block_size;
2153 struct xhci_interval_bw_table *bw_table;
2154 unsigned int packet_size = 0;
2155 unsigned int overhead = 0;
2156 unsigned int packets_transmitted = 0;
2157 unsigned int packets_remaining = 0;
2158 unsigned int i;
2160 if (virt_dev->udev->speed == USB_SPEED_SUPER)
2161 return xhci_check_ss_bw(xhci, virt_dev);
2163 if (virt_dev->udev->speed == USB_SPEED_HIGH) {
2164 max_bandwidth = HS_BW_LIMIT;
2165 /* Convert percent of bus BW reserved to blocks reserved */
2166 bw_reserved = DIV_ROUND_UP(HS_BW_RESERVED * max_bandwidth, 100);
2167 } else {
2168 max_bandwidth = FS_BW_LIMIT;
2169 bw_reserved = DIV_ROUND_UP(FS_BW_RESERVED * max_bandwidth, 100);
2172 bw_table = virt_dev->bw_table;
2173 /* We need to translate the max packet size and max ESIT payloads into
2174 * the units the hardware uses.
2176 block_size = xhci_get_block_size(virt_dev->udev);
2178 /* If we are manipulating a LS/FS device under a HS hub, double check
2179 * that the HS bus has enough bandwidth if we are activing a new TT.
2181 if (virt_dev->tt_info) {
2182 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2183 "Recalculating BW for rootport %u",
2184 virt_dev->real_port);
2185 if (xhci_check_tt_bw_table(xhci, virt_dev, old_active_eps)) {
2186 xhci_warn(xhci, "Not enough bandwidth on HS bus for "
2187 "newly activated TT.\n");
2188 return -ENOMEM;
2190 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2191 "Recalculating BW for TT slot %u port %u",
2192 virt_dev->tt_info->slot_id,
2193 virt_dev->tt_info->ttport);
2194 } else {
2195 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2196 "Recalculating BW for rootport %u",
2197 virt_dev->real_port);
2200 /* Add in how much bandwidth will be used for interval zero, or the
2201 * rounded max ESIT payload + number of packets * largest overhead.
2203 bw_used = DIV_ROUND_UP(bw_table->interval0_esit_payload, block_size) +
2204 bw_table->interval_bw[0].num_packets *
2205 xhci_get_largest_overhead(&bw_table->interval_bw[0]);
2207 for (i = 1; i < XHCI_MAX_INTERVAL; i++) {
2208 unsigned int bw_added;
2209 unsigned int largest_mps;
2210 unsigned int interval_overhead;
2213 * How many packets could we transmit in this interval?
2214 * If packets didn't fit in the previous interval, we will need
2215 * to transmit that many packets twice within this interval.
2217 packets_remaining = 2 * packets_remaining +
2218 bw_table->interval_bw[i].num_packets;
2220 /* Find the largest max packet size of this or the previous
2221 * interval.
2223 if (list_empty(&bw_table->interval_bw[i].endpoints))
2224 largest_mps = 0;
2225 else {
2226 struct xhci_virt_ep *virt_ep;
2227 struct list_head *ep_entry;
2229 ep_entry = bw_table->interval_bw[i].endpoints.next;
2230 virt_ep = list_entry(ep_entry,
2231 struct xhci_virt_ep, bw_endpoint_list);
2232 /* Convert to blocks, rounding up */
2233 largest_mps = DIV_ROUND_UP(
2234 virt_ep->bw_info.max_packet_size,
2235 block_size);
2237 if (largest_mps > packet_size)
2238 packet_size = largest_mps;
2240 /* Use the larger overhead of this or the previous interval. */
2241 interval_overhead = xhci_get_largest_overhead(
2242 &bw_table->interval_bw[i]);
2243 if (interval_overhead > overhead)
2244 overhead = interval_overhead;
2246 /* How many packets can we evenly distribute across
2247 * (1 << (i + 1)) possible scheduling opportunities?
2249 packets_transmitted = packets_remaining >> (i + 1);
2251 /* Add in the bandwidth used for those scheduled packets */
2252 bw_added = packets_transmitted * (overhead + packet_size);
2254 /* How many packets do we have remaining to transmit? */
2255 packets_remaining = packets_remaining % (1 << (i + 1));
2257 /* What largest max packet size should those packets have? */
2258 /* If we've transmitted all packets, don't carry over the
2259 * largest packet size.
2261 if (packets_remaining == 0) {
2262 packet_size = 0;
2263 overhead = 0;
2264 } else if (packets_transmitted > 0) {
2265 /* Otherwise if we do have remaining packets, and we've
2266 * scheduled some packets in this interval, take the
2267 * largest max packet size from endpoints with this
2268 * interval.
2270 packet_size = largest_mps;
2271 overhead = interval_overhead;
2273 /* Otherwise carry over packet_size and overhead from the last
2274 * time we had a remainder.
2276 bw_used += bw_added;
2277 if (bw_used > max_bandwidth) {
2278 xhci_warn(xhci, "Not enough bandwidth. "
2279 "Proposed: %u, Max: %u\n",
2280 bw_used, max_bandwidth);
2281 return -ENOMEM;
2285 * Ok, we know we have some packets left over after even-handedly
2286 * scheduling interval 15. We don't know which microframes they will
2287 * fit into, so we over-schedule and say they will be scheduled every
2288 * microframe.
2290 if (packets_remaining > 0)
2291 bw_used += overhead + packet_size;
2293 if (!virt_dev->tt_info && virt_dev->udev->speed == USB_SPEED_HIGH) {
2294 unsigned int port_index = virt_dev->real_port - 1;
2296 /* OK, we're manipulating a HS device attached to a
2297 * root port bandwidth domain. Include the number of active TTs
2298 * in the bandwidth used.
2300 bw_used += TT_HS_OVERHEAD *
2301 xhci->rh_bw[port_index].num_active_tts;
2304 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2305 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2306 "Available: %u " "percent",
2307 bw_used, max_bandwidth, bw_reserved,
2308 (max_bandwidth - bw_used - bw_reserved) * 100 /
2309 max_bandwidth);
2311 bw_used += bw_reserved;
2312 if (bw_used > max_bandwidth) {
2313 xhci_warn(xhci, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2314 bw_used, max_bandwidth);
2315 return -ENOMEM;
2318 bw_table->bw_used = bw_used;
2319 return 0;
2322 static bool xhci_is_async_ep(unsigned int ep_type)
2324 return (ep_type != ISOC_OUT_EP && ep_type != INT_OUT_EP &&
2325 ep_type != ISOC_IN_EP &&
2326 ep_type != INT_IN_EP);
2329 static bool xhci_is_sync_in_ep(unsigned int ep_type)
2331 return (ep_type == ISOC_IN_EP || ep_type == INT_IN_EP);
2334 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info *ep_bw)
2336 unsigned int mps = DIV_ROUND_UP(ep_bw->max_packet_size, SS_BLOCK);
2338 if (ep_bw->ep_interval == 0)
2339 return SS_OVERHEAD_BURST +
2340 (ep_bw->mult * ep_bw->num_packets *
2341 (SS_OVERHEAD + mps));
2342 return DIV_ROUND_UP(ep_bw->mult * ep_bw->num_packets *
2343 (SS_OVERHEAD + mps + SS_OVERHEAD_BURST),
2344 1 << ep_bw->ep_interval);
2348 void xhci_drop_ep_from_interval_table(struct xhci_hcd *xhci,
2349 struct xhci_bw_info *ep_bw,
2350 struct xhci_interval_bw_table *bw_table,
2351 struct usb_device *udev,
2352 struct xhci_virt_ep *virt_ep,
2353 struct xhci_tt_bw_info *tt_info)
2355 struct xhci_interval_bw *interval_bw;
2356 int normalized_interval;
2358 if (xhci_is_async_ep(ep_bw->type))
2359 return;
2361 if (udev->speed == USB_SPEED_SUPER) {
2362 if (xhci_is_sync_in_ep(ep_bw->type))
2363 xhci->devs[udev->slot_id]->bw_table->ss_bw_in -=
2364 xhci_get_ss_bw_consumed(ep_bw);
2365 else
2366 xhci->devs[udev->slot_id]->bw_table->ss_bw_out -=
2367 xhci_get_ss_bw_consumed(ep_bw);
2368 return;
2371 /* SuperSpeed endpoints never get added to intervals in the table, so
2372 * this check is only valid for HS/FS/LS devices.
2374 if (list_empty(&virt_ep->bw_endpoint_list))
2375 return;
2376 /* For LS/FS devices, we need to translate the interval expressed in
2377 * microframes to frames.
2379 if (udev->speed == USB_SPEED_HIGH)
2380 normalized_interval = ep_bw->ep_interval;
2381 else
2382 normalized_interval = ep_bw->ep_interval - 3;
2384 if (normalized_interval == 0)
2385 bw_table->interval0_esit_payload -= ep_bw->max_esit_payload;
2386 interval_bw = &bw_table->interval_bw[normalized_interval];
2387 interval_bw->num_packets -= ep_bw->num_packets;
2388 switch (udev->speed) {
2389 case USB_SPEED_LOW:
2390 interval_bw->overhead[LS_OVERHEAD_TYPE] -= 1;
2391 break;
2392 case USB_SPEED_FULL:
2393 interval_bw->overhead[FS_OVERHEAD_TYPE] -= 1;
2394 break;
2395 case USB_SPEED_HIGH:
2396 interval_bw->overhead[HS_OVERHEAD_TYPE] -= 1;
2397 break;
2398 case USB_SPEED_SUPER:
2399 case USB_SPEED_UNKNOWN:
2400 case USB_SPEED_WIRELESS:
2401 /* Should never happen because only LS/FS/HS endpoints will get
2402 * added to the endpoint list.
2404 return;
2406 if (tt_info)
2407 tt_info->active_eps -= 1;
2408 list_del_init(&virt_ep->bw_endpoint_list);
2411 static void xhci_add_ep_to_interval_table(struct xhci_hcd *xhci,
2412 struct xhci_bw_info *ep_bw,
2413 struct xhci_interval_bw_table *bw_table,
2414 struct usb_device *udev,
2415 struct xhci_virt_ep *virt_ep,
2416 struct xhci_tt_bw_info *tt_info)
2418 struct xhci_interval_bw *interval_bw;
2419 struct xhci_virt_ep *smaller_ep;
2420 int normalized_interval;
2422 if (xhci_is_async_ep(ep_bw->type))
2423 return;
2425 if (udev->speed == USB_SPEED_SUPER) {
2426 if (xhci_is_sync_in_ep(ep_bw->type))
2427 xhci->devs[udev->slot_id]->bw_table->ss_bw_in +=
2428 xhci_get_ss_bw_consumed(ep_bw);
2429 else
2430 xhci->devs[udev->slot_id]->bw_table->ss_bw_out +=
2431 xhci_get_ss_bw_consumed(ep_bw);
2432 return;
2435 /* For LS/FS devices, we need to translate the interval expressed in
2436 * microframes to frames.
2438 if (udev->speed == USB_SPEED_HIGH)
2439 normalized_interval = ep_bw->ep_interval;
2440 else
2441 normalized_interval = ep_bw->ep_interval - 3;
2443 if (normalized_interval == 0)
2444 bw_table->interval0_esit_payload += ep_bw->max_esit_payload;
2445 interval_bw = &bw_table->interval_bw[normalized_interval];
2446 interval_bw->num_packets += ep_bw->num_packets;
2447 switch (udev->speed) {
2448 case USB_SPEED_LOW:
2449 interval_bw->overhead[LS_OVERHEAD_TYPE] += 1;
2450 break;
2451 case USB_SPEED_FULL:
2452 interval_bw->overhead[FS_OVERHEAD_TYPE] += 1;
2453 break;
2454 case USB_SPEED_HIGH:
2455 interval_bw->overhead[HS_OVERHEAD_TYPE] += 1;
2456 break;
2457 case USB_SPEED_SUPER:
2458 case USB_SPEED_UNKNOWN:
2459 case USB_SPEED_WIRELESS:
2460 /* Should never happen because only LS/FS/HS endpoints will get
2461 * added to the endpoint list.
2463 return;
2466 if (tt_info)
2467 tt_info->active_eps += 1;
2468 /* Insert the endpoint into the list, largest max packet size first. */
2469 list_for_each_entry(smaller_ep, &interval_bw->endpoints,
2470 bw_endpoint_list) {
2471 if (ep_bw->max_packet_size >=
2472 smaller_ep->bw_info.max_packet_size) {
2473 /* Add the new ep before the smaller endpoint */
2474 list_add_tail(&virt_ep->bw_endpoint_list,
2475 &smaller_ep->bw_endpoint_list);
2476 return;
2479 /* Add the new endpoint at the end of the list. */
2480 list_add_tail(&virt_ep->bw_endpoint_list,
2481 &interval_bw->endpoints);
2484 void xhci_update_tt_active_eps(struct xhci_hcd *xhci,
2485 struct xhci_virt_device *virt_dev,
2486 int old_active_eps)
2488 struct xhci_root_port_bw_info *rh_bw_info;
2489 if (!virt_dev->tt_info)
2490 return;
2492 rh_bw_info = &xhci->rh_bw[virt_dev->real_port - 1];
2493 if (old_active_eps == 0 &&
2494 virt_dev->tt_info->active_eps != 0) {
2495 rh_bw_info->num_active_tts += 1;
2496 rh_bw_info->bw_table.bw_used += TT_HS_OVERHEAD;
2497 } else if (old_active_eps != 0 &&
2498 virt_dev->tt_info->active_eps == 0) {
2499 rh_bw_info->num_active_tts -= 1;
2500 rh_bw_info->bw_table.bw_used -= TT_HS_OVERHEAD;
2504 static int xhci_reserve_bandwidth(struct xhci_hcd *xhci,
2505 struct xhci_virt_device *virt_dev,
2506 struct xhci_container_ctx *in_ctx)
2508 struct xhci_bw_info ep_bw_info[31];
2509 int i;
2510 struct xhci_input_control_ctx *ctrl_ctx;
2511 int old_active_eps = 0;
2513 if (virt_dev->tt_info)
2514 old_active_eps = virt_dev->tt_info->active_eps;
2516 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2517 if (!ctrl_ctx) {
2518 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2519 __func__);
2520 return -ENOMEM;
2523 for (i = 0; i < 31; i++) {
2524 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2525 continue;
2527 /* Make a copy of the BW info in case we need to revert this */
2528 memcpy(&ep_bw_info[i], &virt_dev->eps[i].bw_info,
2529 sizeof(ep_bw_info[i]));
2530 /* Drop the endpoint from the interval table if the endpoint is
2531 * being dropped or changed.
2533 if (EP_IS_DROPPED(ctrl_ctx, i))
2534 xhci_drop_ep_from_interval_table(xhci,
2535 &virt_dev->eps[i].bw_info,
2536 virt_dev->bw_table,
2537 virt_dev->udev,
2538 &virt_dev->eps[i],
2539 virt_dev->tt_info);
2541 /* Overwrite the information stored in the endpoints' bw_info */
2542 xhci_update_bw_info(xhci, virt_dev->in_ctx, ctrl_ctx, virt_dev);
2543 for (i = 0; i < 31; i++) {
2544 /* Add any changed or added endpoints to the interval table */
2545 if (EP_IS_ADDED(ctrl_ctx, i))
2546 xhci_add_ep_to_interval_table(xhci,
2547 &virt_dev->eps[i].bw_info,
2548 virt_dev->bw_table,
2549 virt_dev->udev,
2550 &virt_dev->eps[i],
2551 virt_dev->tt_info);
2554 if (!xhci_check_bw_table(xhci, virt_dev, old_active_eps)) {
2555 /* Ok, this fits in the bandwidth we have.
2556 * Update the number of active TTs.
2558 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
2559 return 0;
2562 /* We don't have enough bandwidth for this, revert the stored info. */
2563 for (i = 0; i < 31; i++) {
2564 if (!EP_IS_ADDED(ctrl_ctx, i) && !EP_IS_DROPPED(ctrl_ctx, i))
2565 continue;
2567 /* Drop the new copies of any added or changed endpoints from
2568 * the interval table.
2570 if (EP_IS_ADDED(ctrl_ctx, i)) {
2571 xhci_drop_ep_from_interval_table(xhci,
2572 &virt_dev->eps[i].bw_info,
2573 virt_dev->bw_table,
2574 virt_dev->udev,
2575 &virt_dev->eps[i],
2576 virt_dev->tt_info);
2578 /* Revert the endpoint back to its old information */
2579 memcpy(&virt_dev->eps[i].bw_info, &ep_bw_info[i],
2580 sizeof(ep_bw_info[i]));
2581 /* Add any changed or dropped endpoints back into the table */
2582 if (EP_IS_DROPPED(ctrl_ctx, i))
2583 xhci_add_ep_to_interval_table(xhci,
2584 &virt_dev->eps[i].bw_info,
2585 virt_dev->bw_table,
2586 virt_dev->udev,
2587 &virt_dev->eps[i],
2588 virt_dev->tt_info);
2590 return -ENOMEM;
2594 /* Issue a configure endpoint command or evaluate context command
2595 * and wait for it to finish.
2597 static int xhci_configure_endpoint(struct xhci_hcd *xhci,
2598 struct usb_device *udev,
2599 struct xhci_command *command,
2600 bool ctx_change, bool must_succeed)
2602 int ret;
2603 unsigned long flags;
2604 struct xhci_input_control_ctx *ctrl_ctx;
2605 struct xhci_virt_device *virt_dev;
2607 if (!command)
2608 return -EINVAL;
2610 spin_lock_irqsave(&xhci->lock, flags);
2611 virt_dev = xhci->devs[udev->slot_id];
2613 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
2614 if (!ctrl_ctx) {
2615 spin_unlock_irqrestore(&xhci->lock, flags);
2616 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2617 __func__);
2618 return -ENOMEM;
2621 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK) &&
2622 xhci_reserve_host_resources(xhci, ctrl_ctx)) {
2623 spin_unlock_irqrestore(&xhci->lock, flags);
2624 xhci_warn(xhci, "Not enough host resources, "
2625 "active endpoint contexts = %u\n",
2626 xhci->num_active_eps);
2627 return -ENOMEM;
2629 if ((xhci->quirks & XHCI_SW_BW_CHECKING) &&
2630 xhci_reserve_bandwidth(xhci, virt_dev, command->in_ctx)) {
2631 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2632 xhci_free_host_resources(xhci, ctrl_ctx);
2633 spin_unlock_irqrestore(&xhci->lock, flags);
2634 xhci_warn(xhci, "Not enough bandwidth\n");
2635 return -ENOMEM;
2638 if (!ctx_change)
2639 ret = xhci_queue_configure_endpoint(xhci, command,
2640 command->in_ctx->dma,
2641 udev->slot_id, must_succeed);
2642 else
2643 ret = xhci_queue_evaluate_context(xhci, command,
2644 command->in_ctx->dma,
2645 udev->slot_id, must_succeed);
2646 if (ret < 0) {
2647 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK))
2648 xhci_free_host_resources(xhci, ctrl_ctx);
2649 spin_unlock_irqrestore(&xhci->lock, flags);
2650 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
2651 "FIXME allocate a new ring segment");
2652 return -ENOMEM;
2654 xhci_ring_cmd_db(xhci);
2655 spin_unlock_irqrestore(&xhci->lock, flags);
2657 /* Wait for the configure endpoint command to complete */
2658 wait_for_completion(command->completion);
2660 if (!ctx_change)
2661 ret = xhci_configure_endpoint_result(xhci, udev,
2662 &command->status);
2663 else
2664 ret = xhci_evaluate_context_result(xhci, udev,
2665 &command->status);
2667 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
2668 spin_lock_irqsave(&xhci->lock, flags);
2669 /* If the command failed, remove the reserved resources.
2670 * Otherwise, clean up the estimate to include dropped eps.
2672 if (ret)
2673 xhci_free_host_resources(xhci, ctrl_ctx);
2674 else
2675 xhci_finish_resource_reservation(xhci, ctrl_ctx);
2676 spin_unlock_irqrestore(&xhci->lock, flags);
2678 return ret;
2681 static void xhci_check_bw_drop_ep_streams(struct xhci_hcd *xhci,
2682 struct xhci_virt_device *vdev, int i)
2684 struct xhci_virt_ep *ep = &vdev->eps[i];
2686 if (ep->ep_state & EP_HAS_STREAMS) {
2687 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on set_interface, freeing streams.\n",
2688 xhci_get_endpoint_address(i));
2689 xhci_free_stream_info(xhci, ep->stream_info);
2690 ep->stream_info = NULL;
2691 ep->ep_state &= ~EP_HAS_STREAMS;
2695 /* Called after one or more calls to xhci_add_endpoint() or
2696 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2697 * to call xhci_reset_bandwidth().
2699 * Since we are in the middle of changing either configuration or
2700 * installing a new alt setting, the USB core won't allow URBs to be
2701 * enqueued for any endpoint on the old config or interface. Nothing
2702 * else should be touching the xhci->devs[slot_id] structure, so we
2703 * don't need to take the xhci->lock for manipulating that.
2705 int xhci_check_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2707 int i;
2708 int ret = 0;
2709 struct xhci_hcd *xhci;
2710 struct xhci_virt_device *virt_dev;
2711 struct xhci_input_control_ctx *ctrl_ctx;
2712 struct xhci_slot_ctx *slot_ctx;
2713 struct xhci_command *command;
2715 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2716 if (ret <= 0)
2717 return ret;
2718 xhci = hcd_to_xhci(hcd);
2719 if (xhci->xhc_state & XHCI_STATE_DYING)
2720 return -ENODEV;
2722 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2723 virt_dev = xhci->devs[udev->slot_id];
2725 command = xhci_alloc_command(xhci, false, true, GFP_KERNEL);
2726 if (!command)
2727 return -ENOMEM;
2729 command->in_ctx = virt_dev->in_ctx;
2731 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2732 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
2733 if (!ctrl_ctx) {
2734 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2735 __func__);
2736 ret = -ENOMEM;
2737 goto command_cleanup;
2739 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2740 ctrl_ctx->add_flags &= cpu_to_le32(~EP0_FLAG);
2741 ctrl_ctx->drop_flags &= cpu_to_le32(~(SLOT_FLAG | EP0_FLAG));
2743 /* Don't issue the command if there's no endpoints to update. */
2744 if (ctrl_ctx->add_flags == cpu_to_le32(SLOT_FLAG) &&
2745 ctrl_ctx->drop_flags == 0) {
2746 ret = 0;
2747 goto command_cleanup;
2749 xhci_dbg(xhci, "New Input Control Context:\n");
2750 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
2751 xhci_dbg_ctx(xhci, virt_dev->in_ctx,
2752 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2754 ret = xhci_configure_endpoint(xhci, udev, command,
2755 false, false);
2756 if (ret)
2757 /* Callee should call reset_bandwidth() */
2758 goto command_cleanup;
2760 xhci_dbg(xhci, "Output context after successful config ep cmd:\n");
2761 xhci_dbg_ctx(xhci, virt_dev->out_ctx,
2762 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx->dev_info)));
2764 /* Free any rings that were dropped, but not changed. */
2765 for (i = 1; i < 31; ++i) {
2766 if ((le32_to_cpu(ctrl_ctx->drop_flags) & (1 << (i + 1))) &&
2767 !(le32_to_cpu(ctrl_ctx->add_flags) & (1 << (i + 1)))) {
2768 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2769 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2772 xhci_zero_in_ctx(xhci, virt_dev);
2774 * Install any rings for completely new endpoints or changed endpoints,
2775 * and free or cache any old rings from changed endpoints.
2777 for (i = 1; i < 31; ++i) {
2778 if (!virt_dev->eps[i].new_ring)
2779 continue;
2780 /* Only cache or free the old ring if it exists.
2781 * It may not if this is the first add of an endpoint.
2783 if (virt_dev->eps[i].ring) {
2784 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
2786 xhci_check_bw_drop_ep_streams(xhci, virt_dev, i);
2787 virt_dev->eps[i].ring = virt_dev->eps[i].new_ring;
2788 virt_dev->eps[i].new_ring = NULL;
2790 command_cleanup:
2791 kfree(command->completion);
2792 kfree(command);
2794 return ret;
2797 void xhci_reset_bandwidth(struct usb_hcd *hcd, struct usb_device *udev)
2799 struct xhci_hcd *xhci;
2800 struct xhci_virt_device *virt_dev;
2801 int i, ret;
2803 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
2804 if (ret <= 0)
2805 return;
2806 xhci = hcd_to_xhci(hcd);
2808 xhci_dbg(xhci, "%s called for udev %p\n", __func__, udev);
2809 virt_dev = xhci->devs[udev->slot_id];
2810 /* Free any rings allocated for added endpoints */
2811 for (i = 0; i < 31; ++i) {
2812 if (virt_dev->eps[i].new_ring) {
2813 xhci_ring_free(xhci, virt_dev->eps[i].new_ring);
2814 virt_dev->eps[i].new_ring = NULL;
2817 xhci_zero_in_ctx(xhci, virt_dev);
2820 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd *xhci,
2821 struct xhci_container_ctx *in_ctx,
2822 struct xhci_container_ctx *out_ctx,
2823 struct xhci_input_control_ctx *ctrl_ctx,
2824 u32 add_flags, u32 drop_flags)
2826 ctrl_ctx->add_flags = cpu_to_le32(add_flags);
2827 ctrl_ctx->drop_flags = cpu_to_le32(drop_flags);
2828 xhci_slot_copy(xhci, in_ctx, out_ctx);
2829 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
2831 xhci_dbg(xhci, "Input Context:\n");
2832 xhci_dbg_ctx(xhci, in_ctx, xhci_last_valid_endpoint(add_flags));
2835 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd *xhci,
2836 unsigned int slot_id, unsigned int ep_index,
2837 struct xhci_dequeue_state *deq_state)
2839 struct xhci_input_control_ctx *ctrl_ctx;
2840 struct xhci_container_ctx *in_ctx;
2841 struct xhci_ep_ctx *ep_ctx;
2842 u32 added_ctxs;
2843 dma_addr_t addr;
2845 in_ctx = xhci->devs[slot_id]->in_ctx;
2846 ctrl_ctx = xhci_get_input_control_ctx(xhci, in_ctx);
2847 if (!ctrl_ctx) {
2848 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
2849 __func__);
2850 return;
2853 xhci_endpoint_copy(xhci, xhci->devs[slot_id]->in_ctx,
2854 xhci->devs[slot_id]->out_ctx, ep_index);
2855 ep_ctx = xhci_get_ep_ctx(xhci, in_ctx, ep_index);
2856 addr = xhci_trb_virt_to_dma(deq_state->new_deq_seg,
2857 deq_state->new_deq_ptr);
2858 if (addr == 0) {
2859 xhci_warn(xhci, "WARN Cannot submit config ep after "
2860 "reset ep command\n");
2861 xhci_warn(xhci, "WARN deq seg = %p, deq ptr = %p\n",
2862 deq_state->new_deq_seg,
2863 deq_state->new_deq_ptr);
2864 return;
2866 ep_ctx->deq = cpu_to_le64(addr | deq_state->new_cycle_state);
2868 added_ctxs = xhci_get_endpoint_flag_from_index(ep_index);
2869 xhci_setup_input_ctx_for_config_ep(xhci, xhci->devs[slot_id]->in_ctx,
2870 xhci->devs[slot_id]->out_ctx, ctrl_ctx,
2871 added_ctxs, added_ctxs);
2874 void xhci_cleanup_stalled_ring(struct xhci_hcd *xhci,
2875 struct usb_device *udev, unsigned int ep_index)
2877 struct xhci_dequeue_state deq_state;
2878 struct xhci_virt_ep *ep;
2880 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2881 "Cleaning up stalled endpoint ring");
2882 ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2883 /* We need to move the HW's dequeue pointer past this TD,
2884 * or it will attempt to resend it on the next doorbell ring.
2886 xhci_find_new_dequeue_state(xhci, udev->slot_id,
2887 ep_index, ep->stopped_stream, ep->stopped_td,
2888 &deq_state);
2890 /* HW with the reset endpoint quirk will use the saved dequeue state to
2891 * issue a configure endpoint command later.
2893 if (!(xhci->quirks & XHCI_RESET_EP_QUIRK)) {
2894 struct xhci_command *command;
2895 /* Can't sleep if we're called from cleanup_halted_endpoint() */
2896 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
2897 if (!command)
2898 return;
2899 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2900 "Queueing new dequeue state");
2901 xhci_queue_new_dequeue_state(xhci, command, udev->slot_id,
2902 ep_index, ep->stopped_stream, &deq_state);
2903 } else {
2904 /* Better hope no one uses the input context between now and the
2905 * reset endpoint completion!
2906 * XXX: No idea how this hardware will react when stream rings
2907 * are enabled.
2909 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
2910 "Setting up input context for "
2911 "configure endpoint command");
2912 xhci_setup_input_ctx_for_quirk(xhci, udev->slot_id,
2913 ep_index, &deq_state);
2917 /* Deal with stalled endpoints. The core should have sent the control message
2918 * to clear the halt condition. However, we need to make the xHCI hardware
2919 * reset its sequence number, since a device will expect a sequence number of
2920 * zero after the halt condition is cleared.
2921 * Context: in_interrupt
2923 void xhci_endpoint_reset(struct usb_hcd *hcd,
2924 struct usb_host_endpoint *ep)
2926 struct xhci_hcd *xhci;
2927 struct usb_device *udev;
2928 unsigned int ep_index;
2929 unsigned long flags;
2930 int ret;
2931 struct xhci_virt_ep *virt_ep;
2932 struct xhci_command *command;
2934 xhci = hcd_to_xhci(hcd);
2935 udev = (struct usb_device *) ep->hcpriv;
2936 /* Called with a root hub endpoint (or an endpoint that wasn't added
2937 * with xhci_add_endpoint()
2939 if (!ep->hcpriv)
2940 return;
2941 ep_index = xhci_get_endpoint_index(&ep->desc);
2942 virt_ep = &xhci->devs[udev->slot_id]->eps[ep_index];
2943 if (!virt_ep->stopped_td) {
2944 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2945 "Endpoint 0x%x not halted, refusing to reset.",
2946 ep->desc.bEndpointAddress);
2947 return;
2949 if (usb_endpoint_xfer_control(&ep->desc)) {
2950 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2951 "Control endpoint stall already handled.");
2952 return;
2955 command = xhci_alloc_command(xhci, false, false, GFP_ATOMIC);
2956 if (!command)
2957 return;
2959 xhci_dbg_trace(xhci, trace_xhci_dbg_reset_ep,
2960 "Queueing reset endpoint command");
2961 spin_lock_irqsave(&xhci->lock, flags);
2962 ret = xhci_queue_reset_ep(xhci, command, udev->slot_id, ep_index);
2964 * Can't change the ring dequeue pointer until it's transitioned to the
2965 * stopped state, which is only upon a successful reset endpoint
2966 * command. Better hope that last command worked!
2968 if (!ret) {
2969 xhci_cleanup_stalled_ring(xhci, udev, ep_index);
2970 kfree(virt_ep->stopped_td);
2971 xhci_ring_cmd_db(xhci);
2973 virt_ep->stopped_td = NULL;
2974 virt_ep->stopped_stream = 0;
2975 spin_unlock_irqrestore(&xhci->lock, flags);
2977 if (ret)
2978 xhci_warn(xhci, "FIXME allocate a new ring segment\n");
2981 static int xhci_check_streams_endpoint(struct xhci_hcd *xhci,
2982 struct usb_device *udev, struct usb_host_endpoint *ep,
2983 unsigned int slot_id)
2985 int ret;
2986 unsigned int ep_index;
2987 unsigned int ep_state;
2989 if (!ep)
2990 return -EINVAL;
2991 ret = xhci_check_args(xhci_to_hcd(xhci), udev, ep, 1, true, __func__);
2992 if (ret <= 0)
2993 return -EINVAL;
2994 if (usb_ss_max_streams(&ep->ss_ep_comp) == 0) {
2995 xhci_warn(xhci, "WARN: SuperSpeed Endpoint Companion"
2996 " descriptor for ep 0x%x does not support streams\n",
2997 ep->desc.bEndpointAddress);
2998 return -EINVAL;
3001 ep_index = xhci_get_endpoint_index(&ep->desc);
3002 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3003 if (ep_state & EP_HAS_STREAMS ||
3004 ep_state & EP_GETTING_STREAMS) {
3005 xhci_warn(xhci, "WARN: SuperSpeed bulk endpoint 0x%x "
3006 "already has streams set up.\n",
3007 ep->desc.bEndpointAddress);
3008 xhci_warn(xhci, "Send email to xHCI maintainer and ask for "
3009 "dynamic stream context array reallocation.\n");
3010 return -EINVAL;
3012 if (!list_empty(&xhci->devs[slot_id]->eps[ep_index].ring->td_list)) {
3013 xhci_warn(xhci, "Cannot setup streams for SuperSpeed bulk "
3014 "endpoint 0x%x; URBs are pending.\n",
3015 ep->desc.bEndpointAddress);
3016 return -EINVAL;
3018 return 0;
3021 static void xhci_calculate_streams_entries(struct xhci_hcd *xhci,
3022 unsigned int *num_streams, unsigned int *num_stream_ctxs)
3024 unsigned int max_streams;
3026 /* The stream context array size must be a power of two */
3027 *num_stream_ctxs = roundup_pow_of_two(*num_streams);
3029 * Find out how many primary stream array entries the host controller
3030 * supports. Later we may use secondary stream arrays (similar to 2nd
3031 * level page entries), but that's an optional feature for xHCI host
3032 * controllers. xHCs must support at least 4 stream IDs.
3034 max_streams = HCC_MAX_PSA(xhci->hcc_params);
3035 if (*num_stream_ctxs > max_streams) {
3036 xhci_dbg(xhci, "xHCI HW only supports %u stream ctx entries.\n",
3037 max_streams);
3038 *num_stream_ctxs = max_streams;
3039 *num_streams = max_streams;
3043 /* Returns an error code if one of the endpoint already has streams.
3044 * This does not change any data structures, it only checks and gathers
3045 * information.
3047 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd *xhci,
3048 struct usb_device *udev,
3049 struct usb_host_endpoint **eps, unsigned int num_eps,
3050 unsigned int *num_streams, u32 *changed_ep_bitmask)
3052 unsigned int max_streams;
3053 unsigned int endpoint_flag;
3054 int i;
3055 int ret;
3057 for (i = 0; i < num_eps; i++) {
3058 ret = xhci_check_streams_endpoint(xhci, udev,
3059 eps[i], udev->slot_id);
3060 if (ret < 0)
3061 return ret;
3063 max_streams = usb_ss_max_streams(&eps[i]->ss_ep_comp);
3064 if (max_streams < (*num_streams - 1)) {
3065 xhci_dbg(xhci, "Ep 0x%x only supports %u stream IDs.\n",
3066 eps[i]->desc.bEndpointAddress,
3067 max_streams);
3068 *num_streams = max_streams+1;
3071 endpoint_flag = xhci_get_endpoint_flag(&eps[i]->desc);
3072 if (*changed_ep_bitmask & endpoint_flag)
3073 return -EINVAL;
3074 *changed_ep_bitmask |= endpoint_flag;
3076 return 0;
3079 static u32 xhci_calculate_no_streams_bitmask(struct xhci_hcd *xhci,
3080 struct usb_device *udev,
3081 struct usb_host_endpoint **eps, unsigned int num_eps)
3083 u32 changed_ep_bitmask = 0;
3084 unsigned int slot_id;
3085 unsigned int ep_index;
3086 unsigned int ep_state;
3087 int i;
3089 slot_id = udev->slot_id;
3090 if (!xhci->devs[slot_id])
3091 return 0;
3093 for (i = 0; i < num_eps; i++) {
3094 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3095 ep_state = xhci->devs[slot_id]->eps[ep_index].ep_state;
3096 /* Are streams already being freed for the endpoint? */
3097 if (ep_state & EP_GETTING_NO_STREAMS) {
3098 xhci_warn(xhci, "WARN Can't disable streams for "
3099 "endpoint 0x%x, "
3100 "streams are being disabled already\n",
3101 eps[i]->desc.bEndpointAddress);
3102 return 0;
3104 /* Are there actually any streams to free? */
3105 if (!(ep_state & EP_HAS_STREAMS) &&
3106 !(ep_state & EP_GETTING_STREAMS)) {
3107 xhci_warn(xhci, "WARN Can't disable streams for "
3108 "endpoint 0x%x, "
3109 "streams are already disabled!\n",
3110 eps[i]->desc.bEndpointAddress);
3111 xhci_warn(xhci, "WARN xhci_free_streams() called "
3112 "with non-streams endpoint\n");
3113 return 0;
3115 changed_ep_bitmask |= xhci_get_endpoint_flag(&eps[i]->desc);
3117 return changed_ep_bitmask;
3121 * The USB device drivers use this function (though the HCD interface in USB
3122 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3123 * coordinate mass storage command queueing across multiple endpoints (basically
3124 * a stream ID == a task ID).
3126 * Setting up streams involves allocating the same size stream context array
3127 * for each endpoint and issuing a configure endpoint command for all endpoints.
3129 * Don't allow the call to succeed if one endpoint only supports one stream
3130 * (which means it doesn't support streams at all).
3132 * Drivers may get less stream IDs than they asked for, if the host controller
3133 * hardware or endpoints claim they can't support the number of requested
3134 * stream IDs.
3136 int xhci_alloc_streams(struct usb_hcd *hcd, struct usb_device *udev,
3137 struct usb_host_endpoint **eps, unsigned int num_eps,
3138 unsigned int num_streams, gfp_t mem_flags)
3140 int i, ret;
3141 struct xhci_hcd *xhci;
3142 struct xhci_virt_device *vdev;
3143 struct xhci_command *config_cmd;
3144 struct xhci_input_control_ctx *ctrl_ctx;
3145 unsigned int ep_index;
3146 unsigned int num_stream_ctxs;
3147 unsigned long flags;
3148 u32 changed_ep_bitmask = 0;
3150 if (!eps)
3151 return -EINVAL;
3153 /* Add one to the number of streams requested to account for
3154 * stream 0 that is reserved for xHCI usage.
3156 num_streams += 1;
3157 xhci = hcd_to_xhci(hcd);
3158 xhci_dbg(xhci, "Driver wants %u stream IDs (including stream 0).\n",
3159 num_streams);
3161 /* MaxPSASize value 0 (2 streams) means streams are not supported */
3162 if (HCC_MAX_PSA(xhci->hcc_params) < 4) {
3163 xhci_dbg(xhci, "xHCI controller does not support streams.\n");
3164 return -ENOSYS;
3167 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
3168 if (!config_cmd) {
3169 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
3170 return -ENOMEM;
3172 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
3173 if (!ctrl_ctx) {
3174 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3175 __func__);
3176 xhci_free_command(xhci, config_cmd);
3177 return -ENOMEM;
3180 /* Check to make sure all endpoints are not already configured for
3181 * streams. While we're at it, find the maximum number of streams that
3182 * all the endpoints will support and check for duplicate endpoints.
3184 spin_lock_irqsave(&xhci->lock, flags);
3185 ret = xhci_calculate_streams_and_bitmask(xhci, udev, eps,
3186 num_eps, &num_streams, &changed_ep_bitmask);
3187 if (ret < 0) {
3188 xhci_free_command(xhci, config_cmd);
3189 spin_unlock_irqrestore(&xhci->lock, flags);
3190 return ret;
3192 if (num_streams <= 1) {
3193 xhci_warn(xhci, "WARN: endpoints can't handle "
3194 "more than one stream.\n");
3195 xhci_free_command(xhci, config_cmd);
3196 spin_unlock_irqrestore(&xhci->lock, flags);
3197 return -EINVAL;
3199 vdev = xhci->devs[udev->slot_id];
3200 /* Mark each endpoint as being in transition, so
3201 * xhci_urb_enqueue() will reject all URBs.
3203 for (i = 0; i < num_eps; i++) {
3204 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3205 vdev->eps[ep_index].ep_state |= EP_GETTING_STREAMS;
3207 spin_unlock_irqrestore(&xhci->lock, flags);
3209 /* Setup internal data structures and allocate HW data structures for
3210 * streams (but don't install the HW structures in the input context
3211 * until we're sure all memory allocation succeeded).
3213 xhci_calculate_streams_entries(xhci, &num_streams, &num_stream_ctxs);
3214 xhci_dbg(xhci, "Need %u stream ctx entries for %u stream IDs.\n",
3215 num_stream_ctxs, num_streams);
3217 for (i = 0; i < num_eps; i++) {
3218 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3219 vdev->eps[ep_index].stream_info = xhci_alloc_stream_info(xhci,
3220 num_stream_ctxs,
3221 num_streams, mem_flags);
3222 if (!vdev->eps[ep_index].stream_info)
3223 goto cleanup;
3224 /* Set maxPstreams in endpoint context and update deq ptr to
3225 * point to stream context array. FIXME
3229 /* Set up the input context for a configure endpoint command. */
3230 for (i = 0; i < num_eps; i++) {
3231 struct xhci_ep_ctx *ep_ctx;
3233 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3234 ep_ctx = xhci_get_ep_ctx(xhci, config_cmd->in_ctx, ep_index);
3236 xhci_endpoint_copy(xhci, config_cmd->in_ctx,
3237 vdev->out_ctx, ep_index);
3238 xhci_setup_streams_ep_input_ctx(xhci, ep_ctx,
3239 vdev->eps[ep_index].stream_info);
3241 /* Tell the HW to drop its old copy of the endpoint context info
3242 * and add the updated copy from the input context.
3244 xhci_setup_input_ctx_for_config_ep(xhci, config_cmd->in_ctx,
3245 vdev->out_ctx, ctrl_ctx,
3246 changed_ep_bitmask, changed_ep_bitmask);
3248 /* Issue and wait for the configure endpoint command */
3249 ret = xhci_configure_endpoint(xhci, udev, config_cmd,
3250 false, false);
3252 /* xHC rejected the configure endpoint command for some reason, so we
3253 * leave the old ring intact and free our internal streams data
3254 * structure.
3256 if (ret < 0)
3257 goto cleanup;
3259 spin_lock_irqsave(&xhci->lock, flags);
3260 for (i = 0; i < num_eps; i++) {
3261 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3262 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3263 xhci_dbg(xhci, "Slot %u ep ctx %u now has streams.\n",
3264 udev->slot_id, ep_index);
3265 vdev->eps[ep_index].ep_state |= EP_HAS_STREAMS;
3267 xhci_free_command(xhci, config_cmd);
3268 spin_unlock_irqrestore(&xhci->lock, flags);
3270 /* Subtract 1 for stream 0, which drivers can't use */
3271 return num_streams - 1;
3273 cleanup:
3274 /* If it didn't work, free the streams! */
3275 for (i = 0; i < num_eps; i++) {
3276 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3277 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3278 vdev->eps[ep_index].stream_info = NULL;
3279 /* FIXME Unset maxPstreams in endpoint context and
3280 * update deq ptr to point to normal string ring.
3282 vdev->eps[ep_index].ep_state &= ~EP_GETTING_STREAMS;
3283 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3284 xhci_endpoint_zero(xhci, vdev, eps[i]);
3286 xhci_free_command(xhci, config_cmd);
3287 return -ENOMEM;
3290 /* Transition the endpoint from using streams to being a "normal" endpoint
3291 * without streams.
3293 * Modify the endpoint context state, submit a configure endpoint command,
3294 * and free all endpoint rings for streams if that completes successfully.
3296 int xhci_free_streams(struct usb_hcd *hcd, struct usb_device *udev,
3297 struct usb_host_endpoint **eps, unsigned int num_eps,
3298 gfp_t mem_flags)
3300 int i, ret;
3301 struct xhci_hcd *xhci;
3302 struct xhci_virt_device *vdev;
3303 struct xhci_command *command;
3304 struct xhci_input_control_ctx *ctrl_ctx;
3305 unsigned int ep_index;
3306 unsigned long flags;
3307 u32 changed_ep_bitmask;
3309 xhci = hcd_to_xhci(hcd);
3310 vdev = xhci->devs[udev->slot_id];
3312 /* Set up a configure endpoint command to remove the streams rings */
3313 spin_lock_irqsave(&xhci->lock, flags);
3314 changed_ep_bitmask = xhci_calculate_no_streams_bitmask(xhci,
3315 udev, eps, num_eps);
3316 if (changed_ep_bitmask == 0) {
3317 spin_unlock_irqrestore(&xhci->lock, flags);
3318 return -EINVAL;
3321 /* Use the xhci_command structure from the first endpoint. We may have
3322 * allocated too many, but the driver may call xhci_free_streams() for
3323 * each endpoint it grouped into one call to xhci_alloc_streams().
3325 ep_index = xhci_get_endpoint_index(&eps[0]->desc);
3326 command = vdev->eps[ep_index].stream_info->free_streams_command;
3327 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3328 if (!ctrl_ctx) {
3329 spin_unlock_irqrestore(&xhci->lock, flags);
3330 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3331 __func__);
3332 return -EINVAL;
3335 for (i = 0; i < num_eps; i++) {
3336 struct xhci_ep_ctx *ep_ctx;
3338 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3339 ep_ctx = xhci_get_ep_ctx(xhci, command->in_ctx, ep_index);
3340 xhci->devs[udev->slot_id]->eps[ep_index].ep_state |=
3341 EP_GETTING_NO_STREAMS;
3343 xhci_endpoint_copy(xhci, command->in_ctx,
3344 vdev->out_ctx, ep_index);
3345 xhci_setup_no_streams_ep_input_ctx(xhci, ep_ctx,
3346 &vdev->eps[ep_index]);
3348 xhci_setup_input_ctx_for_config_ep(xhci, command->in_ctx,
3349 vdev->out_ctx, ctrl_ctx,
3350 changed_ep_bitmask, changed_ep_bitmask);
3351 spin_unlock_irqrestore(&xhci->lock, flags);
3353 /* Issue and wait for the configure endpoint command,
3354 * which must succeed.
3356 ret = xhci_configure_endpoint(xhci, udev, command,
3357 false, true);
3359 /* xHC rejected the configure endpoint command for some reason, so we
3360 * leave the streams rings intact.
3362 if (ret < 0)
3363 return ret;
3365 spin_lock_irqsave(&xhci->lock, flags);
3366 for (i = 0; i < num_eps; i++) {
3367 ep_index = xhci_get_endpoint_index(&eps[i]->desc);
3368 xhci_free_stream_info(xhci, vdev->eps[ep_index].stream_info);
3369 vdev->eps[ep_index].stream_info = NULL;
3370 /* FIXME Unset maxPstreams in endpoint context and
3371 * update deq ptr to point to normal string ring.
3373 vdev->eps[ep_index].ep_state &= ~EP_GETTING_NO_STREAMS;
3374 vdev->eps[ep_index].ep_state &= ~EP_HAS_STREAMS;
3376 spin_unlock_irqrestore(&xhci->lock, flags);
3378 return 0;
3382 * Deletes endpoint resources for endpoints that were active before a Reset
3383 * Device command, or a Disable Slot command. The Reset Device command leaves
3384 * the control endpoint intact, whereas the Disable Slot command deletes it.
3386 * Must be called with xhci->lock held.
3388 void xhci_free_device_endpoint_resources(struct xhci_hcd *xhci,
3389 struct xhci_virt_device *virt_dev, bool drop_control_ep)
3391 int i;
3392 unsigned int num_dropped_eps = 0;
3393 unsigned int drop_flags = 0;
3395 for (i = (drop_control_ep ? 0 : 1); i < 31; i++) {
3396 if (virt_dev->eps[i].ring) {
3397 drop_flags |= 1 << i;
3398 num_dropped_eps++;
3401 xhci->num_active_eps -= num_dropped_eps;
3402 if (num_dropped_eps)
3403 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3404 "Dropped %u ep ctxs, flags = 0x%x, "
3405 "%u now active.",
3406 num_dropped_eps, drop_flags,
3407 xhci->num_active_eps);
3411 * This submits a Reset Device Command, which will set the device state to 0,
3412 * set the device address to 0, and disable all the endpoints except the default
3413 * control endpoint. The USB core should come back and call
3414 * xhci_address_device(), and then re-set up the configuration. If this is
3415 * called because of a usb_reset_and_verify_device(), then the old alternate
3416 * settings will be re-installed through the normal bandwidth allocation
3417 * functions.
3419 * Wait for the Reset Device command to finish. Remove all structures
3420 * associated with the endpoints that were disabled. Clear the input device
3421 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3423 * If the virt_dev to be reset does not exist or does not match the udev,
3424 * it means the device is lost, possibly due to the xHC restore error and
3425 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3426 * re-allocate the device.
3428 int xhci_discover_or_reset_device(struct usb_hcd *hcd, struct usb_device *udev)
3430 int ret, i;
3431 unsigned long flags;
3432 struct xhci_hcd *xhci;
3433 unsigned int slot_id;
3434 struct xhci_virt_device *virt_dev;
3435 struct xhci_command *reset_device_cmd;
3436 int last_freed_endpoint;
3437 struct xhci_slot_ctx *slot_ctx;
3438 int old_active_eps = 0;
3440 ret = xhci_check_args(hcd, udev, NULL, 0, false, __func__);
3441 if (ret <= 0)
3442 return ret;
3443 xhci = hcd_to_xhci(hcd);
3444 slot_id = udev->slot_id;
3445 virt_dev = xhci->devs[slot_id];
3446 if (!virt_dev) {
3447 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3448 "not exist. Re-allocate the device\n", slot_id);
3449 ret = xhci_alloc_dev(hcd, udev);
3450 if (ret == 1)
3451 return 0;
3452 else
3453 return -EINVAL;
3456 if (virt_dev->udev != udev) {
3457 /* If the virt_dev and the udev does not match, this virt_dev
3458 * may belong to another udev.
3459 * Re-allocate the device.
3461 xhci_dbg(xhci, "The device to be reset with slot ID %u does "
3462 "not match the udev. Re-allocate the device\n",
3463 slot_id);
3464 ret = xhci_alloc_dev(hcd, udev);
3465 if (ret == 1)
3466 return 0;
3467 else
3468 return -EINVAL;
3471 /* If device is not setup, there is no point in resetting it */
3472 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3473 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx->dev_state)) ==
3474 SLOT_STATE_DISABLED)
3475 return 0;
3477 xhci_dbg(xhci, "Resetting device with slot ID %u\n", slot_id);
3478 /* Allocate the command structure that holds the struct completion.
3479 * Assume we're in process context, since the normal device reset
3480 * process has to wait for the device anyway. Storage devices are
3481 * reset as part of error handling, so use GFP_NOIO instead of
3482 * GFP_KERNEL.
3484 reset_device_cmd = xhci_alloc_command(xhci, false, true, GFP_NOIO);
3485 if (!reset_device_cmd) {
3486 xhci_dbg(xhci, "Couldn't allocate command structure.\n");
3487 return -ENOMEM;
3490 /* Attempt to submit the Reset Device command to the command ring */
3491 spin_lock_irqsave(&xhci->lock, flags);
3493 ret = xhci_queue_reset_device(xhci, reset_device_cmd, slot_id);
3494 if (ret) {
3495 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3496 spin_unlock_irqrestore(&xhci->lock, flags);
3497 goto command_cleanup;
3499 xhci_ring_cmd_db(xhci);
3500 spin_unlock_irqrestore(&xhci->lock, flags);
3502 /* Wait for the Reset Device command to finish */
3503 wait_for_completion(reset_device_cmd->completion);
3505 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3506 * unless we tried to reset a slot ID that wasn't enabled,
3507 * or the device wasn't in the addressed or configured state.
3509 ret = reset_device_cmd->status;
3510 switch (ret) {
3511 case COMP_CMD_ABORT:
3512 case COMP_CMD_STOP:
3513 xhci_warn(xhci, "Timeout waiting for reset device command\n");
3514 ret = -ETIME;
3515 goto command_cleanup;
3516 case COMP_EBADSLT: /* 0.95 completion code for bad slot ID */
3517 case COMP_CTX_STATE: /* 0.96 completion code for same thing */
3518 xhci_dbg(xhci, "Can't reset device (slot ID %u) in %s state\n",
3519 slot_id,
3520 xhci_get_slot_state(xhci, virt_dev->out_ctx));
3521 xhci_dbg(xhci, "Not freeing device rings.\n");
3522 /* Don't treat this as an error. May change my mind later. */
3523 ret = 0;
3524 goto command_cleanup;
3525 case COMP_SUCCESS:
3526 xhci_dbg(xhci, "Successful reset device command.\n");
3527 break;
3528 default:
3529 if (xhci_is_vendor_info_code(xhci, ret))
3530 break;
3531 xhci_warn(xhci, "Unknown completion code %u for "
3532 "reset device command.\n", ret);
3533 ret = -EINVAL;
3534 goto command_cleanup;
3537 /* Free up host controller endpoint resources */
3538 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3539 spin_lock_irqsave(&xhci->lock, flags);
3540 /* Don't delete the default control endpoint resources */
3541 xhci_free_device_endpoint_resources(xhci, virt_dev, false);
3542 spin_unlock_irqrestore(&xhci->lock, flags);
3545 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3546 last_freed_endpoint = 1;
3547 for (i = 1; i < 31; ++i) {
3548 struct xhci_virt_ep *ep = &virt_dev->eps[i];
3550 if (ep->ep_state & EP_HAS_STREAMS) {
3551 xhci_warn(xhci, "WARN: endpoint 0x%02x has streams on device reset, freeing streams.\n",
3552 xhci_get_endpoint_address(i));
3553 xhci_free_stream_info(xhci, ep->stream_info);
3554 ep->stream_info = NULL;
3555 ep->ep_state &= ~EP_HAS_STREAMS;
3558 if (ep->ring) {
3559 xhci_free_or_cache_endpoint_ring(xhci, virt_dev, i);
3560 last_freed_endpoint = i;
3562 if (!list_empty(&virt_dev->eps[i].bw_endpoint_list))
3563 xhci_drop_ep_from_interval_table(xhci,
3564 &virt_dev->eps[i].bw_info,
3565 virt_dev->bw_table,
3566 udev,
3567 &virt_dev->eps[i],
3568 virt_dev->tt_info);
3569 xhci_clear_endpoint_bw_info(&virt_dev->eps[i].bw_info);
3571 /* If necessary, update the number of active TTs on this root port */
3572 xhci_update_tt_active_eps(xhci, virt_dev, old_active_eps);
3574 xhci_dbg(xhci, "Output context after successful reset device cmd:\n");
3575 xhci_dbg_ctx(xhci, virt_dev->out_ctx, last_freed_endpoint);
3576 ret = 0;
3578 command_cleanup:
3579 xhci_free_command(xhci, reset_device_cmd);
3580 return ret;
3584 * At this point, the struct usb_device is about to go away, the device has
3585 * disconnected, and all traffic has been stopped and the endpoints have been
3586 * disabled. Free any HC data structures associated with that device.
3588 void xhci_free_dev(struct usb_hcd *hcd, struct usb_device *udev)
3590 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3591 struct xhci_virt_device *virt_dev;
3592 unsigned long flags;
3593 u32 state;
3594 int i, ret;
3595 struct xhci_command *command;
3597 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3598 if (!command)
3599 return;
3601 #ifndef CONFIG_USB_DEFAULT_PERSIST
3603 * We called pm_runtime_get_noresume when the device was attached.
3604 * Decrement the counter here to allow controller to runtime suspend
3605 * if no devices remain.
3607 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3608 pm_runtime_put_noidle(hcd->self.controller);
3609 #endif
3611 ret = xhci_check_args(hcd, udev, NULL, 0, true, __func__);
3612 /* If the host is halted due to driver unload, we still need to free the
3613 * device.
3615 if (ret <= 0 && ret != -ENODEV) {
3616 kfree(command);
3617 return;
3620 virt_dev = xhci->devs[udev->slot_id];
3622 /* Stop any wayward timer functions (which may grab the lock) */
3623 for (i = 0; i < 31; ++i) {
3624 virt_dev->eps[i].ep_state &= ~EP_HALT_PENDING;
3625 del_timer_sync(&virt_dev->eps[i].stop_cmd_timer);
3628 spin_lock_irqsave(&xhci->lock, flags);
3629 /* Don't disable the slot if the host controller is dead. */
3630 state = readl(&xhci->op_regs->status);
3631 if (state == 0xffffffff || (xhci->xhc_state & XHCI_STATE_DYING) ||
3632 (xhci->xhc_state & XHCI_STATE_HALTED)) {
3633 xhci_free_virt_device(xhci, udev->slot_id);
3634 spin_unlock_irqrestore(&xhci->lock, flags);
3635 kfree(command);
3636 return;
3639 if (xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3640 udev->slot_id)) {
3641 spin_unlock_irqrestore(&xhci->lock, flags);
3642 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3643 return;
3645 xhci_ring_cmd_db(xhci);
3646 spin_unlock_irqrestore(&xhci->lock, flags);
3649 * Event command completion handler will free any data structures
3650 * associated with the slot. XXX Can free sleep?
3655 * Checks if we have enough host controller resources for the default control
3656 * endpoint.
3658 * Must be called with xhci->lock held.
3660 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd *xhci)
3662 if (xhci->num_active_eps + 1 > xhci->limit_active_eps) {
3663 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3664 "Not enough ep ctxs: "
3665 "%u active, need to add 1, limit is %u.",
3666 xhci->num_active_eps, xhci->limit_active_eps);
3667 return -ENOMEM;
3669 xhci->num_active_eps += 1;
3670 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
3671 "Adding 1 ep ctx, %u now active.",
3672 xhci->num_active_eps);
3673 return 0;
3678 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3679 * timed out, or allocating memory failed. Returns 1 on success.
3681 int xhci_alloc_dev(struct usb_hcd *hcd, struct usb_device *udev)
3683 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3684 unsigned long flags;
3685 int ret;
3686 struct xhci_command *command;
3688 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3689 if (!command)
3690 return 0;
3692 spin_lock_irqsave(&xhci->lock, flags);
3693 command->completion = &xhci->addr_dev;
3694 ret = xhci_queue_slot_control(xhci, command, TRB_ENABLE_SLOT, 0);
3695 if (ret) {
3696 spin_unlock_irqrestore(&xhci->lock, flags);
3697 xhci_dbg(xhci, "FIXME: allocate a command ring segment\n");
3698 kfree(command);
3699 return 0;
3701 xhci_ring_cmd_db(xhci);
3702 spin_unlock_irqrestore(&xhci->lock, flags);
3704 wait_for_completion(command->completion);
3706 if (!xhci->slot_id || command->status != COMP_SUCCESS) {
3707 xhci_err(xhci, "Error while assigning device slot ID\n");
3708 xhci_err(xhci, "Max number of devices this xHCI host supports is %u.\n",
3709 HCS_MAX_SLOTS(
3710 readl(&xhci->cap_regs->hcs_params1)));
3711 kfree(command);
3712 return 0;
3715 if ((xhci->quirks & XHCI_EP_LIMIT_QUIRK)) {
3716 spin_lock_irqsave(&xhci->lock, flags);
3717 ret = xhci_reserve_host_control_ep_resources(xhci);
3718 if (ret) {
3719 spin_unlock_irqrestore(&xhci->lock, flags);
3720 xhci_warn(xhci, "Not enough host resources, "
3721 "active endpoint contexts = %u\n",
3722 xhci->num_active_eps);
3723 goto disable_slot;
3725 spin_unlock_irqrestore(&xhci->lock, flags);
3727 /* Use GFP_NOIO, since this function can be called from
3728 * xhci_discover_or_reset_device(), which may be called as part of
3729 * mass storage driver error handling.
3731 if (!xhci_alloc_virt_device(xhci, xhci->slot_id, udev, GFP_NOIO)) {
3732 xhci_warn(xhci, "Could not allocate xHCI USB device data structures\n");
3733 goto disable_slot;
3735 udev->slot_id = xhci->slot_id;
3737 #ifndef CONFIG_USB_DEFAULT_PERSIST
3739 * If resetting upon resume, we can't put the controller into runtime
3740 * suspend if there is a device attached.
3742 if (xhci->quirks & XHCI_RESET_ON_RESUME)
3743 pm_runtime_get_noresume(hcd->self.controller);
3744 #endif
3747 kfree(command);
3748 /* Is this a LS or FS device under a HS hub? */
3749 /* Hub or peripherial? */
3750 return 1;
3752 disable_slot:
3753 /* Disable slot, if we can do it without mem alloc */
3754 spin_lock_irqsave(&xhci->lock, flags);
3755 command->completion = NULL;
3756 command->status = 0;
3757 if (!xhci_queue_slot_control(xhci, command, TRB_DISABLE_SLOT,
3758 udev->slot_id))
3759 xhci_ring_cmd_db(xhci);
3760 spin_unlock_irqrestore(&xhci->lock, flags);
3761 return 0;
3765 * Issue an Address Device command and optionally send a corresponding
3766 * SetAddress request to the device.
3767 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3768 * we should only issue and wait on one address command at the same time.
3770 static int xhci_setup_device(struct usb_hcd *hcd, struct usb_device *udev,
3771 enum xhci_setup_dev setup)
3773 const char *act = setup == SETUP_CONTEXT_ONLY ? "context" : "address";
3774 unsigned long flags;
3775 struct xhci_virt_device *virt_dev;
3776 int ret = 0;
3777 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3778 struct xhci_slot_ctx *slot_ctx;
3779 struct xhci_input_control_ctx *ctrl_ctx;
3780 u64 temp_64;
3781 struct xhci_command *command;
3783 if (!udev->slot_id) {
3784 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3785 "Bad Slot ID %d", udev->slot_id);
3786 return -EINVAL;
3789 virt_dev = xhci->devs[udev->slot_id];
3791 if (WARN_ON(!virt_dev)) {
3793 * In plug/unplug torture test with an NEC controller,
3794 * a zero-dereference was observed once due to virt_dev = 0.
3795 * Print useful debug rather than crash if it is observed again!
3797 xhci_warn(xhci, "Virt dev invalid for slot_id 0x%x!\n",
3798 udev->slot_id);
3799 return -EINVAL;
3802 command = xhci_alloc_command(xhci, false, false, GFP_KERNEL);
3803 if (!command)
3804 return -ENOMEM;
3806 command->in_ctx = virt_dev->in_ctx;
3807 command->completion = &xhci->addr_dev;
3809 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->in_ctx);
3810 ctrl_ctx = xhci_get_input_control_ctx(xhci, virt_dev->in_ctx);
3811 if (!ctrl_ctx) {
3812 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3813 __func__);
3814 kfree(command);
3815 return -EINVAL;
3818 * If this is the first Set Address since device plug-in or
3819 * virt_device realloaction after a resume with an xHCI power loss,
3820 * then set up the slot context.
3822 if (!slot_ctx->dev_info)
3823 xhci_setup_addressable_virt_dev(xhci, udev);
3824 /* Otherwise, update the control endpoint ring enqueue pointer. */
3825 else
3826 xhci_copy_ep0_dequeue_into_input_ctx(xhci, udev);
3827 ctrl_ctx->add_flags = cpu_to_le32(SLOT_FLAG | EP0_FLAG);
3828 ctrl_ctx->drop_flags = 0;
3830 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3831 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3832 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3833 le32_to_cpu(slot_ctx->dev_info) >> 27);
3835 spin_lock_irqsave(&xhci->lock, flags);
3836 ret = xhci_queue_address_device(xhci, command, virt_dev->in_ctx->dma,
3837 udev->slot_id, setup);
3838 if (ret) {
3839 spin_unlock_irqrestore(&xhci->lock, flags);
3840 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3841 "FIXME: allocate a command ring segment");
3842 kfree(command);
3843 return ret;
3845 xhci_ring_cmd_db(xhci);
3846 spin_unlock_irqrestore(&xhci->lock, flags);
3848 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3849 wait_for_completion(command->completion);
3851 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3852 * the SetAddress() "recovery interval" required by USB and aborting the
3853 * command on a timeout.
3855 switch (command->status) {
3856 case COMP_CMD_ABORT:
3857 case COMP_CMD_STOP:
3858 xhci_warn(xhci, "Timeout while waiting for setup device command\n");
3859 ret = -ETIME;
3860 break;
3861 case COMP_CTX_STATE:
3862 case COMP_EBADSLT:
3863 xhci_err(xhci, "Setup ERROR: setup %s command for slot %d.\n",
3864 act, udev->slot_id);
3865 ret = -EINVAL;
3866 break;
3867 case COMP_TX_ERR:
3868 dev_warn(&udev->dev, "Device not responding to setup %s.\n", act);
3869 ret = -EPROTO;
3870 break;
3871 case COMP_DEV_ERR:
3872 dev_warn(&udev->dev,
3873 "ERROR: Incompatible device for setup %s command\n", act);
3874 ret = -ENODEV;
3875 break;
3876 case COMP_SUCCESS:
3877 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3878 "Successful setup %s command", act);
3879 break;
3880 default:
3881 xhci_err(xhci,
3882 "ERROR: unexpected setup %s command completion code 0x%x.\n",
3883 act, command->status);
3884 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3885 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3886 trace_xhci_address_ctx(xhci, virt_dev->out_ctx, 1);
3887 ret = -EINVAL;
3888 break;
3890 if (ret) {
3891 kfree(command);
3892 return ret;
3894 temp_64 = xhci_read_64(xhci, &xhci->op_regs->dcbaa_ptr);
3895 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3896 "Op regs DCBAA ptr = %#016llx", temp_64);
3897 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3898 "Slot ID %d dcbaa entry @%p = %#016llx",
3899 udev->slot_id,
3900 &xhci->dcbaa->dev_context_ptrs[udev->slot_id],
3901 (unsigned long long)
3902 le64_to_cpu(xhci->dcbaa->dev_context_ptrs[udev->slot_id]));
3903 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3904 "Output Context DMA address = %#08llx",
3905 (unsigned long long)virt_dev->out_ctx->dma);
3906 xhci_dbg(xhci, "Slot ID %d Input Context:\n", udev->slot_id);
3907 xhci_dbg_ctx(xhci, virt_dev->in_ctx, 2);
3908 trace_xhci_address_ctx(xhci, virt_dev->in_ctx,
3909 le32_to_cpu(slot_ctx->dev_info) >> 27);
3910 xhci_dbg(xhci, "Slot ID %d Output Context:\n", udev->slot_id);
3911 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 2);
3913 * USB core uses address 1 for the roothubs, so we add one to the
3914 * address given back to us by the HC.
3916 slot_ctx = xhci_get_slot_ctx(xhci, virt_dev->out_ctx);
3917 trace_xhci_address_ctx(xhci, virt_dev->out_ctx,
3918 le32_to_cpu(slot_ctx->dev_info) >> 27);
3919 /* Zero the input context control for later use */
3920 ctrl_ctx->add_flags = 0;
3921 ctrl_ctx->drop_flags = 0;
3923 xhci_dbg_trace(xhci, trace_xhci_dbg_address,
3924 "Internal device address = %d",
3925 le32_to_cpu(slot_ctx->dev_state) & DEV_ADDR_MASK);
3926 kfree(command);
3927 return 0;
3930 int xhci_address_device(struct usb_hcd *hcd, struct usb_device *udev)
3932 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ADDRESS);
3935 int xhci_enable_device(struct usb_hcd *hcd, struct usb_device *udev)
3937 return xhci_setup_device(hcd, udev, SETUP_CONTEXT_ONLY);
3941 * Transfer the port index into real index in the HW port status
3942 * registers. Caculate offset between the port's PORTSC register
3943 * and port status base. Divide the number of per port register
3944 * to get the real index. The raw port number bases 1.
3946 int xhci_find_raw_port_number(struct usb_hcd *hcd, int port1)
3948 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
3949 __le32 __iomem *base_addr = &xhci->op_regs->port_status_base;
3950 __le32 __iomem *addr;
3951 int raw_port;
3953 if (hcd->speed != HCD_USB3)
3954 addr = xhci->usb2_ports[port1 - 1];
3955 else
3956 addr = xhci->usb3_ports[port1 - 1];
3958 raw_port = (addr - base_addr)/NUM_PORT_REGS + 1;
3959 return raw_port;
3963 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3964 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3966 static int __maybe_unused xhci_change_max_exit_latency(struct xhci_hcd *xhci,
3967 struct usb_device *udev, u16 max_exit_latency)
3969 struct xhci_virt_device *virt_dev;
3970 struct xhci_command *command;
3971 struct xhci_input_control_ctx *ctrl_ctx;
3972 struct xhci_slot_ctx *slot_ctx;
3973 unsigned long flags;
3974 int ret;
3976 spin_lock_irqsave(&xhci->lock, flags);
3977 if (max_exit_latency == xhci->devs[udev->slot_id]->current_mel) {
3978 spin_unlock_irqrestore(&xhci->lock, flags);
3979 return 0;
3982 /* Attempt to issue an Evaluate Context command to change the MEL. */
3983 virt_dev = xhci->devs[udev->slot_id];
3984 command = xhci->lpm_command;
3985 ctrl_ctx = xhci_get_input_control_ctx(xhci, command->in_ctx);
3986 if (!ctrl_ctx) {
3987 spin_unlock_irqrestore(&xhci->lock, flags);
3988 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
3989 __func__);
3990 return -ENOMEM;
3993 xhci_slot_copy(xhci, command->in_ctx, virt_dev->out_ctx);
3994 spin_unlock_irqrestore(&xhci->lock, flags);
3996 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
3997 slot_ctx = xhci_get_slot_ctx(xhci, command->in_ctx);
3998 slot_ctx->dev_info2 &= cpu_to_le32(~((u32) MAX_EXIT));
3999 slot_ctx->dev_info2 |= cpu_to_le32(max_exit_latency);
4001 xhci_dbg_trace(xhci, trace_xhci_dbg_context_change,
4002 "Set up evaluate context for LPM MEL change.");
4003 xhci_dbg(xhci, "Slot %u Input Context:\n", udev->slot_id);
4004 xhci_dbg_ctx(xhci, command->in_ctx, 0);
4006 /* Issue and wait for the evaluate context command. */
4007 ret = xhci_configure_endpoint(xhci, udev, command,
4008 true, true);
4009 xhci_dbg(xhci, "Slot %u Output Context:\n", udev->slot_id);
4010 xhci_dbg_ctx(xhci, virt_dev->out_ctx, 0);
4012 if (!ret) {
4013 spin_lock_irqsave(&xhci->lock, flags);
4014 virt_dev->current_mel = max_exit_latency;
4015 spin_unlock_irqrestore(&xhci->lock, flags);
4017 return ret;
4020 #ifdef CONFIG_PM_RUNTIME
4022 /* BESL to HIRD Encoding array for USB2 LPM */
4023 static int xhci_besl_encoding[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
4024 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
4026 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
4027 static int xhci_calculate_hird_besl(struct xhci_hcd *xhci,
4028 struct usb_device *udev)
4030 int u2del, besl, besl_host;
4031 int besl_device = 0;
4032 u32 field;
4034 u2del = HCS_U2_LATENCY(xhci->hcs_params3);
4035 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4037 if (field & USB_BESL_SUPPORT) {
4038 for (besl_host = 0; besl_host < 16; besl_host++) {
4039 if (xhci_besl_encoding[besl_host] >= u2del)
4040 break;
4042 /* Use baseline BESL value as default */
4043 if (field & USB_BESL_BASELINE_VALID)
4044 besl_device = USB_GET_BESL_BASELINE(field);
4045 else if (field & USB_BESL_DEEP_VALID)
4046 besl_device = USB_GET_BESL_DEEP(field);
4047 } else {
4048 if (u2del <= 50)
4049 besl_host = 0;
4050 else
4051 besl_host = (u2del - 51) / 75 + 1;
4054 besl = besl_host + besl_device;
4055 if (besl > 15)
4056 besl = 15;
4058 return besl;
4061 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
4062 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device *udev)
4064 u32 field;
4065 int l1;
4066 int besld = 0;
4067 int hirdm = 0;
4069 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4071 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4072 l1 = udev->l1_params.timeout / 256;
4074 /* device has preferred BESLD */
4075 if (field & USB_BESL_DEEP_VALID) {
4076 besld = USB_GET_BESL_DEEP(field);
4077 hirdm = 1;
4080 return PORT_BESLD(besld) | PORT_L1_TIMEOUT(l1) | PORT_HIRDM(hirdm);
4083 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4084 struct usb_device *udev, int enable)
4086 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4087 __le32 __iomem **port_array;
4088 __le32 __iomem *pm_addr, *hlpm_addr;
4089 u32 pm_val, hlpm_val, field;
4090 unsigned int port_num;
4091 unsigned long flags;
4092 int hird, exit_latency;
4093 int ret;
4095 if (hcd->speed == HCD_USB3 || !xhci->hw_lpm_support ||
4096 !udev->lpm_capable)
4097 return -EPERM;
4099 if (!udev->parent || udev->parent->parent ||
4100 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4101 return -EPERM;
4103 if (udev->usb2_hw_lpm_capable != 1)
4104 return -EPERM;
4106 spin_lock_irqsave(&xhci->lock, flags);
4108 port_array = xhci->usb2_ports;
4109 port_num = udev->portnum - 1;
4110 pm_addr = port_array[port_num] + PORTPMSC;
4111 pm_val = readl(pm_addr);
4112 hlpm_addr = port_array[port_num] + PORTHLPMC;
4113 field = le32_to_cpu(udev->bos->ext_cap->bmAttributes);
4115 xhci_dbg(xhci, "%s port %d USB2 hardware LPM\n",
4116 enable ? "enable" : "disable", port_num + 1);
4118 if (enable) {
4119 /* Host supports BESL timeout instead of HIRD */
4120 if (udev->usb2_hw_lpm_besl_capable) {
4121 /* if device doesn't have a preferred BESL value use a
4122 * default one which works with mixed HIRD and BESL
4123 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4125 if ((field & USB_BESL_SUPPORT) &&
4126 (field & USB_BESL_BASELINE_VALID))
4127 hird = USB_GET_BESL_BASELINE(field);
4128 else
4129 hird = udev->l1_params.besl;
4131 exit_latency = xhci_besl_encoding[hird];
4132 spin_unlock_irqrestore(&xhci->lock, flags);
4134 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4135 * input context for link powermanagement evaluate
4136 * context commands. It is protected by hcd->bandwidth
4137 * mutex and is shared by all devices. We need to set
4138 * the max ext latency in USB 2 BESL LPM as well, so
4139 * use the same mutex and xhci_change_max_exit_latency()
4141 mutex_lock(hcd->bandwidth_mutex);
4142 ret = xhci_change_max_exit_latency(xhci, udev,
4143 exit_latency);
4144 mutex_unlock(hcd->bandwidth_mutex);
4146 if (ret < 0)
4147 return ret;
4148 spin_lock_irqsave(&xhci->lock, flags);
4150 hlpm_val = xhci_calculate_usb2_hw_lpm_params(udev);
4151 writel(hlpm_val, hlpm_addr);
4152 /* flush write */
4153 readl(hlpm_addr);
4154 } else {
4155 hird = xhci_calculate_hird_besl(xhci, udev);
4158 pm_val &= ~PORT_HIRD_MASK;
4159 pm_val |= PORT_HIRD(hird) | PORT_RWE | PORT_L1DS(udev->slot_id);
4160 writel(pm_val, pm_addr);
4161 pm_val = readl(pm_addr);
4162 pm_val |= PORT_HLE;
4163 writel(pm_val, pm_addr);
4164 /* flush write */
4165 readl(pm_addr);
4166 } else {
4167 pm_val &= ~(PORT_HLE | PORT_RWE | PORT_HIRD_MASK | PORT_L1DS_MASK);
4168 writel(pm_val, pm_addr);
4169 /* flush write */
4170 readl(pm_addr);
4171 if (udev->usb2_hw_lpm_besl_capable) {
4172 spin_unlock_irqrestore(&xhci->lock, flags);
4173 mutex_lock(hcd->bandwidth_mutex);
4174 xhci_change_max_exit_latency(xhci, udev, 0);
4175 mutex_unlock(hcd->bandwidth_mutex);
4176 return 0;
4180 spin_unlock_irqrestore(&xhci->lock, flags);
4181 return 0;
4184 /* check if a usb2 port supports a given extened capability protocol
4185 * only USB2 ports extended protocol capability values are cached.
4186 * Return 1 if capability is supported
4188 static int xhci_check_usb2_port_capability(struct xhci_hcd *xhci, int port,
4189 unsigned capability)
4191 u32 port_offset, port_count;
4192 int i;
4194 for (i = 0; i < xhci->num_ext_caps; i++) {
4195 if (xhci->ext_caps[i] & capability) {
4196 /* port offsets starts at 1 */
4197 port_offset = XHCI_EXT_PORT_OFF(xhci->ext_caps[i]) - 1;
4198 port_count = XHCI_EXT_PORT_COUNT(xhci->ext_caps[i]);
4199 if (port >= port_offset &&
4200 port < port_offset + port_count)
4201 return 1;
4204 return 0;
4207 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4209 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4210 int portnum = udev->portnum - 1;
4212 if (hcd->speed == HCD_USB3 || !xhci->sw_lpm_support ||
4213 !udev->lpm_capable)
4214 return 0;
4216 /* we only support lpm for non-hub device connected to root hub yet */
4217 if (!udev->parent || udev->parent->parent ||
4218 udev->descriptor.bDeviceClass == USB_CLASS_HUB)
4219 return 0;
4221 if (xhci->hw_lpm_support == 1 &&
4222 xhci_check_usb2_port_capability(
4223 xhci, portnum, XHCI_HLC)) {
4224 udev->usb2_hw_lpm_capable = 1;
4225 udev->l1_params.timeout = XHCI_L1_TIMEOUT;
4226 udev->l1_params.besl = XHCI_DEFAULT_BESL;
4227 if (xhci_check_usb2_port_capability(xhci, portnum,
4228 XHCI_BLC))
4229 udev->usb2_hw_lpm_besl_capable = 1;
4232 return 0;
4235 #else
4237 int xhci_set_usb2_hardware_lpm(struct usb_hcd *hcd,
4238 struct usb_device *udev, int enable)
4240 return 0;
4243 int xhci_update_device(struct usb_hcd *hcd, struct usb_device *udev)
4245 return 0;
4248 #endif /* CONFIG_PM_RUNTIME */
4250 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4252 #ifdef CONFIG_PM
4253 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4254 static unsigned long long xhci_service_interval_to_ns(
4255 struct usb_endpoint_descriptor *desc)
4257 return (1ULL << (desc->bInterval - 1)) * 125 * 1000;
4260 static u16 xhci_get_timeout_no_hub_lpm(struct usb_device *udev,
4261 enum usb3_link_state state)
4263 unsigned long long sel;
4264 unsigned long long pel;
4265 unsigned int max_sel_pel;
4266 char *state_name;
4268 switch (state) {
4269 case USB3_LPM_U1:
4270 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4271 sel = DIV_ROUND_UP(udev->u1_params.sel, 1000);
4272 pel = DIV_ROUND_UP(udev->u1_params.pel, 1000);
4273 max_sel_pel = USB3_LPM_MAX_U1_SEL_PEL;
4274 state_name = "U1";
4275 break;
4276 case USB3_LPM_U2:
4277 sel = DIV_ROUND_UP(udev->u2_params.sel, 1000);
4278 pel = DIV_ROUND_UP(udev->u2_params.pel, 1000);
4279 max_sel_pel = USB3_LPM_MAX_U2_SEL_PEL;
4280 state_name = "U2";
4281 break;
4282 default:
4283 dev_warn(&udev->dev, "%s: Can't get timeout for non-U1 or U2 state.\n",
4284 __func__);
4285 return USB3_LPM_DISABLED;
4288 if (sel <= max_sel_pel && pel <= max_sel_pel)
4289 return USB3_LPM_DEVICE_INITIATED;
4291 if (sel > max_sel_pel)
4292 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4293 "due to long SEL %llu ms\n",
4294 state_name, sel);
4295 else
4296 dev_dbg(&udev->dev, "Device-initiated %s disabled "
4297 "due to long PEL %llu ms\n",
4298 state_name, pel);
4299 return USB3_LPM_DISABLED;
4302 /* Returns the hub-encoded U1 timeout value.
4303 * The U1 timeout should be the maximum of the following values:
4304 * - For control endpoints, U1 system exit latency (SEL) * 3
4305 * - For bulk endpoints, U1 SEL * 5
4306 * - For interrupt endpoints:
4307 * - Notification EPs, U1 SEL * 3
4308 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4309 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4311 static u16 xhci_calculate_intel_u1_timeout(struct usb_device *udev,
4312 struct usb_endpoint_descriptor *desc)
4314 unsigned long long timeout_ns;
4315 int ep_type;
4316 int intr_type;
4318 ep_type = usb_endpoint_type(desc);
4319 switch (ep_type) {
4320 case USB_ENDPOINT_XFER_CONTROL:
4321 timeout_ns = udev->u1_params.sel * 3;
4322 break;
4323 case USB_ENDPOINT_XFER_BULK:
4324 timeout_ns = udev->u1_params.sel * 5;
4325 break;
4326 case USB_ENDPOINT_XFER_INT:
4327 intr_type = usb_endpoint_interrupt_type(desc);
4328 if (intr_type == USB_ENDPOINT_INTR_NOTIFICATION) {
4329 timeout_ns = udev->u1_params.sel * 3;
4330 break;
4332 /* Otherwise the calculation is the same as isoc eps */
4333 case USB_ENDPOINT_XFER_ISOC:
4334 timeout_ns = xhci_service_interval_to_ns(desc);
4335 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns * 105, 100);
4336 if (timeout_ns < udev->u1_params.sel * 2)
4337 timeout_ns = udev->u1_params.sel * 2;
4338 break;
4339 default:
4340 return 0;
4343 /* The U1 timeout is encoded in 1us intervals. */
4344 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 1000);
4345 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4346 if (timeout_ns == USB3_LPM_DISABLED)
4347 timeout_ns++;
4349 /* If the necessary timeout value is bigger than what we can set in the
4350 * USB 3.0 hub, we have to disable hub-initiated U1.
4352 if (timeout_ns <= USB3_LPM_U1_MAX_TIMEOUT)
4353 return timeout_ns;
4354 dev_dbg(&udev->dev, "Hub-initiated U1 disabled "
4355 "due to long timeout %llu ms\n", timeout_ns);
4356 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U1);
4359 /* Returns the hub-encoded U2 timeout value.
4360 * The U2 timeout should be the maximum of:
4361 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4362 * - largest bInterval of any active periodic endpoint (to avoid going
4363 * into lower power link states between intervals).
4364 * - the U2 Exit Latency of the device
4366 static u16 xhci_calculate_intel_u2_timeout(struct usb_device *udev,
4367 struct usb_endpoint_descriptor *desc)
4369 unsigned long long timeout_ns;
4370 unsigned long long u2_del_ns;
4372 timeout_ns = 10 * 1000 * 1000;
4374 if ((usb_endpoint_xfer_int(desc) || usb_endpoint_xfer_isoc(desc)) &&
4375 (xhci_service_interval_to_ns(desc) > timeout_ns))
4376 timeout_ns = xhci_service_interval_to_ns(desc);
4378 u2_del_ns = le16_to_cpu(udev->bos->ss_cap->bU2DevExitLat) * 1000ULL;
4379 if (u2_del_ns > timeout_ns)
4380 timeout_ns = u2_del_ns;
4382 /* The U2 timeout is encoded in 256us intervals */
4383 timeout_ns = DIV_ROUND_UP_ULL(timeout_ns, 256 * 1000);
4384 /* If the necessary timeout value is bigger than what we can set in the
4385 * USB 3.0 hub, we have to disable hub-initiated U2.
4387 if (timeout_ns <= USB3_LPM_U2_MAX_TIMEOUT)
4388 return timeout_ns;
4389 dev_dbg(&udev->dev, "Hub-initiated U2 disabled "
4390 "due to long timeout %llu ms\n", timeout_ns);
4391 return xhci_get_timeout_no_hub_lpm(udev, USB3_LPM_U2);
4394 static u16 xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4395 struct usb_device *udev,
4396 struct usb_endpoint_descriptor *desc,
4397 enum usb3_link_state state,
4398 u16 *timeout)
4400 if (state == USB3_LPM_U1) {
4401 if (xhci->quirks & XHCI_INTEL_HOST)
4402 return xhci_calculate_intel_u1_timeout(udev, desc);
4403 } else {
4404 if (xhci->quirks & XHCI_INTEL_HOST)
4405 return xhci_calculate_intel_u2_timeout(udev, desc);
4408 return USB3_LPM_DISABLED;
4411 static int xhci_update_timeout_for_endpoint(struct xhci_hcd *xhci,
4412 struct usb_device *udev,
4413 struct usb_endpoint_descriptor *desc,
4414 enum usb3_link_state state,
4415 u16 *timeout)
4417 u16 alt_timeout;
4419 alt_timeout = xhci_call_host_update_timeout_for_endpoint(xhci, udev,
4420 desc, state, timeout);
4422 /* If we found we can't enable hub-initiated LPM, or
4423 * the U1 or U2 exit latency was too high to allow
4424 * device-initiated LPM as well, just stop searching.
4426 if (alt_timeout == USB3_LPM_DISABLED ||
4427 alt_timeout == USB3_LPM_DEVICE_INITIATED) {
4428 *timeout = alt_timeout;
4429 return -E2BIG;
4431 if (alt_timeout > *timeout)
4432 *timeout = alt_timeout;
4433 return 0;
4436 static int xhci_update_timeout_for_interface(struct xhci_hcd *xhci,
4437 struct usb_device *udev,
4438 struct usb_host_interface *alt,
4439 enum usb3_link_state state,
4440 u16 *timeout)
4442 int j;
4444 for (j = 0; j < alt->desc.bNumEndpoints; j++) {
4445 if (xhci_update_timeout_for_endpoint(xhci, udev,
4446 &alt->endpoint[j].desc, state, timeout))
4447 return -E2BIG;
4448 continue;
4450 return 0;
4453 static int xhci_check_intel_tier_policy(struct usb_device *udev,
4454 enum usb3_link_state state)
4456 struct usb_device *parent;
4457 unsigned int num_hubs;
4459 if (state == USB3_LPM_U2)
4460 return 0;
4462 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4463 for (parent = udev->parent, num_hubs = 0; parent->parent;
4464 parent = parent->parent)
4465 num_hubs++;
4467 if (num_hubs < 2)
4468 return 0;
4470 dev_dbg(&udev->dev, "Disabling U1 link state for device"
4471 " below second-tier hub.\n");
4472 dev_dbg(&udev->dev, "Plug device into first-tier hub "
4473 "to decrease power consumption.\n");
4474 return -E2BIG;
4477 static int xhci_check_tier_policy(struct xhci_hcd *xhci,
4478 struct usb_device *udev,
4479 enum usb3_link_state state)
4481 if (xhci->quirks & XHCI_INTEL_HOST)
4482 return xhci_check_intel_tier_policy(udev, state);
4483 return -EINVAL;
4486 /* Returns the U1 or U2 timeout that should be enabled.
4487 * If the tier check or timeout setting functions return with a non-zero exit
4488 * code, that means the timeout value has been finalized and we shouldn't look
4489 * at any more endpoints.
4491 static u16 xhci_calculate_lpm_timeout(struct usb_hcd *hcd,
4492 struct usb_device *udev, enum usb3_link_state state)
4494 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4495 struct usb_host_config *config;
4496 char *state_name;
4497 int i;
4498 u16 timeout = USB3_LPM_DISABLED;
4500 if (state == USB3_LPM_U1)
4501 state_name = "U1";
4502 else if (state == USB3_LPM_U2)
4503 state_name = "U2";
4504 else {
4505 dev_warn(&udev->dev, "Can't enable unknown link state %i\n",
4506 state);
4507 return timeout;
4510 if (xhci_check_tier_policy(xhci, udev, state) < 0)
4511 return timeout;
4513 /* Gather some information about the currently installed configuration
4514 * and alternate interface settings.
4516 if (xhci_update_timeout_for_endpoint(xhci, udev, &udev->ep0.desc,
4517 state, &timeout))
4518 return timeout;
4520 config = udev->actconfig;
4521 if (!config)
4522 return timeout;
4524 for (i = 0; i < config->desc.bNumInterfaces; i++) {
4525 struct usb_driver *driver;
4526 struct usb_interface *intf = config->interface[i];
4528 if (!intf)
4529 continue;
4531 /* Check if any currently bound drivers want hub-initiated LPM
4532 * disabled.
4534 if (intf->dev.driver) {
4535 driver = to_usb_driver(intf->dev.driver);
4536 if (driver && driver->disable_hub_initiated_lpm) {
4537 dev_dbg(&udev->dev, "Hub-initiated %s disabled "
4538 "at request of driver %s\n",
4539 state_name, driver->name);
4540 return xhci_get_timeout_no_hub_lpm(udev, state);
4544 /* Not sure how this could happen... */
4545 if (!intf->cur_altsetting)
4546 continue;
4548 if (xhci_update_timeout_for_interface(xhci, udev,
4549 intf->cur_altsetting,
4550 state, &timeout))
4551 return timeout;
4553 return timeout;
4556 static int calculate_max_exit_latency(struct usb_device *udev,
4557 enum usb3_link_state state_changed,
4558 u16 hub_encoded_timeout)
4560 unsigned long long u1_mel_us = 0;
4561 unsigned long long u2_mel_us = 0;
4562 unsigned long long mel_us = 0;
4563 bool disabling_u1;
4564 bool disabling_u2;
4565 bool enabling_u1;
4566 bool enabling_u2;
4568 disabling_u1 = (state_changed == USB3_LPM_U1 &&
4569 hub_encoded_timeout == USB3_LPM_DISABLED);
4570 disabling_u2 = (state_changed == USB3_LPM_U2 &&
4571 hub_encoded_timeout == USB3_LPM_DISABLED);
4573 enabling_u1 = (state_changed == USB3_LPM_U1 &&
4574 hub_encoded_timeout != USB3_LPM_DISABLED);
4575 enabling_u2 = (state_changed == USB3_LPM_U2 &&
4576 hub_encoded_timeout != USB3_LPM_DISABLED);
4578 /* If U1 was already enabled and we're not disabling it,
4579 * or we're going to enable U1, account for the U1 max exit latency.
4581 if ((udev->u1_params.timeout != USB3_LPM_DISABLED && !disabling_u1) ||
4582 enabling_u1)
4583 u1_mel_us = DIV_ROUND_UP(udev->u1_params.mel, 1000);
4584 if ((udev->u2_params.timeout != USB3_LPM_DISABLED && !disabling_u2) ||
4585 enabling_u2)
4586 u2_mel_us = DIV_ROUND_UP(udev->u2_params.mel, 1000);
4588 if (u1_mel_us > u2_mel_us)
4589 mel_us = u1_mel_us;
4590 else
4591 mel_us = u2_mel_us;
4592 /* xHCI host controller max exit latency field is only 16 bits wide. */
4593 if (mel_us > MAX_EXIT) {
4594 dev_warn(&udev->dev, "Link PM max exit latency of %lluus "
4595 "is too big.\n", mel_us);
4596 return -E2BIG;
4598 return mel_us;
4601 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4602 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4603 struct usb_device *udev, enum usb3_link_state state)
4605 struct xhci_hcd *xhci;
4606 u16 hub_encoded_timeout;
4607 int mel;
4608 int ret;
4610 xhci = hcd_to_xhci(hcd);
4611 /* The LPM timeout values are pretty host-controller specific, so don't
4612 * enable hub-initiated timeouts unless the vendor has provided
4613 * information about their timeout algorithm.
4615 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4616 !xhci->devs[udev->slot_id])
4617 return USB3_LPM_DISABLED;
4619 hub_encoded_timeout = xhci_calculate_lpm_timeout(hcd, udev, state);
4620 mel = calculate_max_exit_latency(udev, state, hub_encoded_timeout);
4621 if (mel < 0) {
4622 /* Max Exit Latency is too big, disable LPM. */
4623 hub_encoded_timeout = USB3_LPM_DISABLED;
4624 mel = 0;
4627 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4628 if (ret)
4629 return ret;
4630 return hub_encoded_timeout;
4633 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4634 struct usb_device *udev, enum usb3_link_state state)
4636 struct xhci_hcd *xhci;
4637 u16 mel;
4638 int ret;
4640 xhci = hcd_to_xhci(hcd);
4641 if (!xhci || !(xhci->quirks & XHCI_LPM_SUPPORT) ||
4642 !xhci->devs[udev->slot_id])
4643 return 0;
4645 mel = calculate_max_exit_latency(udev, state, USB3_LPM_DISABLED);
4646 ret = xhci_change_max_exit_latency(xhci, udev, mel);
4647 if (ret)
4648 return ret;
4649 return 0;
4651 #else /* CONFIG_PM */
4653 int xhci_enable_usb3_lpm_timeout(struct usb_hcd *hcd,
4654 struct usb_device *udev, enum usb3_link_state state)
4656 return USB3_LPM_DISABLED;
4659 int xhci_disable_usb3_lpm_timeout(struct usb_hcd *hcd,
4660 struct usb_device *udev, enum usb3_link_state state)
4662 return 0;
4664 #endif /* CONFIG_PM */
4666 /*-------------------------------------------------------------------------*/
4668 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4669 * internal data structures for the device.
4671 int xhci_update_hub_device(struct usb_hcd *hcd, struct usb_device *hdev,
4672 struct usb_tt *tt, gfp_t mem_flags)
4674 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4675 struct xhci_virt_device *vdev;
4676 struct xhci_command *config_cmd;
4677 struct xhci_input_control_ctx *ctrl_ctx;
4678 struct xhci_slot_ctx *slot_ctx;
4679 unsigned long flags;
4680 unsigned think_time;
4681 int ret;
4683 /* Ignore root hubs */
4684 if (!hdev->parent)
4685 return 0;
4687 vdev = xhci->devs[hdev->slot_id];
4688 if (!vdev) {
4689 xhci_warn(xhci, "Cannot update hub desc for unknown device.\n");
4690 return -EINVAL;
4692 config_cmd = xhci_alloc_command(xhci, true, true, mem_flags);
4693 if (!config_cmd) {
4694 xhci_dbg(xhci, "Could not allocate xHCI command structure.\n");
4695 return -ENOMEM;
4697 ctrl_ctx = xhci_get_input_control_ctx(xhci, config_cmd->in_ctx);
4698 if (!ctrl_ctx) {
4699 xhci_warn(xhci, "%s: Could not get input context, bad type.\n",
4700 __func__);
4701 xhci_free_command(xhci, config_cmd);
4702 return -ENOMEM;
4705 spin_lock_irqsave(&xhci->lock, flags);
4706 if (hdev->speed == USB_SPEED_HIGH &&
4707 xhci_alloc_tt_info(xhci, vdev, hdev, tt, GFP_ATOMIC)) {
4708 xhci_dbg(xhci, "Could not allocate xHCI TT structure.\n");
4709 xhci_free_command(xhci, config_cmd);
4710 spin_unlock_irqrestore(&xhci->lock, flags);
4711 return -ENOMEM;
4714 xhci_slot_copy(xhci, config_cmd->in_ctx, vdev->out_ctx);
4715 ctrl_ctx->add_flags |= cpu_to_le32(SLOT_FLAG);
4716 slot_ctx = xhci_get_slot_ctx(xhci, config_cmd->in_ctx);
4717 slot_ctx->dev_info |= cpu_to_le32(DEV_HUB);
4718 if (tt->multi)
4719 slot_ctx->dev_info |= cpu_to_le32(DEV_MTT);
4720 if (xhci->hci_version > 0x95) {
4721 xhci_dbg(xhci, "xHCI version %x needs hub "
4722 "TT think time and number of ports\n",
4723 (unsigned int) xhci->hci_version);
4724 slot_ctx->dev_info2 |= cpu_to_le32(XHCI_MAX_PORTS(hdev->maxchild));
4725 /* Set TT think time - convert from ns to FS bit times.
4726 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4727 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4729 * xHCI 1.0: this field shall be 0 if the device is not a
4730 * High-spped hub.
4732 think_time = tt->think_time;
4733 if (think_time != 0)
4734 think_time = (think_time / 666) - 1;
4735 if (xhci->hci_version < 0x100 || hdev->speed == USB_SPEED_HIGH)
4736 slot_ctx->tt_info |=
4737 cpu_to_le32(TT_THINK_TIME(think_time));
4738 } else {
4739 xhci_dbg(xhci, "xHCI version %x doesn't need hub "
4740 "TT think time or number of ports\n",
4741 (unsigned int) xhci->hci_version);
4743 slot_ctx->dev_state = 0;
4744 spin_unlock_irqrestore(&xhci->lock, flags);
4746 xhci_dbg(xhci, "Set up %s for hub device.\n",
4747 (xhci->hci_version > 0x95) ?
4748 "configure endpoint" : "evaluate context");
4749 xhci_dbg(xhci, "Slot %u Input Context:\n", hdev->slot_id);
4750 xhci_dbg_ctx(xhci, config_cmd->in_ctx, 0);
4752 /* Issue and wait for the configure endpoint or
4753 * evaluate context command.
4755 if (xhci->hci_version > 0x95)
4756 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4757 false, false);
4758 else
4759 ret = xhci_configure_endpoint(xhci, hdev, config_cmd,
4760 true, false);
4762 xhci_dbg(xhci, "Slot %u Output Context:\n", hdev->slot_id);
4763 xhci_dbg_ctx(xhci, vdev->out_ctx, 0);
4765 xhci_free_command(xhci, config_cmd);
4766 return ret;
4769 int xhci_get_frame(struct usb_hcd *hcd)
4771 struct xhci_hcd *xhci = hcd_to_xhci(hcd);
4772 /* EHCI mods by the periodic size. Why? */
4773 return readl(&xhci->run_regs->microframe_index) >> 3;
4776 int xhci_gen_setup(struct usb_hcd *hcd, xhci_get_quirks_t get_quirks)
4778 struct xhci_hcd *xhci;
4779 struct device *dev = hcd->self.controller;
4780 int retval;
4782 /* Accept arbitrarily long scatter-gather lists */
4783 hcd->self.sg_tablesize = ~0;
4785 /* support to build packet from discontinuous buffers */
4786 hcd->self.no_sg_constraint = 1;
4788 /* XHCI controllers don't stop the ep queue on short packets :| */
4789 hcd->self.no_stop_on_short = 1;
4791 if (usb_hcd_is_primary_hcd(hcd)) {
4792 xhci = kzalloc(sizeof(struct xhci_hcd), GFP_KERNEL);
4793 if (!xhci)
4794 return -ENOMEM;
4795 *((struct xhci_hcd **) hcd->hcd_priv) = xhci;
4796 xhci->main_hcd = hcd;
4797 /* Mark the first roothub as being USB 2.0.
4798 * The xHCI driver will register the USB 3.0 roothub.
4800 hcd->speed = HCD_USB2;
4801 hcd->self.root_hub->speed = USB_SPEED_HIGH;
4803 * USB 2.0 roothub under xHCI has an integrated TT,
4804 * (rate matching hub) as opposed to having an OHCI/UHCI
4805 * companion controller.
4807 hcd->has_tt = 1;
4808 } else {
4809 /* xHCI private pointer was set in xhci_pci_probe for the second
4810 * registered roothub.
4812 return 0;
4815 xhci->cap_regs = hcd->regs;
4816 xhci->op_regs = hcd->regs +
4817 HC_LENGTH(readl(&xhci->cap_regs->hc_capbase));
4818 xhci->run_regs = hcd->regs +
4819 (readl(&xhci->cap_regs->run_regs_off) & RTSOFF_MASK);
4820 /* Cache read-only capability registers */
4821 xhci->hcs_params1 = readl(&xhci->cap_regs->hcs_params1);
4822 xhci->hcs_params2 = readl(&xhci->cap_regs->hcs_params2);
4823 xhci->hcs_params3 = readl(&xhci->cap_regs->hcs_params3);
4824 xhci->hcc_params = readl(&xhci->cap_regs->hc_capbase);
4825 xhci->hci_version = HC_VERSION(xhci->hcc_params);
4826 xhci->hcc_params = readl(&xhci->cap_regs->hcc_params);
4827 xhci_print_registers(xhci);
4829 xhci->quirks = quirks;
4831 get_quirks(dev, xhci);
4833 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4834 * success event after a short transfer. This quirk will ignore such
4835 * spurious event.
4837 if (xhci->hci_version > 0x96)
4838 xhci->quirks |= XHCI_SPURIOUS_SUCCESS;
4840 /* Make sure the HC is halted. */
4841 retval = xhci_halt(xhci);
4842 if (retval)
4843 goto error;
4845 xhci_dbg(xhci, "Resetting HCD\n");
4846 /* Reset the internal HC memory state and registers. */
4847 retval = xhci_reset(xhci);
4848 if (retval)
4849 goto error;
4850 xhci_dbg(xhci, "Reset complete\n");
4852 /* Set dma_mask and coherent_dma_mask to 64-bits,
4853 * if xHC supports 64-bit addressing */
4854 if (HCC_64BIT_ADDR(xhci->hcc_params) &&
4855 !dma_set_mask(dev, DMA_BIT_MASK(64))) {
4856 xhci_dbg(xhci, "Enabling 64-bit DMA addresses.\n");
4857 dma_set_coherent_mask(dev, DMA_BIT_MASK(64));
4860 xhci_dbg(xhci, "Calling HCD init\n");
4861 /* Initialize HCD and host controller data structures. */
4862 retval = xhci_init(hcd);
4863 if (retval)
4864 goto error;
4865 xhci_dbg(xhci, "Called HCD init\n");
4866 return 0;
4867 error:
4868 kfree(xhci);
4869 return retval;
4872 MODULE_DESCRIPTION(DRIVER_DESC);
4873 MODULE_AUTHOR(DRIVER_AUTHOR);
4874 MODULE_LICENSE("GPL");
4876 static int __init xhci_hcd_init(void)
4878 int retval;
4880 retval = xhci_register_pci();
4881 if (retval < 0) {
4882 pr_debug("Problem registering PCI driver.\n");
4883 return retval;
4885 retval = xhci_register_plat();
4886 if (retval < 0) {
4887 pr_debug("Problem registering platform driver.\n");
4888 goto unreg_pci;
4891 * Check the compiler generated sizes of structures that must be laid
4892 * out in specific ways for hardware access.
4894 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array) != 256*32/8);
4895 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx) != 8*32/8);
4896 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx) != 8*32/8);
4897 /* xhci_device_control has eight fields, and also
4898 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4900 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx) != 4*32/8);
4901 BUILD_BUG_ON(sizeof(union xhci_trb) != 4*32/8);
4902 BUILD_BUG_ON(sizeof(struct xhci_erst_entry) != 4*32/8);
4903 BUILD_BUG_ON(sizeof(struct xhci_cap_regs) != 7*32/8);
4904 BUILD_BUG_ON(sizeof(struct xhci_intr_reg) != 8*32/8);
4905 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4906 BUILD_BUG_ON(sizeof(struct xhci_run_regs) != (8+8*128)*32/8);
4907 return 0;
4908 unreg_pci:
4909 xhci_unregister_pci();
4910 return retval;
4912 module_init(xhci_hcd_init);
4914 static void __exit xhci_hcd_cleanup(void)
4916 xhci_unregister_pci();
4917 xhci_unregister_plat();
4919 module_exit(xhci_hcd_cleanup);