2 * xHCI host controller driver
4 * Copyright (C) 2008 Intel Corp.
7 * Some code borrowed from the Linux EHCI driver.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software Foundation,
20 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 #include <linux/pci.h>
24 #include <linux/irq.h>
25 #include <linux/log2.h>
26 #include <linux/module.h>
27 #include <linux/moduleparam.h>
28 #include <linux/slab.h>
29 #include <linux/dmi.h>
30 #include <linux/dma-mapping.h>
33 #include "xhci-trace.h"
35 #define DRIVER_AUTHOR "Sarah Sharp"
36 #define DRIVER_DESC "'eXtensible' Host Controller (xHC) Driver"
38 /* Some 0.95 hardware can't handle the chain bit on a Link TRB being cleared */
39 static int link_quirk
;
40 module_param(link_quirk
, int, S_IRUGO
| S_IWUSR
);
41 MODULE_PARM_DESC(link_quirk
, "Don't clear the chain bit on a link TRB");
43 /* TODO: copied from ehci-hcd.c - can this be refactored? */
45 * xhci_handshake - spin reading hc until handshake completes or fails
46 * @ptr: address of hc register to be read
47 * @mask: bits to look at in result of read
48 * @done: value of those bits when handshake succeeds
49 * @usec: timeout in microseconds
51 * Returns negative errno, or zero on success
53 * Success happens when the "mask" bits have the specified value (hardware
54 * handshake done). There are two failure modes: "usec" have passed (major
55 * hardware flakeout), or the register reads as all-ones (hardware removed).
57 int xhci_handshake(struct xhci_hcd
*xhci
, void __iomem
*ptr
,
58 u32 mask
, u32 done
, int usec
)
63 result
= xhci_readl(xhci
, ptr
);
64 if (result
== ~(u32
)0) /* card removed */
76 * Disable interrupts and begin the xHCI halting process.
78 void xhci_quiesce(struct xhci_hcd
*xhci
)
85 halted
= xhci_readl(xhci
, &xhci
->op_regs
->status
) & STS_HALT
;
89 cmd
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
91 xhci_writel(xhci
, cmd
, &xhci
->op_regs
->command
);
95 * Force HC into halt state.
97 * Disable any IRQs and clear the run/stop bit.
98 * HC will complete any current and actively pipelined transactions, and
99 * should halt within 16 ms of the run/stop bit being cleared.
100 * Read HC Halted bit in the status register to see when the HC is finished.
102 int xhci_halt(struct xhci_hcd
*xhci
)
105 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Halt the HC");
108 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
109 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
);
111 xhci
->xhc_state
|= XHCI_STATE_HALTED
;
112 xhci
->cmd_ring_state
= CMD_RING_STATE_STOPPED
;
114 xhci_warn(xhci
, "Host not halted after %u microseconds.\n",
120 * Set the run bit and wait for the host to be running.
122 static int xhci_start(struct xhci_hcd
*xhci
)
127 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
129 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Turn on HC, cmd = 0x%x.",
131 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
134 * Wait for the HCHalted Status bit to be 0 to indicate the host is
137 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
138 STS_HALT
, 0, XHCI_MAX_HALT_USEC
);
139 if (ret
== -ETIMEDOUT
)
140 xhci_err(xhci
, "Host took too long to start, "
141 "waited %u microseconds.\n",
144 xhci
->xhc_state
&= ~XHCI_STATE_HALTED
;
151 * This resets pipelines, timers, counters, state machines, etc.
152 * Transactions will be terminated immediately, and operational registers
153 * will be set to their defaults.
155 int xhci_reset(struct xhci_hcd
*xhci
)
161 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
162 if ((state
& STS_HALT
) == 0) {
163 xhci_warn(xhci
, "Host controller not halted, aborting reset.\n");
167 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "// Reset the HC");
168 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
169 command
|= CMD_RESET
;
170 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
172 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->command
,
173 CMD_RESET
, 0, 10 * 1000 * 1000);
177 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
178 "Wait for controller to be ready for doorbell rings");
180 * xHCI cannot write to any doorbells or operational registers other
181 * than status until the "Controller Not Ready" flag is cleared.
183 ret
= xhci_handshake(xhci
, &xhci
->op_regs
->status
,
184 STS_CNR
, 0, 10 * 1000 * 1000);
186 for (i
= 0; i
< 2; ++i
) {
187 xhci
->bus_state
[i
].port_c_suspend
= 0;
188 xhci
->bus_state
[i
].suspended_ports
= 0;
189 xhci
->bus_state
[i
].resuming_ports
= 0;
196 static int xhci_free_msi(struct xhci_hcd
*xhci
)
200 if (!xhci
->msix_entries
)
203 for (i
= 0; i
< xhci
->msix_count
; i
++)
204 if (xhci
->msix_entries
[i
].vector
)
205 free_irq(xhci
->msix_entries
[i
].vector
,
213 static int xhci_setup_msi(struct xhci_hcd
*xhci
)
216 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
218 ret
= pci_enable_msi(pdev
);
220 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
221 "failed to allocate MSI entry");
225 ret
= request_irq(pdev
->irq
, xhci_msi_irq
,
226 0, "xhci_hcd", xhci_to_hcd(xhci
));
228 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
229 "disable MSI interrupt");
230 pci_disable_msi(pdev
);
238 * free all IRQs request
240 static void xhci_free_irq(struct xhci_hcd
*xhci
)
242 struct pci_dev
*pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
245 /* return if using legacy interrupt */
246 if (xhci_to_hcd(xhci
)->irq
> 0)
249 ret
= xhci_free_msi(xhci
);
253 free_irq(pdev
->irq
, xhci_to_hcd(xhci
));
261 static int xhci_setup_msix(struct xhci_hcd
*xhci
)
264 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
265 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
268 * calculate number of msi-x vectors supported.
269 * - HCS_MAX_INTRS: the max number of interrupts the host can handle,
270 * with max number of interrupters based on the xhci HCSPARAMS1.
271 * - num_online_cpus: maximum msi-x vectors per CPUs core.
272 * Add additional 1 vector to ensure always available interrupt.
274 xhci
->msix_count
= min(num_online_cpus() + 1,
275 HCS_MAX_INTRS(xhci
->hcs_params1
));
278 kmalloc((sizeof(struct msix_entry
))*xhci
->msix_count
,
280 if (!xhci
->msix_entries
) {
281 xhci_err(xhci
, "Failed to allocate MSI-X entries\n");
285 for (i
= 0; i
< xhci
->msix_count
; i
++) {
286 xhci
->msix_entries
[i
].entry
= i
;
287 xhci
->msix_entries
[i
].vector
= 0;
290 ret
= pci_enable_msix(pdev
, xhci
->msix_entries
, xhci
->msix_count
);
292 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
293 "Failed to enable MSI-X");
297 for (i
= 0; i
< xhci
->msix_count
; i
++) {
298 ret
= request_irq(xhci
->msix_entries
[i
].vector
,
300 0, "xhci_hcd", xhci_to_hcd(xhci
));
305 hcd
->msix_enabled
= 1;
309 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "disable MSI-X interrupt");
311 pci_disable_msix(pdev
);
313 kfree(xhci
->msix_entries
);
314 xhci
->msix_entries
= NULL
;
318 /* Free any IRQs and disable MSI-X */
319 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
321 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
322 struct pci_dev
*pdev
= to_pci_dev(hcd
->self
.controller
);
326 if (xhci
->msix_entries
) {
327 pci_disable_msix(pdev
);
328 kfree(xhci
->msix_entries
);
329 xhci
->msix_entries
= NULL
;
331 pci_disable_msi(pdev
);
334 hcd
->msix_enabled
= 0;
338 static void __maybe_unused
xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
342 if (xhci
->msix_entries
) {
343 for (i
= 0; i
< xhci
->msix_count
; i
++)
344 synchronize_irq(xhci
->msix_entries
[i
].vector
);
348 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
350 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
351 struct pci_dev
*pdev
;
354 /* The xhci platform device has set up IRQs through usb_add_hcd. */
355 if (xhci
->quirks
& XHCI_PLAT
)
358 pdev
= to_pci_dev(xhci_to_hcd(xhci
)->self
.controller
);
360 * Some Fresco Logic host controllers advertise MSI, but fail to
361 * generate interrupts. Don't even try to enable MSI.
363 if (xhci
->quirks
& XHCI_BROKEN_MSI
)
366 /* unregister the legacy interrupt */
368 free_irq(hcd
->irq
, hcd
);
371 ret
= xhci_setup_msix(xhci
);
373 /* fall back to msi*/
374 ret
= xhci_setup_msi(xhci
);
377 /* hcd->irq is 0, we have MSI */
381 xhci_err(xhci
, "No msi-x/msi found and no IRQ in BIOS\n");
386 /* fall back to legacy interrupt*/
387 ret
= request_irq(pdev
->irq
, &usb_hcd_irq
, IRQF_SHARED
,
388 hcd
->irq_descr
, hcd
);
390 xhci_err(xhci
, "request interrupt %d failed\n",
394 hcd
->irq
= pdev
->irq
;
400 static int xhci_try_enable_msi(struct usb_hcd
*hcd
)
405 static void xhci_cleanup_msix(struct xhci_hcd
*xhci
)
409 static void xhci_msix_sync_irqs(struct xhci_hcd
*xhci
)
415 static void compliance_mode_recovery(unsigned long arg
)
417 struct xhci_hcd
*xhci
;
422 xhci
= (struct xhci_hcd
*)arg
;
424 for (i
= 0; i
< xhci
->num_usb3_ports
; i
++) {
425 temp
= xhci_readl(xhci
, xhci
->usb3_ports
[i
]);
426 if ((temp
& PORT_PLS_MASK
) == USB_SS_PORT_LS_COMP_MOD
) {
428 * Compliance Mode Detected. Letting USB Core
429 * handle the Warm Reset
431 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
432 "Compliance mode detected->port %d",
434 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
435 "Attempting compliance mode recovery");
436 hcd
= xhci
->shared_hcd
;
438 if (hcd
->state
== HC_STATE_SUSPENDED
)
439 usb_hcd_resume_root_hub(hcd
);
441 usb_hcd_poll_rh_status(hcd
);
445 if (xhci
->port_status_u0
!= ((1 << xhci
->num_usb3_ports
)-1))
446 mod_timer(&xhci
->comp_mode_recovery_timer
,
447 jiffies
+ msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
451 * Quirk to work around issue generated by the SN65LVPE502CP USB3.0 re-driver
452 * that causes ports behind that hardware to enter compliance mode sometimes.
453 * The quirk creates a timer that polls every 2 seconds the link state of
454 * each host controller's port and recovers it by issuing a Warm reset
455 * if Compliance mode is detected, otherwise the port will become "dead" (no
456 * device connections or disconnections will be detected anymore). Becasue no
457 * status event is generated when entering compliance mode (per xhci spec),
458 * this quirk is needed on systems that have the failing hardware installed.
460 static void compliance_mode_recovery_timer_init(struct xhci_hcd
*xhci
)
462 xhci
->port_status_u0
= 0;
463 init_timer(&xhci
->comp_mode_recovery_timer
);
465 xhci
->comp_mode_recovery_timer
.data
= (unsigned long) xhci
;
466 xhci
->comp_mode_recovery_timer
.function
= compliance_mode_recovery
;
467 xhci
->comp_mode_recovery_timer
.expires
= jiffies
+
468 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
);
470 set_timer_slack(&xhci
->comp_mode_recovery_timer
,
471 msecs_to_jiffies(COMP_MODE_RCVRY_MSECS
));
472 add_timer(&xhci
->comp_mode_recovery_timer
);
473 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
474 "Compliance mode recovery timer initialized");
478 * This function identifies the systems that have installed the SN65LVPE502CP
479 * USB3.0 re-driver and that need the Compliance Mode Quirk.
481 * Vendor: Hewlett-Packard -> System Models: Z420, Z620 and Z820
483 bool xhci_compliance_mode_recovery_timer_quirk_check(void)
485 const char *dmi_product_name
, *dmi_sys_vendor
;
487 dmi_product_name
= dmi_get_system_info(DMI_PRODUCT_NAME
);
488 dmi_sys_vendor
= dmi_get_system_info(DMI_SYS_VENDOR
);
489 if (!dmi_product_name
|| !dmi_sys_vendor
)
492 if (!(strstr(dmi_sys_vendor
, "Hewlett-Packard")))
495 if (strstr(dmi_product_name
, "Z420") ||
496 strstr(dmi_product_name
, "Z620") ||
497 strstr(dmi_product_name
, "Z820") ||
498 strstr(dmi_product_name
, "Z1 Workstation"))
504 static int xhci_all_ports_seen_u0(struct xhci_hcd
*xhci
)
506 return (xhci
->port_status_u0
== ((1 << xhci
->num_usb3_ports
)-1));
511 * Initialize memory for HCD and xHC (one-time init).
513 * Program the PAGESIZE register, initialize the device context array, create
514 * device contexts (?), set up a command ring segment (or two?), create event
515 * ring (one for now).
517 int xhci_init(struct usb_hcd
*hcd
)
519 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
522 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_init");
523 spin_lock_init(&xhci
->lock
);
524 if (xhci
->hci_version
== 0x95 && link_quirk
) {
525 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
526 "QUIRK: Not clearing Link TRB chain bits.");
527 xhci
->quirks
|= XHCI_LINK_TRB_QUIRK
;
529 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
530 "xHCI doesn't need link TRB QUIRK");
532 retval
= xhci_mem_init(xhci
, GFP_KERNEL
);
533 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "Finished xhci_init");
535 /* Initializing Compliance Mode Recovery Data If Needed */
536 if (xhci_compliance_mode_recovery_timer_quirk_check()) {
537 xhci
->quirks
|= XHCI_COMP_MODE_QUIRK
;
538 compliance_mode_recovery_timer_init(xhci
);
544 /*-------------------------------------------------------------------------*/
547 static int xhci_run_finished(struct xhci_hcd
*xhci
)
549 if (xhci_start(xhci
)) {
553 xhci
->shared_hcd
->state
= HC_STATE_RUNNING
;
554 xhci
->cmd_ring_state
= CMD_RING_STATE_RUNNING
;
556 if (xhci
->quirks
& XHCI_NEC_HOST
)
557 xhci_ring_cmd_db(xhci
);
559 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
560 "Finished xhci_run for USB3 roothub");
565 * Start the HC after it was halted.
567 * This function is called by the USB core when the HC driver is added.
568 * Its opposite is xhci_stop().
570 * xhci_init() must be called once before this function can be called.
571 * Reset the HC, enable device slot contexts, program DCBAAP, and
572 * set command ring pointer and event ring pointer.
574 * Setup MSI-X vectors and enable interrupts.
576 int xhci_run(struct usb_hcd
*hcd
)
581 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
583 /* Start the xHCI host controller running only after the USB 2.0 roothub
587 hcd
->uses_new_polling
= 1;
588 if (!usb_hcd_is_primary_hcd(hcd
))
589 return xhci_run_finished(xhci
);
591 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "xhci_run");
593 ret
= xhci_try_enable_msi(hcd
);
597 xhci_dbg(xhci
, "Command ring memory map follows:\n");
598 xhci_debug_ring(xhci
, xhci
->cmd_ring
);
599 xhci_dbg_ring_ptrs(xhci
, xhci
->cmd_ring
);
600 xhci_dbg_cmd_ptrs(xhci
);
602 xhci_dbg(xhci
, "ERST memory map follows:\n");
603 xhci_dbg_erst(xhci
, &xhci
->erst
);
604 xhci_dbg(xhci
, "Event ring:\n");
605 xhci_debug_ring(xhci
, xhci
->event_ring
);
606 xhci_dbg_ring_ptrs(xhci
, xhci
->event_ring
);
607 temp_64
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
608 temp_64
&= ~ERST_PTR_MASK
;
609 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
610 "ERST deq = 64'h%0lx", (long unsigned int) temp_64
);
612 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
613 "// Set the interrupt modulation register");
614 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
615 temp
&= ~ER_IRQ_INTERVAL_MASK
;
617 xhci_writel(xhci
, temp
, &xhci
->ir_set
->irq_control
);
619 /* Set the HCD state before we enable the irqs */
620 temp
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
622 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
623 "// Enable interrupts, cmd = 0x%x.", temp
);
624 xhci_writel(xhci
, temp
, &xhci
->op_regs
->command
);
626 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
627 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
628 "// Enabling event ring interrupter %p by writing 0x%x to irq_pending",
629 xhci
->ir_set
, (unsigned int) ER_IRQ_ENABLE(temp
));
630 xhci_writel(xhci
, ER_IRQ_ENABLE(temp
),
631 &xhci
->ir_set
->irq_pending
);
632 xhci_print_ir_set(xhci
, 0);
634 if (xhci
->quirks
& XHCI_NEC_HOST
)
635 xhci_queue_vendor_command(xhci
, 0, 0, 0,
636 TRB_TYPE(TRB_NEC_GET_FW
));
638 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
639 "Finished xhci_run for USB2 roothub");
643 static void xhci_only_stop_hcd(struct usb_hcd
*hcd
)
645 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
647 spin_lock_irq(&xhci
->lock
);
650 /* The shared_hcd is going to be deallocated shortly (the USB core only
651 * calls this function when allocation fails in usb_add_hcd(), or
652 * usb_remove_hcd() is called). So we need to unset xHCI's pointer.
654 xhci
->shared_hcd
= NULL
;
655 spin_unlock_irq(&xhci
->lock
);
661 * This function is called by the USB core when the HC driver is removed.
662 * Its opposite is xhci_run().
664 * Disable device contexts, disable IRQs, and quiesce the HC.
665 * Reset the HC, finish any completed transactions, and cleanup memory.
667 void xhci_stop(struct usb_hcd
*hcd
)
670 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
672 if (!usb_hcd_is_primary_hcd(hcd
)) {
673 xhci_only_stop_hcd(xhci
->shared_hcd
);
677 spin_lock_irq(&xhci
->lock
);
678 /* Make sure the xHC is halted for a USB3 roothub
679 * (xhci_stop() could be called as part of failed init).
683 spin_unlock_irq(&xhci
->lock
);
685 xhci_cleanup_msix(xhci
);
687 /* Deleting Compliance Mode Recovery Timer */
688 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
689 (!(xhci_all_ports_seen_u0(xhci
)))) {
690 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
691 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
692 "%s: compliance mode recovery timer deleted",
696 if (xhci
->quirks
& XHCI_AMD_PLL_FIX
)
699 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
700 "// Disabling event ring interrupts");
701 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
702 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
703 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
704 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
705 &xhci
->ir_set
->irq_pending
);
706 xhci_print_ir_set(xhci
, 0);
708 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
, "cleaning up memory");
709 xhci_mem_cleanup(xhci
);
710 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
711 "xhci_stop completed - status = %x",
712 xhci_readl(xhci
, &xhci
->op_regs
->status
));
716 * Shutdown HC (not bus-specific)
718 * This is called when the machine is rebooting or halting. We assume that the
719 * machine will be powered off, and the HC's internal state will be reset.
720 * Don't bother to free memory.
722 * This will only ever be called with the main usb_hcd (the USB3 roothub).
724 void xhci_shutdown(struct usb_hcd
*hcd
)
726 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
728 if (xhci
->quirks
& XHCI_SPURIOUS_REBOOT
)
729 usb_disable_xhci_ports(to_pci_dev(hcd
->self
.controller
));
731 spin_lock_irq(&xhci
->lock
);
733 spin_unlock_irq(&xhci
->lock
);
735 xhci_cleanup_msix(xhci
);
737 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
738 "xhci_shutdown completed - status = %x",
739 xhci_readl(xhci
, &xhci
->op_regs
->status
));
743 static void xhci_save_registers(struct xhci_hcd
*xhci
)
745 xhci
->s3
.command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
746 xhci
->s3
.dev_nt
= xhci_readl(xhci
, &xhci
->op_regs
->dev_notification
);
747 xhci
->s3
.dcbaa_ptr
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
748 xhci
->s3
.config_reg
= xhci_readl(xhci
, &xhci
->op_regs
->config_reg
);
749 xhci
->s3
.erst_size
= xhci_readl(xhci
, &xhci
->ir_set
->erst_size
);
750 xhci
->s3
.erst_base
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_base
);
751 xhci
->s3
.erst_dequeue
= xhci_read_64(xhci
, &xhci
->ir_set
->erst_dequeue
);
752 xhci
->s3
.irq_pending
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
753 xhci
->s3
.irq_control
= xhci_readl(xhci
, &xhci
->ir_set
->irq_control
);
756 static void xhci_restore_registers(struct xhci_hcd
*xhci
)
758 xhci_writel(xhci
, xhci
->s3
.command
, &xhci
->op_regs
->command
);
759 xhci_writel(xhci
, xhci
->s3
.dev_nt
, &xhci
->op_regs
->dev_notification
);
760 xhci_write_64(xhci
, xhci
->s3
.dcbaa_ptr
, &xhci
->op_regs
->dcbaa_ptr
);
761 xhci_writel(xhci
, xhci
->s3
.config_reg
, &xhci
->op_regs
->config_reg
);
762 xhci_writel(xhci
, xhci
->s3
.erst_size
, &xhci
->ir_set
->erst_size
);
763 xhci_write_64(xhci
, xhci
->s3
.erst_base
, &xhci
->ir_set
->erst_base
);
764 xhci_write_64(xhci
, xhci
->s3
.erst_dequeue
, &xhci
->ir_set
->erst_dequeue
);
765 xhci_writel(xhci
, xhci
->s3
.irq_pending
, &xhci
->ir_set
->irq_pending
);
766 xhci_writel(xhci
, xhci
->s3
.irq_control
, &xhci
->ir_set
->irq_control
);
769 static void xhci_set_cmd_ring_deq(struct xhci_hcd
*xhci
)
773 /* step 2: initialize command ring buffer */
774 val_64
= xhci_read_64(xhci
, &xhci
->op_regs
->cmd_ring
);
775 val_64
= (val_64
& (u64
) CMD_RING_RSVD_BITS
) |
776 (xhci_trb_virt_to_dma(xhci
->cmd_ring
->deq_seg
,
777 xhci
->cmd_ring
->dequeue
) &
778 (u64
) ~CMD_RING_RSVD_BITS
) |
779 xhci
->cmd_ring
->cycle_state
;
780 xhci_dbg_trace(xhci
, trace_xhci_dbg_init
,
781 "// Setting command ring address to 0x%llx",
782 (long unsigned long) val_64
);
783 xhci_write_64(xhci
, val_64
, &xhci
->op_regs
->cmd_ring
);
787 * The whole command ring must be cleared to zero when we suspend the host.
789 * The host doesn't save the command ring pointer in the suspend well, so we
790 * need to re-program it on resume. Unfortunately, the pointer must be 64-byte
791 * aligned, because of the reserved bits in the command ring dequeue pointer
792 * register. Therefore, we can't just set the dequeue pointer back in the
793 * middle of the ring (TRBs are 16-byte aligned).
795 static void xhci_clear_command_ring(struct xhci_hcd
*xhci
)
797 struct xhci_ring
*ring
;
798 struct xhci_segment
*seg
;
800 ring
= xhci
->cmd_ring
;
804 sizeof(union xhci_trb
) * (TRBS_PER_SEGMENT
- 1));
805 seg
->trbs
[TRBS_PER_SEGMENT
- 1].link
.control
&=
806 cpu_to_le32(~TRB_CYCLE
);
808 } while (seg
!= ring
->deq_seg
);
810 /* Reset the software enqueue and dequeue pointers */
811 ring
->deq_seg
= ring
->first_seg
;
812 ring
->dequeue
= ring
->first_seg
->trbs
;
813 ring
->enq_seg
= ring
->deq_seg
;
814 ring
->enqueue
= ring
->dequeue
;
816 ring
->num_trbs_free
= ring
->num_segs
* (TRBS_PER_SEGMENT
- 1) - 1;
818 * Ring is now zeroed, so the HW should look for change of ownership
819 * when the cycle bit is set to 1.
821 ring
->cycle_state
= 1;
824 * Reset the hardware dequeue pointer.
825 * Yes, this will need to be re-written after resume, but we're paranoid
826 * and want to make sure the hardware doesn't access bogus memory
827 * because, say, the BIOS or an SMI started the host without changing
828 * the command ring pointers.
830 xhci_set_cmd_ring_deq(xhci
);
834 * Stop HC (not bus-specific)
836 * This is called when the machine transition into S3/S4 mode.
839 int xhci_suspend(struct xhci_hcd
*xhci
)
842 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
845 if (hcd
->state
!= HC_STATE_SUSPENDED
||
846 xhci
->shared_hcd
->state
!= HC_STATE_SUSPENDED
)
849 /* Don't poll the roothubs on bus suspend. */
850 xhci_dbg(xhci
, "%s: stopping port polling.\n", __func__
);
851 clear_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
852 del_timer_sync(&hcd
->rh_timer
);
854 spin_lock_irq(&xhci
->lock
);
855 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
856 clear_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
857 /* step 1: stop endpoint */
858 /* skipped assuming that port suspend has done */
860 /* step 2: clear Run/Stop bit */
861 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
863 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
864 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
865 STS_HALT
, STS_HALT
, XHCI_MAX_HALT_USEC
)) {
866 xhci_warn(xhci
, "WARN: xHC CMD_RUN timeout\n");
867 spin_unlock_irq(&xhci
->lock
);
870 xhci_clear_command_ring(xhci
);
872 /* step 3: save registers */
873 xhci_save_registers(xhci
);
875 /* step 4: set CSS flag */
876 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
878 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
879 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
880 STS_SAVE
, 0, 10 * 1000)) {
881 xhci_warn(xhci
, "WARN: xHC save state timeout\n");
882 spin_unlock_irq(&xhci
->lock
);
885 spin_unlock_irq(&xhci
->lock
);
888 * Deleting Compliance Mode Recovery Timer because the xHCI Host
889 * is about to be suspended.
891 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
892 (!(xhci_all_ports_seen_u0(xhci
)))) {
893 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
894 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
895 "%s: compliance mode recovery timer deleted",
899 /* step 5: remove core well power */
900 /* synchronize irq when using MSI-X */
901 xhci_msix_sync_irqs(xhci
);
907 * start xHC (not bus-specific)
909 * This is called when the machine transition from S3/S4 mode.
912 int xhci_resume(struct xhci_hcd
*xhci
, bool hibernated
)
914 u32 command
, temp
= 0;
915 struct usb_hcd
*hcd
= xhci_to_hcd(xhci
);
916 struct usb_hcd
*secondary_hcd
;
918 bool comp_timer_running
= false;
920 /* Wait a bit if either of the roothubs need to settle from the
921 * transition into bus suspend.
923 if (time_before(jiffies
, xhci
->bus_state
[0].next_statechange
) ||
925 xhci
->bus_state
[1].next_statechange
))
928 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &hcd
->flags
);
929 set_bit(HCD_FLAG_HW_ACCESSIBLE
, &xhci
->shared_hcd
->flags
);
931 spin_lock_irq(&xhci
->lock
);
932 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
936 /* step 1: restore register */
937 xhci_restore_registers(xhci
);
938 /* step 2: initialize command ring buffer */
939 xhci_set_cmd_ring_deq(xhci
);
940 /* step 3: restore state and start state*/
941 /* step 3: set CRS flag */
942 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
944 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
945 if (xhci_handshake(xhci
, &xhci
->op_regs
->status
,
946 STS_RESTORE
, 0, 10 * 1000)) {
947 xhci_warn(xhci
, "WARN: xHC restore state timeout\n");
948 spin_unlock_irq(&xhci
->lock
);
951 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
954 /* If restore operation fails, re-initialize the HC during resume */
955 if ((temp
& STS_SRE
) || hibernated
) {
957 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) &&
958 !(xhci_all_ports_seen_u0(xhci
))) {
959 del_timer_sync(&xhci
->comp_mode_recovery_timer
);
960 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
961 "Compliance Mode Recovery Timer deleted!");
964 /* Let the USB core know _both_ roothubs lost power. */
965 usb_root_hub_lost_power(xhci
->main_hcd
->self
.root_hub
);
966 usb_root_hub_lost_power(xhci
->shared_hcd
->self
.root_hub
);
968 xhci_dbg(xhci
, "Stop HCD\n");
971 spin_unlock_irq(&xhci
->lock
);
972 xhci_cleanup_msix(xhci
);
974 xhci_dbg(xhci
, "// Disabling event ring interrupts\n");
975 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
976 xhci_writel(xhci
, temp
& ~STS_EINT
, &xhci
->op_regs
->status
);
977 temp
= xhci_readl(xhci
, &xhci
->ir_set
->irq_pending
);
978 xhci_writel(xhci
, ER_IRQ_DISABLE(temp
),
979 &xhci
->ir_set
->irq_pending
);
980 xhci_print_ir_set(xhci
, 0);
982 xhci_dbg(xhci
, "cleaning up memory\n");
983 xhci_mem_cleanup(xhci
);
984 xhci_dbg(xhci
, "xhci_stop completed - status = %x\n",
985 xhci_readl(xhci
, &xhci
->op_regs
->status
));
987 /* USB core calls the PCI reinit and start functions twice:
988 * first with the primary HCD, and then with the secondary HCD.
989 * If we don't do the same, the host will never be started.
991 if (!usb_hcd_is_primary_hcd(hcd
))
994 secondary_hcd
= xhci
->shared_hcd
;
996 xhci_dbg(xhci
, "Initialize the xhci_hcd\n");
997 retval
= xhci_init(hcd
->primary_hcd
);
1000 comp_timer_running
= true;
1002 xhci_dbg(xhci
, "Start the primary HCD\n");
1003 retval
= xhci_run(hcd
->primary_hcd
);
1005 xhci_dbg(xhci
, "Start the secondary HCD\n");
1006 retval
= xhci_run(secondary_hcd
);
1008 hcd
->state
= HC_STATE_SUSPENDED
;
1009 xhci
->shared_hcd
->state
= HC_STATE_SUSPENDED
;
1013 /* step 4: set Run/Stop bit */
1014 command
= xhci_readl(xhci
, &xhci
->op_regs
->command
);
1016 xhci_writel(xhci
, command
, &xhci
->op_regs
->command
);
1017 xhci_handshake(xhci
, &xhci
->op_regs
->status
, STS_HALT
,
1020 /* step 5: walk topology and initialize portsc,
1021 * portpmsc and portli
1023 /* this is done in bus_resume */
1025 /* step 6: restart each of the previously
1026 * Running endpoints by ringing their doorbells
1029 spin_unlock_irq(&xhci
->lock
);
1033 usb_hcd_resume_root_hub(hcd
);
1034 usb_hcd_resume_root_hub(xhci
->shared_hcd
);
1038 * If system is subject to the Quirk, Compliance Mode Timer needs to
1039 * be re-initialized Always after a system resume. Ports are subject
1040 * to suffer the Compliance Mode issue again. It doesn't matter if
1041 * ports have entered previously to U0 before system's suspension.
1043 if ((xhci
->quirks
& XHCI_COMP_MODE_QUIRK
) && !comp_timer_running
)
1044 compliance_mode_recovery_timer_init(xhci
);
1046 /* Re-enable port polling. */
1047 xhci_dbg(xhci
, "%s: starting port polling.\n", __func__
);
1048 set_bit(HCD_FLAG_POLL_RH
, &hcd
->flags
);
1049 usb_hcd_poll_rh_status(hcd
);
1053 #endif /* CONFIG_PM */
1055 /*-------------------------------------------------------------------------*/
1058 * xhci_get_endpoint_index - Used for passing endpoint bitmasks between the core and
1059 * HCDs. Find the index for an endpoint given its descriptor. Use the return
1060 * value to right shift 1 for the bitmask.
1062 * Index = (epnum * 2) + direction - 1,
1063 * where direction = 0 for OUT, 1 for IN.
1064 * For control endpoints, the IN index is used (OUT index is unused), so
1065 * index = (epnum * 2) + direction - 1 = (epnum * 2) + 1 - 1 = (epnum * 2)
1067 unsigned int xhci_get_endpoint_index(struct usb_endpoint_descriptor
*desc
)
1070 if (usb_endpoint_xfer_control(desc
))
1071 index
= (unsigned int) (usb_endpoint_num(desc
)*2);
1073 index
= (unsigned int) (usb_endpoint_num(desc
)*2) +
1074 (usb_endpoint_dir_in(desc
) ? 1 : 0) - 1;
1078 /* The reverse operation to xhci_get_endpoint_index. Calculate the USB endpoint
1079 * address from the XHCI endpoint index.
1081 unsigned int xhci_get_endpoint_address(unsigned int ep_index
)
1083 unsigned int number
= DIV_ROUND_UP(ep_index
, 2);
1084 unsigned int direction
= ep_index
% 2 ? USB_DIR_OUT
: USB_DIR_IN
;
1085 return direction
| number
;
1088 /* Find the flag for this endpoint (for use in the control context). Use the
1089 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1092 unsigned int xhci_get_endpoint_flag(struct usb_endpoint_descriptor
*desc
)
1094 return 1 << (xhci_get_endpoint_index(desc
) + 1);
1097 /* Find the flag for this endpoint (for use in the control context). Use the
1098 * endpoint index to create a bitmask. The slot context is bit 0, endpoint 0 is
1101 unsigned int xhci_get_endpoint_flag_from_index(unsigned int ep_index
)
1103 return 1 << (ep_index
+ 1);
1106 /* Compute the last valid endpoint context index. Basically, this is the
1107 * endpoint index plus one. For slot contexts with more than valid endpoint,
1108 * we find the most significant bit set in the added contexts flags.
1109 * e.g. ep 1 IN (with epnum 0x81) => added_ctxs = 0b1000
1110 * fls(0b1000) = 4, but the endpoint context index is 3, so subtract one.
1112 unsigned int xhci_last_valid_endpoint(u32 added_ctxs
)
1114 return fls(added_ctxs
) - 1;
1117 /* Returns 1 if the arguments are OK;
1118 * returns 0 this is a root hub; returns -EINVAL for NULL pointers.
1120 static int xhci_check_args(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1121 struct usb_host_endpoint
*ep
, int check_ep
, bool check_virt_dev
,
1123 struct xhci_hcd
*xhci
;
1124 struct xhci_virt_device
*virt_dev
;
1126 if (!hcd
|| (check_ep
&& !ep
) || !udev
) {
1127 pr_debug("xHCI %s called with invalid args\n", func
);
1130 if (!udev
->parent
) {
1131 pr_debug("xHCI %s called for root hub\n", func
);
1135 xhci
= hcd_to_xhci(hcd
);
1136 if (check_virt_dev
) {
1137 if (!udev
->slot_id
|| !xhci
->devs
[udev
->slot_id
]) {
1138 xhci_dbg(xhci
, "xHCI %s called with unaddressed device\n",
1143 virt_dev
= xhci
->devs
[udev
->slot_id
];
1144 if (virt_dev
->udev
!= udev
) {
1145 xhci_dbg(xhci
, "xHCI %s called with udev and "
1146 "virt_dev does not match\n", func
);
1151 if (xhci
->xhc_state
& XHCI_STATE_HALTED
)
1157 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
1158 struct usb_device
*udev
, struct xhci_command
*command
,
1159 bool ctx_change
, bool must_succeed
);
1162 * Full speed devices may have a max packet size greater than 8 bytes, but the
1163 * USB core doesn't know that until it reads the first 8 bytes of the
1164 * descriptor. If the usb_device's max packet size changes after that point,
1165 * we need to issue an evaluate context command and wait on it.
1167 static int xhci_check_maxpacket(struct xhci_hcd
*xhci
, unsigned int slot_id
,
1168 unsigned int ep_index
, struct urb
*urb
)
1170 struct xhci_container_ctx
*in_ctx
;
1171 struct xhci_container_ctx
*out_ctx
;
1172 struct xhci_input_control_ctx
*ctrl_ctx
;
1173 struct xhci_ep_ctx
*ep_ctx
;
1174 int max_packet_size
;
1175 int hw_max_packet_size
;
1178 out_ctx
= xhci
->devs
[slot_id
]->out_ctx
;
1179 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1180 hw_max_packet_size
= MAX_PACKET_DECODED(le32_to_cpu(ep_ctx
->ep_info2
));
1181 max_packet_size
= usb_endpoint_maxp(&urb
->dev
->ep0
.desc
);
1182 if (hw_max_packet_size
!= max_packet_size
) {
1183 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1184 "Max Packet Size for ep 0 changed.");
1185 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1186 "Max packet size in usb_device = %d",
1188 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1189 "Max packet size in xHCI HW = %d",
1190 hw_max_packet_size
);
1191 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1192 "Issuing evaluate context command.");
1194 /* Set up the input context flags for the command */
1195 /* FIXME: This won't work if a non-default control endpoint
1196 * changes max packet sizes.
1198 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
1199 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1201 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1205 /* Set up the modified control endpoint 0 */
1206 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
1207 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
1209 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
1210 ep_ctx
->ep_info2
&= cpu_to_le32(~MAX_PACKET_MASK
);
1211 ep_ctx
->ep_info2
|= cpu_to_le32(MAX_PACKET(max_packet_size
));
1213 ctrl_ctx
->add_flags
= cpu_to_le32(EP0_FLAG
);
1214 ctrl_ctx
->drop_flags
= 0;
1216 xhci_dbg(xhci
, "Slot %d input context\n", slot_id
);
1217 xhci_dbg_ctx(xhci
, in_ctx
, ep_index
);
1218 xhci_dbg(xhci
, "Slot %d output context\n", slot_id
);
1219 xhci_dbg_ctx(xhci
, out_ctx
, ep_index
);
1221 ret
= xhci_configure_endpoint(xhci
, urb
->dev
, NULL
,
1224 /* Clean up the input context for later use by bandwidth
1227 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
);
1233 * non-error returns are a promise to giveback() the urb later
1234 * we drop ownership so next owner (or urb unlink) can get it
1236 int xhci_urb_enqueue(struct usb_hcd
*hcd
, struct urb
*urb
, gfp_t mem_flags
)
1238 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
1239 struct xhci_td
*buffer
;
1240 unsigned long flags
;
1242 unsigned int slot_id
, ep_index
;
1243 struct urb_priv
*urb_priv
;
1246 if (!urb
|| xhci_check_args(hcd
, urb
->dev
, urb
->ep
,
1247 true, true, __func__
) <= 0)
1250 slot_id
= urb
->dev
->slot_id
;
1251 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1253 if (!HCD_HW_ACCESSIBLE(hcd
)) {
1254 if (!in_interrupt())
1255 xhci_dbg(xhci
, "urb submitted during PCI suspend\n");
1260 if (usb_endpoint_xfer_isoc(&urb
->ep
->desc
))
1261 size
= urb
->number_of_packets
;
1265 urb_priv
= kzalloc(sizeof(struct urb_priv
) +
1266 size
* sizeof(struct xhci_td
*), mem_flags
);
1270 buffer
= kzalloc(size
* sizeof(struct xhci_td
), mem_flags
);
1276 for (i
= 0; i
< size
; i
++) {
1277 urb_priv
->td
[i
] = buffer
;
1281 urb_priv
->length
= size
;
1282 urb_priv
->td_cnt
= 0;
1283 urb
->hcpriv
= urb_priv
;
1285 if (usb_endpoint_xfer_control(&urb
->ep
->desc
)) {
1286 /* Check to see if the max packet size for the default control
1287 * endpoint changed during FS device enumeration
1289 if (urb
->dev
->speed
== USB_SPEED_FULL
) {
1290 ret
= xhci_check_maxpacket(xhci
, slot_id
,
1293 xhci_urb_free_priv(xhci
, urb_priv
);
1299 /* We have a spinlock and interrupts disabled, so we must pass
1300 * atomic context to this function, which may allocate memory.
1302 spin_lock_irqsave(&xhci
->lock
, flags
);
1303 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1305 ret
= xhci_queue_ctrl_tx(xhci
, GFP_ATOMIC
, urb
,
1309 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1310 } else if (usb_endpoint_xfer_bulk(&urb
->ep
->desc
)) {
1311 spin_lock_irqsave(&xhci
->lock
, flags
);
1312 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1314 if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1315 EP_GETTING_STREAMS
) {
1316 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1317 "is transitioning to using streams.\n");
1319 } else if (xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
&
1320 EP_GETTING_NO_STREAMS
) {
1321 xhci_warn(xhci
, "WARN: Can't enqueue URB while bulk ep "
1322 "is transitioning to "
1323 "not having streams.\n");
1326 ret
= xhci_queue_bulk_tx(xhci
, GFP_ATOMIC
, urb
,
1331 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1332 } else if (usb_endpoint_xfer_int(&urb
->ep
->desc
)) {
1333 spin_lock_irqsave(&xhci
->lock
, flags
);
1334 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1336 ret
= xhci_queue_intr_tx(xhci
, GFP_ATOMIC
, urb
,
1340 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1342 spin_lock_irqsave(&xhci
->lock
, flags
);
1343 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1345 ret
= xhci_queue_isoc_tx_prepare(xhci
, GFP_ATOMIC
, urb
,
1349 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1354 xhci_dbg(xhci
, "Ep 0x%x: URB %p submitted for "
1355 "non-responsive xHCI host.\n",
1356 urb
->ep
->desc
.bEndpointAddress
, urb
);
1359 xhci_urb_free_priv(xhci
, urb_priv
);
1361 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1365 /* Get the right ring for the given URB.
1366 * If the endpoint supports streams, boundary check the URB's stream ID.
1367 * If the endpoint doesn't support streams, return the singular endpoint ring.
1369 static struct xhci_ring
*xhci_urb_to_transfer_ring(struct xhci_hcd
*xhci
,
1372 unsigned int slot_id
;
1373 unsigned int ep_index
;
1374 unsigned int stream_id
;
1375 struct xhci_virt_ep
*ep
;
1377 slot_id
= urb
->dev
->slot_id
;
1378 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1379 stream_id
= urb
->stream_id
;
1380 ep
= &xhci
->devs
[slot_id
]->eps
[ep_index
];
1381 /* Common case: no streams */
1382 if (!(ep
->ep_state
& EP_HAS_STREAMS
))
1385 if (stream_id
== 0) {
1387 "WARN: Slot ID %u, ep index %u has streams, "
1388 "but URB has no stream ID.\n",
1393 if (stream_id
< ep
->stream_info
->num_streams
)
1394 return ep
->stream_info
->stream_rings
[stream_id
];
1397 "WARN: Slot ID %u, ep index %u has "
1398 "stream IDs 1 to %u allocated, "
1399 "but stream ID %u is requested.\n",
1401 ep
->stream_info
->num_streams
- 1,
1407 * Remove the URB's TD from the endpoint ring. This may cause the HC to stop
1408 * USB transfers, potentially stopping in the middle of a TRB buffer. The HC
1409 * should pick up where it left off in the TD, unless a Set Transfer Ring
1410 * Dequeue Pointer is issued.
1412 * The TRBs that make up the buffers for the canceled URB will be "removed" from
1413 * the ring. Since the ring is a contiguous structure, they can't be physically
1414 * removed. Instead, there are two options:
1416 * 1) If the HC is in the middle of processing the URB to be canceled, we
1417 * simply move the ring's dequeue pointer past those TRBs using the Set
1418 * Transfer Ring Dequeue Pointer command. This will be the common case,
1419 * when drivers timeout on the last submitted URB and attempt to cancel.
1421 * 2) If the HC is in the middle of a different TD, we turn the TRBs into a
1422 * series of 1-TRB transfer no-op TDs. (No-ops shouldn't be chained.) The
1423 * HC will need to invalidate the any TRBs it has cached after the stop
1424 * endpoint command, as noted in the xHCI 0.95 errata.
1426 * 3) The TD may have completed by the time the Stop Endpoint Command
1427 * completes, so software needs to handle that case too.
1429 * This function should protect against the TD enqueueing code ringing the
1430 * doorbell while this code is waiting for a Stop Endpoint command to complete.
1431 * It also needs to account for multiple cancellations on happening at the same
1432 * time for the same endpoint.
1434 * Note that this function can be called in any context, or so says
1435 * usb_hcd_unlink_urb()
1437 int xhci_urb_dequeue(struct usb_hcd
*hcd
, struct urb
*urb
, int status
)
1439 unsigned long flags
;
1442 struct xhci_hcd
*xhci
;
1443 struct urb_priv
*urb_priv
;
1445 unsigned int ep_index
;
1446 struct xhci_ring
*ep_ring
;
1447 struct xhci_virt_ep
*ep
;
1449 xhci
= hcd_to_xhci(hcd
);
1450 spin_lock_irqsave(&xhci
->lock
, flags
);
1451 /* Make sure the URB hasn't completed or been unlinked already */
1452 ret
= usb_hcd_check_unlink_urb(hcd
, urb
, status
);
1453 if (ret
|| !urb
->hcpriv
)
1455 temp
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
1456 if (temp
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1457 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1458 "HW died, freeing TD.");
1459 urb_priv
= urb
->hcpriv
;
1460 for (i
= urb_priv
->td_cnt
; i
< urb_priv
->length
; i
++) {
1461 td
= urb_priv
->td
[i
];
1462 if (!list_empty(&td
->td_list
))
1463 list_del_init(&td
->td_list
);
1464 if (!list_empty(&td
->cancelled_td_list
))
1465 list_del_init(&td
->cancelled_td_list
);
1468 usb_hcd_unlink_urb_from_ep(hcd
, urb
);
1469 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1470 usb_hcd_giveback_urb(hcd
, urb
, -ESHUTDOWN
);
1471 xhci_urb_free_priv(xhci
, urb_priv
);
1474 if ((xhci
->xhc_state
& XHCI_STATE_DYING
) ||
1475 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
1476 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1477 "Ep 0x%x: URB %p to be canceled on "
1478 "non-responsive xHCI host.",
1479 urb
->ep
->desc
.bEndpointAddress
, urb
);
1480 /* Let the stop endpoint command watchdog timer (which set this
1481 * state) finish cleaning up the endpoint TD lists. We must
1482 * have caught it in the middle of dropping a lock and giving
1488 ep_index
= xhci_get_endpoint_index(&urb
->ep
->desc
);
1489 ep
= &xhci
->devs
[urb
->dev
->slot_id
]->eps
[ep_index
];
1490 ep_ring
= xhci_urb_to_transfer_ring(xhci
, urb
);
1496 urb_priv
= urb
->hcpriv
;
1497 i
= urb_priv
->td_cnt
;
1498 if (i
< urb_priv
->length
)
1499 xhci_dbg_trace(xhci
, trace_xhci_dbg_cancel_urb
,
1500 "Cancel URB %p, dev %s, ep 0x%x, "
1501 "starting at offset 0x%llx",
1502 urb
, urb
->dev
->devpath
,
1503 urb
->ep
->desc
.bEndpointAddress
,
1504 (unsigned long long) xhci_trb_virt_to_dma(
1505 urb_priv
->td
[i
]->start_seg
,
1506 urb_priv
->td
[i
]->first_trb
));
1508 for (; i
< urb_priv
->length
; i
++) {
1509 td
= urb_priv
->td
[i
];
1510 list_add_tail(&td
->cancelled_td_list
, &ep
->cancelled_td_list
);
1513 /* Queue a stop endpoint command, but only if this is
1514 * the first cancellation to be handled.
1516 if (!(ep
->ep_state
& EP_HALT_PENDING
)) {
1517 ep
->ep_state
|= EP_HALT_PENDING
;
1518 ep
->stop_cmds_pending
++;
1519 ep
->stop_cmd_timer
.expires
= jiffies
+
1520 XHCI_STOP_EP_CMD_TIMEOUT
* HZ
;
1521 add_timer(&ep
->stop_cmd_timer
);
1522 xhci_queue_stop_endpoint(xhci
, urb
->dev
->slot_id
, ep_index
, 0);
1523 xhci_ring_cmd_db(xhci
);
1526 spin_unlock_irqrestore(&xhci
->lock
, flags
);
1530 /* Drop an endpoint from a new bandwidth configuration for this device.
1531 * Only one call to this function is allowed per endpoint before
1532 * check_bandwidth() or reset_bandwidth() must be called.
1533 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1534 * add the endpoint to the schedule with possibly new parameters denoted by a
1535 * different endpoint descriptor in usb_host_endpoint.
1536 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1539 * The USB core will not allow URBs to be queued to an endpoint that is being
1540 * disabled, so there's no need for mutual exclusion to protect
1541 * the xhci->devs[slot_id] structure.
1543 int xhci_drop_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1544 struct usb_host_endpoint
*ep
)
1546 struct xhci_hcd
*xhci
;
1547 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1548 struct xhci_input_control_ctx
*ctrl_ctx
;
1549 struct xhci_slot_ctx
*slot_ctx
;
1550 unsigned int last_ctx
;
1551 unsigned int ep_index
;
1552 struct xhci_ep_ctx
*ep_ctx
;
1554 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1557 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1560 xhci
= hcd_to_xhci(hcd
);
1561 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1564 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
1565 drop_flag
= xhci_get_endpoint_flag(&ep
->desc
);
1566 if (drop_flag
== SLOT_FLAG
|| drop_flag
== EP0_FLAG
) {
1567 xhci_dbg(xhci
, "xHCI %s - can't drop slot or ep 0 %#x\n",
1568 __func__
, drop_flag
);
1572 in_ctx
= xhci
->devs
[udev
->slot_id
]->in_ctx
;
1573 out_ctx
= xhci
->devs
[udev
->slot_id
]->out_ctx
;
1574 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1576 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1581 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1582 ep_ctx
= xhci_get_ep_ctx(xhci
, out_ctx
, ep_index
);
1583 /* If the HC already knows the endpoint is disabled,
1584 * or the HCD has noted it is disabled, ignore this request
1586 if (((ep_ctx
->ep_info
& cpu_to_le32(EP_STATE_MASK
)) ==
1587 cpu_to_le32(EP_STATE_DISABLED
)) ||
1588 le32_to_cpu(ctrl_ctx
->drop_flags
) &
1589 xhci_get_endpoint_flag(&ep
->desc
)) {
1590 xhci_warn(xhci
, "xHCI %s called with disabled ep %p\n",
1595 ctrl_ctx
->drop_flags
|= cpu_to_le32(drop_flag
);
1596 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1598 ctrl_ctx
->add_flags
&= cpu_to_le32(~drop_flag
);
1599 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1601 last_ctx
= xhci_last_valid_endpoint(le32_to_cpu(ctrl_ctx
->add_flags
));
1602 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1603 /* Update the last valid endpoint context, if we deleted the last one */
1604 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) >
1605 LAST_CTX(last_ctx
)) {
1606 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1607 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1609 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1611 xhci_endpoint_zero(xhci
, xhci
->devs
[udev
->slot_id
], ep
);
1613 xhci_dbg(xhci
, "drop ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1614 (unsigned int) ep
->desc
.bEndpointAddress
,
1616 (unsigned int) new_drop_flags
,
1617 (unsigned int) new_add_flags
,
1618 (unsigned int) new_slot_info
);
1622 /* Add an endpoint to a new possible bandwidth configuration for this device.
1623 * Only one call to this function is allowed per endpoint before
1624 * check_bandwidth() or reset_bandwidth() must be called.
1625 * A call to xhci_drop_endpoint() followed by a call to xhci_add_endpoint() will
1626 * add the endpoint to the schedule with possibly new parameters denoted by a
1627 * different endpoint descriptor in usb_host_endpoint.
1628 * A call to xhci_add_endpoint() followed by a call to xhci_drop_endpoint() is
1631 * The USB core will not allow URBs to be queued to an endpoint until the
1632 * configuration or alt setting is installed in the device, so there's no need
1633 * for mutual exclusion to protect the xhci->devs[slot_id] structure.
1635 int xhci_add_endpoint(struct usb_hcd
*hcd
, struct usb_device
*udev
,
1636 struct usb_host_endpoint
*ep
)
1638 struct xhci_hcd
*xhci
;
1639 struct xhci_container_ctx
*in_ctx
, *out_ctx
;
1640 unsigned int ep_index
;
1641 struct xhci_slot_ctx
*slot_ctx
;
1642 struct xhci_input_control_ctx
*ctrl_ctx
;
1644 unsigned int last_ctx
;
1645 u32 new_add_flags
, new_drop_flags
, new_slot_info
;
1646 struct xhci_virt_device
*virt_dev
;
1649 ret
= xhci_check_args(hcd
, udev
, ep
, 1, true, __func__
);
1651 /* So we won't queue a reset ep command for a root hub */
1655 xhci
= hcd_to_xhci(hcd
);
1656 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
1659 added_ctxs
= xhci_get_endpoint_flag(&ep
->desc
);
1660 last_ctx
= xhci_last_valid_endpoint(added_ctxs
);
1661 if (added_ctxs
== SLOT_FLAG
|| added_ctxs
== EP0_FLAG
) {
1662 /* FIXME when we have to issue an evaluate endpoint command to
1663 * deal with ep0 max packet size changing once we get the
1666 xhci_dbg(xhci
, "xHCI %s - can't add slot or ep 0 %#x\n",
1667 __func__
, added_ctxs
);
1671 virt_dev
= xhci
->devs
[udev
->slot_id
];
1672 in_ctx
= virt_dev
->in_ctx
;
1673 out_ctx
= virt_dev
->out_ctx
;
1674 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
1676 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1681 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
1682 /* If this endpoint is already in use, and the upper layers are trying
1683 * to add it again without dropping it, reject the addition.
1685 if (virt_dev
->eps
[ep_index
].ring
&&
1686 !(le32_to_cpu(ctrl_ctx
->drop_flags
) &
1687 xhci_get_endpoint_flag(&ep
->desc
))) {
1688 xhci_warn(xhci
, "Trying to add endpoint 0x%x "
1689 "without dropping it.\n",
1690 (unsigned int) ep
->desc
.bEndpointAddress
);
1694 /* If the HCD has already noted the endpoint is enabled,
1695 * ignore this request.
1697 if (le32_to_cpu(ctrl_ctx
->add_flags
) &
1698 xhci_get_endpoint_flag(&ep
->desc
)) {
1699 xhci_warn(xhci
, "xHCI %s called with enabled ep %p\n",
1705 * Configuration and alternate setting changes must be done in
1706 * process context, not interrupt context (or so documenation
1707 * for usb_set_interface() and usb_set_configuration() claim).
1709 if (xhci_endpoint_init(xhci
, virt_dev
, udev
, ep
, GFP_NOIO
) < 0) {
1710 dev_dbg(&udev
->dev
, "%s - could not initialize ep %#x\n",
1711 __func__
, ep
->desc
.bEndpointAddress
);
1715 ctrl_ctx
->add_flags
|= cpu_to_le32(added_ctxs
);
1716 new_add_flags
= le32_to_cpu(ctrl_ctx
->add_flags
);
1718 /* If xhci_endpoint_disable() was called for this endpoint, but the
1719 * xHC hasn't been notified yet through the check_bandwidth() call,
1720 * this re-adds a new state for the endpoint from the new endpoint
1721 * descriptors. We must drop and re-add this endpoint, so we leave the
1724 new_drop_flags
= le32_to_cpu(ctrl_ctx
->drop_flags
);
1726 slot_ctx
= xhci_get_slot_ctx(xhci
, in_ctx
);
1727 /* Update the last valid endpoint context, if we just added one past */
1728 if ((le32_to_cpu(slot_ctx
->dev_info
) & LAST_CTX_MASK
) <
1729 LAST_CTX(last_ctx
)) {
1730 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1731 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(last_ctx
));
1733 new_slot_info
= le32_to_cpu(slot_ctx
->dev_info
);
1735 /* Store the usb_device pointer for later use */
1738 xhci_dbg(xhci
, "add ep 0x%x, slot id %d, new drop flags = %#x, new add flags = %#x, new slot info = %#x\n",
1739 (unsigned int) ep
->desc
.bEndpointAddress
,
1741 (unsigned int) new_drop_flags
,
1742 (unsigned int) new_add_flags
,
1743 (unsigned int) new_slot_info
);
1747 static void xhci_zero_in_ctx(struct xhci_hcd
*xhci
, struct xhci_virt_device
*virt_dev
)
1749 struct xhci_input_control_ctx
*ctrl_ctx
;
1750 struct xhci_ep_ctx
*ep_ctx
;
1751 struct xhci_slot_ctx
*slot_ctx
;
1754 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
1756 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
1761 /* When a device's add flag and drop flag are zero, any subsequent
1762 * configure endpoint command will leave that endpoint's state
1763 * untouched. Make sure we don't leave any old state in the input
1764 * endpoint contexts.
1766 ctrl_ctx
->drop_flags
= 0;
1767 ctrl_ctx
->add_flags
= 0;
1768 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
1769 slot_ctx
->dev_info
&= cpu_to_le32(~LAST_CTX_MASK
);
1770 /* Endpoint 0 is always valid */
1771 slot_ctx
->dev_info
|= cpu_to_le32(LAST_CTX(1));
1772 for (i
= 1; i
< 31; ++i
) {
1773 ep_ctx
= xhci_get_ep_ctx(xhci
, virt_dev
->in_ctx
, i
);
1774 ep_ctx
->ep_info
= 0;
1775 ep_ctx
->ep_info2
= 0;
1777 ep_ctx
->tx_info
= 0;
1781 static int xhci_configure_endpoint_result(struct xhci_hcd
*xhci
,
1782 struct usb_device
*udev
, u32
*cmd_status
)
1786 switch (*cmd_status
) {
1788 dev_warn(&udev
->dev
, "Not enough host controller resources "
1789 "for new device state.\n");
1791 /* FIXME: can we allocate more resources for the HC? */
1794 case COMP_2ND_BW_ERR
:
1795 dev_warn(&udev
->dev
, "Not enough bandwidth "
1796 "for new device state.\n");
1798 /* FIXME: can we go back to the old state? */
1801 /* the HCD set up something wrong */
1802 dev_warn(&udev
->dev
, "ERROR: Endpoint drop flag = 0, "
1804 "and endpoint is not disabled.\n");
1808 dev_warn(&udev
->dev
, "ERROR: Incompatible device for endpoint "
1809 "configure command.\n");
1813 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1814 "Successful Endpoint Configure command");
1818 xhci_err(xhci
, "ERROR: unexpected command completion "
1819 "code 0x%x.\n", *cmd_status
);
1826 static int xhci_evaluate_context_result(struct xhci_hcd
*xhci
,
1827 struct usb_device
*udev
, u32
*cmd_status
)
1830 struct xhci_virt_device
*virt_dev
= xhci
->devs
[udev
->slot_id
];
1832 switch (*cmd_status
) {
1834 dev_warn(&udev
->dev
, "WARN: xHCI driver setup invalid evaluate "
1835 "context command.\n");
1839 dev_warn(&udev
->dev
, "WARN: slot not enabled for"
1840 "evaluate context command.\n");
1843 case COMP_CTX_STATE
:
1844 dev_warn(&udev
->dev
, "WARN: invalid context state for "
1845 "evaluate context command.\n");
1846 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 1);
1850 dev_warn(&udev
->dev
, "ERROR: Incompatible device for evaluate "
1851 "context command.\n");
1855 /* Max Exit Latency too large error */
1856 dev_warn(&udev
->dev
, "WARN: Max Exit Latency too large\n");
1860 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
1861 "Successful evaluate context command");
1865 xhci_err(xhci
, "ERROR: unexpected command completion "
1866 "code 0x%x.\n", *cmd_status
);
1873 static u32
xhci_count_num_new_endpoints(struct xhci_hcd
*xhci
,
1874 struct xhci_input_control_ctx
*ctrl_ctx
)
1876 u32 valid_add_flags
;
1877 u32 valid_drop_flags
;
1879 /* Ignore the slot flag (bit 0), and the default control endpoint flag
1880 * (bit 1). The default control endpoint is added during the Address
1881 * Device command and is never removed until the slot is disabled.
1883 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1884 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1886 /* Use hweight32 to count the number of ones in the add flags, or
1887 * number of endpoints added. Don't count endpoints that are changed
1888 * (both added and dropped).
1890 return hweight32(valid_add_flags
) -
1891 hweight32(valid_add_flags
& valid_drop_flags
);
1894 static unsigned int xhci_count_num_dropped_endpoints(struct xhci_hcd
*xhci
,
1895 struct xhci_input_control_ctx
*ctrl_ctx
)
1897 u32 valid_add_flags
;
1898 u32 valid_drop_flags
;
1900 valid_add_flags
= ctrl_ctx
->add_flags
>> 2;
1901 valid_drop_flags
= ctrl_ctx
->drop_flags
>> 2;
1903 return hweight32(valid_drop_flags
) -
1904 hweight32(valid_add_flags
& valid_drop_flags
);
1908 * We need to reserve the new number of endpoints before the configure endpoint
1909 * command completes. We can't subtract the dropped endpoints from the number
1910 * of active endpoints until the command completes because we can oversubscribe
1911 * the host in this case:
1913 * - the first configure endpoint command drops more endpoints than it adds
1914 * - a second configure endpoint command that adds more endpoints is queued
1915 * - the first configure endpoint command fails, so the config is unchanged
1916 * - the second command may succeed, even though there isn't enough resources
1918 * Must be called with xhci->lock held.
1920 static int xhci_reserve_host_resources(struct xhci_hcd
*xhci
,
1921 struct xhci_input_control_ctx
*ctrl_ctx
)
1925 added_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1926 if (xhci
->num_active_eps
+ added_eps
> xhci
->limit_active_eps
) {
1927 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1928 "Not enough ep ctxs: "
1929 "%u active, need to add %u, limit is %u.",
1930 xhci
->num_active_eps
, added_eps
,
1931 xhci
->limit_active_eps
);
1934 xhci
->num_active_eps
+= added_eps
;
1935 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1936 "Adding %u ep ctxs, %u now active.", added_eps
,
1937 xhci
->num_active_eps
);
1942 * The configure endpoint was failed by the xHC for some other reason, so we
1943 * need to revert the resources that failed configuration would have used.
1945 * Must be called with xhci->lock held.
1947 static void xhci_free_host_resources(struct xhci_hcd
*xhci
,
1948 struct xhci_input_control_ctx
*ctrl_ctx
)
1952 num_failed_eps
= xhci_count_num_new_endpoints(xhci
, ctrl_ctx
);
1953 xhci
->num_active_eps
-= num_failed_eps
;
1954 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1955 "Removing %u failed ep ctxs, %u now active.",
1957 xhci
->num_active_eps
);
1961 * Now that the command has completed, clean up the active endpoint count by
1962 * subtracting out the endpoints that were dropped (but not changed).
1964 * Must be called with xhci->lock held.
1966 static void xhci_finish_resource_reservation(struct xhci_hcd
*xhci
,
1967 struct xhci_input_control_ctx
*ctrl_ctx
)
1969 u32 num_dropped_eps
;
1971 num_dropped_eps
= xhci_count_num_dropped_endpoints(xhci
, ctrl_ctx
);
1972 xhci
->num_active_eps
-= num_dropped_eps
;
1973 if (num_dropped_eps
)
1974 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
1975 "Removing %u dropped ep ctxs, %u now active.",
1977 xhci
->num_active_eps
);
1980 static unsigned int xhci_get_block_size(struct usb_device
*udev
)
1982 switch (udev
->speed
) {
1984 case USB_SPEED_FULL
:
1986 case USB_SPEED_HIGH
:
1988 case USB_SPEED_SUPER
:
1990 case USB_SPEED_UNKNOWN
:
1991 case USB_SPEED_WIRELESS
:
1993 /* Should never happen */
1999 xhci_get_largest_overhead(struct xhci_interval_bw
*interval_bw
)
2001 if (interval_bw
->overhead
[LS_OVERHEAD_TYPE
])
2003 if (interval_bw
->overhead
[FS_OVERHEAD_TYPE
])
2008 /* If we are changing a LS/FS device under a HS hub,
2009 * make sure (if we are activating a new TT) that the HS bus has enough
2010 * bandwidth for this new TT.
2012 static int xhci_check_tt_bw_table(struct xhci_hcd
*xhci
,
2013 struct xhci_virt_device
*virt_dev
,
2016 struct xhci_interval_bw_table
*bw_table
;
2017 struct xhci_tt_bw_info
*tt_info
;
2019 /* Find the bandwidth table for the root port this TT is attached to. */
2020 bw_table
= &xhci
->rh_bw
[virt_dev
->real_port
- 1].bw_table
;
2021 tt_info
= virt_dev
->tt_info
;
2022 /* If this TT already had active endpoints, the bandwidth for this TT
2023 * has already been added. Removing all periodic endpoints (and thus
2024 * making the TT enactive) will only decrease the bandwidth used.
2028 if (old_active_eps
== 0 && tt_info
->active_eps
!= 0) {
2029 if (bw_table
->bw_used
+ TT_HS_OVERHEAD
> HS_BW_LIMIT
)
2033 /* Not sure why we would have no new active endpoints...
2035 * Maybe because of an Evaluate Context change for a hub update or a
2036 * control endpoint 0 max packet size change?
2037 * FIXME: skip the bandwidth calculation in that case.
2042 static int xhci_check_ss_bw(struct xhci_hcd
*xhci
,
2043 struct xhci_virt_device
*virt_dev
)
2045 unsigned int bw_reserved
;
2047 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_IN
, 100);
2048 if (virt_dev
->bw_table
->ss_bw_in
> (SS_BW_LIMIT_IN
- bw_reserved
))
2051 bw_reserved
= DIV_ROUND_UP(SS_BW_RESERVED
*SS_BW_LIMIT_OUT
, 100);
2052 if (virt_dev
->bw_table
->ss_bw_out
> (SS_BW_LIMIT_OUT
- bw_reserved
))
2059 * This algorithm is a very conservative estimate of the worst-case scheduling
2060 * scenario for any one interval. The hardware dynamically schedules the
2061 * packets, so we can't tell which microframe could be the limiting factor in
2062 * the bandwidth scheduling. This only takes into account periodic endpoints.
2064 * Obviously, we can't solve an NP complete problem to find the minimum worst
2065 * case scenario. Instead, we come up with an estimate that is no less than
2066 * the worst case bandwidth used for any one microframe, but may be an
2069 * We walk the requirements for each endpoint by interval, starting with the
2070 * smallest interval, and place packets in the schedule where there is only one
2071 * possible way to schedule packets for that interval. In order to simplify
2072 * this algorithm, we record the largest max packet size for each interval, and
2073 * assume all packets will be that size.
2075 * For interval 0, we obviously must schedule all packets for each interval.
2076 * The bandwidth for interval 0 is just the amount of data to be transmitted
2077 * (the sum of all max ESIT payload sizes, plus any overhead per packet times
2078 * the number of packets).
2080 * For interval 1, we have two possible microframes to schedule those packets
2081 * in. For this algorithm, if we can schedule the same number of packets for
2082 * each possible scheduling opportunity (each microframe), we will do so. The
2083 * remaining number of packets will be saved to be transmitted in the gaps in
2084 * the next interval's scheduling sequence.
2086 * As we move those remaining packets to be scheduled with interval 2 packets,
2087 * we have to double the number of remaining packets to transmit. This is
2088 * because the intervals are actually powers of 2, and we would be transmitting
2089 * the previous interval's packets twice in this interval. We also have to be
2090 * sure that when we look at the largest max packet size for this interval, we
2091 * also look at the largest max packet size for the remaining packets and take
2092 * the greater of the two.
2094 * The algorithm continues to evenly distribute packets in each scheduling
2095 * opportunity, and push the remaining packets out, until we get to the last
2096 * interval. Then those packets and their associated overhead are just added
2097 * to the bandwidth used.
2099 static int xhci_check_bw_table(struct xhci_hcd
*xhci
,
2100 struct xhci_virt_device
*virt_dev
,
2103 unsigned int bw_reserved
;
2104 unsigned int max_bandwidth
;
2105 unsigned int bw_used
;
2106 unsigned int block_size
;
2107 struct xhci_interval_bw_table
*bw_table
;
2108 unsigned int packet_size
= 0;
2109 unsigned int overhead
= 0;
2110 unsigned int packets_transmitted
= 0;
2111 unsigned int packets_remaining
= 0;
2114 if (virt_dev
->udev
->speed
== USB_SPEED_SUPER
)
2115 return xhci_check_ss_bw(xhci
, virt_dev
);
2117 if (virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2118 max_bandwidth
= HS_BW_LIMIT
;
2119 /* Convert percent of bus BW reserved to blocks reserved */
2120 bw_reserved
= DIV_ROUND_UP(HS_BW_RESERVED
* max_bandwidth
, 100);
2122 max_bandwidth
= FS_BW_LIMIT
;
2123 bw_reserved
= DIV_ROUND_UP(FS_BW_RESERVED
* max_bandwidth
, 100);
2126 bw_table
= virt_dev
->bw_table
;
2127 /* We need to translate the max packet size and max ESIT payloads into
2128 * the units the hardware uses.
2130 block_size
= xhci_get_block_size(virt_dev
->udev
);
2132 /* If we are manipulating a LS/FS device under a HS hub, double check
2133 * that the HS bus has enough bandwidth if we are activing a new TT.
2135 if (virt_dev
->tt_info
) {
2136 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2137 "Recalculating BW for rootport %u",
2138 virt_dev
->real_port
);
2139 if (xhci_check_tt_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2140 xhci_warn(xhci
, "Not enough bandwidth on HS bus for "
2141 "newly activated TT.\n");
2144 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2145 "Recalculating BW for TT slot %u port %u",
2146 virt_dev
->tt_info
->slot_id
,
2147 virt_dev
->tt_info
->ttport
);
2149 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2150 "Recalculating BW for rootport %u",
2151 virt_dev
->real_port
);
2154 /* Add in how much bandwidth will be used for interval zero, or the
2155 * rounded max ESIT payload + number of packets * largest overhead.
2157 bw_used
= DIV_ROUND_UP(bw_table
->interval0_esit_payload
, block_size
) +
2158 bw_table
->interval_bw
[0].num_packets
*
2159 xhci_get_largest_overhead(&bw_table
->interval_bw
[0]);
2161 for (i
= 1; i
< XHCI_MAX_INTERVAL
; i
++) {
2162 unsigned int bw_added
;
2163 unsigned int largest_mps
;
2164 unsigned int interval_overhead
;
2167 * How many packets could we transmit in this interval?
2168 * If packets didn't fit in the previous interval, we will need
2169 * to transmit that many packets twice within this interval.
2171 packets_remaining
= 2 * packets_remaining
+
2172 bw_table
->interval_bw
[i
].num_packets
;
2174 /* Find the largest max packet size of this or the previous
2177 if (list_empty(&bw_table
->interval_bw
[i
].endpoints
))
2180 struct xhci_virt_ep
*virt_ep
;
2181 struct list_head
*ep_entry
;
2183 ep_entry
= bw_table
->interval_bw
[i
].endpoints
.next
;
2184 virt_ep
= list_entry(ep_entry
,
2185 struct xhci_virt_ep
, bw_endpoint_list
);
2186 /* Convert to blocks, rounding up */
2187 largest_mps
= DIV_ROUND_UP(
2188 virt_ep
->bw_info
.max_packet_size
,
2191 if (largest_mps
> packet_size
)
2192 packet_size
= largest_mps
;
2194 /* Use the larger overhead of this or the previous interval. */
2195 interval_overhead
= xhci_get_largest_overhead(
2196 &bw_table
->interval_bw
[i
]);
2197 if (interval_overhead
> overhead
)
2198 overhead
= interval_overhead
;
2200 /* How many packets can we evenly distribute across
2201 * (1 << (i + 1)) possible scheduling opportunities?
2203 packets_transmitted
= packets_remaining
>> (i
+ 1);
2205 /* Add in the bandwidth used for those scheduled packets */
2206 bw_added
= packets_transmitted
* (overhead
+ packet_size
);
2208 /* How many packets do we have remaining to transmit? */
2209 packets_remaining
= packets_remaining
% (1 << (i
+ 1));
2211 /* What largest max packet size should those packets have? */
2212 /* If we've transmitted all packets, don't carry over the
2213 * largest packet size.
2215 if (packets_remaining
== 0) {
2218 } else if (packets_transmitted
> 0) {
2219 /* Otherwise if we do have remaining packets, and we've
2220 * scheduled some packets in this interval, take the
2221 * largest max packet size from endpoints with this
2224 packet_size
= largest_mps
;
2225 overhead
= interval_overhead
;
2227 /* Otherwise carry over packet_size and overhead from the last
2228 * time we had a remainder.
2230 bw_used
+= bw_added
;
2231 if (bw_used
> max_bandwidth
) {
2232 xhci_warn(xhci
, "Not enough bandwidth. "
2233 "Proposed: %u, Max: %u\n",
2234 bw_used
, max_bandwidth
);
2239 * Ok, we know we have some packets left over after even-handedly
2240 * scheduling interval 15. We don't know which microframes they will
2241 * fit into, so we over-schedule and say they will be scheduled every
2244 if (packets_remaining
> 0)
2245 bw_used
+= overhead
+ packet_size
;
2247 if (!virt_dev
->tt_info
&& virt_dev
->udev
->speed
== USB_SPEED_HIGH
) {
2248 unsigned int port_index
= virt_dev
->real_port
- 1;
2250 /* OK, we're manipulating a HS device attached to a
2251 * root port bandwidth domain. Include the number of active TTs
2252 * in the bandwidth used.
2254 bw_used
+= TT_HS_OVERHEAD
*
2255 xhci
->rh_bw
[port_index
].num_active_tts
;
2258 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2259 "Final bandwidth: %u, Limit: %u, Reserved: %u, "
2260 "Available: %u " "percent",
2261 bw_used
, max_bandwidth
, bw_reserved
,
2262 (max_bandwidth
- bw_used
- bw_reserved
) * 100 /
2265 bw_used
+= bw_reserved
;
2266 if (bw_used
> max_bandwidth
) {
2267 xhci_warn(xhci
, "Not enough bandwidth. Proposed: %u, Max: %u\n",
2268 bw_used
, max_bandwidth
);
2272 bw_table
->bw_used
= bw_used
;
2276 static bool xhci_is_async_ep(unsigned int ep_type
)
2278 return (ep_type
!= ISOC_OUT_EP
&& ep_type
!= INT_OUT_EP
&&
2279 ep_type
!= ISOC_IN_EP
&&
2280 ep_type
!= INT_IN_EP
);
2283 static bool xhci_is_sync_in_ep(unsigned int ep_type
)
2285 return (ep_type
== ISOC_IN_EP
|| ep_type
== INT_IN_EP
);
2288 static unsigned int xhci_get_ss_bw_consumed(struct xhci_bw_info
*ep_bw
)
2290 unsigned int mps
= DIV_ROUND_UP(ep_bw
->max_packet_size
, SS_BLOCK
);
2292 if (ep_bw
->ep_interval
== 0)
2293 return SS_OVERHEAD_BURST
+
2294 (ep_bw
->mult
* ep_bw
->num_packets
*
2295 (SS_OVERHEAD
+ mps
));
2296 return DIV_ROUND_UP(ep_bw
->mult
* ep_bw
->num_packets
*
2297 (SS_OVERHEAD
+ mps
+ SS_OVERHEAD_BURST
),
2298 1 << ep_bw
->ep_interval
);
2302 void xhci_drop_ep_from_interval_table(struct xhci_hcd
*xhci
,
2303 struct xhci_bw_info
*ep_bw
,
2304 struct xhci_interval_bw_table
*bw_table
,
2305 struct usb_device
*udev
,
2306 struct xhci_virt_ep
*virt_ep
,
2307 struct xhci_tt_bw_info
*tt_info
)
2309 struct xhci_interval_bw
*interval_bw
;
2310 int normalized_interval
;
2312 if (xhci_is_async_ep(ep_bw
->type
))
2315 if (udev
->speed
== USB_SPEED_SUPER
) {
2316 if (xhci_is_sync_in_ep(ep_bw
->type
))
2317 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
-=
2318 xhci_get_ss_bw_consumed(ep_bw
);
2320 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
-=
2321 xhci_get_ss_bw_consumed(ep_bw
);
2325 /* SuperSpeed endpoints never get added to intervals in the table, so
2326 * this check is only valid for HS/FS/LS devices.
2328 if (list_empty(&virt_ep
->bw_endpoint_list
))
2330 /* For LS/FS devices, we need to translate the interval expressed in
2331 * microframes to frames.
2333 if (udev
->speed
== USB_SPEED_HIGH
)
2334 normalized_interval
= ep_bw
->ep_interval
;
2336 normalized_interval
= ep_bw
->ep_interval
- 3;
2338 if (normalized_interval
== 0)
2339 bw_table
->interval0_esit_payload
-= ep_bw
->max_esit_payload
;
2340 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2341 interval_bw
->num_packets
-= ep_bw
->num_packets
;
2342 switch (udev
->speed
) {
2344 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] -= 1;
2346 case USB_SPEED_FULL
:
2347 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] -= 1;
2349 case USB_SPEED_HIGH
:
2350 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] -= 1;
2352 case USB_SPEED_SUPER
:
2353 case USB_SPEED_UNKNOWN
:
2354 case USB_SPEED_WIRELESS
:
2355 /* Should never happen because only LS/FS/HS endpoints will get
2356 * added to the endpoint list.
2361 tt_info
->active_eps
-= 1;
2362 list_del_init(&virt_ep
->bw_endpoint_list
);
2365 static void xhci_add_ep_to_interval_table(struct xhci_hcd
*xhci
,
2366 struct xhci_bw_info
*ep_bw
,
2367 struct xhci_interval_bw_table
*bw_table
,
2368 struct usb_device
*udev
,
2369 struct xhci_virt_ep
*virt_ep
,
2370 struct xhci_tt_bw_info
*tt_info
)
2372 struct xhci_interval_bw
*interval_bw
;
2373 struct xhci_virt_ep
*smaller_ep
;
2374 int normalized_interval
;
2376 if (xhci_is_async_ep(ep_bw
->type
))
2379 if (udev
->speed
== USB_SPEED_SUPER
) {
2380 if (xhci_is_sync_in_ep(ep_bw
->type
))
2381 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_in
+=
2382 xhci_get_ss_bw_consumed(ep_bw
);
2384 xhci
->devs
[udev
->slot_id
]->bw_table
->ss_bw_out
+=
2385 xhci_get_ss_bw_consumed(ep_bw
);
2389 /* For LS/FS devices, we need to translate the interval expressed in
2390 * microframes to frames.
2392 if (udev
->speed
== USB_SPEED_HIGH
)
2393 normalized_interval
= ep_bw
->ep_interval
;
2395 normalized_interval
= ep_bw
->ep_interval
- 3;
2397 if (normalized_interval
== 0)
2398 bw_table
->interval0_esit_payload
+= ep_bw
->max_esit_payload
;
2399 interval_bw
= &bw_table
->interval_bw
[normalized_interval
];
2400 interval_bw
->num_packets
+= ep_bw
->num_packets
;
2401 switch (udev
->speed
) {
2403 interval_bw
->overhead
[LS_OVERHEAD_TYPE
] += 1;
2405 case USB_SPEED_FULL
:
2406 interval_bw
->overhead
[FS_OVERHEAD_TYPE
] += 1;
2408 case USB_SPEED_HIGH
:
2409 interval_bw
->overhead
[HS_OVERHEAD_TYPE
] += 1;
2411 case USB_SPEED_SUPER
:
2412 case USB_SPEED_UNKNOWN
:
2413 case USB_SPEED_WIRELESS
:
2414 /* Should never happen because only LS/FS/HS endpoints will get
2415 * added to the endpoint list.
2421 tt_info
->active_eps
+= 1;
2422 /* Insert the endpoint into the list, largest max packet size first. */
2423 list_for_each_entry(smaller_ep
, &interval_bw
->endpoints
,
2425 if (ep_bw
->max_packet_size
>=
2426 smaller_ep
->bw_info
.max_packet_size
) {
2427 /* Add the new ep before the smaller endpoint */
2428 list_add_tail(&virt_ep
->bw_endpoint_list
,
2429 &smaller_ep
->bw_endpoint_list
);
2433 /* Add the new endpoint at the end of the list. */
2434 list_add_tail(&virt_ep
->bw_endpoint_list
,
2435 &interval_bw
->endpoints
);
2438 void xhci_update_tt_active_eps(struct xhci_hcd
*xhci
,
2439 struct xhci_virt_device
*virt_dev
,
2442 struct xhci_root_port_bw_info
*rh_bw_info
;
2443 if (!virt_dev
->tt_info
)
2446 rh_bw_info
= &xhci
->rh_bw
[virt_dev
->real_port
- 1];
2447 if (old_active_eps
== 0 &&
2448 virt_dev
->tt_info
->active_eps
!= 0) {
2449 rh_bw_info
->num_active_tts
+= 1;
2450 rh_bw_info
->bw_table
.bw_used
+= TT_HS_OVERHEAD
;
2451 } else if (old_active_eps
!= 0 &&
2452 virt_dev
->tt_info
->active_eps
== 0) {
2453 rh_bw_info
->num_active_tts
-= 1;
2454 rh_bw_info
->bw_table
.bw_used
-= TT_HS_OVERHEAD
;
2458 static int xhci_reserve_bandwidth(struct xhci_hcd
*xhci
,
2459 struct xhci_virt_device
*virt_dev
,
2460 struct xhci_container_ctx
*in_ctx
)
2462 struct xhci_bw_info ep_bw_info
[31];
2464 struct xhci_input_control_ctx
*ctrl_ctx
;
2465 int old_active_eps
= 0;
2467 if (virt_dev
->tt_info
)
2468 old_active_eps
= virt_dev
->tt_info
->active_eps
;
2470 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2472 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2477 for (i
= 0; i
< 31; i
++) {
2478 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2481 /* Make a copy of the BW info in case we need to revert this */
2482 memcpy(&ep_bw_info
[i
], &virt_dev
->eps
[i
].bw_info
,
2483 sizeof(ep_bw_info
[i
]));
2484 /* Drop the endpoint from the interval table if the endpoint is
2485 * being dropped or changed.
2487 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2488 xhci_drop_ep_from_interval_table(xhci
,
2489 &virt_dev
->eps
[i
].bw_info
,
2495 /* Overwrite the information stored in the endpoints' bw_info */
2496 xhci_update_bw_info(xhci
, virt_dev
->in_ctx
, ctrl_ctx
, virt_dev
);
2497 for (i
= 0; i
< 31; i
++) {
2498 /* Add any changed or added endpoints to the interval table */
2499 if (EP_IS_ADDED(ctrl_ctx
, i
))
2500 xhci_add_ep_to_interval_table(xhci
,
2501 &virt_dev
->eps
[i
].bw_info
,
2508 if (!xhci_check_bw_table(xhci
, virt_dev
, old_active_eps
)) {
2509 /* Ok, this fits in the bandwidth we have.
2510 * Update the number of active TTs.
2512 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
2516 /* We don't have enough bandwidth for this, revert the stored info. */
2517 for (i
= 0; i
< 31; i
++) {
2518 if (!EP_IS_ADDED(ctrl_ctx
, i
) && !EP_IS_DROPPED(ctrl_ctx
, i
))
2521 /* Drop the new copies of any added or changed endpoints from
2522 * the interval table.
2524 if (EP_IS_ADDED(ctrl_ctx
, i
)) {
2525 xhci_drop_ep_from_interval_table(xhci
,
2526 &virt_dev
->eps
[i
].bw_info
,
2532 /* Revert the endpoint back to its old information */
2533 memcpy(&virt_dev
->eps
[i
].bw_info
, &ep_bw_info
[i
],
2534 sizeof(ep_bw_info
[i
]));
2535 /* Add any changed or dropped endpoints back into the table */
2536 if (EP_IS_DROPPED(ctrl_ctx
, i
))
2537 xhci_add_ep_to_interval_table(xhci
,
2538 &virt_dev
->eps
[i
].bw_info
,
2548 /* Issue a configure endpoint command or evaluate context command
2549 * and wait for it to finish.
2551 static int xhci_configure_endpoint(struct xhci_hcd
*xhci
,
2552 struct usb_device
*udev
,
2553 struct xhci_command
*command
,
2554 bool ctx_change
, bool must_succeed
)
2558 unsigned long flags
;
2559 struct xhci_container_ctx
*in_ctx
;
2560 struct xhci_input_control_ctx
*ctrl_ctx
;
2561 struct completion
*cmd_completion
;
2563 struct xhci_virt_device
*virt_dev
;
2564 union xhci_trb
*cmd_trb
;
2566 spin_lock_irqsave(&xhci
->lock
, flags
);
2567 virt_dev
= xhci
->devs
[udev
->slot_id
];
2570 in_ctx
= command
->in_ctx
;
2572 in_ctx
= virt_dev
->in_ctx
;
2573 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2575 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2576 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2581 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
) &&
2582 xhci_reserve_host_resources(xhci
, ctrl_ctx
)) {
2583 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2584 xhci_warn(xhci
, "Not enough host resources, "
2585 "active endpoint contexts = %u\n",
2586 xhci
->num_active_eps
);
2589 if ((xhci
->quirks
& XHCI_SW_BW_CHECKING
) &&
2590 xhci_reserve_bandwidth(xhci
, virt_dev
, in_ctx
)) {
2591 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2592 xhci_free_host_resources(xhci
, ctrl_ctx
);
2593 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2594 xhci_warn(xhci
, "Not enough bandwidth\n");
2599 cmd_completion
= command
->completion
;
2600 cmd_status
= &command
->status
;
2601 command
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2602 list_add_tail(&command
->cmd_list
, &virt_dev
->cmd_list
);
2604 cmd_completion
= &virt_dev
->cmd_completion
;
2605 cmd_status
= &virt_dev
->cmd_status
;
2607 init_completion(cmd_completion
);
2609 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
2611 ret
= xhci_queue_configure_endpoint(xhci
, in_ctx
->dma
,
2612 udev
->slot_id
, must_succeed
);
2614 ret
= xhci_queue_evaluate_context(xhci
, in_ctx
->dma
,
2615 udev
->slot_id
, must_succeed
);
2618 list_del(&command
->cmd_list
);
2619 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
))
2620 xhci_free_host_resources(xhci
, ctrl_ctx
);
2621 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2622 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
2623 "FIXME allocate a new ring segment");
2626 xhci_ring_cmd_db(xhci
);
2627 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2629 /* Wait for the configure endpoint command to complete */
2630 timeleft
= wait_for_completion_interruptible_timeout(
2632 XHCI_CMD_DEFAULT_TIMEOUT
);
2633 if (timeleft
<= 0) {
2634 xhci_warn(xhci
, "%s while waiting for %s command\n",
2635 timeleft
== 0 ? "Timeout" : "Signal",
2637 "configure endpoint" :
2638 "evaluate context");
2639 /* cancel the configure endpoint command */
2640 ret
= xhci_cancel_cmd(xhci
, command
, cmd_trb
);
2647 ret
= xhci_configure_endpoint_result(xhci
, udev
, cmd_status
);
2649 ret
= xhci_evaluate_context_result(xhci
, udev
, cmd_status
);
2651 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
2652 spin_lock_irqsave(&xhci
->lock
, flags
);
2653 /* If the command failed, remove the reserved resources.
2654 * Otherwise, clean up the estimate to include dropped eps.
2657 xhci_free_host_resources(xhci
, ctrl_ctx
);
2659 xhci_finish_resource_reservation(xhci
, ctrl_ctx
);
2660 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2665 /* Called after one or more calls to xhci_add_endpoint() or
2666 * xhci_drop_endpoint(). If this call fails, the USB core is expected
2667 * to call xhci_reset_bandwidth().
2669 * Since we are in the middle of changing either configuration or
2670 * installing a new alt setting, the USB core won't allow URBs to be
2671 * enqueued for any endpoint on the old config or interface. Nothing
2672 * else should be touching the xhci->devs[slot_id] structure, so we
2673 * don't need to take the xhci->lock for manipulating that.
2675 int xhci_check_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2679 struct xhci_hcd
*xhci
;
2680 struct xhci_virt_device
*virt_dev
;
2681 struct xhci_input_control_ctx
*ctrl_ctx
;
2682 struct xhci_slot_ctx
*slot_ctx
;
2684 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2687 xhci
= hcd_to_xhci(hcd
);
2688 if (xhci
->xhc_state
& XHCI_STATE_DYING
)
2691 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2692 virt_dev
= xhci
->devs
[udev
->slot_id
];
2694 /* See section 4.6.6 - A0 = 1; A1 = D0 = D1 = 0 */
2695 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
2697 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2701 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2702 ctrl_ctx
->add_flags
&= cpu_to_le32(~EP0_FLAG
);
2703 ctrl_ctx
->drop_flags
&= cpu_to_le32(~(SLOT_FLAG
| EP0_FLAG
));
2705 /* Don't issue the command if there's no endpoints to update. */
2706 if (ctrl_ctx
->add_flags
== cpu_to_le32(SLOT_FLAG
) &&
2707 ctrl_ctx
->drop_flags
== 0)
2710 xhci_dbg(xhci
, "New Input Control Context:\n");
2711 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
2712 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
,
2713 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2715 ret
= xhci_configure_endpoint(xhci
, udev
, NULL
,
2718 /* Callee should call reset_bandwidth() */
2722 xhci_dbg(xhci
, "Output context after successful config ep cmd:\n");
2723 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
,
2724 LAST_CTX_TO_EP_NUM(le32_to_cpu(slot_ctx
->dev_info
)));
2726 /* Free any rings that were dropped, but not changed. */
2727 for (i
= 1; i
< 31; ++i
) {
2728 if ((le32_to_cpu(ctrl_ctx
->drop_flags
) & (1 << (i
+ 1))) &&
2729 !(le32_to_cpu(ctrl_ctx
->add_flags
) & (1 << (i
+ 1))))
2730 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2732 xhci_zero_in_ctx(xhci
, virt_dev
);
2734 * Install any rings for completely new endpoints or changed endpoints,
2735 * and free or cache any old rings from changed endpoints.
2737 for (i
= 1; i
< 31; ++i
) {
2738 if (!virt_dev
->eps
[i
].new_ring
)
2740 /* Only cache or free the old ring if it exists.
2741 * It may not if this is the first add of an endpoint.
2743 if (virt_dev
->eps
[i
].ring
) {
2744 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
2746 virt_dev
->eps
[i
].ring
= virt_dev
->eps
[i
].new_ring
;
2747 virt_dev
->eps
[i
].new_ring
= NULL
;
2753 void xhci_reset_bandwidth(struct usb_hcd
*hcd
, struct usb_device
*udev
)
2755 struct xhci_hcd
*xhci
;
2756 struct xhci_virt_device
*virt_dev
;
2759 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
2762 xhci
= hcd_to_xhci(hcd
);
2764 xhci_dbg(xhci
, "%s called for udev %p\n", __func__
, udev
);
2765 virt_dev
= xhci
->devs
[udev
->slot_id
];
2766 /* Free any rings allocated for added endpoints */
2767 for (i
= 0; i
< 31; ++i
) {
2768 if (virt_dev
->eps
[i
].new_ring
) {
2769 xhci_ring_free(xhci
, virt_dev
->eps
[i
].new_ring
);
2770 virt_dev
->eps
[i
].new_ring
= NULL
;
2773 xhci_zero_in_ctx(xhci
, virt_dev
);
2776 static void xhci_setup_input_ctx_for_config_ep(struct xhci_hcd
*xhci
,
2777 struct xhci_container_ctx
*in_ctx
,
2778 struct xhci_container_ctx
*out_ctx
,
2779 struct xhci_input_control_ctx
*ctrl_ctx
,
2780 u32 add_flags
, u32 drop_flags
)
2782 ctrl_ctx
->add_flags
= cpu_to_le32(add_flags
);
2783 ctrl_ctx
->drop_flags
= cpu_to_le32(drop_flags
);
2784 xhci_slot_copy(xhci
, in_ctx
, out_ctx
);
2785 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
2787 xhci_dbg(xhci
, "Input Context:\n");
2788 xhci_dbg_ctx(xhci
, in_ctx
, xhci_last_valid_endpoint(add_flags
));
2791 static void xhci_setup_input_ctx_for_quirk(struct xhci_hcd
*xhci
,
2792 unsigned int slot_id
, unsigned int ep_index
,
2793 struct xhci_dequeue_state
*deq_state
)
2795 struct xhci_input_control_ctx
*ctrl_ctx
;
2796 struct xhci_container_ctx
*in_ctx
;
2797 struct xhci_ep_ctx
*ep_ctx
;
2801 in_ctx
= xhci
->devs
[slot_id
]->in_ctx
;
2802 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, in_ctx
);
2804 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
2809 xhci_endpoint_copy(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2810 xhci
->devs
[slot_id
]->out_ctx
, ep_index
);
2811 ep_ctx
= xhci_get_ep_ctx(xhci
, in_ctx
, ep_index
);
2812 addr
= xhci_trb_virt_to_dma(deq_state
->new_deq_seg
,
2813 deq_state
->new_deq_ptr
);
2815 xhci_warn(xhci
, "WARN Cannot submit config ep after "
2816 "reset ep command\n");
2817 xhci_warn(xhci
, "WARN deq seg = %p, deq ptr = %p\n",
2818 deq_state
->new_deq_seg
,
2819 deq_state
->new_deq_ptr
);
2822 ep_ctx
->deq
= cpu_to_le64(addr
| deq_state
->new_cycle_state
);
2824 added_ctxs
= xhci_get_endpoint_flag_from_index(ep_index
);
2825 xhci_setup_input_ctx_for_config_ep(xhci
, xhci
->devs
[slot_id
]->in_ctx
,
2826 xhci
->devs
[slot_id
]->out_ctx
, ctrl_ctx
,
2827 added_ctxs
, added_ctxs
);
2830 void xhci_cleanup_stalled_ring(struct xhci_hcd
*xhci
,
2831 struct usb_device
*udev
, unsigned int ep_index
)
2833 struct xhci_dequeue_state deq_state
;
2834 struct xhci_virt_ep
*ep
;
2836 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2837 "Cleaning up stalled endpoint ring");
2838 ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2839 /* We need to move the HW's dequeue pointer past this TD,
2840 * or it will attempt to resend it on the next doorbell ring.
2842 xhci_find_new_dequeue_state(xhci
, udev
->slot_id
,
2843 ep_index
, ep
->stopped_stream
, ep
->stopped_td
,
2846 /* HW with the reset endpoint quirk will use the saved dequeue state to
2847 * issue a configure endpoint command later.
2849 if (!(xhci
->quirks
& XHCI_RESET_EP_QUIRK
)) {
2850 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2851 "Queueing new dequeue state");
2852 xhci_queue_new_dequeue_state(xhci
, udev
->slot_id
,
2853 ep_index
, ep
->stopped_stream
, &deq_state
);
2855 /* Better hope no one uses the input context between now and the
2856 * reset endpoint completion!
2857 * XXX: No idea how this hardware will react when stream rings
2860 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
2861 "Setting up input context for "
2862 "configure endpoint command");
2863 xhci_setup_input_ctx_for_quirk(xhci
, udev
->slot_id
,
2864 ep_index
, &deq_state
);
2868 /* Deal with stalled endpoints. The core should have sent the control message
2869 * to clear the halt condition. However, we need to make the xHCI hardware
2870 * reset its sequence number, since a device will expect a sequence number of
2871 * zero after the halt condition is cleared.
2872 * Context: in_interrupt
2874 void xhci_endpoint_reset(struct usb_hcd
*hcd
,
2875 struct usb_host_endpoint
*ep
)
2877 struct xhci_hcd
*xhci
;
2878 struct usb_device
*udev
;
2879 unsigned int ep_index
;
2880 unsigned long flags
;
2882 struct xhci_virt_ep
*virt_ep
;
2884 xhci
= hcd_to_xhci(hcd
);
2885 udev
= (struct usb_device
*) ep
->hcpriv
;
2886 /* Called with a root hub endpoint (or an endpoint that wasn't added
2887 * with xhci_add_endpoint()
2891 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2892 virt_ep
= &xhci
->devs
[udev
->slot_id
]->eps
[ep_index
];
2893 if (!virt_ep
->stopped_td
) {
2894 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2895 "Endpoint 0x%x not halted, refusing to reset.",
2896 ep
->desc
.bEndpointAddress
);
2899 if (usb_endpoint_xfer_control(&ep
->desc
)) {
2900 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2901 "Control endpoint stall already handled.");
2905 xhci_dbg_trace(xhci
, trace_xhci_dbg_reset_ep
,
2906 "Queueing reset endpoint command");
2907 spin_lock_irqsave(&xhci
->lock
, flags
);
2908 ret
= xhci_queue_reset_ep(xhci
, udev
->slot_id
, ep_index
);
2910 * Can't change the ring dequeue pointer until it's transitioned to the
2911 * stopped state, which is only upon a successful reset endpoint
2912 * command. Better hope that last command worked!
2915 xhci_cleanup_stalled_ring(xhci
, udev
, ep_index
);
2916 kfree(virt_ep
->stopped_td
);
2917 xhci_ring_cmd_db(xhci
);
2919 virt_ep
->stopped_td
= NULL
;
2920 virt_ep
->stopped_trb
= NULL
;
2921 virt_ep
->stopped_stream
= 0;
2922 spin_unlock_irqrestore(&xhci
->lock
, flags
);
2925 xhci_warn(xhci
, "FIXME allocate a new ring segment\n");
2928 static int xhci_check_streams_endpoint(struct xhci_hcd
*xhci
,
2929 struct usb_device
*udev
, struct usb_host_endpoint
*ep
,
2930 unsigned int slot_id
)
2933 unsigned int ep_index
;
2934 unsigned int ep_state
;
2938 ret
= xhci_check_args(xhci_to_hcd(xhci
), udev
, ep
, 1, true, __func__
);
2941 if (ep
->ss_ep_comp
.bmAttributes
== 0) {
2942 xhci_warn(xhci
, "WARN: SuperSpeed Endpoint Companion"
2943 " descriptor for ep 0x%x does not support streams\n",
2944 ep
->desc
.bEndpointAddress
);
2948 ep_index
= xhci_get_endpoint_index(&ep
->desc
);
2949 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
2950 if (ep_state
& EP_HAS_STREAMS
||
2951 ep_state
& EP_GETTING_STREAMS
) {
2952 xhci_warn(xhci
, "WARN: SuperSpeed bulk endpoint 0x%x "
2953 "already has streams set up.\n",
2954 ep
->desc
.bEndpointAddress
);
2955 xhci_warn(xhci
, "Send email to xHCI maintainer and ask for "
2956 "dynamic stream context array reallocation.\n");
2959 if (!list_empty(&xhci
->devs
[slot_id
]->eps
[ep_index
].ring
->td_list
)) {
2960 xhci_warn(xhci
, "Cannot setup streams for SuperSpeed bulk "
2961 "endpoint 0x%x; URBs are pending.\n",
2962 ep
->desc
.bEndpointAddress
);
2968 static void xhci_calculate_streams_entries(struct xhci_hcd
*xhci
,
2969 unsigned int *num_streams
, unsigned int *num_stream_ctxs
)
2971 unsigned int max_streams
;
2973 /* The stream context array size must be a power of two */
2974 *num_stream_ctxs
= roundup_pow_of_two(*num_streams
);
2976 * Find out how many primary stream array entries the host controller
2977 * supports. Later we may use secondary stream arrays (similar to 2nd
2978 * level page entries), but that's an optional feature for xHCI host
2979 * controllers. xHCs must support at least 4 stream IDs.
2981 max_streams
= HCC_MAX_PSA(xhci
->hcc_params
);
2982 if (*num_stream_ctxs
> max_streams
) {
2983 xhci_dbg(xhci
, "xHCI HW only supports %u stream ctx entries.\n",
2985 *num_stream_ctxs
= max_streams
;
2986 *num_streams
= max_streams
;
2990 /* Returns an error code if one of the endpoint already has streams.
2991 * This does not change any data structures, it only checks and gathers
2994 static int xhci_calculate_streams_and_bitmask(struct xhci_hcd
*xhci
,
2995 struct usb_device
*udev
,
2996 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
2997 unsigned int *num_streams
, u32
*changed_ep_bitmask
)
2999 unsigned int max_streams
;
3000 unsigned int endpoint_flag
;
3004 for (i
= 0; i
< num_eps
; i
++) {
3005 ret
= xhci_check_streams_endpoint(xhci
, udev
,
3006 eps
[i
], udev
->slot_id
);
3010 max_streams
= usb_ss_max_streams(&eps
[i
]->ss_ep_comp
);
3011 if (max_streams
< (*num_streams
- 1)) {
3012 xhci_dbg(xhci
, "Ep 0x%x only supports %u stream IDs.\n",
3013 eps
[i
]->desc
.bEndpointAddress
,
3015 *num_streams
= max_streams
+1;
3018 endpoint_flag
= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3019 if (*changed_ep_bitmask
& endpoint_flag
)
3021 *changed_ep_bitmask
|= endpoint_flag
;
3026 static u32
xhci_calculate_no_streams_bitmask(struct xhci_hcd
*xhci
,
3027 struct usb_device
*udev
,
3028 struct usb_host_endpoint
**eps
, unsigned int num_eps
)
3030 u32 changed_ep_bitmask
= 0;
3031 unsigned int slot_id
;
3032 unsigned int ep_index
;
3033 unsigned int ep_state
;
3036 slot_id
= udev
->slot_id
;
3037 if (!xhci
->devs
[slot_id
])
3040 for (i
= 0; i
< num_eps
; i
++) {
3041 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3042 ep_state
= xhci
->devs
[slot_id
]->eps
[ep_index
].ep_state
;
3043 /* Are streams already being freed for the endpoint? */
3044 if (ep_state
& EP_GETTING_NO_STREAMS
) {
3045 xhci_warn(xhci
, "WARN Can't disable streams for "
3047 "streams are being disabled already\n",
3048 eps
[i
]->desc
.bEndpointAddress
);
3051 /* Are there actually any streams to free? */
3052 if (!(ep_state
& EP_HAS_STREAMS
) &&
3053 !(ep_state
& EP_GETTING_STREAMS
)) {
3054 xhci_warn(xhci
, "WARN Can't disable streams for "
3056 "streams are already disabled!\n",
3057 eps
[i
]->desc
.bEndpointAddress
);
3058 xhci_warn(xhci
, "WARN xhci_free_streams() called "
3059 "with non-streams endpoint\n");
3062 changed_ep_bitmask
|= xhci_get_endpoint_flag(&eps
[i
]->desc
);
3064 return changed_ep_bitmask
;
3068 * The USB device drivers use this function (though the HCD interface in USB
3069 * core) to prepare a set of bulk endpoints to use streams. Streams are used to
3070 * coordinate mass storage command queueing across multiple endpoints (basically
3071 * a stream ID == a task ID).
3073 * Setting up streams involves allocating the same size stream context array
3074 * for each endpoint and issuing a configure endpoint command for all endpoints.
3076 * Don't allow the call to succeed if one endpoint only supports one stream
3077 * (which means it doesn't support streams at all).
3079 * Drivers may get less stream IDs than they asked for, if the host controller
3080 * hardware or endpoints claim they can't support the number of requested
3083 int xhci_alloc_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3084 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3085 unsigned int num_streams
, gfp_t mem_flags
)
3088 struct xhci_hcd
*xhci
;
3089 struct xhci_virt_device
*vdev
;
3090 struct xhci_command
*config_cmd
;
3091 struct xhci_input_control_ctx
*ctrl_ctx
;
3092 unsigned int ep_index
;
3093 unsigned int num_stream_ctxs
;
3094 unsigned long flags
;
3095 u32 changed_ep_bitmask
= 0;
3100 /* Add one to the number of streams requested to account for
3101 * stream 0 that is reserved for xHCI usage.
3104 xhci
= hcd_to_xhci(hcd
);
3105 xhci_dbg(xhci
, "Driver wants %u stream IDs (including stream 0).\n",
3108 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
3110 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
3113 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
3115 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3117 xhci_free_command(xhci
, config_cmd
);
3121 /* Check to make sure all endpoints are not already configured for
3122 * streams. While we're at it, find the maximum number of streams that
3123 * all the endpoints will support and check for duplicate endpoints.
3125 spin_lock_irqsave(&xhci
->lock
, flags
);
3126 ret
= xhci_calculate_streams_and_bitmask(xhci
, udev
, eps
,
3127 num_eps
, &num_streams
, &changed_ep_bitmask
);
3129 xhci_free_command(xhci
, config_cmd
);
3130 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3133 if (num_streams
<= 1) {
3134 xhci_warn(xhci
, "WARN: endpoints can't handle "
3135 "more than one stream.\n");
3136 xhci_free_command(xhci
, config_cmd
);
3137 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3140 vdev
= xhci
->devs
[udev
->slot_id
];
3141 /* Mark each endpoint as being in transition, so
3142 * xhci_urb_enqueue() will reject all URBs.
3144 for (i
= 0; i
< num_eps
; i
++) {
3145 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3146 vdev
->eps
[ep_index
].ep_state
|= EP_GETTING_STREAMS
;
3148 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3150 /* Setup internal data structures and allocate HW data structures for
3151 * streams (but don't install the HW structures in the input context
3152 * until we're sure all memory allocation succeeded).
3154 xhci_calculate_streams_entries(xhci
, &num_streams
, &num_stream_ctxs
);
3155 xhci_dbg(xhci
, "Need %u stream ctx entries for %u stream IDs.\n",
3156 num_stream_ctxs
, num_streams
);
3158 for (i
= 0; i
< num_eps
; i
++) {
3159 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3160 vdev
->eps
[ep_index
].stream_info
= xhci_alloc_stream_info(xhci
,
3162 num_streams
, mem_flags
);
3163 if (!vdev
->eps
[ep_index
].stream_info
)
3165 /* Set maxPstreams in endpoint context and update deq ptr to
3166 * point to stream context array. FIXME
3170 /* Set up the input context for a configure endpoint command. */
3171 for (i
= 0; i
< num_eps
; i
++) {
3172 struct xhci_ep_ctx
*ep_ctx
;
3174 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3175 ep_ctx
= xhci_get_ep_ctx(xhci
, config_cmd
->in_ctx
, ep_index
);
3177 xhci_endpoint_copy(xhci
, config_cmd
->in_ctx
,
3178 vdev
->out_ctx
, ep_index
);
3179 xhci_setup_streams_ep_input_ctx(xhci
, ep_ctx
,
3180 vdev
->eps
[ep_index
].stream_info
);
3182 /* Tell the HW to drop its old copy of the endpoint context info
3183 * and add the updated copy from the input context.
3185 xhci_setup_input_ctx_for_config_ep(xhci
, config_cmd
->in_ctx
,
3186 vdev
->out_ctx
, ctrl_ctx
,
3187 changed_ep_bitmask
, changed_ep_bitmask
);
3189 /* Issue and wait for the configure endpoint command */
3190 ret
= xhci_configure_endpoint(xhci
, udev
, config_cmd
,
3193 /* xHC rejected the configure endpoint command for some reason, so we
3194 * leave the old ring intact and free our internal streams data
3200 spin_lock_irqsave(&xhci
->lock
, flags
);
3201 for (i
= 0; i
< num_eps
; i
++) {
3202 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3203 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3204 xhci_dbg(xhci
, "Slot %u ep ctx %u now has streams.\n",
3205 udev
->slot_id
, ep_index
);
3206 vdev
->eps
[ep_index
].ep_state
|= EP_HAS_STREAMS
;
3208 xhci_free_command(xhci
, config_cmd
);
3209 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3211 /* Subtract 1 for stream 0, which drivers can't use */
3212 return num_streams
- 1;
3215 /* If it didn't work, free the streams! */
3216 for (i
= 0; i
< num_eps
; i
++) {
3217 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3218 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3219 vdev
->eps
[ep_index
].stream_info
= NULL
;
3220 /* FIXME Unset maxPstreams in endpoint context and
3221 * update deq ptr to point to normal string ring.
3223 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_STREAMS
;
3224 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3225 xhci_endpoint_zero(xhci
, vdev
, eps
[i
]);
3227 xhci_free_command(xhci
, config_cmd
);
3231 /* Transition the endpoint from using streams to being a "normal" endpoint
3234 * Modify the endpoint context state, submit a configure endpoint command,
3235 * and free all endpoint rings for streams if that completes successfully.
3237 int xhci_free_streams(struct usb_hcd
*hcd
, struct usb_device
*udev
,
3238 struct usb_host_endpoint
**eps
, unsigned int num_eps
,
3242 struct xhci_hcd
*xhci
;
3243 struct xhci_virt_device
*vdev
;
3244 struct xhci_command
*command
;
3245 struct xhci_input_control_ctx
*ctrl_ctx
;
3246 unsigned int ep_index
;
3247 unsigned long flags
;
3248 u32 changed_ep_bitmask
;
3250 xhci
= hcd_to_xhci(hcd
);
3251 vdev
= xhci
->devs
[udev
->slot_id
];
3253 /* Set up a configure endpoint command to remove the streams rings */
3254 spin_lock_irqsave(&xhci
->lock
, flags
);
3255 changed_ep_bitmask
= xhci_calculate_no_streams_bitmask(xhci
,
3256 udev
, eps
, num_eps
);
3257 if (changed_ep_bitmask
== 0) {
3258 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3262 /* Use the xhci_command structure from the first endpoint. We may have
3263 * allocated too many, but the driver may call xhci_free_streams() for
3264 * each endpoint it grouped into one call to xhci_alloc_streams().
3266 ep_index
= xhci_get_endpoint_index(&eps
[0]->desc
);
3267 command
= vdev
->eps
[ep_index
].stream_info
->free_streams_command
;
3268 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
3270 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3271 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3276 for (i
= 0; i
< num_eps
; i
++) {
3277 struct xhci_ep_ctx
*ep_ctx
;
3279 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3280 ep_ctx
= xhci_get_ep_ctx(xhci
, command
->in_ctx
, ep_index
);
3281 xhci
->devs
[udev
->slot_id
]->eps
[ep_index
].ep_state
|=
3282 EP_GETTING_NO_STREAMS
;
3284 xhci_endpoint_copy(xhci
, command
->in_ctx
,
3285 vdev
->out_ctx
, ep_index
);
3286 xhci_setup_no_streams_ep_input_ctx(xhci
, ep_ctx
,
3287 &vdev
->eps
[ep_index
]);
3289 xhci_setup_input_ctx_for_config_ep(xhci
, command
->in_ctx
,
3290 vdev
->out_ctx
, ctrl_ctx
,
3291 changed_ep_bitmask
, changed_ep_bitmask
);
3292 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3294 /* Issue and wait for the configure endpoint command,
3295 * which must succeed.
3297 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3300 /* xHC rejected the configure endpoint command for some reason, so we
3301 * leave the streams rings intact.
3306 spin_lock_irqsave(&xhci
->lock
, flags
);
3307 for (i
= 0; i
< num_eps
; i
++) {
3308 ep_index
= xhci_get_endpoint_index(&eps
[i
]->desc
);
3309 xhci_free_stream_info(xhci
, vdev
->eps
[ep_index
].stream_info
);
3310 vdev
->eps
[ep_index
].stream_info
= NULL
;
3311 /* FIXME Unset maxPstreams in endpoint context and
3312 * update deq ptr to point to normal string ring.
3314 vdev
->eps
[ep_index
].ep_state
&= ~EP_GETTING_NO_STREAMS
;
3315 vdev
->eps
[ep_index
].ep_state
&= ~EP_HAS_STREAMS
;
3317 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3323 * Deletes endpoint resources for endpoints that were active before a Reset
3324 * Device command, or a Disable Slot command. The Reset Device command leaves
3325 * the control endpoint intact, whereas the Disable Slot command deletes it.
3327 * Must be called with xhci->lock held.
3329 void xhci_free_device_endpoint_resources(struct xhci_hcd
*xhci
,
3330 struct xhci_virt_device
*virt_dev
, bool drop_control_ep
)
3333 unsigned int num_dropped_eps
= 0;
3334 unsigned int drop_flags
= 0;
3336 for (i
= (drop_control_ep
? 0 : 1); i
< 31; i
++) {
3337 if (virt_dev
->eps
[i
].ring
) {
3338 drop_flags
|= 1 << i
;
3342 xhci
->num_active_eps
-= num_dropped_eps
;
3343 if (num_dropped_eps
)
3344 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3345 "Dropped %u ep ctxs, flags = 0x%x, "
3347 num_dropped_eps
, drop_flags
,
3348 xhci
->num_active_eps
);
3352 * This submits a Reset Device Command, which will set the device state to 0,
3353 * set the device address to 0, and disable all the endpoints except the default
3354 * control endpoint. The USB core should come back and call
3355 * xhci_address_device(), and then re-set up the configuration. If this is
3356 * called because of a usb_reset_and_verify_device(), then the old alternate
3357 * settings will be re-installed through the normal bandwidth allocation
3360 * Wait for the Reset Device command to finish. Remove all structures
3361 * associated with the endpoints that were disabled. Clear the input device
3362 * structure? Cache the rings? Reset the control endpoint 0 max packet size?
3364 * If the virt_dev to be reset does not exist or does not match the udev,
3365 * it means the device is lost, possibly due to the xHC restore error and
3366 * re-initialization during S3/S4. In this case, call xhci_alloc_dev() to
3367 * re-allocate the device.
3369 int xhci_discover_or_reset_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3372 unsigned long flags
;
3373 struct xhci_hcd
*xhci
;
3374 unsigned int slot_id
;
3375 struct xhci_virt_device
*virt_dev
;
3376 struct xhci_command
*reset_device_cmd
;
3378 int last_freed_endpoint
;
3379 struct xhci_slot_ctx
*slot_ctx
;
3380 int old_active_eps
= 0;
3382 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, false, __func__
);
3385 xhci
= hcd_to_xhci(hcd
);
3386 slot_id
= udev
->slot_id
;
3387 virt_dev
= xhci
->devs
[slot_id
];
3389 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3390 "not exist. Re-allocate the device\n", slot_id
);
3391 ret
= xhci_alloc_dev(hcd
, udev
);
3398 if (virt_dev
->udev
!= udev
) {
3399 /* If the virt_dev and the udev does not match, this virt_dev
3400 * may belong to another udev.
3401 * Re-allocate the device.
3403 xhci_dbg(xhci
, "The device to be reset with slot ID %u does "
3404 "not match the udev. Re-allocate the device\n",
3406 ret
= xhci_alloc_dev(hcd
, udev
);
3413 /* If device is not setup, there is no point in resetting it */
3414 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3415 if (GET_SLOT_STATE(le32_to_cpu(slot_ctx
->dev_state
)) ==
3416 SLOT_STATE_DISABLED
)
3419 xhci_dbg(xhci
, "Resetting device with slot ID %u\n", slot_id
);
3420 /* Allocate the command structure that holds the struct completion.
3421 * Assume we're in process context, since the normal device reset
3422 * process has to wait for the device anyway. Storage devices are
3423 * reset as part of error handling, so use GFP_NOIO instead of
3426 reset_device_cmd
= xhci_alloc_command(xhci
, false, true, GFP_NOIO
);
3427 if (!reset_device_cmd
) {
3428 xhci_dbg(xhci
, "Couldn't allocate command structure.\n");
3432 /* Attempt to submit the Reset Device command to the command ring */
3433 spin_lock_irqsave(&xhci
->lock
, flags
);
3434 reset_device_cmd
->command_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3436 list_add_tail(&reset_device_cmd
->cmd_list
, &virt_dev
->cmd_list
);
3437 ret
= xhci_queue_reset_device(xhci
, slot_id
);
3439 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3440 list_del(&reset_device_cmd
->cmd_list
);
3441 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3442 goto command_cleanup
;
3444 xhci_ring_cmd_db(xhci
);
3445 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3447 /* Wait for the Reset Device command to finish */
3448 timeleft
= wait_for_completion_interruptible_timeout(
3449 reset_device_cmd
->completion
,
3450 USB_CTRL_SET_TIMEOUT
);
3451 if (timeleft
<= 0) {
3452 xhci_warn(xhci
, "%s while waiting for reset device command\n",
3453 timeleft
== 0 ? "Timeout" : "Signal");
3454 spin_lock_irqsave(&xhci
->lock
, flags
);
3455 /* The timeout might have raced with the event ring handler, so
3456 * only delete from the list if the item isn't poisoned.
3458 if (reset_device_cmd
->cmd_list
.next
!= LIST_POISON1
)
3459 list_del(&reset_device_cmd
->cmd_list
);
3460 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3462 goto command_cleanup
;
3465 /* The Reset Device command can't fail, according to the 0.95/0.96 spec,
3466 * unless we tried to reset a slot ID that wasn't enabled,
3467 * or the device wasn't in the addressed or configured state.
3469 ret
= reset_device_cmd
->status
;
3471 case COMP_EBADSLT
: /* 0.95 completion code for bad slot ID */
3472 case COMP_CTX_STATE
: /* 0.96 completion code for same thing */
3473 xhci_dbg(xhci
, "Can't reset device (slot ID %u) in %s state\n",
3475 xhci_get_slot_state(xhci
, virt_dev
->out_ctx
));
3476 xhci_dbg(xhci
, "Not freeing device rings.\n");
3477 /* Don't treat this as an error. May change my mind later. */
3479 goto command_cleanup
;
3481 xhci_dbg(xhci
, "Successful reset device command.\n");
3484 if (xhci_is_vendor_info_code(xhci
, ret
))
3486 xhci_warn(xhci
, "Unknown completion code %u for "
3487 "reset device command.\n", ret
);
3489 goto command_cleanup
;
3492 /* Free up host controller endpoint resources */
3493 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3494 spin_lock_irqsave(&xhci
->lock
, flags
);
3495 /* Don't delete the default control endpoint resources */
3496 xhci_free_device_endpoint_resources(xhci
, virt_dev
, false);
3497 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3500 /* Everything but endpoint 0 is disabled, so free or cache the rings. */
3501 last_freed_endpoint
= 1;
3502 for (i
= 1; i
< 31; ++i
) {
3503 struct xhci_virt_ep
*ep
= &virt_dev
->eps
[i
];
3505 if (ep
->ep_state
& EP_HAS_STREAMS
) {
3506 xhci_free_stream_info(xhci
, ep
->stream_info
);
3507 ep
->stream_info
= NULL
;
3508 ep
->ep_state
&= ~EP_HAS_STREAMS
;
3512 xhci_free_or_cache_endpoint_ring(xhci
, virt_dev
, i
);
3513 last_freed_endpoint
= i
;
3515 if (!list_empty(&virt_dev
->eps
[i
].bw_endpoint_list
))
3516 xhci_drop_ep_from_interval_table(xhci
,
3517 &virt_dev
->eps
[i
].bw_info
,
3522 xhci_clear_endpoint_bw_info(&virt_dev
->eps
[i
].bw_info
);
3524 /* If necessary, update the number of active TTs on this root port */
3525 xhci_update_tt_active_eps(xhci
, virt_dev
, old_active_eps
);
3527 xhci_dbg(xhci
, "Output context after successful reset device cmd:\n");
3528 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, last_freed_endpoint
);
3532 xhci_free_command(xhci
, reset_device_cmd
);
3537 * At this point, the struct usb_device is about to go away, the device has
3538 * disconnected, and all traffic has been stopped and the endpoints have been
3539 * disabled. Free any HC data structures associated with that device.
3541 void xhci_free_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3543 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3544 struct xhci_virt_device
*virt_dev
;
3545 unsigned long flags
;
3549 #ifndef CONFIG_USB_DEFAULT_PERSIST
3551 * We called pm_runtime_get_noresume when the device was attached.
3552 * Decrement the counter here to allow controller to runtime suspend
3553 * if no devices remain.
3555 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3556 pm_runtime_put_noidle(hcd
->self
.controller
);
3559 ret
= xhci_check_args(hcd
, udev
, NULL
, 0, true, __func__
);
3560 /* If the host is halted due to driver unload, we still need to free the
3563 if (ret
<= 0 && ret
!= -ENODEV
)
3566 virt_dev
= xhci
->devs
[udev
->slot_id
];
3568 /* Stop any wayward timer functions (which may grab the lock) */
3569 for (i
= 0; i
< 31; ++i
) {
3570 virt_dev
->eps
[i
].ep_state
&= ~EP_HALT_PENDING
;
3571 del_timer_sync(&virt_dev
->eps
[i
].stop_cmd_timer
);
3574 if (udev
->usb2_hw_lpm_enabled
) {
3575 xhci_set_usb2_hardware_lpm(hcd
, udev
, 0);
3576 udev
->usb2_hw_lpm_enabled
= 0;
3579 spin_lock_irqsave(&xhci
->lock
, flags
);
3580 /* Don't disable the slot if the host controller is dead. */
3581 state
= xhci_readl(xhci
, &xhci
->op_regs
->status
);
3582 if (state
== 0xffffffff || (xhci
->xhc_state
& XHCI_STATE_DYING
) ||
3583 (xhci
->xhc_state
& XHCI_STATE_HALTED
)) {
3584 xhci_free_virt_device(xhci
, udev
->slot_id
);
3585 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3589 if (xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
)) {
3590 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3591 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3594 xhci_ring_cmd_db(xhci
);
3595 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3597 * Event command completion handler will free any data structures
3598 * associated with the slot. XXX Can free sleep?
3603 * Checks if we have enough host controller resources for the default control
3606 * Must be called with xhci->lock held.
3608 static int xhci_reserve_host_control_ep_resources(struct xhci_hcd
*xhci
)
3610 if (xhci
->num_active_eps
+ 1 > xhci
->limit_active_eps
) {
3611 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3612 "Not enough ep ctxs: "
3613 "%u active, need to add 1, limit is %u.",
3614 xhci
->num_active_eps
, xhci
->limit_active_eps
);
3617 xhci
->num_active_eps
+= 1;
3618 xhci_dbg_trace(xhci
, trace_xhci_dbg_quirks
,
3619 "Adding 1 ep ctx, %u now active.",
3620 xhci
->num_active_eps
);
3626 * Returns 0 if the xHC ran out of device slots, the Enable Slot command
3627 * timed out, or allocating memory failed. Returns 1 on success.
3629 int xhci_alloc_dev(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3631 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3632 unsigned long flags
;
3635 union xhci_trb
*cmd_trb
;
3637 spin_lock_irqsave(&xhci
->lock
, flags
);
3638 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3639 ret
= xhci_queue_slot_control(xhci
, TRB_ENABLE_SLOT
, 0);
3641 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3642 xhci_dbg(xhci
, "FIXME: allocate a command ring segment\n");
3645 xhci_ring_cmd_db(xhci
);
3646 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3648 /* XXX: how much time for xHC slot assignment? */
3649 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3650 XHCI_CMD_DEFAULT_TIMEOUT
);
3651 if (timeleft
<= 0) {
3652 xhci_warn(xhci
, "%s while waiting for a slot\n",
3653 timeleft
== 0 ? "Timeout" : "Signal");
3654 /* cancel the enable slot request */
3655 return xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3658 if (!xhci
->slot_id
) {
3659 xhci_err(xhci
, "Error while assigning device slot ID\n");
3663 if ((xhci
->quirks
& XHCI_EP_LIMIT_QUIRK
)) {
3664 spin_lock_irqsave(&xhci
->lock
, flags
);
3665 ret
= xhci_reserve_host_control_ep_resources(xhci
);
3667 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3668 xhci_warn(xhci
, "Not enough host resources, "
3669 "active endpoint contexts = %u\n",
3670 xhci
->num_active_eps
);
3673 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3675 /* Use GFP_NOIO, since this function can be called from
3676 * xhci_discover_or_reset_device(), which may be called as part of
3677 * mass storage driver error handling.
3679 if (!xhci_alloc_virt_device(xhci
, xhci
->slot_id
, udev
, GFP_NOIO
)) {
3680 xhci_warn(xhci
, "Could not allocate xHCI USB device data structures\n");
3683 udev
->slot_id
= xhci
->slot_id
;
3685 #ifndef CONFIG_USB_DEFAULT_PERSIST
3687 * If resetting upon resume, we can't put the controller into runtime
3688 * suspend if there is a device attached.
3690 if (xhci
->quirks
& XHCI_RESET_ON_RESUME
)
3691 pm_runtime_get_noresume(hcd
->self
.controller
);
3694 /* Is this a LS or FS device under a HS hub? */
3695 /* Hub or peripherial? */
3699 /* Disable slot, if we can do it without mem alloc */
3700 spin_lock_irqsave(&xhci
->lock
, flags
);
3701 if (!xhci_queue_slot_control(xhci
, TRB_DISABLE_SLOT
, udev
->slot_id
))
3702 xhci_ring_cmd_db(xhci
);
3703 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3708 * Issue an Address Device command (which will issue a SetAddress request to
3710 * We should be protected by the usb_address0_mutex in khubd's hub_port_init, so
3711 * we should only issue and wait on one address command at the same time.
3713 * We add one to the device address issued by the hardware because the USB core
3714 * uses address 1 for the root hubs (even though they're not really devices).
3716 int xhci_address_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
3718 unsigned long flags
;
3720 struct xhci_virt_device
*virt_dev
;
3722 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3723 struct xhci_slot_ctx
*slot_ctx
;
3724 struct xhci_input_control_ctx
*ctrl_ctx
;
3726 union xhci_trb
*cmd_trb
;
3728 if (!udev
->slot_id
) {
3729 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3730 "Bad Slot ID %d", udev
->slot_id
);
3734 virt_dev
= xhci
->devs
[udev
->slot_id
];
3736 if (WARN_ON(!virt_dev
)) {
3738 * In plug/unplug torture test with an NEC controller,
3739 * a zero-dereference was observed once due to virt_dev = 0.
3740 * Print useful debug rather than crash if it is observed again!
3742 xhci_warn(xhci
, "Virt dev invalid for slot_id 0x%x!\n",
3747 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->in_ctx
);
3748 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, virt_dev
->in_ctx
);
3750 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3755 * If this is the first Set Address since device plug-in or
3756 * virt_device realloaction after a resume with an xHCI power loss,
3757 * then set up the slot context.
3759 if (!slot_ctx
->dev_info
)
3760 xhci_setup_addressable_virt_dev(xhci
, udev
);
3761 /* Otherwise, update the control endpoint ring enqueue pointer. */
3763 xhci_copy_ep0_dequeue_into_input_ctx(xhci
, udev
);
3764 ctrl_ctx
->add_flags
= cpu_to_le32(SLOT_FLAG
| EP0_FLAG
);
3765 ctrl_ctx
->drop_flags
= 0;
3767 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3768 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3769 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3770 slot_ctx
->dev_info
>> 27);
3772 spin_lock_irqsave(&xhci
->lock
, flags
);
3773 cmd_trb
= xhci_find_next_enqueue(xhci
->cmd_ring
);
3774 ret
= xhci_queue_address_device(xhci
, virt_dev
->in_ctx
->dma
,
3777 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3778 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3779 "FIXME: allocate a command ring segment");
3782 xhci_ring_cmd_db(xhci
);
3783 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3785 /* ctrl tx can take up to 5 sec; XXX: need more time for xHC? */
3786 timeleft
= wait_for_completion_interruptible_timeout(&xhci
->addr_dev
,
3787 XHCI_CMD_DEFAULT_TIMEOUT
);
3788 /* FIXME: From section 4.3.4: "Software shall be responsible for timing
3789 * the SetAddress() "recovery interval" required by USB and aborting the
3790 * command on a timeout.
3792 if (timeleft
<= 0) {
3793 xhci_warn(xhci
, "%s while waiting for address device command\n",
3794 timeleft
== 0 ? "Timeout" : "Signal");
3795 /* cancel the address device command */
3796 ret
= xhci_cancel_cmd(xhci
, NULL
, cmd_trb
);
3802 switch (virt_dev
->cmd_status
) {
3803 case COMP_CTX_STATE
:
3805 xhci_err(xhci
, "Setup ERROR: address device command for slot %d.\n",
3810 dev_warn(&udev
->dev
, "Device not responding to set address.\n");
3814 dev_warn(&udev
->dev
, "ERROR: Incompatible device for address "
3815 "device command.\n");
3819 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3820 "Successful Address Device command");
3823 xhci_err(xhci
, "ERROR: unexpected command completion "
3824 "code 0x%x.\n", virt_dev
->cmd_status
);
3825 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3826 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3827 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
, 1);
3834 temp_64
= xhci_read_64(xhci
, &xhci
->op_regs
->dcbaa_ptr
);
3835 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3836 "Op regs DCBAA ptr = %#016llx", temp_64
);
3837 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3838 "Slot ID %d dcbaa entry @%p = %#016llx",
3840 &xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
],
3841 (unsigned long long)
3842 le64_to_cpu(xhci
->dcbaa
->dev_context_ptrs
[udev
->slot_id
]));
3843 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3844 "Output Context DMA address = %#08llx",
3845 (unsigned long long)virt_dev
->out_ctx
->dma
);
3846 xhci_dbg(xhci
, "Slot ID %d Input Context:\n", udev
->slot_id
);
3847 xhci_dbg_ctx(xhci
, virt_dev
->in_ctx
, 2);
3848 trace_xhci_address_ctx(xhci
, virt_dev
->in_ctx
,
3849 slot_ctx
->dev_info
>> 27);
3850 xhci_dbg(xhci
, "Slot ID %d Output Context:\n", udev
->slot_id
);
3851 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 2);
3853 * USB core uses address 1 for the roothubs, so we add one to the
3854 * address given back to us by the HC.
3856 slot_ctx
= xhci_get_slot_ctx(xhci
, virt_dev
->out_ctx
);
3857 trace_xhci_address_ctx(xhci
, virt_dev
->out_ctx
,
3858 slot_ctx
->dev_info
>> 27);
3859 /* Use kernel assigned address for devices; store xHC assigned
3860 * address locally. */
3861 virt_dev
->address
= (le32_to_cpu(slot_ctx
->dev_state
) & DEV_ADDR_MASK
)
3863 /* Zero the input context control for later use */
3864 ctrl_ctx
->add_flags
= 0;
3865 ctrl_ctx
->drop_flags
= 0;
3867 xhci_dbg_trace(xhci
, trace_xhci_dbg_address
,
3868 "Internal device address = %d", virt_dev
->address
);
3874 * Transfer the port index into real index in the HW port status
3875 * registers. Caculate offset between the port's PORTSC register
3876 * and port status base. Divide the number of per port register
3877 * to get the real index. The raw port number bases 1.
3879 int xhci_find_raw_port_number(struct usb_hcd
*hcd
, int port1
)
3881 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
3882 __le32 __iomem
*base_addr
= &xhci
->op_regs
->port_status_base
;
3883 __le32 __iomem
*addr
;
3886 if (hcd
->speed
!= HCD_USB3
)
3887 addr
= xhci
->usb2_ports
[port1
- 1];
3889 addr
= xhci
->usb3_ports
[port1
- 1];
3891 raw_port
= (addr
- base_addr
)/NUM_PORT_REGS
+ 1;
3896 * Issue an Evaluate Context command to change the Maximum Exit Latency in the
3897 * slot context. If that succeeds, store the new MEL in the xhci_virt_device.
3899 static int __maybe_unused
xhci_change_max_exit_latency(struct xhci_hcd
*xhci
,
3900 struct usb_device
*udev
, u16 max_exit_latency
)
3902 struct xhci_virt_device
*virt_dev
;
3903 struct xhci_command
*command
;
3904 struct xhci_input_control_ctx
*ctrl_ctx
;
3905 struct xhci_slot_ctx
*slot_ctx
;
3906 unsigned long flags
;
3909 spin_lock_irqsave(&xhci
->lock
, flags
);
3910 if (max_exit_latency
== xhci
->devs
[udev
->slot_id
]->current_mel
) {
3911 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3915 /* Attempt to issue an Evaluate Context command to change the MEL. */
3916 virt_dev
= xhci
->devs
[udev
->slot_id
];
3917 command
= xhci
->lpm_command
;
3918 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, command
->in_ctx
);
3920 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3921 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
3926 xhci_slot_copy(xhci
, command
->in_ctx
, virt_dev
->out_ctx
);
3927 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3929 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
3930 slot_ctx
= xhci_get_slot_ctx(xhci
, command
->in_ctx
);
3931 slot_ctx
->dev_info2
&= cpu_to_le32(~((u32
) MAX_EXIT
));
3932 slot_ctx
->dev_info2
|= cpu_to_le32(max_exit_latency
);
3934 xhci_dbg_trace(xhci
, trace_xhci_dbg_context_change
,
3935 "Set up evaluate context for LPM MEL change.");
3936 xhci_dbg(xhci
, "Slot %u Input Context:\n", udev
->slot_id
);
3937 xhci_dbg_ctx(xhci
, command
->in_ctx
, 0);
3939 /* Issue and wait for the evaluate context command. */
3940 ret
= xhci_configure_endpoint(xhci
, udev
, command
,
3942 xhci_dbg(xhci
, "Slot %u Output Context:\n", udev
->slot_id
);
3943 xhci_dbg_ctx(xhci
, virt_dev
->out_ctx
, 0);
3946 spin_lock_irqsave(&xhci
->lock
, flags
);
3947 virt_dev
->current_mel
= max_exit_latency
;
3948 spin_unlock_irqrestore(&xhci
->lock
, flags
);
3953 #ifdef CONFIG_PM_RUNTIME
3955 /* BESL to HIRD Encoding array for USB2 LPM */
3956 static int xhci_besl_encoding
[16] = {125, 150, 200, 300, 400, 500, 1000, 2000,
3957 3000, 4000, 5000, 6000, 7000, 8000, 9000, 10000};
3959 /* Calculate HIRD/BESL for USB2 PORTPMSC*/
3960 static int xhci_calculate_hird_besl(struct xhci_hcd
*xhci
,
3961 struct usb_device
*udev
)
3963 int u2del
, besl
, besl_host
;
3964 int besl_device
= 0;
3967 u2del
= HCS_U2_LATENCY(xhci
->hcs_params3
);
3968 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
3970 if (field
& USB_BESL_SUPPORT
) {
3971 for (besl_host
= 0; besl_host
< 16; besl_host
++) {
3972 if (xhci_besl_encoding
[besl_host
] >= u2del
)
3975 /* Use baseline BESL value as default */
3976 if (field
& USB_BESL_BASELINE_VALID
)
3977 besl_device
= USB_GET_BESL_BASELINE(field
);
3978 else if (field
& USB_BESL_DEEP_VALID
)
3979 besl_device
= USB_GET_BESL_DEEP(field
);
3984 besl_host
= (u2del
- 51) / 75 + 1;
3987 besl
= besl_host
+ besl_device
;
3994 /* Calculate BESLD, L1 timeout and HIRDM for USB2 PORTHLPMC */
3995 static int xhci_calculate_usb2_hw_lpm_params(struct usb_device
*udev
)
4002 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4004 /* xHCI l1 is set in steps of 256us, xHCI 1.0 section 5.4.11.2 */
4005 l1
= udev
->l1_params
.timeout
/ 256;
4007 /* device has preferred BESLD */
4008 if (field
& USB_BESL_DEEP_VALID
) {
4009 besld
= USB_GET_BESL_DEEP(field
);
4013 return PORT_BESLD(besld
) | PORT_L1_TIMEOUT(l1
) | PORT_HIRDM(hirdm
);
4016 static int xhci_usb2_software_lpm_test(struct usb_hcd
*hcd
,
4017 struct usb_device
*udev
)
4019 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4020 struct dev_info
*dev_info
;
4021 __le32 __iomem
**port_array
;
4022 __le32 __iomem
*addr
, *pm_addr
;
4024 unsigned int port_num
;
4025 unsigned long flags
;
4029 if (hcd
->speed
== HCD_USB3
|| !xhci
->sw_lpm_support
||
4033 /* we only support lpm for non-hub device connected to root hub yet */
4034 if (!udev
->parent
|| udev
->parent
->parent
||
4035 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4038 spin_lock_irqsave(&xhci
->lock
, flags
);
4040 /* Look for devices in lpm_failed_devs list */
4041 dev_id
= le16_to_cpu(udev
->descriptor
.idVendor
) << 16 |
4042 le16_to_cpu(udev
->descriptor
.idProduct
);
4043 list_for_each_entry(dev_info
, &xhci
->lpm_failed_devs
, list
) {
4044 if (dev_info
->dev_id
== dev_id
) {
4050 port_array
= xhci
->usb2_ports
;
4051 port_num
= udev
->portnum
- 1;
4053 if (port_num
> HCS_MAX_PORTS(xhci
->hcs_params1
)) {
4054 xhci_dbg(xhci
, "invalid port number %d\n", udev
->portnum
);
4060 * Test USB 2.0 software LPM.
4061 * FIXME: some xHCI 1.0 hosts may implement a new register to set up
4062 * hardware-controlled USB 2.0 LPM. See section 5.4.11 and 4.23.5.1.1.1
4063 * in the June 2011 errata release.
4065 xhci_dbg(xhci
, "test port %d software LPM\n", port_num
);
4067 * Set L1 Device Slot and HIRD/BESL.
4068 * Check device's USB 2.0 extension descriptor to determine whether
4069 * HIRD or BESL shoule be used. See USB2.0 LPM errata.
4071 pm_addr
= port_array
[port_num
] + PORTPMSC
;
4072 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4073 temp
= PORT_L1DS(udev
->slot_id
) | PORT_HIRD(hird
);
4074 xhci_writel(xhci
, temp
, pm_addr
);
4076 /* Set port link state to U2(L1) */
4077 addr
= port_array
[port_num
];
4078 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U2
);
4081 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4083 spin_lock_irqsave(&xhci
->lock
, flags
);
4085 /* Check L1 Status */
4086 ret
= xhci_handshake(xhci
, pm_addr
,
4087 PORT_L1S_MASK
, PORT_L1S_SUCCESS
, 125);
4088 if (ret
!= -ETIMEDOUT
) {
4089 /* enter L1 successfully */
4090 temp
= xhci_readl(xhci
, addr
);
4091 xhci_dbg(xhci
, "port %d entered L1 state, port status 0x%x\n",
4095 temp
= xhci_readl(xhci
, pm_addr
);
4096 xhci_dbg(xhci
, "port %d software lpm failed, L1 status %d\n",
4097 port_num
, temp
& PORT_L1S_MASK
);
4101 /* Resume the port */
4102 xhci_set_link_state(xhci
, port_array
, port_num
, XDEV_U0
);
4104 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4106 spin_lock_irqsave(&xhci
->lock
, flags
);
4109 xhci_test_and_clear_bit(xhci
, port_array
, port_num
, PORT_PLC
);
4111 /* Check PORTSC to make sure the device is in the right state */
4113 temp
= xhci_readl(xhci
, addr
);
4114 xhci_dbg(xhci
, "resumed port %d status 0x%x\n", port_num
, temp
);
4115 if (!(temp
& PORT_CONNECT
) || !(temp
& PORT_PE
) ||
4116 (temp
& PORT_PLS_MASK
) != XDEV_U0
) {
4117 xhci_dbg(xhci
, "port L1 resume fail\n");
4123 /* Insert dev to lpm_failed_devs list */
4124 xhci_warn(xhci
, "device LPM test failed, may disconnect and "
4126 dev_info
= kzalloc(sizeof(struct dev_info
), GFP_ATOMIC
);
4131 dev_info
->dev_id
= dev_id
;
4132 INIT_LIST_HEAD(&dev_info
->list
);
4133 list_add(&dev_info
->list
, &xhci
->lpm_failed_devs
);
4135 xhci_ring_device(xhci
, udev
->slot_id
);
4139 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4143 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4144 struct usb_device
*udev
, int enable
)
4146 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4147 __le32 __iomem
**port_array
;
4148 __le32 __iomem
*pm_addr
, *hlpm_addr
;
4149 u32 pm_val
, hlpm_val
, field
;
4150 unsigned int port_num
;
4151 unsigned long flags
;
4152 int hird
, exit_latency
;
4155 if (hcd
->speed
== HCD_USB3
|| !xhci
->hw_lpm_support
||
4159 if (!udev
->parent
|| udev
->parent
->parent
||
4160 udev
->descriptor
.bDeviceClass
== USB_CLASS_HUB
)
4163 if (udev
->usb2_hw_lpm_capable
!= 1)
4166 spin_lock_irqsave(&xhci
->lock
, flags
);
4168 port_array
= xhci
->usb2_ports
;
4169 port_num
= udev
->portnum
- 1;
4170 pm_addr
= port_array
[port_num
] + PORTPMSC
;
4171 pm_val
= xhci_readl(xhci
, pm_addr
);
4172 hlpm_addr
= port_array
[port_num
] + PORTHLPMC
;
4173 field
= le32_to_cpu(udev
->bos
->ext_cap
->bmAttributes
);
4175 xhci_dbg(xhci
, "%s port %d USB2 hardware LPM\n",
4176 enable
? "enable" : "disable", port_num
);
4179 /* Host supports BESL timeout instead of HIRD */
4180 if (udev
->usb2_hw_lpm_besl_capable
) {
4181 /* if device doesn't have a preferred BESL value use a
4182 * default one which works with mixed HIRD and BESL
4183 * systems. See XHCI_DEFAULT_BESL definition in xhci.h
4185 if ((field
& USB_BESL_SUPPORT
) &&
4186 (field
& USB_BESL_BASELINE_VALID
))
4187 hird
= USB_GET_BESL_BASELINE(field
);
4189 hird
= udev
->l1_params
.besl
;
4191 exit_latency
= xhci_besl_encoding
[hird
];
4192 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4194 /* USB 3.0 code dedicate one xhci->lpm_command->in_ctx
4195 * input context for link powermanagement evaluate
4196 * context commands. It is protected by hcd->bandwidth
4197 * mutex and is shared by all devices. We need to set
4198 * the max ext latency in USB 2 BESL LPM as well, so
4199 * use the same mutex and xhci_change_max_exit_latency()
4201 mutex_lock(hcd
->bandwidth_mutex
);
4202 ret
= xhci_change_max_exit_latency(xhci
, udev
,
4204 mutex_unlock(hcd
->bandwidth_mutex
);
4208 spin_lock_irqsave(&xhci
->lock
, flags
);
4210 hlpm_val
= xhci_calculate_usb2_hw_lpm_params(udev
);
4211 xhci_writel(xhci
, hlpm_val
, hlpm_addr
);
4213 xhci_readl(xhci
, hlpm_addr
);
4215 hird
= xhci_calculate_hird_besl(xhci
, udev
);
4218 pm_val
&= ~PORT_HIRD_MASK
;
4219 pm_val
|= PORT_HIRD(hird
) | PORT_RWE
;
4220 xhci_writel(xhci
, pm_val
, pm_addr
);
4221 pm_val
= xhci_readl(xhci
, pm_addr
);
4223 xhci_writel(xhci
, pm_val
, pm_addr
);
4225 xhci_readl(xhci
, pm_addr
);
4227 pm_val
&= ~(PORT_HLE
| PORT_RWE
| PORT_HIRD_MASK
);
4228 xhci_writel(xhci
, pm_val
, pm_addr
);
4230 xhci_readl(xhci
, pm_addr
);
4231 if (udev
->usb2_hw_lpm_besl_capable
) {
4232 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4233 mutex_lock(hcd
->bandwidth_mutex
);
4234 xhci_change_max_exit_latency(xhci
, udev
, 0);
4235 mutex_unlock(hcd
->bandwidth_mutex
);
4240 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4244 /* check if a usb2 port supports a given extened capability protocol
4245 * only USB2 ports extended protocol capability values are cached.
4246 * Return 1 if capability is supported
4248 static int xhci_check_usb2_port_capability(struct xhci_hcd
*xhci
, int port
,
4249 unsigned capability
)
4251 u32 port_offset
, port_count
;
4254 for (i
= 0; i
< xhci
->num_ext_caps
; i
++) {
4255 if (xhci
->ext_caps
[i
] & capability
) {
4256 /* port offsets starts at 1 */
4257 port_offset
= XHCI_EXT_PORT_OFF(xhci
->ext_caps
[i
]) - 1;
4258 port_count
= XHCI_EXT_PORT_COUNT(xhci
->ext_caps
[i
]);
4259 if (port
>= port_offset
&&
4260 port
< port_offset
+ port_count
)
4267 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4269 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4271 int portnum
= udev
->portnum
- 1;
4273 ret
= xhci_usb2_software_lpm_test(hcd
, udev
);
4275 xhci_dbg(xhci
, "software LPM test succeed\n");
4276 if (xhci
->hw_lpm_support
== 1 &&
4277 xhci_check_usb2_port_capability(xhci
, portnum
, XHCI_HLC
)) {
4278 udev
->usb2_hw_lpm_capable
= 1;
4279 udev
->l1_params
.timeout
= XHCI_L1_TIMEOUT
;
4280 udev
->l1_params
.besl
= XHCI_DEFAULT_BESL
;
4281 if (xhci_check_usb2_port_capability(xhci
, portnum
,
4283 udev
->usb2_hw_lpm_besl_capable
= 1;
4284 ret
= xhci_set_usb2_hardware_lpm(hcd
, udev
, 1);
4286 udev
->usb2_hw_lpm_enabled
= 1;
4295 int xhci_set_usb2_hardware_lpm(struct usb_hcd
*hcd
,
4296 struct usb_device
*udev
, int enable
)
4301 int xhci_update_device(struct usb_hcd
*hcd
, struct usb_device
*udev
)
4306 #endif /* CONFIG_PM_RUNTIME */
4308 /*---------------------- USB 3.0 Link PM functions ------------------------*/
4311 /* Service interval in nanoseconds = 2^(bInterval - 1) * 125us * 1000ns / 1us */
4312 static unsigned long long xhci_service_interval_to_ns(
4313 struct usb_endpoint_descriptor
*desc
)
4315 return (1ULL << (desc
->bInterval
- 1)) * 125 * 1000;
4318 static u16
xhci_get_timeout_no_hub_lpm(struct usb_device
*udev
,
4319 enum usb3_link_state state
)
4321 unsigned long long sel
;
4322 unsigned long long pel
;
4323 unsigned int max_sel_pel
;
4328 /* Convert SEL and PEL stored in nanoseconds to microseconds */
4329 sel
= DIV_ROUND_UP(udev
->u1_params
.sel
, 1000);
4330 pel
= DIV_ROUND_UP(udev
->u1_params
.pel
, 1000);
4331 max_sel_pel
= USB3_LPM_MAX_U1_SEL_PEL
;
4335 sel
= DIV_ROUND_UP(udev
->u2_params
.sel
, 1000);
4336 pel
= DIV_ROUND_UP(udev
->u2_params
.pel
, 1000);
4337 max_sel_pel
= USB3_LPM_MAX_U2_SEL_PEL
;
4341 dev_warn(&udev
->dev
, "%s: Can't get timeout for non-U1 or U2 state.\n",
4343 return USB3_LPM_DISABLED
;
4346 if (sel
<= max_sel_pel
&& pel
<= max_sel_pel
)
4347 return USB3_LPM_DEVICE_INITIATED
;
4349 if (sel
> max_sel_pel
)
4350 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4351 "due to long SEL %llu ms\n",
4354 dev_dbg(&udev
->dev
, "Device-initiated %s disabled "
4355 "due to long PEL %llu ms\n",
4357 return USB3_LPM_DISABLED
;
4360 /* Returns the hub-encoded U1 timeout value.
4361 * The U1 timeout should be the maximum of the following values:
4362 * - For control endpoints, U1 system exit latency (SEL) * 3
4363 * - For bulk endpoints, U1 SEL * 5
4364 * - For interrupt endpoints:
4365 * - Notification EPs, U1 SEL * 3
4366 * - Periodic EPs, max(105% of bInterval, U1 SEL * 2)
4367 * - For isochronous endpoints, max(105% of bInterval, U1 SEL * 2)
4369 static u16
xhci_calculate_intel_u1_timeout(struct usb_device
*udev
,
4370 struct usb_endpoint_descriptor
*desc
)
4372 unsigned long long timeout_ns
;
4376 ep_type
= usb_endpoint_type(desc
);
4378 case USB_ENDPOINT_XFER_CONTROL
:
4379 timeout_ns
= udev
->u1_params
.sel
* 3;
4381 case USB_ENDPOINT_XFER_BULK
:
4382 timeout_ns
= udev
->u1_params
.sel
* 5;
4384 case USB_ENDPOINT_XFER_INT
:
4385 intr_type
= usb_endpoint_interrupt_type(desc
);
4386 if (intr_type
== USB_ENDPOINT_INTR_NOTIFICATION
) {
4387 timeout_ns
= udev
->u1_params
.sel
* 3;
4390 /* Otherwise the calculation is the same as isoc eps */
4391 case USB_ENDPOINT_XFER_ISOC
:
4392 timeout_ns
= xhci_service_interval_to_ns(desc
);
4393 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
* 105, 100);
4394 if (timeout_ns
< udev
->u1_params
.sel
* 2)
4395 timeout_ns
= udev
->u1_params
.sel
* 2;
4401 /* The U1 timeout is encoded in 1us intervals. */
4402 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 1000);
4403 /* Don't return a timeout of zero, because that's USB3_LPM_DISABLED. */
4404 if (timeout_ns
== USB3_LPM_DISABLED
)
4407 /* If the necessary timeout value is bigger than what we can set in the
4408 * USB 3.0 hub, we have to disable hub-initiated U1.
4410 if (timeout_ns
<= USB3_LPM_U1_MAX_TIMEOUT
)
4412 dev_dbg(&udev
->dev
, "Hub-initiated U1 disabled "
4413 "due to long timeout %llu ms\n", timeout_ns
);
4414 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U1
);
4417 /* Returns the hub-encoded U2 timeout value.
4418 * The U2 timeout should be the maximum of:
4419 * - 10 ms (to avoid the bandwidth impact on the scheduler)
4420 * - largest bInterval of any active periodic endpoint (to avoid going
4421 * into lower power link states between intervals).
4422 * - the U2 Exit Latency of the device
4424 static u16
xhci_calculate_intel_u2_timeout(struct usb_device
*udev
,
4425 struct usb_endpoint_descriptor
*desc
)
4427 unsigned long long timeout_ns
;
4428 unsigned long long u2_del_ns
;
4430 timeout_ns
= 10 * 1000 * 1000;
4432 if ((usb_endpoint_xfer_int(desc
) || usb_endpoint_xfer_isoc(desc
)) &&
4433 (xhci_service_interval_to_ns(desc
) > timeout_ns
))
4434 timeout_ns
= xhci_service_interval_to_ns(desc
);
4436 u2_del_ns
= le16_to_cpu(udev
->bos
->ss_cap
->bU2DevExitLat
) * 1000ULL;
4437 if (u2_del_ns
> timeout_ns
)
4438 timeout_ns
= u2_del_ns
;
4440 /* The U2 timeout is encoded in 256us intervals */
4441 timeout_ns
= DIV_ROUND_UP_ULL(timeout_ns
, 256 * 1000);
4442 /* If the necessary timeout value is bigger than what we can set in the
4443 * USB 3.0 hub, we have to disable hub-initiated U2.
4445 if (timeout_ns
<= USB3_LPM_U2_MAX_TIMEOUT
)
4447 dev_dbg(&udev
->dev
, "Hub-initiated U2 disabled "
4448 "due to long timeout %llu ms\n", timeout_ns
);
4449 return xhci_get_timeout_no_hub_lpm(udev
, USB3_LPM_U2
);
4452 static u16
xhci_call_host_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4453 struct usb_device
*udev
,
4454 struct usb_endpoint_descriptor
*desc
,
4455 enum usb3_link_state state
,
4458 if (state
== USB3_LPM_U1
) {
4459 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4460 return xhci_calculate_intel_u1_timeout(udev
, desc
);
4462 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4463 return xhci_calculate_intel_u2_timeout(udev
, desc
);
4466 return USB3_LPM_DISABLED
;
4469 static int xhci_update_timeout_for_endpoint(struct xhci_hcd
*xhci
,
4470 struct usb_device
*udev
,
4471 struct usb_endpoint_descriptor
*desc
,
4472 enum usb3_link_state state
,
4477 alt_timeout
= xhci_call_host_update_timeout_for_endpoint(xhci
, udev
,
4478 desc
, state
, timeout
);
4480 /* If we found we can't enable hub-initiated LPM, or
4481 * the U1 or U2 exit latency was too high to allow
4482 * device-initiated LPM as well, just stop searching.
4484 if (alt_timeout
== USB3_LPM_DISABLED
||
4485 alt_timeout
== USB3_LPM_DEVICE_INITIATED
) {
4486 *timeout
= alt_timeout
;
4489 if (alt_timeout
> *timeout
)
4490 *timeout
= alt_timeout
;
4494 static int xhci_update_timeout_for_interface(struct xhci_hcd
*xhci
,
4495 struct usb_device
*udev
,
4496 struct usb_host_interface
*alt
,
4497 enum usb3_link_state state
,
4502 for (j
= 0; j
< alt
->desc
.bNumEndpoints
; j
++) {
4503 if (xhci_update_timeout_for_endpoint(xhci
, udev
,
4504 &alt
->endpoint
[j
].desc
, state
, timeout
))
4511 static int xhci_check_intel_tier_policy(struct usb_device
*udev
,
4512 enum usb3_link_state state
)
4514 struct usb_device
*parent
;
4515 unsigned int num_hubs
;
4517 if (state
== USB3_LPM_U2
)
4520 /* Don't enable U1 if the device is on a 2nd tier hub or lower. */
4521 for (parent
= udev
->parent
, num_hubs
= 0; parent
->parent
;
4522 parent
= parent
->parent
)
4528 dev_dbg(&udev
->dev
, "Disabling U1 link state for device"
4529 " below second-tier hub.\n");
4530 dev_dbg(&udev
->dev
, "Plug device into first-tier hub "
4531 "to decrease power consumption.\n");
4535 static int xhci_check_tier_policy(struct xhci_hcd
*xhci
,
4536 struct usb_device
*udev
,
4537 enum usb3_link_state state
)
4539 if (xhci
->quirks
& XHCI_INTEL_HOST
)
4540 return xhci_check_intel_tier_policy(udev
, state
);
4544 /* Returns the U1 or U2 timeout that should be enabled.
4545 * If the tier check or timeout setting functions return with a non-zero exit
4546 * code, that means the timeout value has been finalized and we shouldn't look
4547 * at any more endpoints.
4549 static u16
xhci_calculate_lpm_timeout(struct usb_hcd
*hcd
,
4550 struct usb_device
*udev
, enum usb3_link_state state
)
4552 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4553 struct usb_host_config
*config
;
4556 u16 timeout
= USB3_LPM_DISABLED
;
4558 if (state
== USB3_LPM_U1
)
4560 else if (state
== USB3_LPM_U2
)
4563 dev_warn(&udev
->dev
, "Can't enable unknown link state %i\n",
4568 if (xhci_check_tier_policy(xhci
, udev
, state
) < 0)
4571 /* Gather some information about the currently installed configuration
4572 * and alternate interface settings.
4574 if (xhci_update_timeout_for_endpoint(xhci
, udev
, &udev
->ep0
.desc
,
4578 config
= udev
->actconfig
;
4582 for (i
= 0; i
< USB_MAXINTERFACES
; i
++) {
4583 struct usb_driver
*driver
;
4584 struct usb_interface
*intf
= config
->interface
[i
];
4589 /* Check if any currently bound drivers want hub-initiated LPM
4592 if (intf
->dev
.driver
) {
4593 driver
= to_usb_driver(intf
->dev
.driver
);
4594 if (driver
&& driver
->disable_hub_initiated_lpm
) {
4595 dev_dbg(&udev
->dev
, "Hub-initiated %s disabled "
4596 "at request of driver %s\n",
4597 state_name
, driver
->name
);
4598 return xhci_get_timeout_no_hub_lpm(udev
, state
);
4602 /* Not sure how this could happen... */
4603 if (!intf
->cur_altsetting
)
4606 if (xhci_update_timeout_for_interface(xhci
, udev
,
4607 intf
->cur_altsetting
,
4614 static int calculate_max_exit_latency(struct usb_device
*udev
,
4615 enum usb3_link_state state_changed
,
4616 u16 hub_encoded_timeout
)
4618 unsigned long long u1_mel_us
= 0;
4619 unsigned long long u2_mel_us
= 0;
4620 unsigned long long mel_us
= 0;
4626 disabling_u1
= (state_changed
== USB3_LPM_U1
&&
4627 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4628 disabling_u2
= (state_changed
== USB3_LPM_U2
&&
4629 hub_encoded_timeout
== USB3_LPM_DISABLED
);
4631 enabling_u1
= (state_changed
== USB3_LPM_U1
&&
4632 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4633 enabling_u2
= (state_changed
== USB3_LPM_U2
&&
4634 hub_encoded_timeout
!= USB3_LPM_DISABLED
);
4636 /* If U1 was already enabled and we're not disabling it,
4637 * or we're going to enable U1, account for the U1 max exit latency.
4639 if ((udev
->u1_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u1
) ||
4641 u1_mel_us
= DIV_ROUND_UP(udev
->u1_params
.mel
, 1000);
4642 if ((udev
->u2_params
.timeout
!= USB3_LPM_DISABLED
&& !disabling_u2
) ||
4644 u2_mel_us
= DIV_ROUND_UP(udev
->u2_params
.mel
, 1000);
4646 if (u1_mel_us
> u2_mel_us
)
4650 /* xHCI host controller max exit latency field is only 16 bits wide. */
4651 if (mel_us
> MAX_EXIT
) {
4652 dev_warn(&udev
->dev
, "Link PM max exit latency of %lluus "
4653 "is too big.\n", mel_us
);
4659 /* Returns the USB3 hub-encoded value for the U1/U2 timeout. */
4660 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4661 struct usb_device
*udev
, enum usb3_link_state state
)
4663 struct xhci_hcd
*xhci
;
4664 u16 hub_encoded_timeout
;
4668 xhci
= hcd_to_xhci(hcd
);
4669 /* The LPM timeout values are pretty host-controller specific, so don't
4670 * enable hub-initiated timeouts unless the vendor has provided
4671 * information about their timeout algorithm.
4673 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4674 !xhci
->devs
[udev
->slot_id
])
4675 return USB3_LPM_DISABLED
;
4677 hub_encoded_timeout
= xhci_calculate_lpm_timeout(hcd
, udev
, state
);
4678 mel
= calculate_max_exit_latency(udev
, state
, hub_encoded_timeout
);
4680 /* Max Exit Latency is too big, disable LPM. */
4681 hub_encoded_timeout
= USB3_LPM_DISABLED
;
4685 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4688 return hub_encoded_timeout
;
4691 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4692 struct usb_device
*udev
, enum usb3_link_state state
)
4694 struct xhci_hcd
*xhci
;
4698 xhci
= hcd_to_xhci(hcd
);
4699 if (!xhci
|| !(xhci
->quirks
& XHCI_LPM_SUPPORT
) ||
4700 !xhci
->devs
[udev
->slot_id
])
4703 mel
= calculate_max_exit_latency(udev
, state
, USB3_LPM_DISABLED
);
4704 ret
= xhci_change_max_exit_latency(xhci
, udev
, mel
);
4709 #else /* CONFIG_PM */
4711 int xhci_enable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4712 struct usb_device
*udev
, enum usb3_link_state state
)
4714 return USB3_LPM_DISABLED
;
4717 int xhci_disable_usb3_lpm_timeout(struct usb_hcd
*hcd
,
4718 struct usb_device
*udev
, enum usb3_link_state state
)
4722 #endif /* CONFIG_PM */
4724 /*-------------------------------------------------------------------------*/
4726 /* Once a hub descriptor is fetched for a device, we need to update the xHC's
4727 * internal data structures for the device.
4729 int xhci_update_hub_device(struct usb_hcd
*hcd
, struct usb_device
*hdev
,
4730 struct usb_tt
*tt
, gfp_t mem_flags
)
4732 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4733 struct xhci_virt_device
*vdev
;
4734 struct xhci_command
*config_cmd
;
4735 struct xhci_input_control_ctx
*ctrl_ctx
;
4736 struct xhci_slot_ctx
*slot_ctx
;
4737 unsigned long flags
;
4738 unsigned think_time
;
4741 /* Ignore root hubs */
4745 vdev
= xhci
->devs
[hdev
->slot_id
];
4747 xhci_warn(xhci
, "Cannot update hub desc for unknown device.\n");
4750 config_cmd
= xhci_alloc_command(xhci
, true, true, mem_flags
);
4752 xhci_dbg(xhci
, "Could not allocate xHCI command structure.\n");
4755 ctrl_ctx
= xhci_get_input_control_ctx(xhci
, config_cmd
->in_ctx
);
4757 xhci_warn(xhci
, "%s: Could not get input context, bad type.\n",
4759 xhci_free_command(xhci
, config_cmd
);
4763 spin_lock_irqsave(&xhci
->lock
, flags
);
4764 if (hdev
->speed
== USB_SPEED_HIGH
&&
4765 xhci_alloc_tt_info(xhci
, vdev
, hdev
, tt
, GFP_ATOMIC
)) {
4766 xhci_dbg(xhci
, "Could not allocate xHCI TT structure.\n");
4767 xhci_free_command(xhci
, config_cmd
);
4768 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4772 xhci_slot_copy(xhci
, config_cmd
->in_ctx
, vdev
->out_ctx
);
4773 ctrl_ctx
->add_flags
|= cpu_to_le32(SLOT_FLAG
);
4774 slot_ctx
= xhci_get_slot_ctx(xhci
, config_cmd
->in_ctx
);
4775 slot_ctx
->dev_info
|= cpu_to_le32(DEV_HUB
);
4777 slot_ctx
->dev_info
|= cpu_to_le32(DEV_MTT
);
4778 if (xhci
->hci_version
> 0x95) {
4779 xhci_dbg(xhci
, "xHCI version %x needs hub "
4780 "TT think time and number of ports\n",
4781 (unsigned int) xhci
->hci_version
);
4782 slot_ctx
->dev_info2
|= cpu_to_le32(XHCI_MAX_PORTS(hdev
->maxchild
));
4783 /* Set TT think time - convert from ns to FS bit times.
4784 * 0 = 8 FS bit times, 1 = 16 FS bit times,
4785 * 2 = 24 FS bit times, 3 = 32 FS bit times.
4787 * xHCI 1.0: this field shall be 0 if the device is not a
4790 think_time
= tt
->think_time
;
4791 if (think_time
!= 0)
4792 think_time
= (think_time
/ 666) - 1;
4793 if (xhci
->hci_version
< 0x100 || hdev
->speed
== USB_SPEED_HIGH
)
4794 slot_ctx
->tt_info
|=
4795 cpu_to_le32(TT_THINK_TIME(think_time
));
4797 xhci_dbg(xhci
, "xHCI version %x doesn't need hub "
4798 "TT think time or number of ports\n",
4799 (unsigned int) xhci
->hci_version
);
4801 slot_ctx
->dev_state
= 0;
4802 spin_unlock_irqrestore(&xhci
->lock
, flags
);
4804 xhci_dbg(xhci
, "Set up %s for hub device.\n",
4805 (xhci
->hci_version
> 0x95) ?
4806 "configure endpoint" : "evaluate context");
4807 xhci_dbg(xhci
, "Slot %u Input Context:\n", hdev
->slot_id
);
4808 xhci_dbg_ctx(xhci
, config_cmd
->in_ctx
, 0);
4810 /* Issue and wait for the configure endpoint or
4811 * evaluate context command.
4813 if (xhci
->hci_version
> 0x95)
4814 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4817 ret
= xhci_configure_endpoint(xhci
, hdev
, config_cmd
,
4820 xhci_dbg(xhci
, "Slot %u Output Context:\n", hdev
->slot_id
);
4821 xhci_dbg_ctx(xhci
, vdev
->out_ctx
, 0);
4823 xhci_free_command(xhci
, config_cmd
);
4827 int xhci_get_frame(struct usb_hcd
*hcd
)
4829 struct xhci_hcd
*xhci
= hcd_to_xhci(hcd
);
4830 /* EHCI mods by the periodic size. Why? */
4831 return xhci_readl(xhci
, &xhci
->run_regs
->microframe_index
) >> 3;
4834 int xhci_gen_setup(struct usb_hcd
*hcd
, xhci_get_quirks_t get_quirks
)
4836 struct xhci_hcd
*xhci
;
4837 struct device
*dev
= hcd
->self
.controller
;
4840 /* Accept arbitrarily long scatter-gather lists */
4841 hcd
->self
.sg_tablesize
= ~0;
4843 /* support to build packet from discontinuous buffers */
4844 hcd
->self
.no_sg_constraint
= 1;
4846 /* XHCI controllers don't stop the ep queue on short packets :| */
4847 hcd
->self
.no_stop_on_short
= 1;
4849 if (usb_hcd_is_primary_hcd(hcd
)) {
4850 xhci
= kzalloc(sizeof(struct xhci_hcd
), GFP_KERNEL
);
4853 *((struct xhci_hcd
**) hcd
->hcd_priv
) = xhci
;
4854 xhci
->main_hcd
= hcd
;
4855 /* Mark the first roothub as being USB 2.0.
4856 * The xHCI driver will register the USB 3.0 roothub.
4858 hcd
->speed
= HCD_USB2
;
4859 hcd
->self
.root_hub
->speed
= USB_SPEED_HIGH
;
4861 * USB 2.0 roothub under xHCI has an integrated TT,
4862 * (rate matching hub) as opposed to having an OHCI/UHCI
4863 * companion controller.
4867 /* xHCI private pointer was set in xhci_pci_probe for the second
4868 * registered roothub.
4873 xhci
->cap_regs
= hcd
->regs
;
4874 xhci
->op_regs
= hcd
->regs
+
4875 HC_LENGTH(xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
));
4876 xhci
->run_regs
= hcd
->regs
+
4877 (xhci_readl(xhci
, &xhci
->cap_regs
->run_regs_off
) & RTSOFF_MASK
);
4878 /* Cache read-only capability registers */
4879 xhci
->hcs_params1
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params1
);
4880 xhci
->hcs_params2
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params2
);
4881 xhci
->hcs_params3
= xhci_readl(xhci
, &xhci
->cap_regs
->hcs_params3
);
4882 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hc_capbase
);
4883 xhci
->hci_version
= HC_VERSION(xhci
->hcc_params
);
4884 xhci
->hcc_params
= xhci_readl(xhci
, &xhci
->cap_regs
->hcc_params
);
4885 xhci_print_registers(xhci
);
4887 get_quirks(dev
, xhci
);
4889 /* In xhci controllers which follow xhci 1.0 spec gives a spurious
4890 * success event after a short transfer. This quirk will ignore such
4893 if (xhci
->hci_version
> 0x96)
4894 xhci
->quirks
|= XHCI_SPURIOUS_SUCCESS
;
4896 /* Make sure the HC is halted. */
4897 retval
= xhci_halt(xhci
);
4901 xhci_dbg(xhci
, "Resetting HCD\n");
4902 /* Reset the internal HC memory state and registers. */
4903 retval
= xhci_reset(xhci
);
4906 xhci_dbg(xhci
, "Reset complete\n");
4908 /* Set dma_mask and coherent_dma_mask to 64-bits,
4909 * if xHC supports 64-bit addressing */
4910 if (HCC_64BIT_ADDR(xhci
->hcc_params
) &&
4911 !dma_set_mask(dev
, DMA_BIT_MASK(64))) {
4912 xhci_dbg(xhci
, "Enabling 64-bit DMA addresses.\n");
4913 dma_set_coherent_mask(dev
, DMA_BIT_MASK(64));
4916 xhci_dbg(xhci
, "Calling HCD init\n");
4917 /* Initialize HCD and host controller data structures. */
4918 retval
= xhci_init(hcd
);
4921 xhci_dbg(xhci
, "Called HCD init\n");
4928 MODULE_DESCRIPTION(DRIVER_DESC
);
4929 MODULE_AUTHOR(DRIVER_AUTHOR
);
4930 MODULE_LICENSE("GPL");
4932 static int __init
xhci_hcd_init(void)
4936 retval
= xhci_register_pci();
4938 pr_debug("Problem registering PCI driver.\n");
4941 retval
= xhci_register_plat();
4943 pr_debug("Problem registering platform driver.\n");
4947 * Check the compiler generated sizes of structures that must be laid
4948 * out in specific ways for hardware access.
4950 BUILD_BUG_ON(sizeof(struct xhci_doorbell_array
) != 256*32/8);
4951 BUILD_BUG_ON(sizeof(struct xhci_slot_ctx
) != 8*32/8);
4952 BUILD_BUG_ON(sizeof(struct xhci_ep_ctx
) != 8*32/8);
4953 /* xhci_device_control has eight fields, and also
4954 * embeds one xhci_slot_ctx and 31 xhci_ep_ctx
4956 BUILD_BUG_ON(sizeof(struct xhci_stream_ctx
) != 4*32/8);
4957 BUILD_BUG_ON(sizeof(union xhci_trb
) != 4*32/8);
4958 BUILD_BUG_ON(sizeof(struct xhci_erst_entry
) != 4*32/8);
4959 BUILD_BUG_ON(sizeof(struct xhci_cap_regs
) != 7*32/8);
4960 BUILD_BUG_ON(sizeof(struct xhci_intr_reg
) != 8*32/8);
4961 /* xhci_run_regs has eight fields and embeds 128 xhci_intr_regs */
4962 BUILD_BUG_ON(sizeof(struct xhci_run_regs
) != (8+8*128)*32/8);
4965 xhci_unregister_pci();
4968 module_init(xhci_hcd_init
);
4970 static void __exit
xhci_hcd_cleanup(void)
4972 xhci_unregister_pci();
4973 xhci_unregister_plat();
4975 module_exit(xhci_hcd_cleanup
);