firmware/target/arm/as3525/usb-drv-as3525v2.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright © 2010 Amaury Pouly
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "usb.h"
  23 #include "usb_drv.h"
  24 #include "as3525v2.h"
  25 #include "clock-target.h"
  26 #include "ascodec.h"
  27 #include "as3514.h"
  28 #include "stdbool.h"
  29 #include "string.h"
  30 #include "stdio.h"
  31 #include "panic.h"
  32 #include "mmu-arm.h"
  33 #include "system.h"
  34 //#define LOGF_ENABLE
  35 #include "logf.h"
  36 #include "usb-drv-as3525v2.h"
  37 #include "usb_core.h"
  38
  39 static const uint8_t in_ep_list[NUM_IN_EP + 1] = {0, IN_EP_LIST};
  40 static const uint8_t out_ep_list[NUM_OUT_EP + 1] = {0, OUT_EP_LIST};
  41
  42 /* iterate through each in/out ep except EP0
  43  * 'i' is the counter, 'ep' is the actual value */
  44 #define FOR_EACH_EP(list, start, i, ep) \
  45     for(ep = list[i = start]; \
  46         i < (sizeof(list)/sizeof(*list)); \
  47         i++, ep = list[i])
  48
  49 #define FOR_EACH_IN_EP_EX(include_ep0, i, ep) \
  50     FOR_EACH_EP(in_ep_list, (include_ep0) ? 0 : 1, i, ep)
  51
  52 #define FOR_EACH_OUT_EP_EX(include_ep0, i, ep) \
  53     FOR_EACH_EP(out_ep_list, (include_ep0) ? 0 : 1, i, ep)
  54
  55 #define FOR_EACH_IN_EP(i, ep)           FOR_EACH_IN_EP_EX (false, i, ep)
  56 #define FOR_EACH_IN_EP_AND_EP0(i, ep)   FOR_EACH_IN_EP_EX (true,  i, ep)
  57 #define FOR_EACH_OUT_EP(i, ep)          FOR_EACH_OUT_EP_EX(false, i, ep)
  58 #define FOR_EACH_OUT_EP_AND_EP0(i, ep)  FOR_EACH_OUT_EP_EX(true,  i, ep)
  59
  60 /* store per endpoint, per direction, information */
  61 struct usb_endpoint
  62 {
  63     unsigned int len; /* length of the data buffer */
  64     struct wakeup complete; /* wait object */
  65     int8_t status; /* completion status (0 for success) */
  66     bool active; /* true is endpoint has been requested (true for EP0) */
  67     bool wait; /* true if usb thread is blocked on completion */
  68     bool busy; /* true is a transfer is pending */
  69 };
  70
  71 /* state of EP0 (to correctly schedule setup packet enqueing) */
  72 enum ep0state
  73 {
  74     /* Setup packet is enqueud, waiting for actual data */
  75     EP0_WAIT_SETUP = 0,
  76     /* Waiting for ack (either IN or OUT) */
  77     EP0_WAIT_ACK = 1,
  78     /* Ack complete, waiting for data (either IN or OUT)
  79      * This state is necessary because if both ack and data complete in the
  80      * same interrupt, we might process data completion before ack completion
  81      * so we need this bizarre state */
  82     EP0_WAIT_DATA = 2,
  83     /* Setup packet complete, waiting for ack and data */
  84     EP0_WAIT_DATA_ACK = 3,
  85 };
  86
  87 /* endpoints[ep_num][DIR_IN/DIR_OUT] */
  88 static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS][2];
  89 /* setup packet for EP0 */
  90 static struct usb_ctrlrequest _ep0_setup_pkt __attribute__((aligned(32)));
  91 static struct usb_ctrlrequest *ep0_setup_pkt = AS3525_UNCACHED_ADDR(&_ep0_setup_pkt);
  92
  93 /* state of EP0 */
  94 static enum ep0state ep0_state;
  95
  96 void usb_attach(void)
  97 {
  98     logf("usb-drv: attach");
  99     usb_enable(true);
 100 }
 101
 102 static inline void usb_delay(void)
 103 {
 104     int i = 0;
 105     while(i < 0x300)
 106     {
 107         asm volatile("nop");
 108         i++;
 109     }
 110 }
 111
 112 static void as3525v2_connect(void)
 113 {
 114     logf("usb-drv: init as3525v2");
 115     /* 1) enable usb core clock */
 116     bitset32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
 117     usb_delay();
 118     /* 2) enable usb phy clock */
 119     CCU_USB = (CCU_USB & ~(3<<24)) | (1 << 24); /* ?? */
 120     /* PHY clock */
 121     CGU_USB = 1<<5  /* enable */
 122         | 0 << 2
 123         | 0; /* source = ? (24MHz crystal?) */
 124     usb_delay();
 125     /* 3) clear "stop pclk" */
 126     PCGCCTL &= ~0x1;
 127     usb_delay();
 128     /* 4) clear "power clamp" */
 129     PCGCCTL &= ~0x4;
 130     usb_delay();
 131     /* 5) clear "reset power down module" */
 132     PCGCCTL &= ~0x8;
 133     usb_delay();
 134     /* 6) set "power on program done" */
 135     DCTL |= DCTL_pwronprgdone;
 136     usb_delay();
 137     /* 7) core soft reset */
 138     GRSTCTL |= GRSTCTL_csftrst;
 139     usb_delay();
 140     /* 8) hclk soft reset */
 141     GRSTCTL |= GRSTCTL_hsftrst;
 142     usb_delay();
 143     /* 9) flush and reset everything */
 144     GRSTCTL |= 0x3f;
 145     usb_delay();
 146     /* 10) force device mode*/
 147     GUSBCFG &= ~GUSBCFG_force_host_mode;
 148     GUSBCFG |= GUSBCFG_force_device_mode;
 149     usb_delay();
 150     /* 11) Do something that is probably CCU related but undocumented*/
 151     CCU_USB |= 0x1000;
 152     CCU_USB &= ~0x300000;
 153     usb_delay();
 154     /* 12) reset usb core parameters (dev addr, speed, ...) */
 155     DCFG = 0;
 156     usb_delay();
 157 }
 158
 159 static void as3525v2_disconnect(void)
 160 {
 161     /* Disconnect */
 162     DCTL |= DCTL_sftdiscon;
 163     usb_delay();
 164     /* Disable clock */
 165     CGU_USB = 0;
 166     usb_delay();
 167     bitclr32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
 168 }
 169
 170 static void enable_device_interrupts(void)
 171 {
 172     /* Clear any pending interrupt */
 173     GINTSTS = 0xffffffff;
 174     /* Clear any pending otg interrupt */
 175     GOTGINT = 0xffffffff;
 176     /* Enable interrupts */
 177     GINTMSK = GINTMSK_usbreset
 178             | GINTMSK_enumdone
 179             | GINTMSK_inepintr
 180             | GINTMSK_outepintr
 181             | GINTMSK_disconnect
 182             | GINTMSK_usbsuspend
 183             | GINTMSK_wkupintr
 184             | GINTMSK_otgintr;
 185 }
 186
 187 static void flush_tx_fifos(int nums)
 188 {
 189     unsigned int i = 0;
 190
 191     GRSTCTL = (nums << GRSTCTL_txfnum_bitp)
 192             | GRSTCTL_txfflsh_flush;
 193     while(GRSTCTL & GRSTCTL_txfflsh_flush && i < 0x300)
 194         i++;
 195     if(GRSTCTL & GRSTCTL_txfflsh_flush)
 196         panicf("usb-drv: hang of flush tx fifos (%x)", nums);
 197     /* wait 3 phy clocks */
 198     udelay(1);
 199 }
 200
 201 static void prepare_setup_ep0(void)
 202 {
 203     logf("usb-drv: prepare EP0");
 204     /* setup DMA */
 205     DOEPDMA(0) = (unsigned long)AS3525_PHYSICAL_ADDR(&_ep0_setup_pkt);
 206
 207     /* Setup EP0 OUT with the following parameters:
 208      * packet count = 1
 209      * setup packet count = 1
 210      * transfer size = 8 (setup packet)
 211      */
 212     DOEPTSIZ(0) = (1 << DEPTSIZ0_supcnt_bitp)
 213                 | (1 << DEPTSIZ0_pkcnt_bitp)
 214                 | 8;
 215
 216     /* Enable endpoint, clear nak */
 217     ep0_state = EP0_WAIT_SETUP;
 218     DOEPCTL(0) |= DEPCTL_epena | DEPCTL_cnak;
 219 }
 220
 221 static void handle_ep0_complete(bool is_ack)
 222 {
 223     switch(ep0_state)
 224     {
 225         case EP0_WAIT_SETUP:
 226             panicf("usb-drv: EP0 completion while waiting for SETUP");
 227         case EP0_WAIT_ACK:
 228             if(is_ack)
 229                 /* everything is done, prepare next setup */
 230                 prepare_setup_ep0();
 231             else
 232                 panicf("usb-drv: EP0 data completion while waiting for ACK");
 233             break;
 234         case EP0_WAIT_DATA:
 235             if(is_ack)
 236                 panicf("usb-drv: EP0 ACK while waiting for data completion");
 237             else
 238                 /* everything is done, prepare next setup */
 239                 prepare_setup_ep0();
 240             break;
 241         case EP0_WAIT_DATA_ACK:
 242             /* update state */
 243             if(is_ack)
 244                 ep0_state = EP0_WAIT_DATA;
 245             else
 246                 ep0_state = EP0_WAIT_ACK;
 247             break;
 248         default:
 249             panicf("usb-drv: invalid EP0 state");
 250     }
 251     logf("usb-drv: EP0 state updated to %d", ep0_state);
 252 }
 253
 254 static void handle_ep0_setup(void)
 255 {
 256     if(ep0_state != EP0_WAIT_SETUP)
 257     {
 258         logf("usb-drv: EP0 SETUP while in state %d", ep0_state);
 259         return;
 260     }
 261     /* determine is there is a data phase */
 262     if(ep0_setup_pkt->wLength == 0)
 263         /* no: wait for ack */
 264         ep0_state = EP0_WAIT_ACK;
 265     else
 266         /* yes: wait ack and data */
 267         ep0_state = EP0_WAIT_DATA_ACK;
 268     logf("usb-drv: EP0 state updated to %d", ep0_state);
 269 }
 270
 271 static void reset_endpoints(void)
 272 {
 273     unsigned i;
 274     int ep;
 275     /* disable all endpoints except EP0 */
 276     FOR_EACH_IN_EP_AND_EP0(i, ep)
 277     {
 278         endpoints[ep][DIR_IN].active = false;
 279         endpoints[ep][DIR_IN].busy = false;
 280         endpoints[ep][DIR_IN].status = -1;
 281         if(endpoints[ep][DIR_IN].wait)
 282         {
 283             endpoints[ep][DIR_IN].wait = false;
 284             wakeup_signal(&endpoints[ep][DIR_IN].complete);
 285         }
 286         if(DIEPCTL(ep) & DEPCTL_epena)
 287             DIEPCTL(ep) = DEPCTL_snak;
 288         else
 289             DIEPCTL(ep) = 0;
 290     }
 291
 292     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 293     {
 294         endpoints[ep][DIR_OUT].active = false;
 295         endpoints[ep][DIR_OUT].busy = false;
 296         endpoints[ep][DIR_OUT].status = -1;
 297         if(endpoints[ep][DIR_OUT].wait)
 298         {
 299             endpoints[ep][DIR_OUT].wait = false;
 300             wakeup_signal(&endpoints[ep][DIR_OUT].complete);
 301         }
 302         if(DOEPCTL(ep) & DEPCTL_epena)
 303             DOEPCTL(ep) =  DEPCTL_snak;
 304         else
 305             DOEPCTL(ep) = 0;
 306     }
 307     /* 64 bytes packet size, active endpoint */
 308     DOEPCTL(0) = (DEPCTL_MPS_64 << DEPCTL_mps_bitp) | DEPCTL_usbactep | DEPCTL_snak;
 309     DIEPCTL(0) = (DEPCTL_MPS_64 << DEPCTL_mps_bitp) | DEPCTL_usbactep | DEPCTL_snak;
 310     /* Setup next chain for IN eps */
 311     FOR_EACH_IN_EP_AND_EP0(i, ep)
 312     {
 313         int next_ep = in_ep_list[(i + 1) % (NUM_IN_EP + 1)];
 314         DIEPCTL(ep) = (DIEPCTL(ep) & ~bitm(DEPCTL, nextep)) | (next_ep << DEPCTL_nextep_bitp);
 315     }
 316 }
 317
 318 static void cancel_all_transfers(bool cancel_ep0)
 319 {
 320     logf("usb-drv: cancel all transfers");
 321     int flags = disable_irq_save();
 322     int ep;
 323     unsigned i;
 324
 325     FOR_EACH_IN_EP_EX(cancel_ep0, i, ep)
 326     {
 327         endpoints[ep][DIR_IN].status = -1;
 328         endpoints[ep][DIR_IN].busy = false;
 329         if(endpoints[ep][DIR_IN].wait)
 330         {
 331             endpoints[ep][DIR_IN].wait = false;
 332             wakeup_signal(&endpoints[ep][DIR_IN].complete);
 333         }
 334         DIEPCTL(ep) = (DIEPCTL(ep) & ~DEPCTL_usbactep) | DEPCTL_snak;
 335     }
 336     FOR_EACH_OUT_EP_EX(cancel_ep0, i, ep)
 337     {
 338         endpoints[ep][DIR_OUT].status = -1;
 339         endpoints[ep][DIR_OUT].busy = false;
 340         if(endpoints[ep][DIR_OUT].wait)
 341         {
 342             endpoints[ep][DIR_OUT].wait = false;
 343             wakeup_signal(&endpoints[ep][DIR_OUT].complete);
 344         }
 345         DOEPCTL(ep) = (DOEPCTL(ep) & ~DEPCTL_usbactep) | DEPCTL_snak;
 346     }
 347
 348     restore_irq(flags);
 349 }
 350
 351 static void core_dev_init(void)
 352 {
 353     int ep;
 354     unsigned int i;
 355     /* Restart the phy clock */
 356     PCGCCTL = 0;
 357     /* Set phy speed : high speed */
 358     DCFG = (DCFG & ~bitm(DCFG, devspd)) | DCFG_devspd_hs_phy_hs;
 359
 360     /* Check hardware capabilities */
 361     if(extract(GHWCFG2, arch) != GHWCFG2_ARCH_INTERNAL_DMA)
 362         panicf("usb-drv: wrong architecture (%ld)", extract(GHWCFG2, arch));
 363     if(extract(GHWCFG2, hs_phy_type) != GHWCFG2_PHY_TYPE_UTMI)
 364         panicf("usb-drv: wrong HS phy type (%ld)", extract(GHWCFG2, hs_phy_type));
 365     if(extract(GHWCFG2, fs_phy_type) != GHWCFG2_PHY_TYPE_UNSUPPORTED)
 366         panicf("usb-drv: wrong FS phy type (%ld)", extract(GHWCFG2, fs_phy_type));
 367     if(extract(GHWCFG4, utmi_phy_data_width) != 0x2)
 368         panicf("usb-drv: wrong utmi data width (%ld)", extract(GHWCFG4, utmi_phy_data_width));
 369     if(!(GHWCFG4 & GHWCFG4_ded_fifo_en)) /* it seems to be multiple tx fifo support */
 370         panicf("usb-drv: no multiple tx fifo");
 371
 372     #ifdef USE_CUSTOM_FIFO_LAYOUT
 373     if(!(GHWCFG2 & GHWCFG2_dyn_fifo))
 374         panicf("usb-drv: no dynamic fifo");
 375     if(GRXFSIZ != DATA_FIFO_DEPTH)
 376         panicf("usb-drv: wrong data fifo size");
 377     #endif /* USE_CUSTOM_FIFO_LAYOUT */
 378
 379     if(USB_NUM_ENDPOINTS != extract(GHWCFG2, num_ep))
 380         panicf("usb-drv: wrong endpoint number");
 381
 382     FOR_EACH_IN_EP_AND_EP0(i, ep)
 383     {
 384         int type = (GHWCFG1 >> GHWCFG1_epdir_bitp(ep)) & GHWCFG1_epdir_bits;
 385         if(type != GHWCFG1_EPDIR_BIDIR && type != GHWCFG1_EPDIR_IN)
 386             panicf("usb-drv: EP%d is no IN or BIDIR", ep);
 387     }
 388     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 389     {
 390         int type = (GHWCFG1 >> GHWCFG1_epdir_bitp(ep)) & GHWCFG1_epdir_bits;
 391         if(type != GHWCFG1_EPDIR_BIDIR && type != GHWCFG1_EPDIR_OUT)
 392             panicf("usb-drv: EP%d is no OUT or BIDIR", ep);
 393     }
 394
 395     /* Setup FIFOs */
 396     GRXFSIZ = 512;
 397     GNPTXFSIZ = MAKE_FIFOSIZE_DATA(512, 512);
 398
 399     /* Setup interrupt masks for endpoints */
 400     /* Setup interrupt masks */
 401     DOEPMSK = DOEPINT_setup | DOEPINT_xfercompl | DOEPINT_ahberr;
 402     DIEPMSK = DIEPINT_xfercompl | DIEPINT_timeout | DIEPINT_ahberr;
 403     DAINTMSK = 0xffffffff;
 404
 405     reset_endpoints();
 406
 407     prepare_setup_ep0();
 408
 409     /* enable USB interrupts */
 410     enable_device_interrupts();
 411 }
 412
 413 static void core_init(void)
 414 {
 415     /* Disconnect */
 416     DCTL |= DCTL_sftdiscon;
 417     /* Select UTMI+ 16 */
 418     GUSBCFG |= GUSBCFG_phy_if;
 419     GUSBCFG = (GUSBCFG & ~bitm(GUSBCFG, toutcal)) | 7 << GUSBCFG_toutcal_bitp;
 420
 421     /* fixme: the current code is for internal DMA only, the clip+ architecture
 422      *        define the internal DMA model */
 423     /* Set burstlen and enable DMA*/
 424     GAHBCFG = (GAHBCFG_INT_DMA_BURST_INCR << GAHBCFG_hburstlen_bitp)
 425                 | GAHBCFG_dma_enable;
 426     /* Disable HNP and SRP, not sure it's useful because we already forced dev mode */
 427     GUSBCFG &= ~(GUSBCFG_srpcap | GUSBCFG_hnpcapp);
 428
 429     /* perform device model specific init */
 430     core_dev_init();
 431
 432     /* Reconnect */
 433     DCTL &= ~DCTL_sftdiscon;
 434 }
 435
 436 static void enable_global_interrupts(void)
 437 {
 438     VIC_INT_ENABLE = INTERRUPT_USB;
 439     GAHBCFG |= GAHBCFG_glblintrmsk;
 440 }
 441
 442 static void disable_global_interrupts(void)
 443 {
 444     GAHBCFG &= ~GAHBCFG_glblintrmsk;
 445     VIC_INT_EN_CLEAR = INTERRUPT_USB;
 446 }
 447
 448 void usb_drv_init(void)
 449 {
 450     unsigned i, ep;
 451     logf("usb_drv_init");
 452     /* Boost cpu */
 453     cpu_boost(1);
 454     /* Enable PHY and clocks (but leave pullups disabled) */
 455     as3525v2_connect();
 456     logf("usb-drv: synopsis id: %lx", GSNPSID);
 457     /* Core init */
 458     core_init();
 459     FOR_EACH_IN_EP_AND_EP0(i, ep)
 460         wakeup_init(&endpoints[ep][DIR_IN].complete);
 461     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 462         wakeup_init(&endpoints[ep][DIR_OUT].complete);
 463     /* Enable global interrupts */
 464     enable_global_interrupts();
 465 }
 466
 467 void usb_drv_exit(void)
 468 {
 469     logf("usb_drv_exit");
 470
 471     disable_global_interrupts();
 472     as3525v2_disconnect();
 473     cpu_boost(0);
 474 }
 475
 476 static void handle_ep_in_int(int ep)
 477 {
 478     struct usb_endpoint *endpoint = &endpoints[ep][DIR_IN];
 479     unsigned long sts = DIEPINT(ep);
 480     if(sts & DIEPINT_ahberr)
 481         panicf("usb-drv: ahb error on EP%d IN", ep);
 482     if(sts & DIEPINT_xfercompl)
 483     {
 484         if(endpoint->busy)
 485         {
 486             endpoint->busy = false;
 487             endpoint->status = 0;
 488             /* works even for EP0 */
 489             int size = (DIEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 490             int transfered = endpoint->len - size;
 491             logf("len=%d reg=%d xfer=%d", endpoint->len, size, transfered);
 492             /* handle EP0 state if necessary,
 493              * this is a ack if length is 0 */
 494             if(ep == 0)
 495                 handle_ep0_complete(endpoint->len == 0);
 496             endpoint->len = size;
 497             usb_core_transfer_complete(ep, USB_DIR_IN, 0, transfered);
 498             if(endpoint->wait)
 499             {
 500                 endpoint->wait = false;
 501                 wakeup_signal(&endpoint->complete);
 502             }
 503         }
 504     }
 505     if(sts & DIEPINT_timeout)
 506     {
 507         panicf("usb-drv: timeout on EP%d IN", ep);
 508         if(endpoint->busy)
 509         {
 510             endpoint->busy = false;
 511             endpoint->status = -1;
 512             /* for safety, act as if no bytes as been transfered */
 513             endpoint->len = 0;
 514             usb_core_transfer_complete(ep, USB_DIR_IN, 1, 0);
 515             if(endpoint->wait)
 516             {
 517                 endpoint->wait = false;
 518                 wakeup_signal(&endpoint->complete);
 519             }
 520         }
 521     }
 522     /* clear interrupts */
 523     DIEPINT(ep) = sts;
 524 }
 525
 526 static void handle_ep_out_int(int ep)
 527 {
 528     struct usb_endpoint *endpoint = &endpoints[ep][DIR_OUT];
 529     unsigned long sts = DOEPINT(ep);
 530     if(sts & DOEPINT_ahberr)
 531         panicf("usb-drv: ahb error on EP%d OUT", ep);
 532     if(sts & DOEPINT_xfercompl)
 533     {
 534         logf("usb-drv: xfer complete on EP%d OUT", ep);
 535         if(endpoint->busy)
 536         {
 537             endpoint->busy = false;
 538             endpoint->status = 0;
 539             /* works even for EP0 */
 540             int transfered = endpoint->len - (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 541             logf("len=%d reg=%ld xfer=%d", endpoint->len,
 542                 (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits),
 543                 transfered);
 544             /* handle EP0 state if necessary,
 545              * this is a ack if length is 0 */
 546             if(ep == 0)
 547                 handle_ep0_complete(endpoint->len == 0);
 548             usb_core_transfer_complete(ep, USB_DIR_OUT, 0, transfered);
 549             if(endpoint->wait)
 550             {
 551                 endpoint->wait = false;
 552                 wakeup_signal(&endpoint->complete);
 553             }
 554         }
 555     }
 556     if(sts & DOEPINT_setup)
 557     {
 558         logf("usb-drv: setup on EP%d OUT", ep);
 559         if(ep != 0)
 560             panicf("usb-drv: setup not on EP0, this is impossible");
 561         if((DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits) != 0)
 562         {
 563             logf("usb-drv: ignore spurious setup (xfersize=%ld)", DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 564             prepare_setup_ep0();
 565         }
 566         else
 567         {
 568             /* handle EP0 state */
 569             handle_ep0_setup();
 570             logf("  rt=%x r=%x", ep0_setup_pkt->bRequestType, ep0_setup_pkt->bRequest);
 571             /* handle set address */
 572             if(ep0_setup_pkt->bRequestType == USB_TYPE_STANDARD &&
 573                     ep0_setup_pkt->bRequest == USB_REQ_SET_ADDRESS)
 574             {
 575                 /* Set address now */
 576                 DCFG = (DCFG & ~bitm(DCFG, devadr)) | (ep0_setup_pkt->wValue << DCFG_devadr_bitp);
 577             }
 578             usb_core_control_request(ep0_setup_pkt);
 579         }
 580     }
 581     /* clear interrupts */
 582     DOEPINT(ep) = sts;
 583 }
 584
 585 static void handle_ep_ints(void)
 586 {
 587     logf("usb-drv: ep int");
 588     /* we must read it */
 589     unsigned long daint = DAINT;
 590     unsigned i, ep;
 591
 592     FOR_EACH_IN_EP_AND_EP0(i, ep)
 593         if(daint & DAINT_IN_EP(ep))
 594             handle_ep_in_int(ep);
 595
 596     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 597         if(daint & DAINT_OUT_EP(ep))
 598             handle_ep_out_int(ep);
 599
 600     /* write back to clear status */
 601     DAINT = daint;
 602 }
 603
 604 /* interrupt service routine */
 605 void INT_USB(void)
 606 {
 607     /* some bits in GINTSTS can be set even though we didn't enable the interrupt source
 608      * so AND it with the actual mask */
 609     unsigned long sts = GINTSTS & GINTMSK;
 610
 611     if(sts & GINTMSK_usbreset)
 612     {
 613         logf("usb-drv: bus reset");
 614
 615         /* Clear the Remote Wakeup Signalling */
 616         DCTL &= ~DCTL_rmtwkupsig;
 617
 618         /* Flush FIFOs */
 619         flush_tx_fifos(0x10);
 620
 621         /* Flush the Learning Queue */
 622         GRSTCTL = GRSTCTL_intknqflsh;
 623
 624         /* Reset Device Address */
 625         DCFG &= ~bitm(DCFG, devadr);
 626
 627         reset_endpoints();
 628         prepare_setup_ep0();
 629
 630         usb_core_bus_reset();
 631     }
 632
 633     if(sts & GINTMSK_enumdone)
 634     {
 635         logf("usb-drv: enum done");
 636
 637         /* read speed */
 638         if(usb_drv_port_speed())
 639             logf("usb-drv: HS");
 640         else
 641             logf("usb-drv: FS");
 642     }
 643
 644     if(sts & GINTMSK_otgintr)
 645     {
 646         logf("usb-drv: otg int");
 647         GOTGINT = 0xffffffff;
 648     }
 649
 650     if(sts & (GINTMSK_outepintr | GINTMSK_inepintr))
 651     {
 652         handle_ep_ints();
 653     }
 654
 655     if(sts & GINTMSK_disconnect)
 656     {
 657         panicf("usb-drv: disconnect");
 658         cancel_all_transfers(true);
 659         usb_enable(false);
 660     }
 661
 662     GINTSTS = sts;
 663 }
 664
 665 int usb_drv_port_speed(void)
 666 {
 667     static const uint8_t speed[4] = {
 668         [DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ] = 1,
 669         [DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ] = 0,
 670         [DSTS_ENUMSPD_FS_PHY_48MHZ]          = 0,
 671         [DSTS_ENUMSPD_LS_PHY_6MHZ]           = 0,
 672     };
 673
 674     unsigned enumspd = extract(DSTS, enumspd);
 675
 676     if(enumspd == DSTS_ENUMSPD_LS_PHY_6MHZ)
 677         panicf("usb-drv: LS is not supported");
 678
 679     return speed[enumspd & 3];
 680 }
 681
 682 static unsigned long usb_drv_mps_by_type(int type)
 683 {
 684     static const uint16_t mps[4][2] = {
 685         /*         type                 fs      hs   */
 686         [USB_ENDPOINT_XFER_CONTROL] = { 64,     64   },
 687         [USB_ENDPOINT_XFER_ISOC]    = { 1023,   1024 },
 688         [USB_ENDPOINT_XFER_BULK]    = { 64,     512  },
 689         [USB_ENDPOINT_XFER_INT]     = { 64,     1024 },
 690     };
 691     return mps[type & 3][usb_drv_port_speed() & 1];
 692 }
 693
 694 int usb_drv_request_endpoint(int type, int dir)
 695 {
 696     int ep, ret = -1;
 697     unsigned i;
 698     logf("usb-drv: request endpoint (type=%d,dir=%s)", type, dir == USB_DIR_IN ? "IN" : "OUT");
 699
 700     if(dir == USB_DIR_IN)
 701         FOR_EACH_IN_EP(i, ep)
 702         {
 703             if(endpoints[ep][DIR_IN].active)
 704                 continue;
 705             endpoints[ep][DIR_IN].active = true;
 706             ret = ep | dir;
 707             break;
 708         }
 709     else
 710         FOR_EACH_OUT_EP(i, ep)
 711         {
 712             if(endpoints[ep][DIR_OUT].active)
 713                 continue;
 714             endpoints[ep][DIR_OUT].active = true;
 715             ret = ep | dir;
 716             break;
 717         }
 718
 719     if(ret == -1)
 720     {
 721         logf("usb-drv: request failed");
 722         return -1;
 723     }
 724
 725     unsigned long data = DEPCTL_setd0pid | (type << DEPCTL_eptype_bitp)
 726                         | (usb_drv_mps_by_type(type) << DEPCTL_mps_bitp)
 727                         | DEPCTL_usbactep | DEPCTL_snak;
 728     unsigned long mask = ~(bitm(DEPCTL, eptype) | bitm(DEPCTL, mps));
 729
 730     if(dir == USB_DIR_IN) DIEPCTL(ep) = (DIEPCTL(ep) & mask) | data;
 731     else DOEPCTL(ep) = (DOEPCTL(ep) & mask) | data;
 732
 733     return ret;
 734 }
 735
 736 void usb_drv_release_endpoint(int ep)
 737 {
 738     logf("usb-drv: release EP%d %s", EP_NUM(ep), EP_DIR(ep) == DIR_IN ? "IN" : "OUT");
 739     endpoints[EP_NUM(ep)][EP_DIR(ep)].active = false;
 740 }
 741
 742 void usb_drv_cancel_all_transfers()
 743 {
 744     cancel_all_transfers(false);
 745 }
 746
 747 static int usb_drv_transfer(int ep, void *ptr, int len, bool dir_in, bool blocking)
 748 {
 749     ep = EP_NUM(ep);
 750
 751     logf("usb-drv: xfer EP%d, len=%d, dir_in=%d, blocking=%d", ep,
 752         len, dir_in, blocking);
 753
 754     /* disable interrupts to avoid any race */
 755     int oldlevel = disable_irq_save();
 756
 757     volatile unsigned long *epctl = dir_in ? &DIEPCTL(ep) : &DOEPCTL(ep);
 758     volatile unsigned long *eptsiz = dir_in ? &DIEPTSIZ(ep) : &DOEPTSIZ(ep);
 759     volatile unsigned long *epdma = dir_in ? &DIEPDMA(ep) : &DOEPDMA(ep);
 760     struct usb_endpoint *endpoint = &endpoints[ep][dir_in];
 761     #define DEPCTL  *epctl
 762     #define DEPTSIZ *eptsiz
 763     #define DEPDMA  *epdma
 764
 765     if(endpoint->busy)
 766         logf("usb-drv: EP%d %s is already busy", ep, dir_in ? "IN" : "OUT");
 767
 768     endpoint->busy = true;
 769     endpoint->len = len;
 770     endpoint->wait = blocking;
 771     endpoint->status = -1;
 772
 773     DEPCTL &= ~DEPCTL_stall;
 774     DEPCTL |= DEPCTL_usbactep;
 775
 776     int mps = usb_drv_mps_by_type(extract(DEPCTL, eptype));
 777     int nb_packets = (len + mps - 1) / mps;
 778
 779     if(len == 0)
 780     {
 781         DEPDMA = 0x10000000;
 782         DEPTSIZ = 1 << DEPTSIZ_pkcnt_bitp;
 783     }
 784     else
 785     {
 786         DEPDMA = (unsigned long)AS3525_PHYSICAL_ADDR(ptr);
 787         DEPTSIZ = (nb_packets << DEPTSIZ_pkcnt_bitp) | len;
 788         if(dir_in)
 789             clean_dcache_range(ptr, len);
 790         else
 791             dump_dcache_range(ptr, len);
 792     }
 793
 794     logf("pkt=%d dma=%lx", nb_packets, DEPDMA);
 795
 796     DEPCTL |= DEPCTL_epena | DEPCTL_cnak;
 797
 798     /* restore interrupts */
 799     restore_irq(oldlevel);
 800
 801     if(blocking)
 802     {
 803         wakeup_wait(&endpoint->complete, TIMEOUT_BLOCK);
 804         return endpoint->status;
 805     }
 806
 807     return 0;
 808
 809     #undef DEPCTL
 810     #undef DEPTSIZ
 811     #undef DEPDMA
 812 }
 813
 814 int usb_drv_recv(int ep, void *ptr, int len)
 815 {
 816     return usb_drv_transfer(ep, ptr, len, false, false);
 817 }
 818
 819 int usb_drv_send(int ep, void *ptr, int len)
 820 {
 821     return usb_drv_transfer(ep, ptr, len, true, true);
 822 }
 823
 824 int usb_drv_send_nonblocking(int ep, void *ptr, int len)
 825 {
 826     return usb_drv_transfer(ep, ptr, len, true, false);
 827 }
 828
 829
 830 void usb_drv_set_test_mode(int mode)
 831 {
 832     /* there is a perfect matching between usb test mode code
 833      * and the register field value */
 834     DCTL = (DCTL & ~bitm(DCTL, tstctl)) | (mode << DCTL_tstctl_bitp);
 835 }
 836
 837 void usb_drv_set_address(int address)
 838 {
 839     (void) address;
 840 }
 841
 842 void usb_drv_stall(int ep, bool stall, bool in)
 843 {
 844     logf("usb-drv: %sstall EP%d %s", stall ? "" : "un", ep, in ? "IN" : "OUT");
 845     if(in)
 846     {
 847         if(stall) DIEPCTL(ep) |= DEPCTL_stall;
 848         else DIEPCTL(ep) &= ~DEPCTL_stall;
 849     }
 850     else
 851     {
 852         if(stall) DOEPCTL(ep) |= DEPCTL_stall;
 853         else DOEPCTL(ep) &= ~DEPCTL_stall;
 854     }
 855 }
 856
 857 bool usb_drv_stalled(int ep, bool in)
 858 {
 859     return (in ? DIEPCTL(ep) : DOEPCTL(ep)) & DEPCTL_stall;
 860 }