firmware/target/arm/sandisk/sansa-e200/lcd-e200.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Rockbox driver for Sansa e200 LCDs
  11  *
  12  * Based on reverse engineering done my MrH
  13  *
  14  * Copyright (c) 2006 Daniel Ankers
  15  *
  16  * All files in this archive are subject to the GNU General Public License.
  17  * See the file COPYING in the source tree root for full license agreement.
  18  *
  19  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  20  * KIND, either express or implied.
  21  *
  22  ****************************************************************************/
  23 #include "lcd.h"
  24 #include "system.h"
  25 #include <string.h>
  26 #include "backlight-target.h"
  27 #include "cpu.h"
  28
  29 /* Power and display status */
  30 static bool power_on   = false; /* Is the power turned on?   */
  31 static bool display_on SHAREDBSS_ATTR = false; /* Is the display turned on? */
  32 static unsigned lcd_yuv_options SHAREDBSS_ATTR = 0;
  33
  34 /* Reverse Flag */
  35 #define R_DISP_CONTROL_NORMAL 0x0004
  36 #define R_DISP_CONTROL_REV    0x0000
  37 static unsigned short r_disp_control_rev = R_DISP_CONTROL_NORMAL;
  38
  39 /* Flipping */
  40 #define R_DRV_OUTPUT_CONTROL_NORMAL  0x101b
  41 #define R_DRV_OUTPUT_CONTROL_FLIPPED 0x131b
  42 static unsigned short r_drv_output_control  = R_DRV_OUTPUT_CONTROL_NORMAL;
  43
  44 #define LCD_DATA_IN_GPIO GPIOB_INPUT_VAL
  45 #define LCD_DATA_IN_PIN 6
  46
  47 #define LCD_DATA_OUT_GPIO GPIOB_OUTPUT_VAL
  48 #define LCD_DATA_OUT_PIN 7
  49
  50 #define LCD_CLOCK_GPIO GPIOB_OUTPUT_VAL
  51 #define LCD_CLOCK_PIN 5
  52
  53 #define LCD_CS_GPIO GPIOD_OUTPUT_VAL
  54 #define LCD_CS_PIN 6
  55
  56 #define LCD_REG_0 (*(volatile unsigned long *)(0xc2000000))
  57 #define LCD_REG_1 (*(volatile unsigned long *)(0xc2000004))
  58 #define LCD_REG_2 (*(volatile unsigned long *)(0xc2000008))
  59 #define LCD_REG_3 (*(volatile unsigned long *)(0xc200000c))
  60 #define LCD_REG_4 (*(volatile unsigned long *)(0xc2000010))
  61 #define LCD_REG_5 (*(volatile unsigned long *)(0xc2000014))
  62 #define LCD_REG_6 (*(volatile unsigned long *)(0xc2000018))
  63 #define LCD_REG_7 (*(volatile unsigned long *)(0xc200001c))
  64 #define LCD_REG_8 (*(volatile unsigned long *)(0xc2000020))
  65 #define LCD_REG_9 (*(volatile unsigned long *)(0xc2000024))
  66 #define LCD_FB_BASE_REG (*(volatile unsigned long *)(0xc2000028))
  67
  68 /* Taken from HD66789 datasheet and seems similar enough.
  69    Definitely a Renesas chip though with a perfect register index
  70    match but at least one bit seems to be set that that datasheet
  71    doesn't show. It says T.B.D. on the regmap anyway. */
  72 #define R_START_OSC             0x00
  73 #define R_DRV_OUTPUT_CONTROL    0x01
  74 #define R_DRV_WAVEFORM_CONTROL  0x02
  75 #define R_ENTRY_MODE            0x03
  76 #define R_COMPARE_REG1          0x04
  77 #define R_COMPARE_REG2          0x05
  78 #define R_DISP_CONTROL1         0x07
  79 #define R_DISP_CONTROL2         0x08
  80 #define R_DISP_CONTROL3         0x09
  81 #define R_FRAME_CYCLE_CONTROL   0x0b
  82 #define R_EXT_DISP_INTF_CONTROL 0x0c
  83 #define R_POWER_CONTROL1        0x10
  84 #define R_POWER_CONTROL2        0x11
  85 #define R_POWER_CONTROL3        0x12
  86 #define R_POWER_CONTROL4        0x13
  87 #define R_RAM_ADDR_SET          0x21
  88 #define R_RAM_READ_DATA         0x21
  89 #define R_RAM_WRITE_DATA        0x22
  90 #define R_RAM_WRITE_DATA_MASK1  0x23
  91 #define R_RAM_WRITE_DATA_MASK2  0x24
  92 #define R_GAMMA_FINE_ADJ_POS1   0x30
  93 #define R_GAMMA_FINE_ADJ_POS2   0x31
  94 #define R_GAMMA_FINE_ADJ_POS3   0x32
  95 #define R_GAMMA_GRAD_ADJ_POS    0x33
  96 #define R_GAMMA_FINE_ADJ_NEG1   0x34
  97 #define R_GAMMA_FINE_ADJ_NEG2   0x35
  98 #define R_GAMMA_FINE_ADJ_NEG3   0x36
  99 #define R_GAMMA_GRAD_ADJ_NEG    0x37
 100 #define R_GAMMA_AMP_ADJ_POS     0x38
 101 #define R_GAMMA_AMP_ADJ_NEG     0x39
 102 #define R_GATE_SCAN_START_POS   0x40
 103 #define R_VERT_SCROLL_CONTROL   0x41
 104 #define R_1ST_SCR_DRIVE_POS     0x42
 105 #define R_2ND_SCR_DRIVE_POS     0x43
 106 #define R_HORIZ_RAM_ADDR_POS    0x44
 107 #define R_VERT_RAM_ADDR_POS     0x45
 108
 109 /* We don't know how to receive a DMA finished signal from the LCD controller.
 110  * To avoid problems with flickering, we double-buffer the framebuffer.
 111  * Align as in lcd-16bit.c and not cached. */
 112 static fb_data lcd_driver_framebuffer[LCD_FBHEIGHT][LCD_FBWIDTH]
 113     __attribute__((aligned(16))) NOCACHEBSS_ATTR;
 114
 115 #ifdef BOOTLOADER
 116 static void lcd_init_gpio(void)
 117 {
 118     GPIOB_ENABLE |= (1<<7);
 119     GPIOB_ENABLE |= (1<<5);
 120     GPIOB_OUTPUT_EN |= (1<<7);
 121     GPIOB_OUTPUT_EN |= (1<<5);
 122     GPIOD_ENABLE |= (1<<6);
 123     GPIOD_OUTPUT_EN |= (1<<6);
 124 }
 125 #endif
 126
 127 static void lcd_bus_idle(void)
 128 {
 129     LCD_CLOCK_GPIO |= (1 << LCD_CLOCK_PIN);
 130     LCD_DATA_OUT_GPIO |= (1 << LCD_DATA_OUT_PIN);
 131 }
 132
 133 static void lcd_send_byte(unsigned char byte)
 134 {
 135
 136     int i;
 137
 138     for (i = 7; i >=0 ; i--)
 139     {
 140         LCD_CLOCK_GPIO &= ~(1 << LCD_CLOCK_PIN);
 141         if ((byte >> i) & 1)
 142         {
 143             LCD_DATA_OUT_GPIO |= (1 << LCD_DATA_OUT_PIN);
 144         } else {
 145             LCD_DATA_OUT_GPIO &= ~(1 << LCD_DATA_OUT_PIN);
 146         }
 147         udelay(1);
 148         LCD_CLOCK_GPIO |= (1 << LCD_CLOCK_PIN);
 149         udelay(1);
 150         lcd_bus_idle();
 151         udelay(3);
 152     }
 153 }
 154
 155 static void lcd_send_msg(unsigned char cmd, unsigned int data)
 156 {
 157     lcd_bus_idle();
 158     udelay(1);
 159     LCD_CS_GPIO &= ~(1 << LCD_CS_PIN);
 160     udelay(10);
 161     lcd_send_byte(cmd);
 162     lcd_send_byte((unsigned char)(data >> 8));
 163     lcd_send_byte((unsigned char)(data & 0xff));
 164     LCD_CS_GPIO |= (1 << LCD_CS_PIN);
 165     udelay(1);
 166     lcd_bus_idle();
 167 }
 168
 169 static void lcd_write_reg(unsigned int reg, unsigned int data)
 170 {
 171     lcd_send_msg(0x70, reg);
 172     lcd_send_msg(0x72, data);
 173 }
 174
 175 /* Run the powerup sequence for the driver IC */
 176 static void lcd_power_on(void)
 177 {
 178     /* Clear standby bit */
 179     lcd_write_reg(R_POWER_CONTROL1, 0x0000);
 180
 181     /** Power ON Sequence **/
 182     lcd_write_reg(R_START_OSC, 0x0001);
 183     /* 10ms or more for oscillation circuit to stabilize */
 184     sleep(HZ/50);
 185
 186     /* SAP2-0=100, BT2-0=100, AP2-0=100, DK=1, SLP=0, STB=0 */
 187     lcd_write_reg(R_POWER_CONTROL1, 0x4444);
 188     /* DC12-10=000, DC2-0=000, VC2-0=001 */
 189     lcd_write_reg(R_POWER_CONTROL2, 0x0001);
 190     /* PON=0, VRH3-0=0011 */
 191     lcd_write_reg(R_POWER_CONTROL3, 0x0003);
 192     /* VCOMG=0, VDV4-0=10001, VCM3-0=11001 */
 193     lcd_write_reg(R_POWER_CONTROL4, 0x1119);
 194     /* PON=1, VRH3-0=0011 */
 195     lcd_write_reg(R_POWER_CONTROL3, 0x0013);
 196     sleep(HZ/25);
 197
 198     /* SAP2-0=100, BT2-0=100, AP2-0=100, DK=0, SLP=0, STB=0 */
 199     lcd_write_reg(R_POWER_CONTROL1, 0x4440);
 200     /* VCOMG=1, VDV4-0=10001, VCM3-0=11001 */
 201     lcd_write_reg(R_POWER_CONTROL4, 0x3119);
 202     sleep(HZ/6);
 203
 204     /* VSPL=0, HSPL=0, DPL=1, EPL=0, SM=0, GS=x, SS=x, NL4-0=11011 */
 205     lcd_write_reg(R_DRV_OUTPUT_CONTROL, r_drv_output_control);
 206     /* FLD=0, FLD0=1, B/C=1, EOR=1, NW5-0=000000 */
 207     lcd_write_reg(R_DRV_WAVEFORM_CONTROL, 0x0700);
 208     /* TRI=0, DFM1-0=11, BGR=0, HWM=1, ID1-0=10, AM=0, LG2-0=000
 209      * AM: horizontal update direction
 210      * ID1-0: H decrement, V increment
 211      */
 212     lcd_write_reg(R_ENTRY_MODE, 0x6020);
 213     lcd_write_reg(R_COMPARE_REG1, 0x0000);
 214     lcd_write_reg(R_COMPARE_REG2, 0x0000);
 215     /* FP3-0=0010, BP3-0=0010 */
 216     lcd_write_reg(R_DISP_CONTROL2, 0x0202);
 217     /* PTG1-0=00 (normal scan), ISC3-0=0000 (ignored) */
 218     lcd_write_reg(R_DISP_CONTROL3, 0x0000);
 219     /* NO2-0=01, SDT1-0=00, EQ1-0=01, DIV1-0=00, RTN3-0=0000 */
 220     lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x4400);
 221     /* RM=1, DM1-0=01, RIM1-0=00 */
 222     lcd_write_reg(R_EXT_DISP_INTF_CONTROL, 0x0110);
 223     /* SCN4-0=00000 - G1 if GS=0, G240 if GS=1 */
 224     lcd_write_reg(R_GATE_SCAN_START_POS, 0x0000);
 225     /* VL7-0=00000000 (0 lines) */
 226     lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000);
 227     /* SE17-10=219, SS17-10=0 - 220 gates */
 228     lcd_write_reg(R_1ST_SCR_DRIVE_POS, (219 << 8));
 229     /* SE27-10=0, SS27-10=0 - no second screen */
 230     lcd_write_reg(R_2ND_SCR_DRIVE_POS, 0x0000);
 231     /* HEA=175, HSA=0 = H window from 0-175 */
 232     lcd_write_reg(R_HORIZ_RAM_ADDR_POS, (175 << 8));
 233     /* VEA=219, VSA=0 = V window from 0-219 */
 234     lcd_write_reg(R_VERT_RAM_ADDR_POS, (219 << 8));
 235     /* PKP12-10=000, PKP02-00=000 */
 236     lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0000);
 237     /* PKP32-30=111, PKP22-20=100 */
 238     lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0704);
 239     /* PKP52-50=001, PKP42-40=111 */
 240     lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0107);
 241     /* PRP12-10=111, PRP02-00=100 */
 242     lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0704);
 243     /* PKN12-10=001, PKN02-00=111 */
 244     lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0107);
 245     /* PKN32-30=000, PKN22-20=010 */
 246     lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0002);
 247     /* PKN52-50=111, PKN42-40=111 */
 248     lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0707);
 249     /* PRN12-10=101, PRN02-00=011 */
 250     lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0503);
 251     /* VRP14-10=00000, VRP03-00=0000 */
 252     lcd_write_reg(R_GAMMA_AMP_ADJ_POS, 0x0000);
 253     /* WRN14-10=00000, VRN03-00=0000 */
 254     lcd_write_reg(R_GAMMA_AMP_ADJ_NEG, 0x0000);
 255     /* AD15-0=175 (upper right corner) */
 256     lcd_write_reg(R_RAM_ADDR_SET, 175);
 257     /* RM=1, DM1-0=01, RIM1-0=00 */
 258     lcd_write_reg(R_EXT_DISP_INTF_CONTROL, 0x0110);
 259
 260     power_on = true;
 261 }
 262
 263 /* Run the display on sequence for the driver IC */
 264 static void lcd_display_on(void)
 265 {
 266     if (!power_on)
 267     {
 268         /* Power has been turned off so full reinit is needed */
 269         lcd_power_on();
 270     }
 271     else
 272     {
 273         /* Restore what we fiddled with when turning display off */
 274         /* PON=1, VRH3-0=0011 */
 275         lcd_write_reg(R_POWER_CONTROL3, 0x0013);
 276         /* NO2-0=01, SDT1-0=00, EQ1-0=01, DIV1-0=00, RTN3-0=0000 */
 277         lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x4400);
 278         /* VCOMG=1, VDV4-0=10001, VCM3-0=11001 */
 279         lcd_write_reg(R_POWER_CONTROL4, 0x3119);
 280     }
 281
 282     /* SAP2-0=100, BT2-0=111, AP2-0=100, DK=1, SLP=0, STB=0 */
 283     lcd_write_reg(R_POWER_CONTROL1, 0x4740);
 284
 285     sleep(HZ/25);
 286
 287     /* PT1-0=00, VLE2-1=00, SPT=0, IB6(??)=1, GON=0, DTE=0, CL=0,
 288        REV=x, D1-0=01 */
 289     lcd_write_reg(R_DISP_CONTROL1, 0x0041 | r_disp_control_rev);
 290
 291     sleep(HZ/30);
 292
 293     /* PT1-0=00, VLE2-1=00, SPT=0, IB6(??)=1, GON=1, DTE=0, CL=0,
 294        REV=x, D1-0=01 */
 295     lcd_write_reg(R_DISP_CONTROL1, 0x0061 | r_disp_control_rev);
 296     /* PT1-0=00, VLE2-1=00, SPT=0, IB6(??)=1, GON=1, DTE=0, CL=0,
 297        REV=x, D1-0=11 */
 298     lcd_write_reg(R_DISP_CONTROL1, 0x0063 | r_disp_control_rev);
 299
 300     sleep(HZ/30);
 301
 302     /* PT1-0=00, VLE2-1=00, SPT=0, IB6(??)=1, GON=1, DTE=1, CL=0,
 303        REV=x, D1-0=11 */
 304     lcd_write_reg(R_DISP_CONTROL1, 0x0073 | r_disp_control_rev);
 305
 306     /* Go into write data mode */
 307     lcd_send_msg(0x70, R_RAM_WRITE_DATA);
 308
 309     /* tell that we're on now */
 310     display_on = true;
 311 }
 312
 313 /* Turn off visible display operations */
 314 static void lcd_display_off(void)
 315 {
 316     /* block drawing operations and changing of first */
 317     display_on = false;
 318
 319     /* NO2-0=01, SDT1-0=00, EQ1-0=00, DIV1-0=00, RTN3-0=0000 */
 320     lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x4000);
 321
 322     /* PT1-0=00, VLE2-1=00, SPT=0, IB6(??)=1, GON=1, DTE=1, CL=0,
 323        REV=x, D1-0=10 */
 324     lcd_write_reg(R_DISP_CONTROL1, 0x0072 | r_disp_control_rev);
 325
 326     sleep(HZ/25);
 327
 328     /* PT1-0=00, VLE2-1=00, SPT=0, IB6(??)=1, GON=1, DTE=0, CL=0,
 329        REV=x, D1-0=10 */
 330     lcd_write_reg(R_DISP_CONTROL1, 0x0062 | r_disp_control_rev);
 331
 332     sleep(HZ/25);
 333
 334     /* PT1-0=00, VLE2-1=00, SPT=0, IB6(??)=0, GON=0, DTE=0, CL=0,
 335        REV=0, D1-0=00 */
 336     lcd_write_reg(R_DISP_CONTROL1, 0x0000);
 337     /* SAP2-0=000, BT2-0=000, AP2-0=000, DK=0, SLP=0, STBY=0 */
 338     lcd_write_reg(R_POWER_CONTROL1, 0x0000);
 339     /* PON=0, VRH3-0=0011 */
 340     lcd_write_reg(R_POWER_CONTROL3, 0x0003);
 341     /* VCOMG=0, VDV4-0=10001, VCM4-0=11001 */
 342     lcd_write_reg(R_POWER_CONTROL4, 0x1119);
 343 }
 344
 345 void lcd_init_device(void)
 346 {
 347 /* All this is magic worked out by MrH */
 348
 349 /* Stop any DMA which is in progress */
 350     LCD_REG_6 &= ~1;
 351     udelay(100000);
 352
 353 #ifdef BOOTLOADER /* Bother at all to do this again? */
 354 /* Init GPIO ports */
 355     lcd_init_gpio();
 356 /* Controller init */
 357     GPO32_ENABLE |= (1 << 28);
 358     GPO32_VAL &= ~(1 << 28);
 359     DEV_INIT1 = ( (DEV_INIT1 & 0x03ffffff) | (0x15 << 26) );
 360     outl(((inl(0x70000014) & (0x0fffffff)) | (0x5 << 28)), 0x70000014);
 361     outl((inl(0x70000020) & ~(0x3 << 10)), 0x70000020);
 362     DEV_EN |= DEV_LCD; /* Enable controller */
 363     outl(0x6, 0x600060d0);
 364     DEV_RS |= DEV_LCD; /* Reset controller */
 365     outl((inl(0x70000020) & ~(1 << 14)), 0x70000020);
 366     lcd_bus_idle();
 367     DEV_RS &=~DEV_LCD; /* Clear reset */
 368     udelay(1000);
 369
 370     LCD_REG_0 = (LCD_REG_0 & (0x00ffffff)) | (0x22 << 24);
 371     LCD_REG_0 = (LCD_REG_0 & (0xff00ffff)) | (0x14 << 16);
 372     LCD_REG_0 = (LCD_REG_0 & (0xffffc0ff)) | (0x3 << 8);
 373     LCD_REG_0 = (LCD_REG_0 & (0xffffffc0)) | (0xa);
 374
 375     LCD_REG_1 &= 0x00ffffff;
 376     LCD_REG_1 &= 0xff00ffff;
 377     LCD_REG_1 = (LCD_REG_1 & 0xffff03ff) | (0x2 << 10);
 378     LCD_REG_1 = (LCD_REG_1 & 0xfffffc00) | (0xdd);
 379
 380     LCD_REG_2 |= (1 << 5);
 381     LCD_REG_2 |= (1 << 6);
 382     LCD_REG_2 = (LCD_REG_2 & 0xfffffcff) | (0x2 << 8);
 383
 384     LCD_REG_7 &= (0xf800ffff);
 385     LCD_REG_7 &= (0xfffff800);
 386
 387     LCD_REG_8 = (LCD_REG_8 & (0xf800ffff)) | (0xb0 << 16);
 388     LCD_REG_8 = (LCD_REG_8 & (0xfffff800)) | (0xdc); /* X-Y Geometry? */
 389
 390     LCD_REG_5 |= 0xc;
 391     LCD_REG_5 = (LCD_REG_5 & ~(0x70)) | (0x3 << 4);
 392     LCD_REG_5 |= 2;
 393
 394     LCD_REG_6 &= ~(1 << 15);
 395     LCD_REG_6 |= (0xe00);
 396     LCD_REG_6 = (LCD_REG_6 & (0xffffff1f)) | (0x4 << 5);
 397     LCD_REG_6 |= (1 << 4);
 398
 399     LCD_REG_5 &= ~(1 << 7);
 400     /* lcd_driver_framebuffer is uncached therefore at the physical address */
 401     LCD_FB_BASE_REG = (long)lcd_driver_framebuffer;
 402
 403     udelay(100000);
 404
 405 /* LCD init */
 406     /* Pull RESET low, then high to reset driver IC */
 407     GPO32_VAL &= ~(1 << 28);
 408     udelay(10000);
 409     GPO32_VAL |= (1 << 28);
 410     udelay(10000);
 411
 412     lcd_display_on();
 413 #else
 414     /* Power and display already ON - switch framebuffer address and reset
 415        settings */
 416     /* lcd_driver_framebuffer is uncached therefore at the physical address */
 417     LCD_FB_BASE_REG = (long)lcd_driver_framebuffer;
 418
 419     power_on = true;
 420     display_on = true;
 421
 422     lcd_set_invert_display(false);
 423     lcd_set_flip(false);
 424 #endif
 425
 426     LCD_REG_6 |= 1; /* Start DMA */
 427 }
 428
 429 void lcd_enable(bool on)
 430 {
 431     if (on == display_on)
 432         return;
 433
 434     if (on)
 435     {
 436         DEV_EN |= DEV_LCD; /* Enable LCD controller */
 437         lcd_display_on();  /* Turn on display */
 438         lcd_update();      /* Resync display */
 439         LCD_REG_6 |= 1;    /* Restart DMA */
 440         sleep(HZ/50);      /* Wait for a frame to be written */
 441     }
 442     else
 443     {
 444         LCD_REG_6 &= ~1;    /* Disable DMA */
 445         sleep(HZ/50);       /* Wait for dma end (assuming 50Hz) */
 446         lcd_display_off();  /* Turn off display */
 447         DEV_EN &= ~DEV_LCD; /* Disable LCD controller */
 448     }
 449 }
 450
 451 bool lcd_enabled(void)
 452 {
 453     return display_on;
 454 }
 455
 456 void lcd_sleep(void)
 457 {
 458     LCD_REG_6 &= ~1;
 459     sleep(HZ/50);
 460
 461     if (power_on)
 462     {
 463         /* Turn off display */
 464         if (display_on)
 465             lcd_display_off();
 466
 467         power_on = false;
 468     }
 469
 470     /* Set standby mode */
 471     /* SAP2-0=000, BT2-0=000, AP2-0=000, DK=0, SLP=0, STB=1 */
 472     lcd_write_reg(R_POWER_CONTROL1, 0x0001);
 473 }
 474
 475 /* Copies a rectangle from one framebuffer to another. Can be used in
 476    single transfer mode with width = num pixels, and height = 1 which
 477    allows a full-width rectangle to be copied more efficiently. */
 478 extern void lcd_copy_buffer_rect(fb_data *dst, const fb_data *src,
 479                                  int width, int height);
 480 void lcd_update_rect(int x, int y, int width, int height)
 481 {
 482     fb_data *dst, *src;
 483
 484     if (!display_on)
 485         return;
 486
 487     if (x + width > LCD_WIDTH)
 488         width = LCD_WIDTH - x; /* Clip right */
 489     if (x < 0)
 490         width += x, x = 0; /* Clip left */
 491     if (width <= 0)
 492         return; /* nothing left to do */
 493
 494     if (y + height > LCD_HEIGHT)
 495         height = LCD_HEIGHT - y; /* Clip bottom */
 496     if (y < 0)
 497         height += y, y = 0; /* Clip top */
 498     if (height <= 0)
 499         return; /* nothing left to do */
 500
 501     dst = &lcd_driver_framebuffer[y][x];
 502     src = &lcd_framebuffer[y][x];
 503
 504     /* Copy part of the Rockbox framebuffer to the second framebuffer */
 505     if (width < LCD_WIDTH)
 506     {
 507         /* Not full width - do line-by-line */
 508         lcd_copy_buffer_rect(dst, src, width, height);
 509     }
 510     else
 511     {
 512         /* Full width - copy as one line */
 513         lcd_copy_buffer_rect(dst, src, LCD_WIDTH*height, 1);
 514     }
 515 }
 516
 517 void lcd_update(void)
 518 {
 519     if (!display_on)
 520         return;
 521
 522     /* Copy the Rockbox framebuffer to the second framebuffer */
 523     lcd_copy_buffer_rect(&lcd_driver_framebuffer[0][0],
 524                          &lcd_framebuffer[0][0], LCD_WIDTH*LCD_HEIGHT, 1);
 525 }
 526
 527
 528 /*** hardware configuration ***/
 529
 530 void lcd_set_contrast(int val)
 531 {
 532     /* TODO: Implement lcd_set_contrast() */
 533     (void)val;
 534 }
 535
 536 void lcd_set_invert_display(bool yesno)
 537 {
 538     bool dma_on = LCD_REG_6 & 1;
 539
 540     if (dma_on)
 541     {
 542         LCD_REG_6 &= ~1;    /* Disable DMA */
 543         sleep(HZ/50);       /* Wait for dma end (assuming 50Hz) */
 544         DEV_EN &= ~DEV_LCD; /* Disable LCD controller */
 545     }
 546
 547     r_disp_control_rev = yesno ? R_DISP_CONTROL_REV :
 548                                  R_DISP_CONTROL_NORMAL;
 549
 550     if (display_on)
 551     {
 552         /* PT1-0=00, VLE2-1=00, SPT=0, IB6(??)=1, GON=1, CL=0,
 553            DTE=1, REV=x, D1-0=11 */
 554         lcd_write_reg(R_DISP_CONTROL1, 0x0073 | r_disp_control_rev);
 555     }
 556
 557     if (dma_on)
 558     {
 559         DEV_EN |= DEV_LCD; /* Enable LCD controller */
 560         lcd_send_msg(0x70, R_RAM_WRITE_DATA); /* Set to RAM write mode */
 561         LCD_REG_6 |= 1;    /* Restart DMA */
 562     }
 563 }
 564
 565 /* turn the display upside down (call lcd_update() afterwards) */
 566 void lcd_set_flip(bool yesno)
 567 {
 568     bool dma_on = LCD_REG_6 & 1;
 569
 570     if (dma_on)
 571     {
 572         LCD_REG_6 &= ~1;    /* Disable DMA */
 573         sleep(HZ/50);       /* Wait for dma end (assuming 50Hz) */
 574         DEV_EN &= ~DEV_LCD; /* Disable LCD controller */
 575     }
 576
 577     r_drv_output_control = yesno ? R_DRV_OUTPUT_CONTROL_FLIPPED :
 578                                    R_DRV_OUTPUT_CONTROL_NORMAL;
 579
 580     if (power_on)
 581     {
 582         /* VSPL=0, HSPL=0, DPL=1, EPL=0, SM=0, GS=x, SS=x,
 583            NL4-0=11011 (G1-G224) */
 584         lcd_write_reg(R_DRV_OUTPUT_CONTROL, r_drv_output_control);
 585     }
 586
 587     if (dma_on)
 588     {
 589         DEV_EN |= DEV_LCD; /* Enable LCD controller */
 590         lcd_send_msg(0x70, R_RAM_WRITE_DATA); /* Set to RAM write mode */
 591         LCD_REG_6 |= 1;    /* Restart DMA */
 592     }
 593 }
 594
 595 /* Blitting functions */
 596
 597 void lcd_yuv_set_options(unsigned options)
 598 {
 599     lcd_yuv_options = options;
 600 }
 601
 602 /* Line write helper function for lcd_yuv_blit. Write two lines of yuv420. */
 603 extern void lcd_write_yuv420_lines(fb_data *dst,
 604                                    unsigned char const * const src[3],
 605                                    int width,
 606                                    int stride);
 607 extern void lcd_write_yuv420_lines_odither(fb_data *dst,
 608                                            unsigned char const * const src[3],
 609                                            int width,
 610                                            int stride,
 611                                            int x_screen, /* To align dither pattern */
 612                                            int y_screen);
 613 /* Performance function to blit a YUV bitmap directly to the LCD */
 614 /* For the e200 - show it rotated */
 615 /* So the LCD_WIDTH is now the height */
 616 void lcd_blit_yuv(unsigned char * const src[3],
 617                   int src_x, int src_y, int stride,
 618                   int x, int y, int width, int height)
 619 {
 620     unsigned char const * yuv_src[3];
 621     off_t z;
 622
 623     if (!display_on)
 624         return;
 625
 626     /* Sorry, but width and height must be >= 2 or else */
 627     width &= ~1;
 628     height >>= 1;
 629
 630     y = LCD_WIDTH - 1 - y;
 631     fb_data *dst = &lcd_driver_framebuffer[x][y];
 632
 633     z = stride*src_y;
 634     yuv_src[0] = src[0] + z + src_x;
 635     yuv_src[1] = src[1] + (z >> 2) + (src_x >> 1);
 636     yuv_src[2] = src[2] + (yuv_src[1] - src[1]);
 637
 638     if (lcd_yuv_options & LCD_YUV_DITHER)
 639     {
 640         do
 641         {
 642             lcd_write_yuv420_lines_odither(dst, yuv_src, width, stride, y, x);
 643             yuv_src[0] += stride << 1; /* Skip down two luma lines */
 644             yuv_src[1] += stride >> 1; /* Skip down one chroma line */
 645             yuv_src[2] += stride >> 1;
 646             dst -= 2;
 647             y -= 2;
 648         }
 649         while (--height > 0);
 650     }
 651     else
 652     {
 653         do
 654         {
 655             lcd_write_yuv420_lines(dst, yuv_src, width, stride);
 656             yuv_src[0] += stride << 1; /* Skip down two luma lines */
 657             yuv_src[1] += stride >> 1; /* Skip down one chroma line */
 658             yuv_src[2] += stride >> 1;
 659             dst -= 2;
 660         }
 661         while (--height > 0);
 662     }
 663 }