firmware/target/arm/system-pp5002.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 by Alan Korr
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #include "system.h"
  22
  23 #ifndef BOOTLOADER
  24 #include "adc-target.h"
  25 #include "button-target.h"
  26
  27 extern void TIMER1(void);
  28 extern void TIMER2(void);
  29
  30 void __attribute__((interrupt("IRQ"))) irq_handler(void)
  31 {
  32     if(CURRENT_CORE == CPU)
  33     {
  34         if (CPU_INT_STAT & TIMER1_MASK)
  35             TIMER1();
  36         else if (CPU_INT_STAT & TIMER2_MASK)
  37             TIMER2();
  38         else if (CPU_INT_STAT & GPIO_MASK)
  39         {
  40             if (GPIOA_INT_STAT)
  41                 ipod_3g_button_int();
  42 #ifdef IPOD_1G2G
  43             if (GPIOB_INT_STAT & 0x04)
  44                 ipod_2g_adc_int();
  45 #endif
  46         }
  47     }
  48     else
  49     {
  50         if (COP_INT_STAT & TIMER2_MASK)
  51             TIMER2();
  52     }
  53 }
  54
  55 #endif
  56
  57 /* TODO: The following two function have been lifted straight from IPL, and
  58    hence have a lot of numeric addresses used straight. I'd like to use
  59    #defines for these, but don't know what most of them are for or even what
  60    they should be named. Because of this I also have no way of knowing how
  61    to extend the funtions to do alternate cache configurations and/or
  62    some other CPU frequency scaling. */
  63
  64 #ifndef BOOTLOADER
  65 void ICODE_ATTR cpucache_flush(void)
  66 {
  67     intptr_t b, e;
  68
  69     for (b = (intptr_t)&CACHE_FLUSH_BASE, e = b + CACHE_SIZE;
  70          b < e; b += 16) {
  71         outl(0x0, b);
  72     }
  73 }
  74
  75 void ICODE_ATTR cpucache_invalidate(void)
  76 {
  77     intptr_t b, e;
  78
  79     /* Flush */
  80     for (b = (intptr_t)&CACHE_FLUSH_BASE, e = b + CACHE_SIZE;
  81          b < e; b += 16) {
  82         outl(0x0, b);
  83     }
  84
  85     /* Invalidate */
  86     for (b = (intptr_t)&CACHE_INVALIDATE_BASE, e = b + CACHE_SIZE;
  87          b < e; b += 16) {
  88         outl(0x0, b);
  89     }
  90 }
  91
  92 static void ipod_init_cache(void)
  93 {
  94     intptr_t b, e;
  95
  96 /* Initialising the cache in the iPod bootloader prevents Rockbox from starting */
  97     PROC_STAT &= ~0x700;
  98     outl(0x4000, 0xcf004020);
  99
 100     CACHE_CTL = CACHE_CTL_INIT;
 101
 102     for (b = (intptr_t)&CACHE_INVALIDATE_BASE, e = b + CACHE_SIZE;
 103          b < e; b += 16) {
 104         outl(0x0, b);
 105     }
 106
 107     /* Cache if (addr & mask) >> 16 == (mask & match) >> 16:
 108      * yes: 0x00000000 - 0x03ffffff
 109      *  no: 0x04000000 - 0x1fffffff
 110      * yes: 0x20000000 - 0x23ffffff
 111      *  no: 0x24000000 - 0x3fffffff <= range containing uncached alias
 112      */
 113     CACHE_MASK = 0x00001c00;
 114     CACHE_OPERATION = 0x3fc0;
 115
 116     CACHE_CTL = CACHE_CTL_INIT | CACHE_CTL_RUN;
 117 }
 118
 119 #ifdef HAVE_ADJUSTABLE_CPU_FREQ
 120 void set_cpu_frequency(long frequency)
 121 #else
 122 static void pp_set_cpu_frequency(long frequency)
 123 #endif
 124 {
 125     cpu_frequency = frequency;
 126
 127     PLL_CONTROL |= 0x6000;     /* make sure some enable bits are set */
 128     CLOCK_ENABLE = 0x01;       /* select source #1 */
 129
 130     switch (frequency)
 131     {
 132       case CPUFREQ_MAX:
 133         PLL_UNLOCK   = 0xd19b; /* unlock frequencies > 66MHz */
 134         CLOCK_SOURCE = 0xa9;   /* source #1: 24 Mhz, source #2..#4: PLL */
 135         PLL_CONTROL  = 0xe000; /* PLL enabled */
 136         PLL_DIV      = 3;      /* 10/3 * 24MHz */
 137         PLL_MULT     = 10;
 138         udelay(200);           /* wait for relock */
 139         break;
 140
 141       case CPUFREQ_NORMAL:
 142         CLOCK_SOURCE = 0xa9;   /* source #1: 24 Mhz, source #2..#4: PLL */
 143         PLL_CONTROL  = 0xe000; /* PLL enabled */
 144         PLL_DIV      = 4;      /* 5/4 * 24MHz */
 145         PLL_MULT     = 5;
 146         udelay(200);           /* wait for relock */
 147         break;
 148
 149       case CPUFREQ_SLEEP:
 150         CLOCK_SOURCE = 0x51;   /* source #2: 32kHz, #1, #2, #4: 24MHz */
 151         PLL_CONTROL  = 0x6000; /* PLL disabled */
 152         udelay(10000);         /* let 32kHz source stabilize? */
 153         break;
 154
 155       default:
 156         CLOCK_SOURCE = 0x55;   /* source #1..#4: 24 Mhz */
 157         PLL_CONTROL  = 0x6000; /* PLL disabled */
 158         cpu_frequency = CPUFREQ_DEFAULT;
 159         break;
 160     }
 161     CLOCK_ENABLE = 0x02;       /* select source #2 */
 162 }
 163 #endif /* !BOOTLOADER */
 164
 165 void system_init(void)
 166 {
 167 #ifndef BOOTLOADER
 168     if (CURRENT_CORE == CPU)
 169     {
 170         /* Remap the flash ROM on CPU, keep hidden from COP:
 171          * 0x00000000-0x03ffffff = 0x20000000-0x23ffffff */
 172         MMAP1_LOGICAL  = 0x20003c00;
 173         MMAP1_PHYSICAL = 0x00003f84;
 174
 175 #if defined(IPOD_1G2G) || defined(IPOD_3G)
 176         DEV_EN = 0x0b9f; /* don't clock unused PP5002 hardware components */
 177         outl(0x0035, 0xcf005004);  /* DEV_EN2 ? */
 178 #endif
 179
 180         INT_FORCED_CLR = -1;
 181         CPU_INT_DIS    = -1;
 182         COP_INT_DIS    = -1;
 183
 184         GPIOA_INT_EN   = 0;
 185         GPIOB_INT_EN   = 0;
 186         GPIOC_INT_EN   = 0;
 187         GPIOD_INT_EN   = 0;
 188
 189 #ifdef HAVE_ADJUSTABLE_CPU_FREQ
 190 #if NUM_CORES > 1
 191         cpu_boost_init();
 192 #endif
 193 #else
 194         pp_set_cpu_frequency(CPUFREQ_MAX);
 195 #endif
 196     }
 197     ipod_init_cache();
 198 #endif
 199 }
 200
 201 void system_reboot(void)
 202 {
 203     DEV_RS |= 4;
 204     while (1);
 205 }
 206
 207 void system_exception_wait(void)
 208 {
 209     /* FIXME: we just need the right buttons */
 210     CPU_INT_DIS = -1;
 211     COP_INT_DIS = -1;
 212
 213     /* Halt */
 214     sleep_core(CURRENT_CORE);
 215     while (1);
 216 }
 217
 218 int system_memory_guard(int newmode)
 219 {
 220     (void)newmode;
 221     return 0;
 222 }