firmware/target/arm/tcc780x/ata-nand-tcc780x.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2008 Rob Purchase
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19 #include "ata.h"
  20 #include "ata-target.h"
  21 #include "ata_idle_notify.h"
  22 #include "system.h"
  23 #include <string.h>
  24 #include "thread.h"
  25 #include "led.h"
  26 #include "disk.h"
  27 #include "panic.h"
  28 #include "usb.h"
  29
  30 /* for compatibility */
  31 int ata_spinup_time = 0;
  32
  33 long last_disk_activity = -1;
  34
  35 /** static, private data **/
  36 static bool initialized = false;
  37
  38 static long next_yield = 0;
  39 #define MIN_YIELD_PERIOD 2000
  40
  41 /* TCC780x NAND Flash Controller */
  42
  43 #define NFC_CMD    (*(volatile unsigned long *)0xF0053000)
  44 #define NFC_SADDR  (*(volatile unsigned long *)0xF005300C)
  45 #define NFC_SDATA  (*(volatile unsigned long *)0xF0053040)
  46 #define NFC_WDATA  (*(volatile unsigned long *)0xF0053010)
  47 #define NFC_CTRL   (*(volatile unsigned long *)0xF0053050)
  48 #define NFC_IREQ   (*(volatile unsigned long *)0xF0053060)
  49 #define NFC_RST    (*(volatile unsigned long *)0xF0053064)
  50
  51 /* NFC_CTRL flags */
  52 #define NFC_16BIT (1<<26)
  53 #define NFC_CS0   (1<<23)
  54 #define NFC_CS1   (1<<22)
  55 #define NFC_READY (1<<20)
  56
  57 /* Chip characteristics, initialised by nand_get_chip_info() */
  58
  59 static int page_size       = 0;
  60 static int spare_size      = 0;
  61 static int pages_per_block = 0;
  62 static int total_blocks    = 0;
  63 static int total_pages     = 0;
  64 static int row_cycles      = 0;
  65 static int col_cycles      = 0;
  66 static int total_banks     = 0;
  67
  68 /* Static page buffer */
  69
  70 #define MAX_PAGE_SIZE  4096
  71 #define MAX_SPARE_SIZE 128
  72
  73 static int page_buf[(MAX_PAGE_SIZE+MAX_SPARE_SIZE)/4];
  74
  75
  76 static void nand_chip_select(int chip)
  77 {
  78     if (chip == -1)
  79     {
  80         /* Disable both chip selects */
  81         GPIOB_CLEAR = (1<<21);
  82         NFC_CTRL |= NFC_CS0 | NFC_CS1;
  83     }
  84     else
  85     {
  86         /* NFC chip select */
  87         if (chip & 1)
  88         {
  89             NFC_CTRL &= ~NFC_CS0;
  90             NFC_CTRL |= NFC_CS1;
  91         }
  92         else
  93         {
  94             NFC_CTRL |= NFC_CS0;
  95             NFC_CTRL &= ~NFC_CS1;
  96         }
  97
  98         /* Secondary chip select */
  99         if (chip & 2)
 100         {
 101             GPIOB_SET = (1<<21);
 102         }
 103         else
 104         {
 105             GPIOB_CLEAR = (1<<21);
 106         }
 107     }
 108 }
 109
 110
 111 static void nand_read_id(int chip, unsigned char* id_buf)
 112 {
 113     /* Enable NFC bus clock */
 114     BCLKCTR |= DEV_NAND;
 115
 116     /* Reset NAND controller */
 117     NFC_RST = 0;
 118
 119     /* Set slow cycle timings since the chip is as yet unidentified */
 120     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x353;
 121
 122     nand_chip_select(chip);
 123
 124     /* Set write protect */
 125     GPIOB_CLEAR = (1<<19);
 126
 127     /* Reset command */
 128     NFC_CMD = 0xFF;
 129
 130     /* Set 8-bit data width */
 131     NFC_CTRL &= ~NFC_16BIT;
 132
 133     /* Read ID command, single address cycle */
 134     NFC_CMD   = 0x90;
 135     NFC_SADDR = 0x00;
 136
 137     /* Read the 5 single bytes */
 138     id_buf[0] = NFC_SDATA & 0xFF;
 139     id_buf[1] = NFC_SDATA & 0xFF;
 140     id_buf[2] = NFC_SDATA & 0xFF;
 141     id_buf[3] = NFC_SDATA & 0xFF;
 142     id_buf[4] = NFC_SDATA & 0xFF;
 143
 144     nand_chip_select(-1);
 145
 146     /* Disable NFC bus clock */
 147     BCLKCTR &= ~DEV_NAND;
 148 }
 149
 150
 151 static void nand_read_uid(int chip, unsigned int* uid_buf)
 152 {
 153     int i;
 154
 155     /* Enable NFC bus clock */
 156     BCLKCTR |= DEV_NAND;
 157
 158     /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
 159     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
 160
 161     nand_chip_select(chip);
 162
 163     /* Set write protect */
 164     GPIOB_CLEAR = 1<<19;
 165
 166     /* Set 8-bit data width */
 167     NFC_CTRL &= ~NFC_16BIT;
 168
 169     /* Undocumented (SAMSUNG specific?) commands set the chip into a
 170        special mode allowing a normally-hidden UID block to be read. */
 171     NFC_CMD = 0x30;
 172     NFC_CMD = 0x65;
 173
 174     /* Read command */
 175     NFC_CMD = 0x00;
 176
 177     /* Write row/column address */
 178     for (i = 0; i < col_cycles; i++) NFC_SADDR = 0;
 179     for (i = 0; i < row_cycles; i++) NFC_SADDR = 0;
 180
 181     /* End of read */
 182     NFC_CMD = 0x30;
 183
 184     /* Wait until complete */
 185     while (!(NFC_CTRL & NFC_READY)) {};
 186
 187     /* Copy data to buffer (data repeats after 8 words) */
 188     for (i = 0; i < 8; i++)
 189     {
 190         uid_buf[i] = NFC_WDATA;
 191     }
 192
 193     /* Reset the chip back to normal mode */
 194     NFC_CMD = 0xFF;
 195
 196     nand_chip_select(-1);
 197
 198     /* Disable NFC bus clock */
 199     BCLKCTR &= ~DEV_NAND;
 200 }
 201
 202
 203 /* NB: size must be divisible by 4 due to 32-bit read */
 204 static void nand_read(int chip, int row, int column, int size)
 205 {
 206     int i;
 207
 208     /* Enable NFC bus clock */
 209     BCLKCTR |= DEV_NAND;
 210
 211     /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
 212     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
 213
 214     nand_chip_select(chip);
 215
 216     /* Set write protect */
 217     GPIOB_CLEAR = (1<<19);
 218
 219     /* Set 8-bit data width */
 220     NFC_CTRL &= ~NFC_16BIT;
 221
 222     /* Read command */
 223     NFC_CMD = 0x00;
 224
 225     /* Write column address */
 226     for (i = 0; i < col_cycles; i++)
 227     {
 228         NFC_SADDR = column & 0xFF;
 229         column = column >> 8;
 230     }
 231
 232     /* Write row address */
 233     for (i = 0; i < row_cycles; i++)
 234     {
 235         NFC_SADDR = row & 0xFF;
 236         row = row >> 8;
 237     }
 238
 239     /* End of read command */
 240     NFC_CMD = 0x30;
 241
 242     /* Wait until complete */
 243     while (!(NFC_CTRL & NFC_READY)) {};
 244
 245     /* Read data into page buffer */
 246     for (i = 0; i < (size/4); i++)
 247     {
 248         page_buf[i] = NFC_WDATA;
 249     }
 250
 251     nand_chip_select(-1);
 252
 253     /* Disable NFC bus clock */
 254     BCLKCTR &= ~DEV_NAND;
 255 }
 256
 257
 258 /* TEMP testing function */
 259 #include "lcd.h"
 260
 261 extern int line;
 262 static unsigned char str_buf[MAX_PAGE_SIZE];
 263
 264 static void nand_test(void)
 265 {
 266     int i,j,row;
 267     int pages_per_mb = 1048576/page_size;
 268
 269     printf("%d banks", total_banks);
 270     printf("* %d pages", total_pages);
 271     printf("* %d bytes per page", page_size);
 272
 273     while (!button_read_device()) {};
 274
 275     /* Now for fun, scan the raw pages for 'TAG' and display the contents */
 276
 277     row = 0;
 278     while (row < total_pages)
 279     {
 280         bool found = false;
 281         unsigned char* buf_ptr = (unsigned char*)page_buf;
 282
 283         line = 0;
 284
 285         if (row % pages_per_mb == 0) printf("%dMb", row/pages_per_mb);
 286
 287         /* Read a page from chip 0 */
 288         nand_read(0, row, 0, page_size);
 289
 290         for (j = 0; j < page_size; j++)
 291         {
 292             if (buf_ptr[j] == 'T' && buf_ptr[j+1] == 'A' && buf_ptr[j+2] == 'G')
 293                 found = true;
 294         }
 295
 296         if (found)
 297         {
 298             unsigned char* str_ptr = str_buf;
 299
 300             printf("Row %d:", row);
 301
 302             /* Copy ascii-readable parts out to a string */
 303             for (i = 0; i < page_size; i++)
 304             {
 305                 str_buf[i] = ' ';
 306                 if (buf_ptr[i] > 31 && buf_ptr[i] < 128)
 307                 {
 308                     *str_ptr++ = buf_ptr[i];
 309                 }
 310             }
 311
 312             str_ptr = str_buf;
 313
 314             /* Nasty piece of code to display the text in a readable manner */
 315             for (i = 1; i < 30; i++)
 316             {
 317                 for (j = 0; j < 48; j++)
 318                 {
 319                     /* In the absence of a putc() we have this mess... */
 320                     unsigned char buf2[2];
 321                     buf2[0] = *str_ptr++;
 322                     buf2[1] = '\0';
 323                     lcd_puts(j,i,buf2);
 324                 }
 325             }
 326
 327             /* Alternate hex display code
 328             for (i = 0; i<112; i+=4)
 329             {
 330                 printf("0x%08x 0x%08x 0x%08x 0x%08x",
 331                        page_buf[i],page_buf[i+1],page_buf[i+2],page_buf[i+3]);
 332             }
 333             */
 334
 335             while (!button_read_device()) {};
 336
 337             lcd_clear_display();
 338         }
 339         row++;
 340     }
 341 }
 342
 343
 344 static void nand_get_chip_info(void)
 345 {
 346     bool found = false;
 347     unsigned char manuf_id;
 348     unsigned char id_buf[5];
 349
 350     /* Read chip id from bank 0 */
 351     nand_read_id(0, id_buf);
 352
 353     manuf_id = id_buf[0];
 354
 355     switch (manuf_id)
 356     {
 357         case 0xEC:  /* SAMSUNG */
 358
 359             switch(id_buf[1]) /* Chip Id */
 360             {
 361                 case 0xD5:  /* K9LAG08UOM */
 362
 363                     page_size       = 2048;
 364                     spare_size      = 64;
 365                     pages_per_block = 128;
 366                     total_blocks    = 8192;
 367                     col_cycles      = 2;
 368                     row_cycles      = 3;
 369
 370                     found = true;
 371                     break;
 372
 373                 case 0xD7:  /* K9LBG08UOM */
 374
 375                     page_size       = 4096;
 376                     spare_size      = 128;
 377                     pages_per_block = 128;
 378                     total_blocks    = 8192;
 379                     col_cycles      = 2;
 380                     row_cycles      = 3;
 381
 382                     found = true;
 383                     break;
 384             }
 385             break;
 386     }
 387
 388     if (!found)
 389     {
 390         panicf("Unknown NAND: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
 391                 id_buf[0],id_buf[1],id_buf[2],id_buf[3],id_buf[4]);
 392     }
 393
 394     total_pages = total_blocks * pages_per_block;
 395
 396     /* Establish how many banks are present */
 397
 398     nand_read_id(1, id_buf);
 399
 400     if (id_buf[0] == manuf_id)
 401     {
 402         /* Bank 1 is populated, now check if banks 2/3 are valid */
 403         nand_read_id(2, id_buf);
 404
 405         if (id_buf[0] == manuf_id)
 406         {
 407             /* Bank 2 returned matching id - check if 2/3 are shadowing 0/1 */
 408             unsigned int uid_buf0[8];
 409             unsigned int uid_buf2[8];
 410
 411             nand_read_uid(0, uid_buf0);
 412             nand_read_uid(2, uid_buf2);
 413
 414             if (memcmp(uid_buf0, uid_buf2, 32) == 0)
 415             {
 416                 /* UIDs match, assume banks 2/3 are shadowing 0/1 */
 417                 total_banks = 2;
 418             }
 419             else
 420             {
 421                 /* UIDs differ, assume banks 2/3 are valid */
 422                 total_banks = 4;
 423             }
 424         }
 425         else
 426         {
 427             /* Bank 2 returned differing id - assume 2/3 are junk */
 428             total_banks = 2;
 429         }
 430     }
 431     else
 432     {
 433         /* Bank 1 returned differing id - assume it is junk */
 434         total_banks = 1;
 435     }
 436 }
 437
 438
 439 /* API Functions */
 440
 441 void ata_led(bool onoff)
 442 {
 443     led(onoff);
 444 }
 445
 446 int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
 447                      void* inbuf)
 448 {
 449     #warning function not implemented
 450     (void)start;
 451     (void)incount;
 452     (void)inbuf;
 453     return 0;
 454 }
 455
 456 int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
 457                       const void* outbuf)
 458 {
 459     #warning function not implemented
 460     (void)start;
 461     (void)count;
 462     (void)outbuf;
 463     return 0;
 464 }
 465
 466 void ata_spindown(int seconds)
 467 {
 468     /* null */
 469     (void)seconds;
 470 }
 471
 472 bool ata_disk_is_active(void)
 473 {
 474     #warning function not implemented
 475     return 0;
 476 }
 477
 478 void ata_sleep(void)
 479 {
 480     #warning function not implemented
 481 }
 482
 483 void ata_spin(void)
 484 {
 485     /* null */
 486 }
 487
 488 /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
 489 int ata_hard_reset(void)
 490 {
 491     #warning function not implemented
 492     return 0;
 493 }
 494
 495 int ata_soft_reset(void)
 496 {
 497     #warning function not implemented
 498     return 0;
 499 }
 500
 501 void ata_enable(bool on)
 502 {
 503     /* null - flash controller is enabled/disabled as needed. */
 504     (void)on;
 505 }
 506
 507 int ata_init(void)
 508 {
 509     if (!initialized)
 510     {
 511         /* Get chip characteristics and number of banks */
 512         nand_get_chip_info();
 513
 514         /* TODO: Scan all banks for bad blocks */
 515
 516         /* TODO: Build physical->logical address translation */
 517
 518         initialized = true;
 519     }
 520
 521     /* TEMP - print out some diagnostics */
 522     nand_test();
 523
 524     return 0;
 525 }