Sansa AMS: Time has shown that switching between 16 and 32bit mode costs much time...
[kugel-rb.git] / firmware / target / arm / as3525 / pcm-as3525.c
blob88aaaf92209fa0ca8be55ab3b33123bce4b42e7e
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright © 2008-2009 Rafaël Carré
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
21 #include "system.h"
22 #include "audio.h"
23 #include "string.h"
24 #include "as3525.h"
25 #include "pl081.h"
26 #include "dma-target.h"
27 #include "clock-target.h"
28 #include "panic.h"
29 #include "as3514.h"
30 #include "audiohw.h"
31 #include "mmu-arm.h"
33 #define MAX_TRANSFER (4*((1<<11)-1)) /* maximum data we can transfer via DMA
34 * i.e. 32 bits at once (size of I2SO_DATA)
35 * and the number of 32bits words has to
36 * fit in 11 bits of DMA register */
38 static unsigned char *dma_start_addr;
39 static size_t dma_size; /* in 4*32 bits */
40 static void dma_callback(void);
41 static int locked = 0;
43 /* Mask the DMA interrupt */
44 void pcm_play_lock(void)
46 if(++locked == 1)
47 VIC_INT_EN_CLEAR = INTERRUPT_DMAC;
50 /* Unmask the DMA interrupt if enabled */
51 void pcm_play_unlock(void)
53 if(--locked == 0)
54 VIC_INT_ENABLE = INTERRUPT_DMAC;
57 static void play_start_pcm(void)
59 const unsigned char* addr = dma_start_addr;
60 size_t size = dma_size;
61 if(size > MAX_TRANSFER)
62 size = MAX_TRANSFER;
64 dma_size -= size;
65 dma_start_addr += size;
67 clean_dcache_range((void*)addr, size); /* force write back */
68 dma_enable_channel(1, (void*)addr, (void*)I2SOUT_DATA, DMA_PERI_I2SOUT,
69 DMAC_FLOWCTRL_DMAC_MEM_TO_PERI, true, false, size >> 2, DMA_S1,
70 dma_callback);
73 static void dma_callback(void)
75 if(!dma_size)
77 register pcm_more_callback_type get_more = pcm_callback_for_more;
78 if(get_more)
79 get_more(&dma_start_addr, &dma_size);
82 if(!dma_size)
84 pcm_play_dma_stop();
85 pcm_play_dma_stopped_callback();
87 else
88 play_start_pcm();
91 void pcm_play_dma_start(const void *addr, size_t size)
93 dma_size = size;
94 dma_start_addr = (unsigned char*)addr;
96 CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
97 CGU_AUDIO |= (1<<11);
99 dma_retain();
101 play_start_pcm();
104 void pcm_play_dma_stop(void)
106 dma_disable_channel(1);
107 dma_size = 0;
109 dma_release();
111 CGU_PERI &= ~CGU_I2SOUT_APB_CLOCK_ENABLE;
112 CGU_AUDIO &= ~(1<<11);
115 void pcm_play_dma_pause(bool pause)
117 if(pause)
118 dma_disable_channel(1);
119 else
120 play_start_pcm();
123 void pcm_play_dma_init(void)
125 CGU_PERI |= CGU_I2SOUT_APB_CLOCK_ENABLE;
127 I2SOUT_CONTROL = (1<<6)|(1<<3) /* enable dma, stereo */;
129 audiohw_preinit();
132 void pcm_postinit(void)
134 audiohw_postinit();
137 void pcm_dma_apply_settings(void)
139 unsigned long frequency = pcm_sampr;
141 /* TODO : use a table ? */
142 const int divider = (((AS3525_PLLA_FREQ/128) + (frequency/2)) / frequency) - 1;
144 int cgu_audio = CGU_AUDIO; /* read register */
145 cgu_audio &= ~(511 << 2); /* clear i2sout divider */
146 cgu_audio |= divider << 2; /* set new i2sout divider */
147 CGU_AUDIO = cgu_audio; /* write back register */
150 size_t pcm_get_bytes_waiting(void)
152 return dma_size;
155 const void * pcm_play_dma_get_peak_buffer(int *count)
157 *count = dma_size >> 2;
158 return (const void*)dma_start_addr;
161 #ifdef HAVE_PCM_DMA_ADDRESS
162 void * pcm_dma_addr(void *addr)
164 if (addr != NULL)
165 addr = UNCACHED_ADDR(addr);
166 return addr;
168 #endif
171 /****************************************************************************
172 ** Recording DMA transfer
174 #ifdef HAVE_RECORDING
175 #define I2SIN_RECORDING_MASK ( I2SIN_MASK_POER | I2SIN_MASK_PUER | \
176 I2SIN_MASK_POHF | I2SIN_MASK_POAF | I2SIN_MASK_POF )
178 static int rec_locked = 0;
179 static unsigned int *rec_start_addr;
180 static size_t rec_size;
182 void pcm_rec_lock(void)
184 if(++rec_locked == 1) {
185 int vic_state = disable_irq_save();
186 VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
187 I2SIN_MASK = 0;
188 restore_irq( vic_state );
192 void pcm_rec_unlock(void)
194 if(--rec_locked == 0) {
195 int vic_state = disable_irq_save();
196 VIC_INT_ENABLE = INTERRUPT_I2SIN;
197 I2SIN_MASK = I2SIN_RECORDING_MASK;
198 restore_irq( vic_state );
203 void pcm_record_more(void *start, size_t size)
205 rec_start_addr = start;
206 rec_size = size;
210 void pcm_rec_dma_stop(void)
212 int vic_state = disable_irq_save();
213 VIC_INT_EN_CLEAR = INTERRUPT_I2SIN;
214 I2SIN_MASK = 0;
215 restore_irq( vic_state );
217 I2SOUT_CONTROL &= ~(1<<5); /* source = i2soutif fifo */
218 CGU_AUDIO &= ~((1<<23)|(1<<11));
219 CGU_PERI &= ~(CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE);
223 void INT_I2SIN(void)
225 register int status;
226 register pcm_more_callback_type2 more_ready;
228 status = I2SIN_STATUS;
230 if ( status & ((1<<6)|(1<<0)) ) /* errors */
231 panicf("i2sin error: 0x%x = %s %s", status,
232 (status & (1<<6)) ? "push" : "",
233 (status & (1<<0)) ? "pop" : ""
236 /* called at half full so it's safe to pull 16 FIFO reads in one chunk */
237 if( rec_size >= 16*4 )
239 /* unrolled loop */
240 *rec_start_addr++ = *I2SIN_DATA;
241 *rec_start_addr++ = *I2SIN_DATA;
242 *rec_start_addr++ = *I2SIN_DATA;
243 *rec_start_addr++ = *I2SIN_DATA;
245 *rec_start_addr++ = *I2SIN_DATA;
246 *rec_start_addr++ = *I2SIN_DATA;
247 *rec_start_addr++ = *I2SIN_DATA;
248 *rec_start_addr++ = *I2SIN_DATA;
250 *rec_start_addr++ = *I2SIN_DATA;
251 *rec_start_addr++ = *I2SIN_DATA;
252 *rec_start_addr++ = *I2SIN_DATA;
253 *rec_start_addr++ = *I2SIN_DATA;
255 *rec_start_addr++ = *I2SIN_DATA;
256 *rec_start_addr++ = *I2SIN_DATA;
257 *rec_start_addr++ = *I2SIN_DATA;
258 *rec_start_addr++ = *I2SIN_DATA;
260 rec_size -= 16*4; /* 16x4byte reads */
263 /* read out any odd samples left */
264 while (((I2SIN_RAW_STATUS & (1<<5)) == 0) && rec_size)
266 /* 14 bits per sample = 1 32 bits word */
267 *rec_start_addr++ = *I2SIN_DATA;
268 rec_size -= 4;
271 I2SIN_CLEAR = status;
273 if(!rec_size)
275 more_ready = pcm_callback_more_ready;
276 if(!more_ready || more_ready(0) < 0)
278 /* Finished recording */
279 pcm_rec_dma_stop();
280 pcm_rec_dma_stopped_callback();
286 void pcm_rec_dma_start(void *addr, size_t size)
288 rec_start_addr = addr;
289 rec_size = size;
291 CGU_PERI |= CGU_I2SIN_APB_CLOCK_ENABLE|CGU_I2SOUT_APB_CLOCK_ENABLE;
292 CGU_AUDIO |= ((1<<23)|(1<<11));
294 I2SOUT_CONTROL |= 1<<5; /* source = loopback from i2sin fifo */
296 /* 14 bits samples, i2c clk src = I2SOUTIF, sdata src = AFE,
297 * data valid at positive edge of SCLK */
298 I2SIN_CONTROL = (1<<5) | (1<<2);
300 unsigned long tmp;
301 while ( ( I2SIN_RAW_STATUS & ( 1<<5 ) ) == 0 )
302 tmp = *I2SIN_DATA; /* FLUSH FIFO */
303 I2SIN_CLEAR = (1<<6)|(1<<0); /* push error, pop error */
304 I2SIN_MASK = I2SIN_RECORDING_MASK;
306 VIC_INT_ENABLE = INTERRUPT_I2SIN;
310 void pcm_rec_dma_close(void)
312 pcm_rec_dma_stop();
316 void pcm_rec_dma_init(void)
318 unsigned long frequency = pcm_sampr;
320 /* TODO : use a table ? */
321 const int divider = (((AS3525_PLLA_FREQ/128) + (frequency/2)) / frequency) - 1;
323 int cgu_audio = CGU_AUDIO; /* read register */
324 cgu_audio &= ~(3 << 12); /* clear i2sin clocksource */
325 cgu_audio |= (1 << 12); /* set to PLLA */
326 cgu_audio &= ~(511 << 14); /* clear i2sin divider */
327 cgu_audio |= divider << 14; /* set new i2sin divider */
328 CGU_AUDIO = cgu_audio; /* write back register */
332 const void * pcm_rec_dma_get_peak_buffer(int *count)
334 const void *peak_buffer;
336 pcm_rec_lock();
337 *count = rec_size >> 2;
338 peak_buffer = (const void*)rec_start_addr;
339 pcm_rec_unlock();
341 return peak_buffer;
344 #endif /* HAVE_RECORDING */