firmware/target/arm/tcc780x/ata-nand-tcc780x.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2008 Rob Purchase
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19 #include "ata.h"
  20 #include "ata-target.h"
  21 #include "system.h"
  22 #include <string.h>
  23 #include "led.h"
  24 #include "panic.h"
  25
  26 /* The NAND driver is currently work-in-progress and as such contains
  27    some dead code and debug stuff, such as the next few lines. */
  28 #include "lcd.h"
  29 #include "font.h"
  30 #include "button.h"
  31 #include <sprintf.h>
  32
  33 /* #define USE_TCC_LPT */
  34 /* #define USE_ECC_CORRECTION */
  35
  36 /* for compatibility */
  37 int ata_spinup_time = 0;
  38
  39 long last_disk_activity = -1;
  40
  41 /** static, private data **/
  42 static bool initialized = false;
  43
  44 static struct mutex ata_mtx SHAREDBSS_ATTR;
  45
  46 #define SECTOR_SIZE 512
  47
  48 /* TCC780x NAND Flash Controller */
  49
  50 #define NFC_CMD    (*(volatile unsigned long *)0xF0053000)
  51 #define NFC_SADDR  (*(volatile unsigned long *)0xF005300C)
  52 #define NFC_SDATA  (*(volatile unsigned long *)0xF0053040)
  53 #define NFC_WDATA  (*(volatile unsigned long *)0xF0053010)
  54 #define NFC_CTRL   (*(volatile unsigned long *)0xF0053050)
  55     #define NFC_16BIT (1<<26)
  56     #define NFC_CS0   (1<<23)
  57     #define NFC_CS1   (1<<22)
  58     #define NFC_READY (1<<20)
  59 #define NFC_IREQ   (*(volatile unsigned long *)0xF0053060)
  60 #define NFC_RST    (*(volatile unsigned long *)0xF0053064)
  61
  62 /* TCC780x ECC Controller */
  63
  64 #define ECC_CTRL    (*(volatile unsigned long *)0xF005B000)
  65     #define ECC_M4EN  (1<<6)
  66     #define ECC_ENC   (1<<27)
  67     #define ECC_READY (1<<26)
  68 #define ECC_BASE    (*(volatile unsigned long *)0xF005B004)
  69 #define ECC_CLR     (*(volatile unsigned long *)0xF005B00C)
  70 #define ECC_MLC0W   (*(volatile unsigned long *)0xF005B030)
  71 #define ECC_MLC1W   (*(volatile unsigned long *)0xF005B034)
  72 #define ECC_MLC2W   (*(volatile unsigned long *)0xF005B038)
  73 #define ECC_ERRADDR (*(volatile unsigned long *)0xF005B050)
  74 #define ECC_ERRDATA (*(volatile unsigned long *)0xF005B060)
  75 #define ECC_ERR     (*(volatile unsigned long *)0xF005B070)
  76
  77 /* GPIOs */
  78
  79 #define NAND_GPIO_SET(n)    GPIOB_SET = n
  80 #define NAND_GPIO_CLEAR(n)  GPIOB_CLEAR = n
  81 #define NAND_GPIO_OUT_EN(n) GPIOB_DIR |= n
  82
  83 #define WE_GPIO_BIT (1<<19) /* Write Enable */
  84 #define CS_GPIO_BIT (1<<21) /* Chip Select (4 banks when used with NFC_CSx) */
  85
  86 /* Chip characteristics, initialised by nand_get_chip_info() */
  87
  88 static int page_size       = 0;
  89 static int spare_size      = 0;
  90 static int pages_per_block = 0;
  91 static int blocks_per_bank = 0;
  92 static int pages_per_bank  = 0;
  93 static int row_cycles      = 0;
  94 static int col_cycles      = 0;
  95 static int total_banks     = 0;
  96 static int sectors_per_page    = 0;
  97 static int bytes_per_segment   = 0;
  98 static int sectors_per_segment = 0;
  99 static int segments_per_bank   = 0;
 100
 101 /* Maximum values for static buffers */
 102
 103 #define MAX_PAGE_SIZE       4096
 104 #define MAX_SPARE_SIZE      128
 105 #define MAX_BLOCKS_PER_BANK 8192
 106 #define MAX_PAGES_PER_BLOCK 128
 107 #define BLOCKS_PER_SEGMENT  4
 108 #define MAX_BANKS           4
 109
 110 #define MAX_SEGMENTS (MAX_BLOCKS_PER_BANK * MAX_BANKS / BLOCKS_PER_SEGMENT)
 111
 112 /* Logical/Physical translation table */
 113
 114 struct lpt_entry
 115 {
 116     short bank;
 117     short phys_segment;
 118 };
 119 static struct lpt_entry lpt_lookup[MAX_SEGMENTS];
 120
 121 /* Write Caches */
 122
 123 #define MAX_WRITE_CACHES 8
 124
 125 struct write_cache
 126 {
 127     short bank;
 128     short phys_segment;
 129     short log_segment;
 130     short page_map[MAX_PAGES_PER_BLOCK * BLOCKS_PER_SEGMENT];
 131 };
 132 static struct write_cache write_caches[MAX_WRITE_CACHES];
 133
 134 static int write_caches_in_use = 0;
 135
 136 #ifdef USE_TCC_LPT
 137 /* Read buffer (used for reading LPT blocks only) */
 138 static unsigned char page_buf[MAX_PAGE_SIZE + MAX_SPARE_SIZE]
 139        __attribute__ ((aligned (4)));
 140 #endif
 141
 142 #ifdef USE_ECC_CORRECTION
 143 static unsigned int ecc_sectors_corrected = 0;
 144 static unsigned int ecc_bits_corrected = 0;
 145 static unsigned int ecc_fail_count = 0;
 146 #endif
 147
 148
 149 /* Conversion functions */
 150
 151 static inline int phys_segment_to_page_addr(int phys_segment, int page_in_seg)
 152 {
 153     int page_addr = phys_segment * pages_per_block * 2;
 154
 155     if (page_in_seg & 1)
 156     {
 157         /* Data is located in block+1 */
 158         page_addr += pages_per_block;
 159     }
 160
 161     if (page_in_seg & 2)
 162     {
 163         /* Data is located in second plane */
 164         page_addr += (blocks_per_bank/2) * pages_per_block;
 165     }
 166
 167     page_addr += page_in_seg/4;
 168
 169     return page_addr;
 170 }
 171
 172
 173 /* NAND physical access functions */
 174
 175 static void nand_chip_select(int bank)
 176 {
 177     if (bank == -1)
 178     {
 179         /* Disable both chip selects */
 180         NAND_GPIO_CLEAR(CS_GPIO_BIT);
 181         NFC_CTRL |= NFC_CS0 | NFC_CS1;
 182     }
 183     else
 184     {
 185         /* NFC chip select */
 186 #ifdef USE_TCC_LPT
 187         if (!(bank & 1))
 188 #else
 189         if (bank & 1)
 190 #endif
 191         {
 192             NFC_CTRL &= ~NFC_CS0;
 193             NFC_CTRL |= NFC_CS1;
 194         }
 195         else
 196         {
 197             NFC_CTRL |= NFC_CS0;
 198             NFC_CTRL &= ~NFC_CS1;
 199         }
 200
 201         /* Secondary chip select */
 202         if (bank & 2)
 203             NAND_GPIO_SET(CS_GPIO_BIT);
 204         else
 205             NAND_GPIO_CLEAR(CS_GPIO_BIT);
 206     }
 207 }
 208
 209
 210 static void nand_read_id(int bank, unsigned char* id_buf)
 211 {
 212     int i;
 213
 214     /* Enable NFC bus clock */
 215     BCLKCTR |= DEV_NAND;
 216
 217     /* Reset NAND controller */
 218     NFC_RST = 0;
 219
 220     /* Set slow cycle timings since the chip is as yet unidentified */
 221     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x353;
 222
 223     nand_chip_select(bank);
 224
 225     /* Set write protect */
 226     NAND_GPIO_CLEAR(WE_GPIO_BIT);
 227
 228     /* Reset command */
 229     NFC_CMD = 0xFF;
 230
 231     /* Set 8-bit data width */
 232     NFC_CTRL &= ~NFC_16BIT;
 233
 234     /* Read ID command, single address cycle */
 235     NFC_CMD   = 0x90;
 236     NFC_SADDR = 0x00;
 237
 238     /* Read the 5 chip ID bytes */
 239     for (i = 0; i < 5; i++)
 240     {
 241         id_buf[i] = NFC_SDATA & 0xFF;
 242     }
 243
 244     nand_chip_select(-1);
 245
 246     /* Disable NFC bus clock */
 247     BCLKCTR &= ~DEV_NAND;
 248 }
 249
 250
 251 static void nand_read_uid(int bank, unsigned int* uid_buf)
 252 {
 253     int i;
 254
 255     /* Enable NFC bus clock */
 256     BCLKCTR |= DEV_NAND;
 257
 258     /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
 259     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
 260
 261     nand_chip_select(bank);
 262
 263     /* Set write protect */
 264     NAND_GPIO_CLEAR(WE_GPIO_BIT);
 265
 266     /* Set 8-bit data width */
 267     NFC_CTRL &= ~NFC_16BIT;
 268
 269     /* Undocumented (SAMSUNG specific?) commands set the chip into a
 270        special mode allowing a normally-hidden UID block to be read. */
 271     NFC_CMD = 0x30;
 272     NFC_CMD = 0x65;
 273
 274     /* Read command */
 275     NFC_CMD = 0x00;
 276
 277     /* Write row/column address */
 278     for (i = 0; i < col_cycles; i++) NFC_SADDR = 0;
 279     for (i = 0; i < row_cycles; i++) NFC_SADDR = 0;
 280
 281     /* End of read */
 282     NFC_CMD = 0x30;
 283
 284     /* Wait until complete */
 285     while (!(NFC_CTRL & NFC_READY)) {};
 286
 287     /* Copy data to buffer (data repeats after 8 words) */
 288     for (i = 0; i < 8; i++)
 289     {
 290         uid_buf[i] = NFC_WDATA;
 291     }
 292
 293     /* Reset the chip back to normal mode */
 294     NFC_CMD = 0xFF;
 295
 296     nand_chip_select(-1);
 297
 298     /* Disable NFC bus clock */
 299     BCLKCTR &= ~DEV_NAND;
 300 }
 301
 302
 303 static void nand_read_raw(int bank, int row, int column, int size, void* buf)
 304 {
 305     int i;
 306
 307     /* Enable NFC bus clock */
 308     BCLKCTR |= DEV_NAND;
 309
 310     /* Set cycle timing (stp = 1, pw = 3, hold = 1) */
 311     NFC_CTRL = (NFC_CTRL &~0xFFF) | 0x131;
 312
 313     nand_chip_select(bank);
 314
 315     /* Set write protect */
 316     NAND_GPIO_CLEAR(WE_GPIO_BIT);
 317
 318     /* Set 8-bit data width */
 319     NFC_CTRL &= ~NFC_16BIT;
 320
 321     /* Read command */
 322     NFC_CMD = 0x00;
 323
 324     /* Write column address */
 325     for (i = 0; i < col_cycles; i++)
 326     {
 327         NFC_SADDR = column & 0xFF;
 328         column = column >> 8;
 329     }
 330
 331     /* Write row address */
 332     for (i = 0; i < row_cycles; i++)
 333     {
 334         NFC_SADDR = row & 0xFF;
 335         row = row >> 8;
 336     }
 337
 338     /* End of read command */
 339     NFC_CMD = 0x30;
 340
 341     /* Wait until complete */
 342     while (!(NFC_CTRL & NFC_READY)) {};
 343
 344     /* Read data into page buffer */
 345     if (((unsigned int)buf & 3) || (size & 3))
 346     {
 347         /* Use byte copy since either the buffer or size are not word-aligned */
 348         /* TODO: Byte copy only where necessary (use words for mid-section) */
 349         for (i = 0; i < size; i++)
 350         {
 351             ((unsigned char*)buf)[i] = NFC_SDATA;
 352         }
 353     }
 354     else
 355     {
 356         /* Use 4-byte copy as buffer and size are both word-aligned */
 357         for (i = 0; i < (size/4); i++)
 358         {
 359             ((unsigned int*)buf)[i] = NFC_WDATA;
 360         }
 361     }
 362
 363     nand_chip_select(-1);
 364
 365     /* Disable NFC bus clock */
 366     BCLKCTR &= ~DEV_NAND;
 367 }
 368
 369
 370 static void nand_get_chip_info(void)
 371 {
 372     bool found = false;
 373     unsigned char manuf_id;
 374     unsigned char id_buf[8];
 375
 376     /* Read chip id from bank 0 */
 377     nand_read_id(0, id_buf);
 378
 379     manuf_id = id_buf[0];
 380
 381     switch (manuf_id)
 382     {
 383         case 0xEC:  /* SAMSUNG */
 384
 385             switch(id_buf[1]) /* Chip Id */
 386             {
 387                 case 0xD5:  /* K9LAG08UOM */
 388
 389                     page_size       = 2048;
 390                     spare_size      = 64;
 391                     pages_per_block = 128;
 392                     blocks_per_bank = 8192;
 393                     col_cycles      = 2;
 394                     row_cycles      = 3;
 395
 396                     found = true;
 397                     break;
 398
 399                 case 0xD7:  /* K9LBG08UOM */
 400
 401                     page_size       = 4096;
 402                     spare_size      = 128;
 403                     pages_per_block = 128;
 404                     blocks_per_bank = 8192;
 405                     col_cycles      = 2;
 406                     row_cycles      = 3;
 407
 408                     found = true;
 409                     break;
 410             }
 411             break;
 412     }
 413
 414     if (!found)
 415     {
 416         panicf("Unknown NAND: 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x",
 417                 id_buf[0],id_buf[1],id_buf[2],id_buf[3],id_buf[4]);
 418     }
 419
 420     pages_per_bank      = blocks_per_bank * pages_per_block;
 421     segments_per_bank   = blocks_per_bank / BLOCKS_PER_SEGMENT;
 422     bytes_per_segment   = page_size * pages_per_block * BLOCKS_PER_SEGMENT;
 423     sectors_per_page    = page_size / SECTOR_SIZE;
 424     sectors_per_segment = bytes_per_segment / SECTOR_SIZE;
 425
 426     /* Establish how many banks are present */
 427     nand_read_id(1, id_buf);
 428
 429     if (id_buf[0] == manuf_id)
 430     {
 431         /* Bank 1 is populated, now check if banks 2/3 are valid */
 432         nand_read_id(2, id_buf);
 433
 434         if (id_buf[0] == manuf_id)
 435         {
 436             /* Bank 2 returned matching id - check if 2/3 are shadowing 0/1 */
 437             unsigned int uid_buf0[8];
 438             unsigned int uid_buf2[8];
 439
 440             nand_read_uid(0, uid_buf0);
 441             nand_read_uid(2, uid_buf2);
 442
 443             if (memcmp(uid_buf0, uid_buf2, 32) == 0)
 444             {
 445                 /* UIDs match, assume banks 2/3 are shadowing 0/1 */
 446                 total_banks = 2;
 447             }
 448             else
 449             {
 450                 /* UIDs differ, assume banks 2/3 are valid */
 451                 total_banks = 4;
 452             }
 453         }
 454         else
 455         {
 456             /* Bank 2 returned differing id - assume 2/3 are junk */
 457             total_banks = 2;
 458         }
 459     }
 460     else
 461     {
 462         /* Bank 1 returned differing id - assume it is junk */
 463         total_banks = 1;
 464     }
 465
 466     /*
 467        Sanity checks:
 468        1. "BMP" tag at block 0, page 0, offset <page_size> [always present]
 469        2. On most D2s, <page_size>+3 is 'M' and <page_size>+4 is no. of banks.
 470           This is not present on some older players (formatted with early FW?)
 471      */
 472
 473     nand_read_raw(0,          /* bank */
 474                   0,          /* page */
 475                   page_size,  /* offset */
 476                   8, id_buf);
 477
 478     if (strncmp(id_buf, "BMP", 3)) panicf("BMP tag not present");
 479
 480     if (id_buf[3] == 'M')
 481     {
 482         if (id_buf[4] != total_banks) panicf("BMPM total_banks mismatch");
 483     }
 484 }
 485
 486
 487 static bool nand_read_sector_of_phys_page(int bank, int page,
 488                                           int sector, void* buf)
 489 {
 490 #ifndef USE_ECC_CORRECTION
 491     nand_read_raw(bank, page,
 492                   sector * (SECTOR_SIZE+16),
 493                   SECTOR_SIZE, buf);
 494     return true;
 495 #else
 496     /* Not yet implemented */
 497     return false;
 498 #endif
 499 }
 500
 501
 502 static bool nand_read_sector_of_phys_segment(int bank, int phys_segment,
 503                                              int page_in_seg, int sector,
 504                                              void* buf)
 505 {
 506     int page_addr = phys_segment_to_page_addr(phys_segment,
 507                                               page_in_seg);
 508
 509     return nand_read_sector_of_phys_page(bank, page_addr, sector, buf);
 510 }
 511
 512
 513 static bool nand_read_sector_of_logical_segment(int log_segment, int sector,
 514                                                 void* buf)
 515 {
 516     int page_in_segment = sector / sectors_per_page;
 517     int sector_in_page  = sector % sectors_per_page;
 518
 519     int bank = lpt_lookup[log_segment].bank;
 520     int phys_segment = lpt_lookup[log_segment].phys_segment;
 521
 522     /* Check if any of the write caches refer to this segment/page.
 523        If present we need to read the cached page instead. */
 524
 525     int cache_num = 0;
 526     bool found = false;
 527
 528     while (!found && cache_num < write_caches_in_use)
 529     {
 530         if (write_caches[cache_num].log_segment == log_segment
 531             && write_caches[cache_num].page_map[page_in_segment] != -1)
 532         {
 533             found = true;
 534             bank = write_caches[cache_num].bank;
 535             phys_segment = write_caches[cache_num].phys_segment;
 536             page_in_segment = write_caches[cache_num].page_map[page_in_segment];
 537         }
 538         else
 539         {
 540             cache_num++;
 541         }
 542     }
 543
 544     return nand_read_sector_of_phys_segment(bank, phys_segment,
 545                                             page_in_segment,
 546                                             sector_in_page, buf);
 547 }
 548
 549
 550 #ifdef USE_TCC_LPT
 551
 552 /* Reading the LPT from NAND is not yet fully understood. This code is therefore
 553    not enabled by default, as it gives much worse results than the bank-scanning
 554    approach currently used. */
 555
 556 static void read_lpt_block(int bank, int phys_segment)
 557 {
 558     int page = 1;   /* table starts at page 1 of segment */
 559     bool cont = true;
 560
 561     struct lpt_entry* lpt_ptr = NULL;
 562
 563     while (cont && page < pages_per_block)
 564     {
 565         int i = 0;
 566         unsigned int* int_buf = (int*)page_buf;
 567
 568         nand_read_sector_of_phys_segment(bank, phys_segment,
 569                                          page, 0, /* only sector 0 is used */
 570                                          page_buf);
 571
 572         /* Find out which chunk of the LPT table this section contains.
 573            Do this by reading the logical segment number of entry 0 */
 574         if (lpt_ptr == NULL)
 575         {
 576             int first_bank = int_buf[0] / segments_per_bank;
 577             int first_phys_segment = int_buf[0] % segments_per_bank;
 578
 579             unsigned char spare_buf[16];
 580
 581             nand_read_raw(first_bank,
 582                           phys_segment_to_page_addr(first_phys_segment, 0),
 583                           SECTOR_SIZE, /* offset */
 584                           16, spare_buf);
 585
 586             int first_log_segment = (spare_buf[6] << 8) | spare_buf[7];
 587
 588             lpt_ptr = &lpt_lookup[first_log_segment];
 589
 590 #if defined(BOOTLOADER) && 1
 591             printf("lpt @ %lx:%lx (ls:%lx)",
 592                    first_bank, first_phys_segment, first_log_segment);
 593 #endif
 594         }
 595
 596         while (cont && (i < SECTOR_SIZE/4))
 597         {
 598             if (int_buf[i] != 0xFFFFFFFF)
 599             {
 600                 lpt_ptr->bank = int_buf[i] / segments_per_bank;
 601                 lpt_ptr->phys_segment = int_buf[i] % segments_per_bank;
 602
 603                 lpt_ptr++;
 604                 i++;
 605             }
 606             else cont = false;
 607         }
 608         page++;
 609     }
 610 }
 611
 612 #endif /* USE_TCC_LPT */
 613
 614
 615 static void read_write_cache_segment(int bank, int phys_segment)
 616 {
 617     int page;
 618     unsigned char spare_buf[16];
 619
 620     if (write_caches_in_use == MAX_WRITE_CACHES)
 621         panicf("Max NAND write caches reached");
 622
 623     write_caches[write_caches_in_use].bank = bank;
 624     write_caches[write_caches_in_use].phys_segment = phys_segment;
 625
 626     /* Loop over each page in the phys segment (from page 1 onwards).
 627        Read spare for 1st sector, store location of page in array. */
 628     for (page = 1; page < pages_per_block * BLOCKS_PER_SEGMENT; page++)
 629     {
 630         unsigned short cached_page;
 631         unsigned short log_segment;
 632
 633         nand_read_raw(bank, phys_segment_to_page_addr(phys_segment, page),
 634                       SECTOR_SIZE, /* offset to first sector's spare */
 635                       16, spare_buf);
 636
 637         cached_page = (spare_buf[3] << 8) | spare_buf[2]; /* why does endian */
 638         log_segment = (spare_buf[6] << 8) | spare_buf[7]; /* -ness differ? */
 639
 640         if (cached_page != 0xFFFF)
 641         {
 642             write_caches[write_caches_in_use].log_segment = log_segment;
 643             write_caches[write_caches_in_use].page_map[cached_page] = page;
 644         }
 645     }
 646     write_caches_in_use++;
 647 }
 648
 649
 650 int ata_read_sectors(IF_MV2(int drive,) unsigned long start, int incount,
 651                      void* inbuf)
 652 {
 653 #ifdef HAVE_MULTIVOLUME
 654     (void)drive; /* unused for now */
 655 #endif
 656     mutex_lock(&ata_mtx);
 657
 658     while (incount > 0)
 659     {
 660         int done = 0;
 661         int segment = start / sectors_per_segment;
 662         int secmod = start % sectors_per_segment;
 663
 664         while (incount > 0 && secmod < sectors_per_segment)
 665         {
 666             if (!nand_read_sector_of_logical_segment(segment, secmod, inbuf))
 667             {
 668                 mutex_unlock(&ata_mtx);
 669                 return -1;
 670             }
 671
 672             inbuf += SECTOR_SIZE;
 673             incount--;
 674             secmod++;
 675             done++;
 676         }
 677
 678         if (done < 0)
 679         {
 680             mutex_unlock(&ata_mtx);
 681             return -1;
 682         }
 683         start += done;
 684     }
 685
 686     mutex_unlock(&ata_mtx);
 687     return 0;
 688 }
 689
 690 int ata_write_sectors(IF_MV2(int drive,) unsigned long start, int count,
 691                       const void* outbuf)
 692 {
 693 #ifdef HAVE_MULTIVOLUME
 694     (void)drive; /* unused for now */
 695 #endif
 696
 697     /* TODO: Learn more about TNFTL and implement this one day... */
 698     (void)start;
 699     (void)count;
 700     (void)outbuf;
 701     return -1;
 702 }
 703
 704 void ata_spindown(int seconds)
 705 {
 706     /* null */
 707     (void)seconds;
 708 }
 709
 710 bool ata_disk_is_active(void)
 711 {
 712     /* null */
 713     return 0;
 714 }
 715
 716 void ata_sleep(void)
 717 {
 718     /* null */
 719 }
 720
 721 void ata_spin(void)
 722 {
 723     /* null */
 724 }
 725
 726 /* Hardware reset protocol as specified in chapter 9.1, ATA spec draft v5 */
 727 int ata_hard_reset(void)
 728 {
 729     /* null */
 730     return 0;
 731 }
 732
 733 int ata_soft_reset(void)
 734 {
 735     /* null */
 736     return 0;
 737 }
 738
 739 void ata_enable(bool on)
 740 {
 741     /* null - flash controller is enabled/disabled as needed. */
 742     (void)on;
 743 }
 744
 745 int ata_init(void)
 746 {
 747     int i, bank, phys_segment;
 748     unsigned char spare_buf[16];
 749
 750     if (initialized) return 0;
 751
 752     /* Set GPIO direction for chip select & write protect */
 753     NAND_GPIO_OUT_EN(CS_GPIO_BIT | WE_GPIO_BIT);
 754
 755     /* Get chip characteristics and number of banks */
 756     nand_get_chip_info();
 757
 758     for (i = 0; i < MAX_SEGMENTS; i++)
 759     {
 760         lpt_lookup[i].bank = -1;
 761         lpt_lookup[i].phys_segment = -1;
 762     }
 763
 764     write_caches_in_use = 0;
 765
 766     for (i = 0; i < MAX_WRITE_CACHES; i++)
 767     {
 768         int page;
 769
 770         write_caches[i].log_segment = -1;
 771         write_caches[i].bank = -1;
 772         write_caches[i].phys_segment = -1;
 773
 774         for (page = 0; page < MAX_PAGES_PER_BLOCK * 4; page++)
 775         {
 776             write_caches[i].page_map[page] = -1;
 777         }
 778     }
 779
 780     /* Scan banks to build up block translation table */
 781     for (bank = 0; bank < total_banks; bank++)
 782     {
 783         for (phys_segment = 0; phys_segment < segments_per_bank; phys_segment++)
 784         {
 785             /* Read spare bytes from first sector of each segment */
 786             nand_read_raw(bank, phys_segment_to_page_addr(phys_segment, 0),
 787                           SECTOR_SIZE, /* offset */
 788                           16, spare_buf);
 789
 790             switch (spare_buf[4]) /* block type */
 791             {
 792 #ifdef USE_TCC_LPT
 793                 case 0x12:
 794                 {
 795                     /* Log->Phys Translation table (for Main data area) */
 796                     read_lpt_block(bank, phys_segment);
 797                     break;
 798                 }
 799 #else
 800                 case 0x17:
 801                 {
 802                     /* Main data area segment */
 803                     unsigned short segment = (spare_buf[6] << 8) | spare_buf[7];
 804
 805                     if (segment < MAX_SEGMENTS)
 806                     {
 807                         lpt_lookup[segment].bank = bank;
 808                         lpt_lookup[segment].phys_segment = phys_segment;
 809                     }
 810                     break;
 811                 }
 812 #endif
 813
 814                 case 0x15:
 815                 {
 816                     /* Recently-written page data (for Main data area) */
 817                     read_write_cache_segment(bank, phys_segment);
 818                     break;
 819                 }
 820             }
 821         }
 822     }
 823
 824 #ifndef USE_TCC_LPT
 825     /* Scan banks a second time as 0x13 segments appear to override 0x17 */
 826     for (bank = 0; bank < total_banks; bank++)
 827     {
 828         for (phys_segment = 0; phys_segment < segments_per_bank; phys_segment++)
 829         {
 830             /* Read spare bytes from first sector of each segment */
 831             nand_read_raw(bank, phys_segment_to_page_addr(phys_segment, 0),
 832                           SECTOR_SIZE, /* offset */
 833                           16, spare_buf);
 834
 835             switch (spare_buf[4]) /* block type */
 836             {
 837                 case 0x13:
 838                 {
 839                     /* Main data area segment */
 840                     unsigned short segment = (spare_buf[6] << 8) | spare_buf[7];
 841
 842                     if (segment < MAX_SEGMENTS)
 843                     {
 844                         /* 0x17 seems to override 0x13, so store in our LPT */
 845                         lpt_lookup[segment].bank = bank;
 846                         lpt_lookup[segment].phys_segment = phys_segment;
 847                     }
 848                     break;
 849                 }
 850             }
 851         }
 852     }
 853 #endif
 854
 855     initialized = true;
 856
 857     return 0;
 858 }
 859
 860
 861 /* TEMP: This will return junk, it's here for compilation only */
 862 unsigned short* ata_get_identify(void)
 863 {
 864     return (unsigned short*)0x21000000; /* Unused DRAM */
 865 }