firmware/target/sh/system-sh.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2007 by Jens Arnold
  11  * Based on the work of Alan Korr and others
  12  *
  13  * All files in this archive are subject to the GNU General Public License.
  14  * See the file COPYING in the source tree root for full license agreement.
  15  *
  16  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  17  * KIND, either express or implied.
  18  *
  19  ****************************************************************************/
  20
  21 #include <stdio.h>
  22 #include "config.h"
  23 #include "system.h"
  24 #include "lcd.h"
  25 #include "font.h"
  26 #include "led.h"
  27
  28 static const char* const irqname[] = {
  29     "", "", "", "", "IllInstr", "", "IllSltIn","","",
  30     "CPUAdrEr", "DMAAdrEr", "NMI", "UserBrk",
  31     "","","","","","","","","","","","","","","","","","","",
  32     "Trap32","Trap33","Trap34","Trap35","Trap36","Trap37","Trap38","Trap39",
  33     "Trap40","Trap41","Trap42","Trap43","Trap44","Trap45","Trap46","Trap47",
  34     "Trap48","Trap49","Trap50","Trap51","Trap52","Trap53","Trap54","Trap55",
  35     "Trap56","Trap57","Trap58","Trap59","Trap60","Trap61","Trap62","Trap63",
  36     "Irq0","Irq1","Irq2","Irq3","Irq4","Irq5","Irq6","Irq7",
  37     "Dma0","","Dma1","","Dma2","","Dma3","",
  38     "IMIA0","IMIB0","OVI0","", "IMIA1","IMIB1","OVI1","",
  39     "IMIA2","IMIB2","OVI2","", "IMIA3","IMIB3","OVI3","",
  40     "IMIA4","IMIB4","OVI4","",
  41     "Ser0Err","Ser0Rx","Ser0Tx","Ser0TE",
  42     "Ser1Err","Ser1Rx","Ser1Tx","Ser1TE",
  43     "ParityEr","A/D conv","","","Watchdog","DRAMRefr"
  44 };
  45
  46 #define RESERVE_INTERRUPT(number) "\t.long\t_UIE" #number "\n"
  47 #define DEFAULT_INTERRUPT(name, number)  "\t.weak\t_" #name \
  48                           "\n\t.set\t_" #name ",_UIE" #number \
  49                           "\n\t.long\t_" #name "\n"
  50
  51 asm (
  52
  53 /* Vector table.
  54  * Handled in asm because gcc 4.x doesn't allow weak aliases to symbols
  55  * defined in an asm block -- silly.
  56  * Reset vectors (0..3) are handled in crt0.S */
  57
  58     ".section\t.vectors,\"aw\",@progbits\n"
  59     DEFAULT_INTERRUPT (GII,      4)
  60     RESERVE_INTERRUPT (          5)
  61     DEFAULT_INTERRUPT (ISI,      6)
  62     RESERVE_INTERRUPT (          7)
  63     RESERVE_INTERRUPT (          8)
  64     DEFAULT_INTERRUPT (CPUAE,    9)
  65     DEFAULT_INTERRUPT (DMAAE,   10)
  66     DEFAULT_INTERRUPT (NMI,     11)
  67     DEFAULT_INTERRUPT (UB,      12)
  68     RESERVE_INTERRUPT (         13)
  69     RESERVE_INTERRUPT (         14)
  70     RESERVE_INTERRUPT (         15)
  71     RESERVE_INTERRUPT (         16) /* TCB #0 */
  72     RESERVE_INTERRUPT (         17) /* TCB #1 */
  73     RESERVE_INTERRUPT (         18) /* TCB #2 */
  74     RESERVE_INTERRUPT (         19) /* TCB #3 */
  75     RESERVE_INTERRUPT (         20) /* TCB #4 */
  76     RESERVE_INTERRUPT (         21) /* TCB #5 */
  77     RESERVE_INTERRUPT (         22) /* TCB #6 */
  78     RESERVE_INTERRUPT (         23) /* TCB #7 */
  79     RESERVE_INTERRUPT (         24) /* TCB #8 */
  80     RESERVE_INTERRUPT (         25) /* TCB #9 */
  81     RESERVE_INTERRUPT (         26) /* TCB #10 */
  82     RESERVE_INTERRUPT (         27) /* TCB #11 */
  83     RESERVE_INTERRUPT (         28) /* TCB #12 */
  84     RESERVE_INTERRUPT (         29) /* TCB #13 */
  85     RESERVE_INTERRUPT (         30) /* TCB #14 */
  86     RESERVE_INTERRUPT (         31) /* TCB #15 */
  87     DEFAULT_INTERRUPT (TRAPA32, 32)
  88     DEFAULT_INTERRUPT (TRAPA33, 33)
  89     DEFAULT_INTERRUPT (TRAPA34, 34)
  90     DEFAULT_INTERRUPT (TRAPA35, 35)
  91     DEFAULT_INTERRUPT (TRAPA36, 36)
  92     DEFAULT_INTERRUPT (TRAPA37, 37)
  93     DEFAULT_INTERRUPT (TRAPA38, 38)
  94     DEFAULT_INTERRUPT (TRAPA39, 39)
  95     DEFAULT_INTERRUPT (TRAPA40, 40)
  96     DEFAULT_INTERRUPT (TRAPA41, 41)
  97     DEFAULT_INTERRUPT (TRAPA42, 42)
  98     DEFAULT_INTERRUPT (TRAPA43, 43)
  99     DEFAULT_INTERRUPT (TRAPA44, 44)
 100     DEFAULT_INTERRUPT (TRAPA45, 45)
 101     DEFAULT_INTERRUPT (TRAPA46, 46)
 102     DEFAULT_INTERRUPT (TRAPA47, 47)
 103     DEFAULT_INTERRUPT (TRAPA48, 48)
 104     DEFAULT_INTERRUPT (TRAPA49, 49)
 105     DEFAULT_INTERRUPT (TRAPA50, 50)
 106     DEFAULT_INTERRUPT (TRAPA51, 51)
 107     DEFAULT_INTERRUPT (TRAPA52, 52)
 108     DEFAULT_INTERRUPT (TRAPA53, 53)
 109     DEFAULT_INTERRUPT (TRAPA54, 54)
 110     DEFAULT_INTERRUPT (TRAPA55, 55)
 111     DEFAULT_INTERRUPT (TRAPA56, 56)
 112     DEFAULT_INTERRUPT (TRAPA57, 57)
 113     DEFAULT_INTERRUPT (TRAPA58, 58)
 114     DEFAULT_INTERRUPT (TRAPA59, 59)
 115     DEFAULT_INTERRUPT (TRAPA60, 60)
 116     DEFAULT_INTERRUPT (TRAPA61, 61)
 117     DEFAULT_INTERRUPT (TRAPA62, 62)
 118     DEFAULT_INTERRUPT (TRAPA63, 63)
 119     DEFAULT_INTERRUPT (IRQ0,    64)
 120     DEFAULT_INTERRUPT (IRQ1,    65)
 121     DEFAULT_INTERRUPT (IRQ2,    66)
 122     DEFAULT_INTERRUPT (IRQ3,    67)
 123     DEFAULT_INTERRUPT (IRQ4,    68)
 124     DEFAULT_INTERRUPT (IRQ5,    69)
 125     DEFAULT_INTERRUPT (IRQ6,    70)
 126     DEFAULT_INTERRUPT (IRQ7,    71)
 127     DEFAULT_INTERRUPT (DEI0,    72)
 128     RESERVE_INTERRUPT (         73)
 129     DEFAULT_INTERRUPT (DEI1,    74)
 130     RESERVE_INTERRUPT (         75)
 131     DEFAULT_INTERRUPT (DEI2,    76)
 132     RESERVE_INTERRUPT (         77)
 133     DEFAULT_INTERRUPT (DEI3,    78)
 134     RESERVE_INTERRUPT (         79)
 135     DEFAULT_INTERRUPT (IMIA0,   80)
 136     DEFAULT_INTERRUPT (IMIB0,   81)
 137     DEFAULT_INTERRUPT (OVI0,    82)
 138     RESERVE_INTERRUPT (         83)
 139     DEFAULT_INTERRUPT (IMIA1,   84)
 140     DEFAULT_INTERRUPT (IMIB1,   85)
 141     DEFAULT_INTERRUPT (OVI1,    86)
 142     RESERVE_INTERRUPT (         87)
 143     DEFAULT_INTERRUPT (IMIA2,   88)
 144     DEFAULT_INTERRUPT (IMIB2,   89)
 145     DEFAULT_INTERRUPT (OVI2,    90)
 146     RESERVE_INTERRUPT (         91)
 147     DEFAULT_INTERRUPT (IMIA3,   92)
 148     DEFAULT_INTERRUPT (IMIB3,   93)
 149     DEFAULT_INTERRUPT (OVI3,    94)
 150     RESERVE_INTERRUPT (         95)
 151     DEFAULT_INTERRUPT (IMIA4,   96)
 152     DEFAULT_INTERRUPT (IMIB4,   97)
 153     DEFAULT_INTERRUPT (OVI4,    98)
 154     RESERVE_INTERRUPT (         99)
 155     DEFAULT_INTERRUPT (REI0,   100)
 156     DEFAULT_INTERRUPT (RXI0,   101)
 157     DEFAULT_INTERRUPT (TXI0,   102)
 158     DEFAULT_INTERRUPT (TEI0,   103)
 159     DEFAULT_INTERRUPT (REI1,   104)
 160     DEFAULT_INTERRUPT (RXI1,   105)
 161     DEFAULT_INTERRUPT (TXI1,   106)
 162     DEFAULT_INTERRUPT (TEI1,   107)
 163     RESERVE_INTERRUPT (        108)
 164     DEFAULT_INTERRUPT (ADITI,  109)
 165
 166 /* UIE# block.
 167  * Must go into the same section as the UIE() handler */
 168
 169     "\t.text\n"
 170     "_UIE4:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 171     "_UIE5:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 172     "_UIE6:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 173     "_UIE7:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 174     "_UIE8:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 175     "_UIE9:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 176     "_UIE10:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 177     "_UIE11:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 178     "_UIE12:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 179     "_UIE13:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 180     "_UIE14:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 181     "_UIE15:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 182     "_UIE16:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 183     "_UIE17:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 184     "_UIE18:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 185     "_UIE19:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 186     "_UIE20:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 187     "_UIE21:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 188     "_UIE22:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 189     "_UIE23:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 190     "_UIE24:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 191     "_UIE25:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 192     "_UIE26:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 193     "_UIE27:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 194     "_UIE28:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 195     "_UIE29:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 196     "_UIE30:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 197     "_UIE31:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 198     "_UIE32:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 199     "_UIE33:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 200     "_UIE34:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 201     "_UIE35:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 202     "_UIE36:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 203     "_UIE37:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 204     "_UIE38:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 205     "_UIE39:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 206     "_UIE40:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 207     "_UIE41:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 208     "_UIE42:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 209     "_UIE43:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 210     "_UIE44:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 211     "_UIE45:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 212     "_UIE46:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 213     "_UIE47:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 214     "_UIE48:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 215     "_UIE49:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 216     "_UIE50:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 217     "_UIE51:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 218     "_UIE52:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 219     "_UIE53:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 220     "_UIE54:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 221     "_UIE55:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 222     "_UIE56:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 223     "_UIE57:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 224     "_UIE58:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 225     "_UIE59:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 226     "_UIE60:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 227     "_UIE61:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 228     "_UIE62:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 229     "_UIE63:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 230     "_UIE64:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 231     "_UIE65:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 232     "_UIE66:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 233     "_UIE67:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 234     "_UIE68:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 235     "_UIE69:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 236     "_UIE70:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 237     "_UIE71:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 238     "_UIE72:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 239     "_UIE73:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 240     "_UIE74:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 241     "_UIE75:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 242     "_UIE76:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 243     "_UIE77:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 244     "_UIE78:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 245     "_UIE79:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 246     "_UIE80:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 247     "_UIE81:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 248     "_UIE82:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 249     "_UIE83:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 250     "_UIE84:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 251     "_UIE85:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 252     "_UIE86:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 253     "_UIE87:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 254     "_UIE88:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 255     "_UIE89:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 256     "_UIE90:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 257     "_UIE91:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 258     "_UIE92:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 259     "_UIE93:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 260     "_UIE94:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 261     "_UIE95:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 262     "_UIE96:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 263     "_UIE97:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 264     "_UIE98:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 265     "_UIE99:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 266     "_UIE100:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 267     "_UIE101:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 268     "_UIE102:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 269     "_UIE103:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 270     "_UIE104:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 271     "_UIE105:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 272     "_UIE106:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 273     "_UIE107:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 274     "_UIE108:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 275     "_UIE109:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 276
 277 );
 278
 279 extern void UIE4(void); /* needed for calculating the UIE number */
 280
 281 void UIE (unsigned int pc) __attribute__((section(".text")));
 282 void UIE (unsigned int pc) /* Unexpected Interrupt or Exception */
 283 {
 284 #if CONFIG_LED == LED_REAL
 285     bool state = false;
 286     int i = 0;
 287 #endif
 288     unsigned int n;
 289     char str[32];
 290
 291     asm volatile ("sts\tpr,%0" : "=r"(n));
 292
 293     /* clear screen */
 294     lcd_clear_display ();
 295 #ifdef HAVE_LCD_BITMAP
 296     lcd_setfont(FONT_SYSFIXED);
 297 #endif
 298     /* output exception */
 299     n = (n - (unsigned)UIE4 + 12)>>2; /* get exception or interrupt number */
 300     snprintf(str,sizeof(str),"I%02x:%s",n,irqname[n]);
 301     lcd_puts(0,0,str);
 302     snprintf(str,sizeof(str),"at %08x",pc);
 303     lcd_puts(0,1,str);
 304     lcd_update ();
 305
 306     while (1)
 307     {
 308 #if CONFIG_LED == LED_REAL
 309         if (--i <= 0)
 310         {
 311             state = !state;
 312             led(state);
 313             i = 240000;
 314         }
 315 #endif
 316
 317         /* try to restart firmware if ON is pressed */
 318 #if CONFIG_KEYPAD == PLAYER_PAD
 319         if (!(PADRL & 0x20))
 320 #elif CONFIG_KEYPAD == RECORDER_PAD
 321 #ifdef HAVE_FMADC
 322         if (!(PCDR & 0x0008))
 323 #else
 324         if (!(PBDRH & 0x01))
 325 #endif
 326 #elif CONFIG_KEYPAD == ONDIO_PAD
 327         if (!(PCDR & 0x0008))
 328 #endif
 329         {
 330             /* enable the watchguard timer, but don't service it */
 331             RSTCSR_W = 0x5a40; /* Reset enabled, power-on reset */
 332             TCSR_W = 0xa560; /* Watchdog timer mode, timer enabled, sysclk/2 */
 333         }
 334     }
 335 }
 336
 337 void system_init(void)
 338 {
 339     /* Disable all interrupts */
 340     IPRA = 0;
 341     IPRB = 0;
 342     IPRC = 0;
 343     IPRD = 0;
 344     IPRE = 0;
 345
 346     /* NMI level low, falling edge on all interrupts */
 347     ICR = 0;
 348
 349     /* Enable burst and RAS down mode on DRAM */
 350     DCR |= 0x5000;
 351
 352     /* Activate Warp mode (simultaneous internal and external mem access) */
 353     BCR |= 0x2000;
 354
 355     /* Bus state controller initializations. These are only necessary when
 356        running from flash. */
 357     WCR1 = 0x40FD; /* Long wait states for CS6 (ATA), short for the rest. */
 358     WCR3 = 0x8000; /* WAIT is pulled up, 1 state inserted for CS6 */
 359 }
 360
 361 void system_reboot (void)
 362 {
 363     disable_irq();
 364
 365     asm volatile ("ldc\t%0,vbr" : : "r"(0));
 366
 367     PACR2 |= 0x4000; /* for coldstart detection */
 368     IPRA = 0;
 369     IPRB = 0;
 370     IPRC = 0;
 371     IPRD = 0;
 372     IPRE = 0;
 373     ICR = 0;
 374
 375     asm volatile ("jmp @%0; mov.l @%1,r15" : :
 376                   "r"(*(int*)0),"r"(4));
 377 }
 378
 379 /* Utilise the user break controller to catch invalid memory accesses. */
 380 int system_memory_guard(int newmode)
 381 {
 382     static const struct {
 383         unsigned long  addr;
 384         unsigned long  mask;
 385         unsigned short bbr;
 386     } modes[MAXMEMGUARD] = {
 387         /* catch nothing */
 388         { 0x00000000, 0x00000000, 0x0000 },
 389         /* catch writes to area 02 (flash ROM) */
 390         { 0x02000000, 0x00FFFFFF, 0x00F8 },
 391         /* catch all accesses to areas 00 (internal ROM) and 01 (free) */
 392         { 0x00000000, 0x01FFFFFF, 0x00FC }
 393     };
 394
 395     int oldmode = MEMGUARD_NONE;
 396     int i;
 397
 398     /* figure out the old mode from what is in the UBC regs. If the register
 399        values don't match any mode, assume MEMGUARD_NONE */
 400     for (i = MEMGUARD_NONE; i < MAXMEMGUARD; i++)
 401     {
 402         if (BAR == modes[i].addr && BAMR == modes[i].mask &&
 403             BBR == modes[i].bbr)
 404         {
 405             oldmode = i;
 406             break;
 407         }
 408     }
 409
 410     if (newmode == MEMGUARD_KEEP)
 411         newmode = oldmode;
 412
 413     BBR = 0;  /* switch off everything first */
 414
 415     /* always set the UBC according to the mode, in case the old settings
 416        didn't match any valid mode */
 417     BAR  = modes[newmode].addr;
 418     BAMR = modes[newmode].mask;
 419     BBR  = modes[newmode].bbr;
 420
 421     return oldmode;
 422 }