firmware/export/pp5002.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2004 by Thom Johansen
  11  *
  12  * All files in this archive are subject to the GNU General Public License.
  13  * See the file COPYING in the source tree root for full license agreement.
  14  *
  15  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  16  * KIND, either express or implied.
  17  *
  18  ****************************************************************************/
  19 #ifndef __PP5002_H__
  20 #define __PP5002_H__
  21
  22 /* Much info gleaned and/or copied from the iPodLinux project. */
  23 #define DRAM_START       0x28000000
  24
  25 #define PROCESSOR_ID     (*(volatile unsigned long *)(0xc4000000))
  26
  27 #define IPOD_LCD_BASE    0xc0001000
  28
  29 #define IISCONFIG        (*(volatile unsigned long *)(0xc0002500))
  30
  31 #define IISFIFO_CFG      (*(volatile unsigned long *)(0xc000251c))
  32 #define IISFIFO_WR       (*(volatile unsigned long *)(0xc0002540))
  33 #define IISFIFO_RD       (*(volatile unsigned long *)(0xc0002580))
  34
  35 #define IDE_BASE         0xc0003000
  36
  37 #define IDE_CFG_STATUS   (*(volatile unsigned long *)(0xc0003024))
  38
  39 #define USB_BASE         0xc0005000
  40
  41 #define I2C_BASE         0xc0008000
  42
  43 #define GPIOA_ENABLE     (*(volatile unsigned char *)(0xcf000000))
  44 #define GPIOB_ENABLE     (*(volatile unsigned char *)(0xcf000004))
  45 #define GPIOC_ENABLE     (*(volatile unsigned char *)(0xcf000008))
  46 #define GPIOD_ENABLE     (*(volatile unsigned char *)(0xcf00000c))
  47 #define GPIOA_OUTPUT_EN  (*(volatile unsigned char *)(0xcf000010))
  48 #define GPIOB_OUTPUT_EN  (*(volatile unsigned char *)(0xcf000014))
  49 #define GPIOC_OUTPUT_EN  (*(volatile unsigned char *)(0xcf000018))
  50 #define GPIOD_OUTPUT_EN  (*(volatile unsigned char *)(0xcf00001c))
  51 #define GPIOA_OUTPUT_VAL (*(volatile unsigned char *)(0xcf000020))
  52 #define GPIOB_OUTPUT_VAL (*(volatile unsigned char *)(0xcf000024))
  53 #define GPIOC_OUTPUT_VAL (*(volatile unsigned char *)(0xcf000028))
  54 #define GPIOD_OUTPUT_VAL (*(volatile unsigned char *)(0xcf00002c))
  55 #define GPIOA_INPUT_VAL  (*(volatile unsigned char *)(0xcf000030))
  56 #define GPIOB_INPUT_VAL  (*(volatile unsigned char *)(0xcf000034))
  57 #define GPIOC_INPUT_VAL  (*(volatile unsigned char *)(0xcf000038))
  58 #define GPIOD_INPUT_VAL  (*(volatile unsigned char *)(0xcf00003c))
  59 #define GPIOA_INT_STAT   (*(volatile unsigned char *)(0xcf000040))
  60 #define GPIOB_INT_STAT   (*(volatile unsigned char *)(0xcf000044))
  61 #define GPIOC_INT_STAT   (*(volatile unsigned char *)(0xcf000048))
  62 #define GPIOD_INT_STAT   (*(volatile unsigned char *)(0xcf00004c))
  63 #define GPIOA_INT_EN     (*(volatile unsigned char *)(0xcf000050))
  64 #define GPIOB_INT_EN     (*(volatile unsigned char *)(0xcf000054))
  65 #define GPIOC_INT_EN     (*(volatile unsigned char *)(0xcf000058))
  66 #define GPIOD_INT_EN     (*(volatile unsigned char *)(0xcf00005c))
  67 #define GPIOA_INT_LEV    (*(volatile unsigned char *)(0xcf000060))
  68 #define GPIOB_INT_LEV    (*(volatile unsigned char *)(0xcf000064))
  69 #define GPIOC_INT_LEV    (*(volatile unsigned char *)(0xcf000068))
  70 #define GPIOD_INT_LEV    (*(volatile unsigned char *)(0xcf00006c))
  71 #define GPIOA_INT_CLR    (*(volatile unsigned char *)(0xcf000070))
  72 #define GPIOB_INT_CLR    (*(volatile unsigned char *)(0xcf000074))
  73 #define GPIOC_INT_CLR    (*(volatile unsigned char *)(0xcf000078))
  74 #define GPIOD_INT_CLR    (*(volatile unsigned char *)(0xcf00007c))
  75
  76 #define INT_FORCED_CLR   (*(volatile unsigned long *)(0xcf00101c))
  77 #define CPU_INT_STAT     (*(volatile unsigned long *)(0xcf001000))
  78 #define CPU_INT_EN       (*(volatile unsigned long *)(0xcf001024))
  79 #define CPU_INT_CLR      (*(volatile unsigned long *)(0xcf001028))
  80 #define CPU_INT_PRIORITY (*(volatile unsigned long *)(0xcf00102c))
  81 #define COP_INT_STAT     (*(volatile unsigned long *)(0xcf001010))
  82 #define COP_INT_EN       (*(volatile unsigned long *)(0xcf001034))
  83 #define COP_INT_CLR      (*(volatile unsigned long *)(0xcf001038))
  84 #define COP_INT_PRIORITY (*(volatile unsigned long *)(0xcf00103c))
  85
  86 #define IDE_IRQ          1
  87 #define SER0_IRQ         4
  88 #define I2S_IRQ          5
  89 #define SER1_IRQ         7
  90 #define TIMER1_IRQ      11
  91 #define TIMER2_IRQ      12
  92 #define GPIO_IRQ        14
  93 #define DMA_OUT_IRQ     30
  94 #define DMA_IN_IRQ      31
  95
  96 #define IDE_MASK         (1 << IDE_IRQ)
  97 #define SER0_MASK        (1 << SER0_IRQ)
  98 #define I2S_MASK         (1 << I2S_IRQ)
  99 #define SER1_MASK        (1 << SER1_IRQ)
 100 #define TIMER1_MASK      (1 << TIMER1_IRQ)
 101 #define TIMER2_MASK      (1 << TIMER2_IRQ)
 102 #define GPIO_MASK        (1 << GPIO_IRQ)
 103 #define DMA_OUT_MASK     (1 << DMA_OUT_IRQ)
 104 #define DMA_IN_MASK      (1 << DMA_IN_IRQ)
 105
 106
 107 #define TIMER1_CFG       (*(volatile unsigned long *)(0xcf001100))
 108 #define TIMER1_VAL       (*(volatile unsigned long *)(0xcf001104))
 109 #define TIMER2_CFG       (*(volatile unsigned long *)(0xcf001108))
 110 #define TIMER2_VAL       (*(volatile unsigned long *)(0xcf00110c))
 111
 112 #define USEC_TIMER       (*(volatile unsigned long *)(0xcf001110))
 113
 114 #define TIMING1_CTL      (*(volatile unsigned long *)(0xcf004000))
 115 #define TIMING2_CTL      (*(volatile unsigned long *)(0xcf004008))
 116
 117 #define CPU_CTL          (*(volatile unsigned char *)(0xcf004054))
 118 #define COP_CTL          (*(volatile unsigned char *)(0xcf004058))
 119
 120 #define PROC_SLEEP       0xca
 121 #define PROC_WAKE        0xce
 122
 123
 124 #define DEV_EN           (*(volatile unsigned long *)(0xcf005000))
 125 #define DEV_RS           (*(volatile unsigned long *)(0xcf005030))
 126
 127 #define DEV_I2C          (1<<8)
 128 #define DEV_USB          0x400000
 129
 130 #define CLOCK_ENABLE     (*(volatile unsigned long *)(0xcf005008))
 131 #define CLOCK_SOURCE     (*(volatile unsigned long *)(0xcf00500c))
 132 #define PLL_CONTROL      (*(volatile unsigned long *)(0xcf005010))
 133 #define PLL_DIV          (*(volatile unsigned long *)(0xcf005018))
 134 #define PLL_MULT         (*(volatile unsigned long *)(0xcf00501c))
 135 #define PLL_UNLOCK       (*(volatile unsigned long *)(0xcf005038))
 136
 137 #define MMAP0_LOGICAL    (*(volatile unsigned long *)(0xf000f000))
 138 #define MMAP0_PHYSICAL   (*(volatile unsigned long *)(0xf000f004))
 139 #define MMAP1_LOGICAL    (*(volatile unsigned long *)(0xf000f008))
 140 #define MMAP1_PHYSICAL   (*(volatile unsigned long *)(0xf000f00c))
 141 #define MMAP2_LOGICAL    (*(volatile unsigned long *)(0xf000f010))
 142 #define MMAP2_PHYSICAL   (*(volatile unsigned long *)(0xf000f014))
 143 #define MMAP3_LOGICAL    (*(volatile unsigned long *)(0xf000f018))
 144 #define MMAP3_PHYSICAL   (*(volatile unsigned long *)(0xf000f01c))
 145
 146 #endif