firmware/target/arm/tms320dm320/spi-dm320.c

   1 /*
   2  * SPI interface driver for the DM320 SoC
   3  *
   4  * Copyright (C) 2007 shirour <mrobefan@gmail.com>
   5  * Copyright (C) 2007 Catalin Patulea <cat@vv.carleton.ca>
   6  *
   7  *  This program is free software; you can redistribute  it and/or modify it
   8  *  under  the terms of  the GNU General  Public License as published by the
   9  *  Free Software Foundation;  either version 2 of the License, or (at your
  10  *  option) any later version.
  11  *
  12  *  THIS  SOFTWARE  IS PROVIDED   ``AS IS'' AND   ANY EXPRESS OR IMPLIED
  13  *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
  14  *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
  15  *  NO EVENT  SHALL   THE AUTHOR  BE  LIABLE FOR ANY   DIRECT, INDIRECT,
  16  *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  17  *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS OR SERVICES; LOSS OF
  18  *  USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  19  *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
  20  *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  21  *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  22  *
  23  *  You should have received a copy of the  GNU General Public License along
  24  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  25  *  675 Mass Ave, Cambridge, MA 02139, USA.
  26  */
  27 #include "kernel.h"
  28 #include "system.h"
  29 #include "spi.h"
  30
  31 #define GIO_TS_ENABLE  (1<<2)
  32 #define GIO_RTC_ENABLE (1<<12)
  33 #define GIO_BL_ENABLE  (1<<13)
  34 #define GIO_LCD_ENABLE (1<<5)
  35
  36 struct mutex spi_mtx;
  37
  38 struct SPI_info {
  39     volatile unsigned short *setreg;
  40     volatile unsigned short *clrreg;
  41     int bit;
  42 };
  43
  44 struct SPI_info spi_targets[] =
  45 {
  46 #ifndef CREATIVE_ZVx
  47     [SPI_target_TSC2100]   = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_TS_ENABLE },
  48     [SPI_target_RX5X348AB] = { &IO_GIO_BITSET0, &IO_GIO_BITCLR0, GIO_RTC_ENABLE},
  49     [SPI_target_BACKLIGHT] = { &IO_GIO_BITCLR1, &IO_GIO_BITSET1, GIO_BL_ENABLE },
  50 #else
  51     [SPI_target_LTV250QV] =  { &IO_GIO_BITCLR2, &IO_GIO_BITSET2, GIO_LCD_ENABLE},
  52 #endif
  53 };
  54
  55 #define IO_SERIAL0_XMIT         (0x100)
  56 #define IO_SERIAL0_MODE_SCLK    (1 << 10)
  57
  58 static void spi_disable_all_targets(void)
  59 {
  60     int i;
  61     for(i=0;i<SPI_MAX_TARGETS;i++)
  62     {
  63         *spi_targets[i].clrreg = spi_targets[i].bit;
  64     }
  65 }
  66
  67 int spi_block_transfer(enum SPI_target target,
  68                        const uint8_t *tx_bytes, unsigned int tx_size,
  69                              uint8_t *rx_bytes, unsigned int rx_size)
  70 {
  71     mutex_lock(&spi_mtx);
  72     /* Activate the slave select pin */
  73     *spi_targets[target].setreg = spi_targets[target].bit;
  74
  75     while (tx_size--)
  76     {
  77         /* Send one byte */
  78         IO_SERIAL0_TX_DATA = *tx_bytes++;
  79
  80         /* Wait until transfer finished */
  81         while (IO_SERIAL0_RX_DATA & IO_SERIAL0_XMIT);
  82     }
  83
  84     while (rx_size--)
  85     {
  86         /* Make the clock tick */
  87         IO_SERIAL0_TX_DATA = 0;
  88
  89         /* Wait until transfer finished */
  90         unsigned short data;
  91         while ((data = IO_SERIAL0_RX_DATA) & IO_SERIAL0_XMIT);
  92
  93         *rx_bytes++ = data & 0xff;
  94     }
  95
  96     *spi_targets[target].clrreg = spi_targets[target].bit;
  97
  98     mutex_unlock(&spi_mtx);
  99     return 0;
 100 }
 101
 102 void spi_init(void)
 103 {
 104     mutex_init(&spi_mtx);
 105     /* Set SCLK idle level = 0 */
 106     IO_SERIAL0_MODE |= IO_SERIAL0_MODE_SCLK;
 107     /* Enable TX */
 108     IO_SERIAL0_TX_ENABLE = 0x0001;
 109 #ifndef CREATIVE_ZVx
 110     /* Set GIO 18 to output for touch screen slave enable */
 111     IO_GIO_DIR1 &= ~GIO_TS_ENABLE;
 112     /* Set GIO 12 to output for rtc slave enable */
 113     IO_GIO_DIR0 &= ~GIO_RTC_ENABLE;
 114 #endif
 115     spi_disable_all_targets(); /* make sure only one is ever enabled at a time */
 116
 117 }