firmware/drivers/rtc/rtc_s35380a.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * adopted for HD300 by Marcin Bukat
  11  * Copyright (C) 2009 by Bertrik Sikken
  12  * Copyright (C) 2008 by Robert Kukla
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License
  16  * as published by the Free Software Foundation; either version 2
  17  * of the License, or (at your option) any later version.
  18  *
  19  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  20  * KIND, either express or implied.
  21  *
  22  ****************************************************************************/
  23 #include "config.h"
  24 #include "rtc.h"
  25 #include "i2c-coldfire.h"
  26
  27 #include "lcd.h"
  28 #include "font.h"
  29 /*  Driver for the Seiko S35380A real-time clock chip with i2c interface
  30
  31     This driver was derived from rtc_s3539a.c and adapted for the MPIO HD300
  32  */
  33
  34 #define RTC_ADDR   0x60
  35
  36 #define STATUS_REG1     0
  37 #define STATUS_REG2     1
  38 #define REALTIME_DATA1  2
  39 #define REALTIME_DATA2  3
  40 #define INT1_REG        4
  41 #define INT2_REG        5
  42 #define CLOCK_CORR_REG  6
  43 #define FREE_REG        7
  44
  45 /* STATUS_REG1 flags */
  46 #define STATUS_REG1_POC   0x80
  47 #define STATUS_REG1_BLD   0x40
  48 #define STATUS_REG1_INT2  0x20
  49 #define STATUS_REG1_INT1  0x10
  50 #define STATUS_REG1_SC1   0x08
  51 #define STATUS_REG1_SC0   0x04
  52 #define STATUS_REG1_H1224 0x02
  53 #define STATUS_REG1_RESET 0x01
  54
  55 /* STATUS_REG2 flags */
  56 #define STATUS_REG2_TEST   0x80
  57 #define STATUS_REG2_INT2AE 0x40
  58 #define STATUS_REG2_INT2ME 0x20
  59 #define STATUS_REG2_INT2FE 0x10
  60 #define STATUS_REG2_32kE   0x08
  61 #define STATUS_REG2_INT1AE 0x04
  62 #define STATUS_REG2_INT1ME 0x02
  63 #define STATUS_REG2_INT1FE 0x01
  64
  65 /* REALTIME_DATA register bytes */
  66 #define TIME_YEAR     0
  67 #define TIME_MONTH    1
  68 #define TIME_DAY      2
  69 #define TIME_WEEKDAY  3
  70 #define TIME_HOUR     4
  71 #define TIME_MINUTE   5
  72 #define TIME_SECOND   6
  73 #define TIME_REG_SIZE 7
  74
  75 /* INT1, INT2 register bytes */
  76 #define ALARM_WEEKDAY  0
  77 #define ALARM_HOUR     1
  78 #define ALARM_MINUTE   2
  79 #define ALARM_REG_SIZE 3
  80
  81 /* INT1, INT2 register bits */
  82 #define A1WE 0x80
  83 #define A1HE 0x80
  84 #define A1mE 0x80
  85
  86 #define A2WE 0x80
  87 #define A2HE 0x80
  88 #define A2mE 0x80
  89
  90 #define AMPM 0x40
  91
  92 static bool int_flag;
  93
  94 /* s35380a chip has reversed bits order in byte
  95  * This is little helper function to deal with
  96  */
  97 static void reverse_bits(unsigned char* v, int size)
  98 {
  99     static const unsigned char flipnibble[] =
 100         {0x00, 0x08, 0x04, 0x0C, 0x02, 0x0A, 0x06, 0x0E,
 101          0x01, 0x09, 0x05, 0x0D, 0x03, 0x0B, 0x07, 0x0F};
 102     int i;
 103
 104     for (i = 0; i < size; i++) {
 105         v[i] = (flipnibble[v[i] & 0x0F] << 4) |
 106                 flipnibble[(v[i] >> 4) & 0x0F];
 107     }
 108 }
 109
 110 /* Read 'size' bytes from RTC 'reg' and put data in 'buf'
 111  * bits are reversed in data bytes afterwards so they appear in regular order
 112  * return i2c transfer code
 113  */
 114 static int rtc_read(unsigned char reg, unsigned char *buf, int size)
 115 {
 116     int rc;
 117     rc = i2c_read(I2C_IFACE_1, RTC_ADDR|(reg<<1), buf, size);
 118     reverse_bits(buf, size);
 119     return rc;
 120 }
 121
 122 /* Write 'size' bytes to RTC 'reg' and put data in 'buf'
 123  * bits are reversed in data bytes prior to sending them to RTC
 124  * return i2c transfer code
 125  */
 126 static int rtc_write(unsigned char reg, unsigned char *buf, int size)
 127 {
 128     int rc;
 129     reverse_bits(buf, size);
 130     rc = i2c_write(I2C_IFACE_1, RTC_ADDR|(reg<<1), buf, size);
 131     return rc;
 132 }
 133
 134 /* Reset RTC by writing '1' to RESET bit in STATUS_REG1 */
 135 static inline void rtc_reset(void)
 136 {
 137     unsigned char reg = STATUS_REG1_RESET;
 138     rtc_write(STATUS_REG1, &reg, 1);
 139 }
 140
 141 /* Initialize RTC (according to scheme outlined in datasheet).
 142  * Configure chip to 24h time format.
 143  */
 144 void rtc_init(void)
 145 {
 146     unsigned char reg;
 147     static bool initialized = false;
 148
 149     if ( initialized )
 150         return;
 151
 152     rtc_read(STATUS_REG1, &reg, 1);
 153
 154     /* cache INT1, INT2 flags as reading the register seem to clear
 155      * this bits (which is not described in datasheet)
 156      */
 157     int_flag = ((reg & STATUS_REG1_INT1) || (reg & STATUS_REG1_INT2));
 158
 159     /* test POC and BLD flags */
 160     if ( (reg & STATUS_REG1_POC) || (reg & STATUS_REG1_BLD))
 161         rtc_reset();
 162
 163     rtc_read(STATUS_REG2, &reg, 1);
 164
 165     /* test TEST flag */
 166     if ( reg & STATUS_REG2_TEST )
 167         rtc_reset();
 168
 169     /* setup 24h time format */
 170     reg = STATUS_REG1_H1224;
 171     rtc_write(STATUS_REG1, &reg, 1);
 172
 173     initialized = true;
 174 }
 175
 176 /* Read realtime data register */
 177 int rtc_read_datetime(struct tm *tm)
 178 {
 179     unsigned char buf[TIME_REG_SIZE];
 180     unsigned int i;
 181     int ret;
 182
 183     ret = rtc_read(REALTIME_DATA1, buf, sizeof(buf));
 184
 185     buf[TIME_HOUR] &= 0x3f; /* mask out p.m. flag */
 186
 187     for (i = 0; i < sizeof(buf); i++)
 188         buf[i] = BCD2DEC(buf[i]);
 189
 190     tm->tm_sec  = buf[TIME_SECOND];
 191     tm->tm_min  = buf[TIME_MINUTE];
 192     tm->tm_hour = buf[TIME_HOUR];
 193     tm->tm_wday = buf[TIME_WEEKDAY];
 194     tm->tm_mday = buf[TIME_DAY];
 195     tm->tm_mon  = buf[TIME_MONTH] - 1;
 196     tm->tm_year = buf[TIME_YEAR] + 100;
 197
 198     return ret;
 199 }
 200
 201 /* Write to realtime data register */
 202 int rtc_write_datetime(const struct tm *tm)
 203 {
 204     unsigned char buf[TIME_REG_SIZE];
 205     unsigned int i;
 206     int ret;
 207
 208     buf[TIME_SECOND]  = tm->tm_sec;
 209     buf[TIME_MINUTE]  = tm->tm_min;
 210     buf[TIME_HOUR]    = tm->tm_hour;
 211     buf[TIME_WEEKDAY] = tm->tm_wday;
 212     buf[TIME_DAY]     = tm->tm_mday;
 213     buf[TIME_MONTH]   = tm->tm_mon + 1;
 214     buf[TIME_YEAR]    = tm->tm_year - 100;
 215
 216     for (i = 0; i < sizeof(buf); i++)
 217         buf[i] = DEC2BCD(buf[i]);
 218
 219     ret = rtc_write(REALTIME_DATA1, buf, sizeof(buf));
 220
 221     return ret;
 222 }
 223
 224 #ifdef HAVE_RTC_ALARM
 225 /* Set alarm (INT1) data register */
 226 void rtc_set_alarm(int h, int m)
 227 {
 228     unsigned char buf[ALARM_REG_SIZE];
 229
 230     /* INT1 register can be accessed only when IN1AE flag is set */
 231     rtc_enable_alarm(true);
 232
 233     /* A1mE, A1HE - validity flags */
 234     buf[ALARM_MINUTE]  = DEC2BCD(m) | A1mE;
 235     buf[ALARM_HOUR]    = DEC2BCD(h) | A1HE;
 236     buf[ALARM_WEEKDAY] = 0;
 237
 238     /* AM/PM flag has to be set properly regardles of
 239      * time format used (H1224 flag in STATUS_REG1)
 240      * this is not described in datasheet for s35380a
 241      * but is somehow described in datasheet for s35390a
 242      */
 243     if ( h >= 12 )
 244         buf[ALARM_HOUR] |= AMPM;
 245
 246     rtc_write(INT1_REG, buf, sizeof(buf));
 247 }
 248
 249 /* Read alarm (INT1) data register */
 250 void rtc_get_alarm(int *h, int *m)
 251 {
 252     unsigned char buf[ALARM_REG_SIZE];
 253
 254     /* INT1 alarm register can be accessed only when INT1AE is set */
 255     rtc_enable_alarm(true);
 256
 257     /* read the content of INT1 register */
 258     rtc_read(INT1_REG, buf, sizeof(buf));
 259
 260     *h = BCD2DEC(buf[ALARM_HOUR] & 0x3f);   /* mask out A1HE and PM/AM bits */
 261     *m = BCD2DEC(buf[ALARM_MINUTE] & 0x7f); /* mask out A1mE bit */
 262
 263     /* Disable alarm - this is not strictly needed in rockbox
 264      * as after rtc_get_alarm() rtc_set_alarm() or rtc_enable_alarm(false)
 265      * are called. I just found this weird that simple reading register
 266      * changes alarm settings.
 267      */
 268     rtc_enable_alarm(false);
 269 }
 270
 271 /* Check if we just triggered alarm.
 272  * We check both INT1 and INT2. Rockbox uses only INT1 but
 273  * OF in MPIO HD300 uses both
 274  */
 275 bool rtc_check_alarm_flag(void)
 276 {
 277     unsigned char reg;
 278     rtc_read(STATUS_REG1, &reg, 1);
 279
 280     return ((reg & STATUS_REG1_INT1) || (reg & STATUS_REG1_INT2));
 281 }
 282
 283 /* Enable/disable alarm function */
 284 void rtc_enable_alarm(bool enable)
 285 {
 286     unsigned char reg = 0;
 287
 288     if (enable)
 289         reg = STATUS_REG2_INT1AE;
 290
 291     rtc_write(STATUS_REG2, &reg, 1);
 292 }
 293
 294 /* Return true if wakeup is due to RTC alarm */
 295 bool rtc_check_alarm_started(bool release_alarm)
 296 {
 297     static bool run_before;
 298     bool rc;
 299
 300     if (run_before)
 301     {
 302         rc = int_flag;
 303         int_flag &= ~release_alarm;
 304     }
 305     else
 306     {
 307         rc = int_flag;
 308         run_before = true;
 309     }
 310
 311     return rc;
 312 }
 313 #endif