5 OUTPUT_FORMAT(elf32-m68k)
6 INPUT(target/coldfire/crt0.o)
7 #elif defined (CPU_ARM)
8 OUTPUT_FORMAT(elf32-littlearm)
11 INPUT(target/arm/crt0-pp-bl.o)
12 #elif CONFIG_CPU==DM320
13 INPUT(target/arm/tms320dm320/crt0.o)
14 #elif CONFIG_CPU==S3C2440
15 INPUT(target/arm/s3c2440/crt0.o)
16 #elif defined(CPU_TCC77X)
17 INPUT(target/arm/tcc77x/crt0.o)
18 #elif defined(CPU_TCC780X)
19 INPUT(target/arm/tcc780x/crt0.o)
20 #elif CONFIG_CPU==IMX31L
21 INPUT(target/arm/imx31/crt0.o)
23 INPUT(target/arm/crt0.o)
26 OUTPUT_FORMAT(elf32-sh)
27 INPUT(target/sh/crt0.o)
30 #define DRAMSIZE (MEMORYSIZE * 0x100000)
32 #ifdef IRIVER_H100_SERIES
33 #define DRAMORIG 0x31000000
34 #define IRAMORIG 0x10000000
35 #define IRAMSIZE 0x18000
36 #define FLASHORIG 0x001f0000
38 #elif defined(IRIVER_H300_SERIES)
39 #define DRAMORIG 0x31000000
40 #define IRAMORIG 0x10000000
41 #define IRAMSIZE 0x18000
42 #define FLASHORIG 0x003f0000
44 #elif defined(IAUDIO_X5) || defined(IAUDIO_M5)
45 #define DRAMORIG 0x31000000
46 #define IRAMORIG 0x10000000
47 #define IRAMSIZE 0x20000
48 #define FLASHORIG 0x00010000
50 #elif CONFIG_CPU == PP5020
51 #define DRAMORIG 0x10000000
52 #define IRAMORIG 0x40000000
53 #define IRAMSIZE 0x18000
54 #define FLASHORIG 0x001f0000
56 #elif (CONFIG_CPU == PP5022) || (CONFIG_CPU == PP5024)
57 #define DRAMORIG 0x10000000
59 #define IRAMORIG 0x40000000
61 #define IRAMSIZE 0x20000
62 #define FLASHORIG 0x001f0000
64 #elif CONFIG_CPU == S3C2440
65 #define DRAMORIG 0x30000000
66 #define IRAMORIG 0x40000000
68 #define FLASHORIG 0x0000000
70 #elif CONFIG_CPU == DM320
71 #define DRAMORIG 0x00900000
72 #define IRAMORIG 0x00000000
74 #define FLASHORIG 0x00100000
76 #elif CONFIG_CPU == PP5002
77 #define DRAMORIG 0x28000000
78 #define IRAMORIG 0x40000000
79 #define IRAMSIZE 0x18000
80 #define FLASHORIG 0x001f0000
82 #elif CONFIG_CPU == IMX31L
83 #define DRAMORIG 0x80000000
84 #define IRAMORIG 0x1FFFC000
86 #define FLASHORIG 0x0000000
88 #elif defined(CPU_TCC77X)
89 #define DRAMORIG 0x20000000
90 #define IRAMORIG 0x00000000
92 #define FLASHORIG 0x0000000
94 #elif defined(CPU_TCC780X)
95 #define DRAMORIG 0x20000000
96 #define IRAMORIG 0x00000000
98 #define FLASHORIG 0x0000000
101 #define DRAMORIG 0x09000000
102 #define IRAMORIG 0x0f000000
103 #define IRAMSIZE 0x1000
104 #define FLASHORIG 0x02000000 + ROM_START
105 #define FLASHSIZE 256K - ROM_START
108 #if defined(CPU_TCC77X) || defined(CPU_TCC780X)
112 DRAM : ORIGIN = DRAMORIG + DRAMSIZE - 0x100000, LENGTH = 0x100000
114 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
116 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
118 #elif !defined(CPU_PP) && (CONFIG_CPU!=S3C2440) && (CONFIG_CPU!=IMX31L)
121 DRAM : ORIGIN = DRAMORIG, LENGTH = DRAMSIZE
122 IRAM : ORIGIN = IRAMORIG, LENGTH = IRAMSIZE
123 FLASH : ORIGIN = FLASHORIG, LENGTH = FLASHSIZE
155 /* The bss section is too large for IRAM - we just move it 16MB into the
158 . = (DRAMORIG+16*1024*1024);
166 #elif (CONFIG_CPU==S3C2440)
168 . = DRAMORIG + 0x1000000;
201 #elif defined(CPU_TCC77X) || defined(CPU_TCC780X)
238 #elif (CONFIG_CPU==DM320)
240 . = DRAMORIG + 0x1000000;
254 *(.rodata) /* problems without this, dunno why */
260 /* Pseudo-allocate the copies of the data sections */
295 KEEP(*(.resetvectors));
301 _vectorscopy = LOADADDR(.vectors);
303 #elif (CONFIG_CPU==IMX31L)
342 #if defined(IAUDIO_X5) || defined(IAUDIO_M5)
348 .data : AT ( _datacopy )
351 KEEP(*(.resetvectors));
362 . = ALIGN(0x10); /* Maintain proper alignment for .text section */
365 /* TRICK ALERT! Newer versions of the linker don't allow output sections
366 to overlap even if one of them is empty, so advance the location pointer
368 .text LOADADDR(.data) + SIZEOF(.data) :
392 #if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES) \
393 || defined(IAUDIO_X5) || defined(IAUDIO_M5)
394 .bss DRAMORIG+0x800000:
404 #if defined(IRIVER_H100_SERIES) || defined(IRIVER_H300_SERIES) \
405 || defined(IAUDIO_X5) || defined(IAUDIO_M5)