firmware/rolo.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 Randy D. Wood
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "config.h"
  23 #include "lcd.h"
  24 #include "lcd-remote.h"
  25 #include "thread.h"
  26 #include "kernel.h"
  27 #include "button.h"
  28 #include "file.h"
  29 #include "audio.h"
  30 #include "system.h"
  31 #include "i2c.h"
  32 #include "adc.h"
  33 #include "string.h"
  34 #include "buffer.h"
  35 #include "storage.h"
  36 #include "rolo.h"
  37
  38 #ifdef MI4_FORMAT
  39 #include "crc32-mi4.h"
  40 #undef FIRMWARE_OFFSET_FILE_CRC
  41 #undef FIRMWARE_OFFSET_FILE_DATA
  42 #define FIRMWARE_OFFSET_FILE_CRC     0xC
  43 #define FIRMWARE_OFFSET_FILE_DATA    0x200
  44 #endif
  45
  46 #if !defined(IRIVER_IFP7XX_SERIES)
  47 /* FIX: this doesn't work on iFP */
  48
  49 #define IRQ0_EDGE_TRIGGER 0x80
  50
  51 #ifdef CPU_PP
  52 /* Handle the COP properly - it needs to jump to a function outside SDRAM while
  53  * the new firmware is being loaded, and then jump to the start of SDRAM
  54  * TODO: Use the mailboxes built into the PP processor for this
  55  */
  56
  57 #if NUM_CORES > 1
  58 volatile unsigned char IDATA_ATTR cpu_message = 0;
  59 volatile unsigned char IDATA_ATTR cpu_reply = 0;
  60 extern int cop_idlestackbegin[];
  61
  62 void rolo_restart_cop(void) ICODE_ATTR;
  63 void rolo_restart_cop(void)
  64 {
  65     if (CURRENT_CORE == CPU)
  66     {
  67         /* There should be free thread slots aplenty */
  68         create_thread(rolo_restart_cop, cop_idlestackbegin, IDLE_STACK_SIZE,
  69                       0, "rolo COP" IF_PRIO(, PRIORITY_REALTIME)
  70                       IF_COP(, COP));
  71         return;
  72     }
  73
  74     COP_INT_DIS = -1;
  75
  76     /* Invalidate cache */
  77     cpucache_invalidate();
  78
  79     /* Disable cache */
  80     CACHE_CTL = CACHE_CTL_DISABLE;
  81
  82     /* Tell the main core that we're ready to reload */
  83     cpu_reply = 1;
  84
  85     /* Wait while RoLo loads the image into SDRAM */
  86     /* TODO: Accept checksum failure gracefully */
  87     while(cpu_message != 1);
  88
  89     /* Acknowledge the CPU and then reload */
  90     cpu_reply = 2;
  91
  92     asm volatile(
  93         "bx    %0   \n"
  94         : : "r"(DRAM_START)
  95     );
  96 }
  97 #endif /* NUM_CORES > 1 */
  98 #endif /* CPU_PP */
  99
 100 static void rolo_error(const char *text)
 101 {
 102     lcd_clear_display();
 103     lcd_puts(0, 0, "ROLO error:");
 104     lcd_puts_scroll(0, 1, text);
 105     lcd_update();
 106     button_get(true);
 107     button_get(true);
 108     button_get(true);
 109     lcd_stop_scroll();
 110 }
 111
 112 #if CONFIG_CPU == SH7034 || CONFIG_CPU == IMX31L
 113 /* these are in assembler file "descramble.S" for SH7034 */
 114 extern unsigned short descramble(const unsigned char* source,
 115                                  unsigned char* dest, int length);
 116 /* this is in firmware/target/arm/imx31/rolo_restart.c for IMX31 */
 117 extern void rolo_restart(const unsigned char* source, unsigned char* dest,
 118                          int length);
 119 #else
 120
 121 /* explicitly put this code in iram, ICODE_ATTR is defined to be null for some
 122    targets that are low on iram, like the gigabeat F/X */
 123 void rolo_restart(const unsigned char* source, unsigned char* dest,
 124                   long length) __attribute__ ((section(".icode")));
 125 void rolo_restart(const unsigned char* source, unsigned char* dest,
 126                   long length)
 127 {
 128     long i;
 129     unsigned char* localdest = dest;
 130
 131     /* This is the equivalent of a call to memcpy() but this must be done from
 132        iram to avoid overwriting itself and we don't want to depend on memcpy()
 133        always being in iram */
 134     for(i = 0;i < length;i++)
 135         *localdest++ = *source++;
 136
 137 #if defined(CPU_COLDFIRE)
 138     asm (
 139         "movec.l %0,%%vbr    \n"
 140         "move.l  (%0)+,%%sp  \n"
 141         "move.l  (%0),%0     \n"
 142         "jmp     (%0)        \n"
 143         : : "a"(dest)
 144     );
 145 #elif defined(CPU_PP)
 146     CPU_INT_DIS = -1;
 147
 148     /* Flush cache */
 149     cpucache_flush();
 150
 151     /* Disable cache */
 152     CACHE_CTL = CACHE_CTL_DISABLE;
 153
 154     /* Reset the memory mapping registers to zero */
 155     {
 156         volatile unsigned long *mmap_reg;
 157         for (mmap_reg = &MMAP_FIRST; mmap_reg <= &MMAP_LAST; mmap_reg++)
 158             *mmap_reg = 0;
 159     }
 160
 161 #if NUM_CORES > 1
 162     /* Tell the COP it's safe to continue rebooting */
 163     cpu_message = 1;
 164
 165     /* Wait for the COP to tell us it is rebooting */
 166     while(cpu_reply != 2);
 167 #endif
 168
 169     asm volatile(
 170         "bx    %0   \n"
 171         : : "r"(DRAM_START)
 172     );
 173
 174 #elif defined(CPU_ARM)
 175 #ifdef HAVE_CPUCACHE_INVALIDATE
 176     /* Flush and invalidate caches */
 177     cpucache_invalidate();
 178 #endif
 179     asm volatile(
 180         "bx    %0   \n"
 181         : : "r"(dest)
 182     );
 183 #elif defined(CPU_MIPS)
 184     __dcache_writeback_all();
 185     asm volatile(
 186         "jr     %0               \n"
 187         : : "r"(dest)
 188     );
 189 #endif
 190 }
 191 #endif
 192
 193 /* This is assigned in the linker control file */
 194 extern unsigned long loadaddress;
 195
 196 /***************************************************************************
 197  *
 198  * Name: rolo_load_app(char *filename,int scrambled)
 199  * Filename must be a fully defined filename including the path and extension
 200  *
 201  ***************************************************************************/
 202 int rolo_load(const char* filename)
 203 {
 204     int fd;
 205     long length;
 206 #if defined(CPU_COLDFIRE) || defined(CPU_ARM) || defined(CPU_MIPS)
 207 #if !defined(MI4_FORMAT)
 208     int i;
 209 #endif
 210     unsigned long checksum,file_checksum;
 211 #else
 212     long file_length;
 213     unsigned short checksum,file_checksum;
 214 #endif
 215     unsigned char* ramstart = (void*)&loadaddress;
 216
 217     lcd_clear_display();
 218     lcd_puts(0, 0, "ROLO...");
 219     lcd_puts(0, 1, "Loading");
 220     lcd_update();
 221 #ifdef HAVE_REMOTE_LCD
 222     lcd_remote_clear_display();
 223     lcd_remote_puts(0, 0, "ROLO...");
 224     lcd_remote_puts(0, 1, "Loading");
 225     lcd_remote_update();
 226 #endif
 227
 228     audio_stop();
 229
 230     fd = open(filename, O_RDONLY);
 231     if(-1 == fd) {
 232         rolo_error("File not found");
 233         return -1;
 234     }
 235
 236     length = filesize(fd) - FIRMWARE_OFFSET_FILE_DATA;
 237
 238 #if CONFIG_CPU != SH7034
 239     /* Read and save checksum */
 240     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 241     if (read(fd, &file_checksum, 4) != 4) {
 242         rolo_error("Error Reading checksum");
 243         return -1;
 244     }
 245
 246 #if !defined(MI4_FORMAT)
 247     /* Rockbox checksums are big-endian */
 248     file_checksum = betoh32(file_checksum);
 249 #endif
 250
 251 #if defined(CPU_PP) && NUM_CORES > 1
 252     lcd_puts(0, 2, "Waiting for coprocessor...");
 253     lcd_update();
 254     rolo_restart_cop();
 255     /* Wait for COP to be in safe code */
 256     while(cpu_reply != 1);
 257     lcd_puts(0, 2, "                          ");
 258     lcd_update();
 259 #endif
 260
 261     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 262
 263     if (read(fd, audiobuf, length) != length) {
 264         rolo_error("Error Reading File");
 265         return -1;
 266     }
 267
 268 #ifdef MI4_FORMAT
 269     /* Check CRC32 to see if we have a valid file */
 270     chksum_crc32gentab();
 271     checksum = chksum_crc32 (audiobuf, length);
 272 #else
 273     checksum = MODEL_NUMBER;
 274
 275     for(i = 0;i < length;i++) {
 276         checksum += audiobuf[i];
 277     }
 278 #endif
 279
 280     /* Verify checksum against file header */
 281     if (checksum != file_checksum) {
 282         rolo_error("Checksum Error");
 283         return -1;
 284     }
 285
 286 #ifdef HAVE_STORAGE_FLUSH
 287     lcd_puts(0, 1, "Flushing storage buffers");
 288     lcd_update();
 289     storage_flush();
 290 #endif
 291
 292     lcd_puts(0, 1, "Executing");
 293     lcd_update();
 294 #ifdef HAVE_REMOTE_LCD
 295     lcd_remote_puts(0, 1, "Executing");
 296     lcd_remote_update();
 297 #endif
 298     adc_close();
 299
 300 #if CONFIG_CPU != IMX31L /* We're not finished yet */
 301 #ifdef CPU_ARM
 302     /* Should do these together since some ARM version should never have
 303      * FIQ disabled and not IRQ (imx31 errata). */
 304     disable_interrupt(IRQ_FIQ_STATUS);
 305 #else
 306     /* Some targets have a higher disable level than HIGEST_IRQ_LEVEL */
 307     set_irq_level(DISABLE_INTERRUPTS);
 308 #endif
 309 #endif /* CONFIG_CPU == IMX31L */
 310
 311 #else /* CONFIG_CPU == SH7034 */
 312     /* Read file length from header and compare to real file length */
 313     lseek(fd, FIRMWARE_OFFSET_FILE_LENGTH, SEEK_SET);
 314     if(read(fd, &file_length, 4) != 4) {
 315         rolo_error("Error Reading File Length");
 316         return -1;
 317     }
 318     if (length != file_length) {
 319         rolo_error("File length mismatch");
 320         return -1;
 321     }
 322
 323     /* Read and save checksum */
 324     lseek(fd, FIRMWARE_OFFSET_FILE_CRC, SEEK_SET);
 325     if (read(fd, &file_checksum, 2) != 2) {
 326         rolo_error("Error Reading checksum");
 327         return -1;
 328     }
 329     lseek(fd, FIRMWARE_OFFSET_FILE_DATA, SEEK_SET);
 330
 331     /* verify that file can be read and descrambled */
 332     if ((audiobuf + (2*length)+4) >= audiobufend) {
 333         rolo_error("Not enough room to load file");
 334         return -1;
 335     }
 336
 337     if (read(fd, &audiobuf[length], length) != (int)length) {
 338         rolo_error("Error Reading File");
 339         return -1;
 340     }
 341
 342     lcd_puts(0, 1, "Descramble");
 343     lcd_update();
 344
 345     checksum = descramble(audiobuf + length, audiobuf, length);
 346
 347     /* Verify checksum against file header */
 348     if (checksum != file_checksum) {
 349         rolo_error("Checksum Error");
 350         return -1;
 351     }
 352
 353 #ifdef HAVE_STORAGE_FLUSH
 354     lcd_puts(0, 1, "Flushing      ");
 355     lcd_update();
 356     storage_flush();
 357 #endif
 358
 359     lcd_puts(0, 1, "Executing     ");
 360     lcd_update();
 361
 362     set_irq_level(HIGHEST_IRQ_LEVEL);
 363
 364     /* Calling these 2 initialization routines was necessary to get the
 365        the origional Archos version of the firmware to load and execute. */
 366     system_init();           /* Initialize system for restart */
 367     i2c_init();              /* Init i2c bus - it seems like a good idea */
 368     ICR = IRQ0_EDGE_TRIGGER; /* Make IRQ0 edge triggered */
 369     TSTR = 0xE0;             /* disable all timers */
 370     /* model-specific de-init, needed when flashed */
 371     /* Especially the Archos software is picky about this */
 372 #if defined(ARCHOS_RECORDER) || defined(ARCHOS_RECORDERV2) || \
 373     defined(ARCHOS_FMRECORDER)
 374     PAIOR = 0x0FA0;
 375 #endif
 376 #endif
 377     rolo_restart(audiobuf, ramstart, length);
 378
 379     return 0; /* this is never reached */
 380     (void)checksum; (void)file_checksum;
 381 }
 382 #else  /* !defined(IRIVER_IFP7XX_SERIES) */
 383 int rolo_load(const char* filename)
 384 {
 385     /* dummy */
 386     (void)filename;
 387     return 0;
 388 }
 389
 390 #endif /* !defined(IRIVER_IFP7XX_SERIES) */