firmware/target/sh/thread-sh.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2002 by Ulf Ralberg
  11  *
  12  * SH processor threading support
  13  *
  14  * This program is free software; you can redistribute it and/or
  15  * modify it under the terms of the GNU General Public License
  16  * as published by the Free Software Foundation; either version 2
  17  * of the License, or (at your option) any later version.
  18  *
  19  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  20  * KIND, either express or implied.
  21  *
  22  ****************************************************************************/
  23
  24 /*---------------------------------------------------------------------------
  25  * Start the thread running and terminate it if it returns
  26  *---------------------------------------------------------------------------
  27  */
  28 void start_thread(void); /* Provide C access to ASM label */
  29 static void __attribute__((used)) __start_thread(void)
  30 {
  31     /* r8 = context */
  32     asm volatile (
  33     "_start_thread:            \n" /* Start here - no naked attribute */
  34         "mov.l  @(4, r8), r0   \n" /* Fetch thread function pointer */
  35         "mov.l  @(28, r8), r15 \n" /* Set initial sp */
  36         "mov    #0, r1         \n" /* Start the thread */
  37         "jsr    @r0            \n"
  38         "mov.l  r1, @(36, r8)  \n" /* Clear start address */
  39     );
  40     thread_exit();
  41 }
  42
  43 /* Place context pointer in r8 slot, function pointer in r9 slot, and
  44  * start_thread pointer in context_start */
  45 #define THREAD_STARTUP_INIT(core, thread, function) \
  46     ({ (thread)->context.r[0] = (uint32_t)&(thread)->context, \
  47        (thread)->context.r[1] = (uint32_t)(function),         \
  48        (thread)->context.start = (uint32_t)start_thread; })
  49
  50 /*---------------------------------------------------------------------------
  51  * Store non-volatile context.
  52  *---------------------------------------------------------------------------
  53  */
  54 static inline void store_context(void* addr)
  55 {
  56     asm volatile (
  57         "add     #36, %0   \n" /* Start at last reg. By the time routine */
  58         "sts.l   pr, @-%0  \n" /* is done, %0 will have the original value */
  59         "mov.l   r15,@-%0  \n"
  60         "mov.l   r14,@-%0  \n"
  61         "mov.l   r13,@-%0  \n"
  62         "mov.l   r12,@-%0  \n"
  63         "mov.l   r11,@-%0  \n"
  64         "mov.l   r10,@-%0  \n"
  65         "mov.l   r9, @-%0  \n"
  66         "mov.l   r8, @-%0  \n"
  67         : : "r" (addr)
  68     );
  69 }
  70
  71 /*---------------------------------------------------------------------------
  72  * Load non-volatile context.
  73  *---------------------------------------------------------------------------
  74  */
  75 static inline void load_context(const void* addr)
  76 {
  77     asm volatile (
  78         "mov.l  @(36, %0), r0 \n" /* Get start address */
  79         "tst    r0, r0        \n"
  80         "bt     .running      \n" /* NULL -> already running */
  81         "jmp    @r0           \n" /* r8 = context */
  82     ".running:                \n"
  83         "mov.l  @%0+, r8      \n" /* Executes in delay slot and outside it */
  84         "mov.l  @%0+, r9      \n"
  85         "mov.l  @%0+, r10     \n"
  86         "mov.l  @%0+, r11     \n"
  87         "mov.l  @%0+, r12     \n"
  88         "mov.l  @%0+, r13     \n"
  89         "mov.l  @%0+, r14     \n"
  90         "mov.l  @%0+, r15     \n"
  91         "lds.l  @%0+, pr      \n"
  92         : : "r" (addr) : "r0" /* only! */
  93     );
  94 }
  95
  96 /*---------------------------------------------------------------------------
  97  * Put core in a power-saving state.
  98  *---------------------------------------------------------------------------
  99  */
 100 static inline void core_sleep(void)
 101 {
 102     asm volatile (
 103         "and.b  #0x7f, @(r0, gbr) \n" /* Clear SBY (bit 7) in SBYCR */
 104         "mov    #0, r1            \n" /* Enable interrupts */
 105         "ldc    r1, sr            \n" /* Following instruction cannot be interrupted */
 106         "sleep                    \n" /* Execute standby */
 107         : : "z"(&SBYCR-GBR) : "r1");
 108 }
 109