firmware/target/arm/wmcodec-pp.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Portalplayer specific code for Wolfson audio codecs
  11  *
  12  * Based on code from the ipodlinux project - http://ipodlinux.org/
  13  * Adapted for Rockbox in December 2005
  14  *
  15  * Original file: linux/arch/armnommu/mach-ipod/audio.c
  16  *
  17  * Copyright (c) 2003-2005 Bernard Leach (leachbj@bouncycastle.org)
  18  *
  19  * This program is free software; you can redistribute it and/or
  20  * modify it under the terms of the GNU General Public License
  21  * as published by the Free Software Foundation; either version 2
  22  * of the License, or (at your option) any later version.
  23  *
  24  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  25  * KIND, either express or implied.
  26  *
  27  ****************************************************************************/
  28
  29 #include "system.h"
  30 #include "audiohw.h"
  31 #include "i2c-pp.h"
  32 #include "wmcodec.h"
  33
  34 #if defined(IRIVER_H10) || defined(IRIVER_H10_5GB) || defined(MROBE_100)
  35 /* The H10's audio codec uses an I2C address of 0x1b */
  36 #define I2C_AUDIO_ADDRESS 0x1b
  37 #else
  38 /* The iPod's audio codecs use an I2C address of 0x1a */
  39 #define I2C_AUDIO_ADDRESS 0x1a
  40 #endif
  41
  42
  43 /*
  44  * Initialise the PP I2C and I2S.
  45  */
  46 void audiohw_init(void) {
  47 #ifdef CPU_PP502x
  48     /* normal outputs for CDI and I2S pin groups */
  49     DEV_INIT2 &= ~0x300;
  50
  51     /*mini2?*/
  52     DEV_INIT1 &=~0x3000000;
  53     /*mini2?*/
  54
  55     /* I2S device reset */
  56     DEV_RS |= DEV_I2S;
  57     DEV_RS &=~DEV_I2S;
  58
  59     /* I2S device enable */
  60     DEV_EN |= DEV_I2S;
  61
  62     /* enable external dev clock clocks */
  63     DEV_EN |= DEV_EXTCLOCKS;
  64
  65     /* external dev clock to 24MHz */
  66     outl(inl(0x70000018) & ~0xc, 0x70000018);
  67 #else
  68     /* device reset */
  69     outl(inl(0xcf005030) | 0x80, 0xcf005030);
  70     outl(inl(0xcf005030) & ~0x80, 0xcf005030);
  71
  72     /* device enable */
  73     outl(inl(0xcf005000) | 0x80, 0xcf005000);
  74
  75     /* GPIO D06 enable for output */
  76     outl(inl(0xcf00000c) | 0x40, 0xcf00000c);
  77     outl(inl(0xcf00001c) & ~0x40, 0xcf00001c);
  78 #ifdef IPOD_1G2G
  79     /* bits 11,10 == 10 */
  80     outl(inl(0xcf004040) & ~0x400, 0xcf004040);
  81     outl(inl(0xcf004040) | 0x800, 0xcf004040);
  82 #else /* IPOD_3G */
  83     /* bits 11,10 == 01 */
  84     outl(inl(0xcf004040) | 0x400, 0xcf004040);
  85     outl(inl(0xcf004040) & ~0x800, 0xcf004040);
  86
  87     outl(inl(0xcf004048) & ~0x1, 0xcf004048);
  88
  89     outl(inl(0xcf000004) & ~0xf, 0xcf000004);
  90     outl(inl(0xcf004044) & ~0xf, 0xcf004044);
  91
  92     /* C03 = 0 */
  93     outl(inl(0xcf000008) | 0x8, 0xcf000008);
  94     outl(inl(0xcf000018) | 0x8, 0xcf000018);
  95     outl(inl(0xcf000028) & ~0x8, 0xcf000028);
  96 #endif /* IPOD_1G2G/3G */
  97 #endif
  98
  99 #if defined(HAVE_WM8731) || defined(HAVE_WM8751)
 100     audiohw_preinit();
 101 #endif
 102
 103 }
 104
 105 #if !defined(HAVE_WM8731) && !defined(HAVE_WM8751)
 106 void audiohw_postinit(void)
 107 {
 108 }
 109 #endif
 110
 111 void wmcodec_write(int reg, int data)
 112 {
 113     pp_i2c_send(I2C_AUDIO_ADDRESS, (reg<<1) | ((data&0x100)>>8),data&0xff);
 114 }