firmware/target/arm/as3525/usb-drv-as3525v2.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright © 2010 Amaury Pouly
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21
  22 #include "usb.h"
  23 #include "usb_drv.h"
  24 #include "as3525v2.h"
  25 #include "clock-target.h"
  26 #include "ascodec.h"
  27 #include "as3514.h"
  28 #include "stdbool.h"
  29 #include "string.h"
  30 #include "stdio.h"
  31 #include "panic.h"
  32 #include "mmu-arm.h"
  33 #include "system.h"
  34 #define LOGF_ENABLE
  35 #include "logf.h"
  36 #include "usb-drv-as3525v2.h"
  37 #include "usb_core.h"
  38
  39 static int __in_ep_list[NUM_IN_EP] = {IN_EP_LIST};
  40 static int __out_ep_list[NUM_OUT_EP] = {OUT_EP_LIST};
  41 static int __in_ep_list_ep0[NUM_IN_EP + 1] = {0, IN_EP_LIST};
  42 static int __out_ep_list_ep0[NUM_OUT_EP + 1] = {0, OUT_EP_LIST};
  43
  44 /* iterate through each in/out ep except EP0
  45  * 'counter' is the counter, 'ep' is the actual value */
  46 #define FOR_EACH_EP(list, size, counter, ep) \
  47     for(counter = 0, ep = (list)[0]; \
  48         counter < (size); \
  49         counter++, ep = (list)[counter])
  50
  51 #define FOR_EACH_IN_EP_EX(include_ep0, counter, ep) \
  52     FOR_EACH_EP(include_ep0 ? __in_ep_list_ep0 : __in_ep_list, \
  53         include_ep0 ? NUM_IN_EP + 1: NUM_IN_EP, counter, ep)
  54
  55 #define FOR_EACH_OUT_EP_EX(include_ep0, counter, ep) \
  56     FOR_EACH_EP(include_ep0 ? __out_ep_list_ep0 : __out_ep_list, \
  57         include_ep0 ? NUM_OUT_EP + 1: NUM_OUT_EP, counter, ep)
  58
  59 #define FOR_EACH_IN_EP(counter, ep) \
  60     FOR_EACH_IN_EP_EX(false, counter, ep)
  61
  62 #define FOR_EACH_IN_EP_AND_EP0(counter, ep) \
  63     FOR_EACH_IN_EP_EX(true, counter, ep)
  64
  65 #define FOR_EACH_OUT_EP(counter, ep) \
  66     FOR_EACH_OUT_EP_EX(false, counter, ep)
  67
  68 #define FOR_EACH_OUT_EP_AND_EP0(counter, ep) \
  69     FOR_EACH_OUT_EP_EX(true, counter, ep)
  70
  71 /* store per endpoint, per direction, information */
  72 struct usb_endpoint
  73 {
  74     bool active; /* true is endpoint has been requested (true for EP0) */
  75     unsigned int len; /* length of the data buffer */
  76     bool wait; /* true if usb thread is blocked on completion */
  77     bool busy; /* true is a transfer is pending */
  78     int status; /* completion status (0 for success) */
  79     struct wakeup complete; /* wait object */
  80 };
  81
  82 /* state of EP0 (to correctly schedule setup packet enqueing) */
  83 enum ep0state
  84 {
  85     /* Setup packet is enqueud, waiting for actual data */
  86     EP0_WAIT_SETUP = 0,
  87     /* Waiting for ack (either IN or OUT) */
  88     EP0_WAIT_ACK = 1,
  89     /* Ack complete, waiting for data (either IN or OUT)
  90      * This state is necessary because if both ack and data complete in the
  91      * same interrupt, we might process data completion before ack completion
  92      * so we need this bizarre state */
  93     EP0_WAIT_DATA = 2,
  94     /* Setup packet complete, waiting for ack and data */
  95     EP0_WAIT_DATA_ACK = 3,
  96 };
  97
  98 /* endpoints[ep_num][DIR_IN/DIR_OUT] */
  99 static struct usb_endpoint endpoints[USB_NUM_ENDPOINTS][2];
 100 /* setup packet for EP0 */
 101 static struct usb_ctrlrequest ep0_setup_pkt USB_DEVBSS_ATTR;
 102 /* state of EP0 */
 103 enum ep0state ep0_state;
 104
 105 void usb_attach(void)
 106 {
 107     logf("usb-drv: attach");
 108     usb_enable(true);
 109 }
 110
 111 static void usb_delay(void)
 112 {
 113     int i = 0;
 114     while(i < 0x300)
 115     {
 116         asm volatile("nop");
 117         i++;
 118     }
 119 }
 120
 121 static void as3525v2_connect(void)
 122 {
 123     logf("usb-drv: init as3525v2");
 124     /* 1) enable usb core clock */
 125     bitset32(&CGU_PERI, CGU_USB_CLOCK_ENABLE);
 126     usb_delay();
 127     /* 2) enable usb phy clock */
 128     /* PHY clock */
 129     CGU_USB = 1<<5 /* enable */
 130         | (CLK_DIV(AS3525_PLLA_FREQ, 60000000)) << 2
 131         | 1; /* source = PLLA */
 132     usb_delay();
 133     /* 3) clear "stop pclk" */
 134     PCGCCTL &= ~0x1;
 135     usb_delay();
 136     /* 4) clear "power clamp" */
 137     PCGCCTL &= ~0x4;
 138     usb_delay();
 139     /* 5) clear "reset power down module" */
 140     PCGCCTL &= ~0x8;
 141     usb_delay();
 142     /* 6) set "power on program done" */
 143     DCTL |= DCTL_pwronprgdone;
 144     usb_delay();
 145     /* 7) core soft reset */
 146     GRSTCTL |= GRSTCTL_csftrst;
 147     usb_delay();
 148     /* 8) hclk soft reset */
 149     GRSTCTL |= GRSTCTL_hsftrst;
 150     usb_delay();
 151     /* 9) flush and reset everything */
 152     GRSTCTL |= 0x3f;
 153     usb_delay();
 154     /* 10) force device mode*/
 155     GUSBCFG &= ~GUSBCFG_force_host_mode;
 156     GUSBCFG |= GUSBCFG_force_device_mode;
 157     usb_delay();
 158     /* 11) Do something that is probably CCU related but undocumented*/
 159     CCU_USB_THINGY &= ~0x1000;
 160     usb_delay();
 161     CCU_USB_THINGY &= ~0x300000;
 162     usb_delay();
 163     /* 12) reset usb core parameters (dev addr, speed, ...) */
 164     DCFG = 0;
 165     usb_delay();
 166 }
 167
 168 static void as3525v2_disconnect(void)
 169 {
 170 }
 171
 172 static void enable_device_interrupts(void)
 173 {
 174     /* Clear any pending interrupt */
 175     GINTSTS = 0xffffffff;
 176     /* Clear any pending otg interrupt */
 177     GOTGINT = 0xffffffff;
 178     /* Enable interrupts */
 179     GINTMSK = GINTMSK_usbreset
 180                 | GINTMSK_enumdone
 181                 | GINTMSK_inepintr
 182                 | GINTMSK_outepintr
 183                 | GINTMSK_disconnect;
 184 }
 185
 186 static void flush_tx_fifos(int nums)
 187 {
 188     unsigned int i = 0;
 189
 190     GRSTCTL = (nums << GRSTCTL_txfnum_bitp)
 191             | GRSTCTL_txfflsh_flush;
 192     while(GRSTCTL & GRSTCTL_txfflsh_flush && i < 0x300)
 193         i++;
 194     if(GRSTCTL & GRSTCTL_txfflsh_flush)
 195         panicf("usb-drv: hang of flush tx fifos (%x)", nums);
 196     /* wait 3 phy clocks */
 197     udelay(1);
 198 }
 199
 200 static void prepare_setup_ep0(void)
 201 {
 202     logf("usb-drv: prepare EP0");
 203     /* setup DMA */
 204     clean_dcache_range((void*)&ep0_setup_pkt, sizeof ep0_setup_pkt);  /* force write back */
 205     DOEPDMA(0) = (unsigned long)&ep0_setup_pkt; /* virtual address=physical address */
 206
 207     /* Setup EP0 OUT with the following parameters:
 208      * packet count = 1
 209      * setup packet count = 1
 210      * transfer size = 8 (setup packet)
 211      */
 212     DOEPTSIZ(0) = (1 << DEPTSIZ0_supcnt_bitp)
 213                 | (1 << DEPTSIZ0_pkcnt_bitp)
 214                 | 8;
 215
 216     /* Enable endpoint, clear nak */
 217     DOEPCTL(0) |= DEPCTL_epena | DEPCTL_cnak;
 218
 219     if(!(DOEPCTL(0) & DEPCTL_epena))
 220         panicf("usb-drv: failed to enable EP0 !");
 221     ep0_state = EP0_WAIT_SETUP;
 222 }
 223
 224 static void handle_ep0_complete(bool is_ack)
 225 {
 226     switch(ep0_state)
 227     {
 228         case EP0_WAIT_SETUP:
 229             panicf("usb-drv: EP0 completion while waiting for SETUP");
 230         case EP0_WAIT_ACK:
 231             if(is_ack)
 232                 /* everything is done, prepare next setup */
 233                 prepare_setup_ep0();
 234             else
 235                 panicf("usb-drv: EP0 data completion while waiting for ACK");
 236             break;
 237         case EP0_WAIT_DATA:
 238             if(is_ack)
 239                 panicf("usb-drv: EP0 ACK while waiting for data completion");
 240             else
 241                 /* everything is done, prepare next setup */
 242                 prepare_setup_ep0();
 243             break;
 244         case EP0_WAIT_DATA_ACK:
 245             /* update state */
 246             if(is_ack)
 247                 ep0_state = EP0_WAIT_DATA;
 248             else
 249                 ep0_state = EP0_WAIT_ACK;
 250             break;
 251         default:
 252             panicf("usb-drv: invalid EP0 state");
 253     }
 254     logf("usb-drv: EP0 state updated to %d", ep0_state);
 255 }
 256
 257 static void handle_ep0_setup(void)
 258 {
 259     if(ep0_state != EP0_WAIT_SETUP)
 260     {
 261         logf("usb-drv: EP0 SETUP while in state %d", ep0_state);
 262         DCTL |= DCTL_sftdiscon;
 263         return;
 264     }
 265     /* determine is there is a data phase */
 266     if(ep0_setup_pkt.wLength == 0)
 267         /* no: wait for ack */
 268         ep0_state = EP0_WAIT_ACK;
 269     else
 270         /* yes: wait ack and data */
 271         ep0_state = EP0_WAIT_DATA_ACK;
 272 }
 273
 274 static void reset_endpoints(void)
 275 {
 276     int i, ep;
 277     /* disable all endpoints except EP0 */
 278     FOR_EACH_IN_EP(i, ep)
 279         if(DIEPCTL(ep) & DEPCTL_epena)
 280             DIEPCTL(ep) =  DEPCTL_epdis | DEPCTL_snak;
 281         else
 282             DIEPCTL(ep) = 0;
 283
 284     FOR_EACH_OUT_EP(i, ep)
 285         if(DOEPCTL(ep) & DEPCTL_epena)
 286             DOEPCTL(ep) =  DEPCTL_epdis | DEPCTL_snak;
 287         else
 288             DOEPCTL(ep) = 0;
 289
 290     /* 64 bytes packet size, active endpoint */
 291     DOEPCTL(0) = (DEPCTL_MPS_64 << DEPCTL_mps_bitp) | DEPCTL_usbactep | DEPCTL_snak;
 292     DIEPCTL(0) = (DEPCTL_MPS_64 << DEPCTL_mps_bitp) | DEPCTL_usbactep | DEPCTL_snak;
 293
 294     prepare_setup_ep0();
 295 }
 296
 297 static void cancel_all_transfers(bool cancel_ep0)
 298 {
 299     logf("usb-drv: cancel all transfers");
 300     int flags = disable_irq_save();
 301     unsigned i, ep;
 302     FOR_EACH_IN_EP_EX(cancel_ep0, i, ep)
 303     {
 304         endpoints[ep][DIR_IN].status = 1;
 305         endpoints[ep][DIR_IN].wait = false;
 306         endpoints[ep][DIR_IN].busy = false;
 307         wakeup_signal(&endpoints[ep][DIR_IN].complete);
 308         DIEPCTL(ep) = (DIEPCTL(ep) & ~DEPCTL_usbactep) | DEPCTL_epdis | DEPCTL_snak;
 309     }
 310     FOR_EACH_OUT_EP_EX(cancel_ep0, i, ep)
 311     {
 312         endpoints[ep][DIR_OUT].status = 1;
 313         endpoints[ep][DIR_OUT].wait = false;
 314         endpoints[ep][DIR_OUT].busy = false;
 315         wakeup_signal(&endpoints[ep][DIR_OUT].complete);
 316         DOEPCTL(ep) = (DOEPCTL(ep) & ~DEPCTL_usbactep) | DEPCTL_epdis | DEPCTL_snak;
 317     }
 318
 319     restore_irq(flags);
 320 }
 321
 322 static void core_dev_init(void)
 323 {
 324     unsigned int i, ep;
 325     /* Restart the phy clock */
 326     PCGCCTL = 0;
 327     /* Set phy speed : high speed */
 328     DCFG = (DCFG & ~bitm(DCFG, devspd)) | DCFG_devspd_hs_phy_hs;
 329
 330     /* Check hardware capabilities */
 331     if(extract(GHWCFG2, arch) != GHWCFG2_ARCH_INTERNAL_DMA)
 332         panicf("usb-drv: wrong architecture (%ld)", extract(GHWCFG2, arch));
 333     if(extract(GHWCFG2, hs_phy_type) != GHWCFG2_PHY_TYPE_UTMI)
 334         panicf("usb-drv: wrong HS phy type (%ld)", extract(GHWCFG2, hs_phy_type));
 335     if(extract(GHWCFG2, fs_phy_type) != GHWCFG2_PHY_TYPE_UNSUPPORTED)
 336         panicf("usb-drv: wrong FS phy type (%ld)", extract(GHWCFG2, fs_phy_type));
 337     if(extract(GHWCFG4, utmi_phy_data_width) != 0x2)
 338         panicf("usb-drv: wrong utmi data width (%ld)", extract(GHWCFG4, utmi_phy_data_width));
 339     if(!(GHWCFG4 & GHWCFG4_ded_fifo_en)) /* it seems to be multiple tx fifo support */
 340         panicf("usb-drv: no multiple tx fifo");
 341
 342     #ifdef USE_CUSTOM_FIFO_LAYOUT
 343     if(!(GHWCFG2 & GHWCFG2_dyn_fifo))
 344         panicf("usb-drv: no dynamic fifo");
 345     if(GRXFSIZ != DATA_FIFO_DEPTH)
 346         panicf("usb-drv: wrong data fifo size");
 347     #endif /* USE_CUSTOM_FIFO_LAYOUT */
 348
 349     /* do some logging */
 350     /*
 351     logf("hwcfg1: %08lx", GHWCFG1);
 352     logf("hwcfg2: %08lx", GHWCFG2);
 353     logf("hwcfg3: %08lx", GHWCFG3);
 354     logf("hwcfg4: %08lx", GHWCFG4);
 355     */
 356
 357     if(USB_NUM_ENDPOINTS != extract(GHWCFG2, num_ep))
 358         panicf("usb-drv: wrong endpoint number");
 359
 360     FOR_EACH_IN_EP_AND_EP0(i, ep)
 361     {
 362         int type = (GHWCFG1 >> GHWCFG1_epdir_bitp(ep)) & GHWCFG1_epdir_bits;
 363         if(type != GHWCFG1_EPDIR_BIDIR && type != GHWCFG1_EPDIR_IN)
 364             panicf("usb-drv: EP%d is no IN or BIDIR", ep);
 365     }
 366     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 367     {
 368         int type = (GHWCFG1 >> GHWCFG1_epdir_bitp(ep)) & GHWCFG1_epdir_bits;
 369         if(type != GHWCFG1_EPDIR_BIDIR && type != GHWCFG1_EPDIR_OUT)
 370             panicf("usb-drv: EP%d is no OUT or BIDIR", ep);
 371     }
 372
 373     /* Setup interrupt masks for endpoints */
 374     /* Setup interrupt masks */
 375     DOEPMSK = DOEPINT_setup | DOEPINT_xfercompl | DOEPINT_ahberr;
 376     DIEPMSK = DIEPINT_xfercompl | DIEPINT_timeout | DIEPINT_ahberr;
 377     DAINTMSK = 0xffffffff;
 378
 379     reset_endpoints();
 380
 381     /* fixme: threshold tweaking only takes place if we use multiple tx fifos it seems */
 382     /* only dump them for now, leave threshold disabled */
 383     /*
 384     logf("threshold control:");
 385     logf("  non_iso_thr_en: %d", (DTHRCTL & DTHRCTL_non_iso_thr_en) ? 1 : 0);
 386     logf("  iso_thr_en: %d", (DTHRCTL & DTHRCTL_iso_thr_en) ? 1 : 0);
 387     logf("  tx_thr_len: %lu", extract(DTHRCTL, tx_thr_len));
 388     logf("  rx_thr_en: %d", (DTHRCTL & DTHRCTL_rx_thr_en) ? 1 : 0);
 389     logf("  rx_thr_len: %lu", extract(DTHRCTL, rx_thr_len));
 390     */
 391
 392     /* enable USB interrupts */
 393     enable_device_interrupts();
 394 }
 395
 396 static void core_init(void)
 397 {
 398     /* Disconnect */
 399     DCTL |= DCTL_sftdiscon;
 400     /* Select UTMI+ 16 */
 401     GUSBCFG |= GUSBCFG_phy_if;
 402
 403     /* fixme: the current code is for internal DMA only, the clip+ architecture
 404      *        define the internal DMA model */
 405     /* Set burstlen and enable DMA*/
 406     GAHBCFG = (GAHBCFG_INT_DMA_BURST_INCR4 << GAHBCFG_hburstlen_bitp)
 407                 | GAHBCFG_dma_enable;
 408     /* Disable HNP and SRP, not sure it's useful because we already forced dev mode */
 409     GUSBCFG &= ~(GUSBCFG_srpcap | GUSBCFG_hnpcapp);
 410
 411     /* perform device model specific init */
 412     core_dev_init();
 413
 414     /* Reconnect */
 415     DCTL &= ~DCTL_sftdiscon;
 416 }
 417
 418 static void enable_global_interrupts(void)
 419 {
 420     VIC_INT_ENABLE = INTERRUPT_USB;
 421     GAHBCFG |= GAHBCFG_glblintrmsk;
 422 }
 423
 424 static void disable_global_interrupts(void)
 425 {
 426     GAHBCFG &= ~GAHBCFG_glblintrmsk;
 427     VIC_INT_EN_CLEAR = INTERRUPT_USB;
 428 }
 429
 430 void usb_drv_init(void)
 431 {
 432     unsigned i, ep;
 433     logf("usb_drv_init");
 434     /* Boost cpu */
 435     cpu_boost(1);
 436     /* Enable PHY and clocks (but leave pullups disabled) */
 437     as3525v2_connect();
 438     logf("usb-drv: synopsis id: %lx", GSNPSID);
 439     /* Core init */
 440     core_init();
 441     FOR_EACH_IN_EP_AND_EP0(i, ep)
 442         wakeup_init(&endpoints[ep][DIR_IN].complete);
 443     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 444         wakeup_init(&endpoints[ep][DIR_OUT].complete);
 445     /* Enable global interrupts */
 446     enable_global_interrupts();
 447 }
 448
 449 void usb_drv_exit(void)
 450 {
 451     logf("usb_drv_exit");
 452
 453     disable_global_interrupts();
 454     as3525v2_disconnect();
 455     cpu_boost(0);
 456 }
 457
 458 static void handle_ep_int(int ep, bool dir_in)
 459 {
 460     struct usb_endpoint *endpoint = &endpoints[ep][dir_in];
 461     if(dir_in)
 462     {
 463         if(DIEPINT(ep) & DIEPINT_ahberr)
 464             panicf("usb-drv: ahb error on EP%d IN", ep);
 465         if(DIEPINT(ep) & DIEPINT_xfercompl)
 466         {
 467             logf("usb-drv: xfer complete on EP%d IN", ep);
 468             if(endpoint->busy)
 469             {
 470                 endpoint->busy = false;
 471                 endpoint->status = 0;
 472                 /* works even for PE0 */
 473                 int transfered = endpoint->len - (DIEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 474                 logf("len=%d reg=%ld xfer=%d", endpoint->len,
 475                     (DIEPTSIZ(ep) & DEPTSIZ_xfersize_bits),
 476                     transfered);
 477                 invalidate_dcache_range((void *)DIEPDMA(ep), transfered);
 478                 DIEPCTL(ep) |= DEPCTL_snak;
 479                 /* handle EP0 state if necessary,
 480                  * this is a ack if length is 0 */
 481                 if(ep == 0)
 482                     handle_ep0_complete(endpoint->len == 0);
 483                 usb_core_transfer_complete(ep, USB_DIR_IN, 0, transfered);
 484                 wakeup_signal(&endpoint->complete);
 485             }
 486         }
 487         if(DIEPINT(ep) & DIEPINT_timeout)
 488         {
 489             panicf("usb-drv: timeout on EP%d IN", ep);
 490             if(endpoint->busy)
 491             {
 492                 endpoint->busy = false;
 493                 endpoint->status = 1;
 494                 /* for safety, act as if no bytes as been transfered */
 495                 endpoint->len = 0;
 496                 DIEPCTL(ep) |= DEPCTL_snak;
 497                 usb_core_transfer_complete(ep, USB_DIR_IN, 1, 0);
 498                 wakeup_signal(&endpoint->complete);
 499             }
 500         }
 501         /* clear interrupts */
 502         DIEPINT(ep) = DIEPINT(ep);
 503     }
 504     else
 505     {
 506         if(DOEPINT(ep) & DOEPINT_ahberr)
 507             panicf("usb-drv: ahb error on EP%d OUT", ep);
 508         if(DOEPINT(ep) & DOEPINT_xfercompl)
 509         {
 510             logf("usb-drv: xfer complete on EP%d OUT", ep);
 511             if(endpoint->busy)
 512             {
 513                 endpoint->busy = false;
 514                 endpoint->status = 0;
 515                 /* works even for EP0 */
 516                 int transfered = endpoint->len - (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 517                 logf("len=%d reg=%ld xfer=%d", endpoint->len,
 518                     (DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits),
 519                     transfered);
 520                 invalidate_dcache_range((void *)DOEPDMA(ep), transfered);
 521                 /* handle EP0 state if necessary,
 522                  * this is a ack if length is 0 */
 523                 if(ep == 0)
 524                     handle_ep0_complete(endpoint->len == 0);
 525                 else
 526                     DOEPCTL(ep) |= DEPCTL_snak;
 527                 usb_core_transfer_complete(ep, USB_DIR_OUT, 0, transfered);
 528                 wakeup_signal(&endpoint->complete);
 529             }
 530         }
 531         if(DOEPINT(ep) & DOEPINT_setup)
 532         {
 533             logf("usb-drv: setup on EP%d OUT", ep);
 534             if(ep != 0)
 535                 panicf("usb-drv: setup not on EP0, this is impossible");
 536             if((DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits) != 0)
 537             {
 538                 logf("usb-drv: ignore spurious setup (xfersize=%ld)", DOEPTSIZ(ep) & DEPTSIZ_xfersize_bits);
 539             }
 540             else
 541             {
 542                 DOEPCTL(ep) |= DEPCTL_snak;
 543                 logf("DOEPCTL0=%lx", DOEPCTL(ep));
 544                 logf("DOEPTSIZE0=%lx", DOEPTSIZ(ep));
 545                 if(DOEPDMA(ep) != 8 + (unsigned long)&ep0_setup_pkt)
 546                     panicf("usb-drv: EP0 wrong DMA adr (%lx vs %lx)", (unsigned long)&ep0_setup_pkt, DOEPDMA(ep));
 547                 /* handle the set address here because of a bug in the usb core */
 548                 invalidate_dcache_range((void*)&ep0_setup_pkt, sizeof ep0_setup_pkt);
 549                 /* handle EP0 state */
 550                 handle_ep0_setup();
 551                 logf("  rt=%x r=%x", ep0_setup_pkt.bRequestType, ep0_setup_pkt.bRequest);
 552                 if(ep0_setup_pkt.bRequestType == USB_TYPE_STANDARD &&
 553                         ep0_setup_pkt.bRequest == USB_REQ_SET_ADDRESS)
 554                     usb_drv_set_address(ep0_setup_pkt.wValue);
 555                 usb_core_control_request(&ep0_setup_pkt);
 556             }
 557         }
 558         /* clear interrupts */
 559         DOEPINT(ep) = DOEPINT(ep);
 560     }
 561 }
 562
 563 static void handle_ep_ints(void)
 564 {
 565     logf("usb-drv: ep int");
 566     /* we must read it */
 567     unsigned long daint = DAINT;
 568     unsigned i, ep;
 569
 570     FOR_EACH_IN_EP_AND_EP0(i, ep)
 571         if(daint & DAINT_IN_EP(ep))
 572             handle_ep_int(ep, true);
 573     FOR_EACH_OUT_EP_AND_EP0(i, ep)
 574         if(daint & DAINT_OUT_EP(ep))
 575             handle_ep_int(ep, false);
 576
 577     /* write back to clear status */
 578     DAINT = daint;
 579 }
 580
 581 /* interrupt service routine */
 582 void INT_USB(void)
 583 {
 584     /* some bits in GINTSTS can be set even though we didn't enable the interrupt source
 585      * so AND it with the actual mask */
 586     unsigned long sts = GINTSTS & GINTMSK;
 587
 588     if(sts & GINTMSK_usbreset)
 589     {
 590         logf("usb-drv: bus reset");
 591
 592         /* Clear the Remote Wakeup Signalling */
 593         //DCTL &= ~DCTL_rmtwkupsig;
 594
 595         /* Flush FIFOs */
 596         flush_tx_fifos(0x10);
 597
 598         reset_endpoints();
 599
 600         /* Reset Device Address */
 601         DCFG &= ~bitm(DCFG, devadr);
 602
 603         usb_core_bus_reset();
 604     }
 605
 606     if(sts & GINTMSK_enumdone)
 607     {
 608         logf("usb-drv: enum done");
 609
 610         /* read speed */
 611         if(usb_drv_port_speed())
 612             logf("usb-drv: HS");
 613         else
 614             logf("usb-drv: FS");
 615
 616         /* fixme: change EP0 mps here */
 617         prepare_setup_ep0();
 618     }
 619
 620     if(sts & (GINTMSK_outepintr | GINTMSK_inepintr))
 621     {
 622         handle_ep_ints();
 623     }
 624
 625     if(sts & GINTMSK_disconnect)
 626     {
 627         panicf("usb-drv: disconnect");
 628         cancel_all_transfers(true);
 629         usb_enable(false);
 630     }
 631
 632     GINTSTS = GINTSTS;
 633 }
 634
 635 int usb_drv_port_speed(void)
 636 {
 637     switch(extract(DSTS, enumspd))
 638     {
 639         case DSTS_ENUMSPD_HS_PHY_30MHZ_OR_60MHZ:
 640             return 1;
 641         case DSTS_ENUMSPD_FS_PHY_30MHZ_OR_60MHZ:
 642         case DSTS_ENUMSPD_FS_PHY_48MHZ:
 643             return 0;
 644             break;
 645         case DSTS_ENUMSPD_LS_PHY_6MHZ:
 646             panicf("usb-drv: LS is not supported");
 647             return 0;
 648         default:
 649             panicf("usb-drv: wtf is this speed ?");
 650             return 0;
 651     }
 652 }
 653
 654 int usb_drv_request_endpoint(int type, int dir)
 655 {
 656     (void) type;
 657     (void) dir;
 658     logf("usb-drv: request endpoint (type=%d,dir=%s)", type, dir == USB_DIR_IN ? "IN" : "OUT");
 659     return -1;
 660 }
 661
 662 void usb_drv_release_endpoint(int ep)
 663 {
 664     //logf("usb-drv: release EP%d %s", EP_NUM(ep), EP_DIR(ep) == DIR_IN ? "IN" : "OUT");
 665     endpoints[EP_NUM(ep)][EP_DIR(ep)].active = false;
 666 }
 667
 668 void usb_drv_cancel_all_transfers()
 669 {
 670     cancel_all_transfers(false);
 671 }
 672
 673 static int usb_drv_transfer(int ep, void *ptr, int len, bool dir_in, bool blocking)
 674 {
 675     ep = EP_NUM(ep);
 676     logf("usb-drv: xfer EP%d, len=%d, dir_in=%d, blocking=%d", ep,
 677         len, dir_in, blocking);
 678
 679     volatile unsigned long *epctl = dir_in ? &DIEPCTL(ep) : &DOEPCTL(ep);
 680     volatile unsigned long *eptsiz = dir_in ? &DIEPTSIZ(ep) : &DOEPTSIZ(ep);
 681     volatile unsigned long *epdma = dir_in ? &DIEPDMA(ep) : &DOEPDMA(ep);
 682     struct usb_endpoint *endpoint = &endpoints[ep][dir_in];
 683     #define DEPCTL  *epctl
 684     #define DEPTSIZ *eptsiz
 685     #define DEPDMA  *epdma
 686
 687     if(DEPCTL & DEPCTL_stall)
 688     {
 689         logf("usb-drv: cannot receive/send on a stalled endpoint");
 690         return -1;
 691     }
 692
 693     if(endpoint->busy)
 694         logf("usb-drv: EP%d %s is already busy", ep, dir_in ? "IN" : "OUT");
 695
 696     endpoint->busy = true;
 697     endpoint->len = len;
 698     endpoint->wait = blocking;
 699     DEPCTL |= DEPCTL_usbactep;
 700
 701     int mps = 64;
 702     int nb_packets = (len + mps - 1) / mps;
 703
 704     if(len == 0)
 705         DEPTSIZ = 1 << DEPTSIZ_pkcnt_bitp;
 706     else
 707         DEPTSIZ = (nb_packets << DEPTSIZ_pkcnt_bitp) | len;
 708     clean_dcache_range(ptr, len);
 709     DEPDMA = (unsigned long)ptr;
 710     DEPCTL |= DEPCTL_epena | DEPCTL_cnak;
 711
 712     /* fixme: check if endpoint was really enabled ? */
 713     if((DEPCTL & DEPCTL_epena) == 0)
 714         panicf("usb-drv: couldn't start xfer on EP%d %s", ep, dir_in ? "IN" : "OUT");
 715
 716     if(blocking)
 717         wakeup_wait(&endpoint->complete, TIMEOUT_BLOCK);
 718     if(endpoint->status != 0)
 719         return -1;
 720     return 0;
 721
 722     #undef DEPCTL
 723     #undef DEPTSIZ
 724     #undef DEPDMA
 725 }
 726
 727 int usb_drv_recv(int ep, void *ptr, int len)
 728 {
 729     return usb_drv_transfer(ep, ptr, len, false, false);
 730 }
 731
 732 int usb_drv_send(int ep, void *ptr, int len)
 733 {
 734     return usb_drv_transfer(ep, ptr, len, true, true);
 735 }
 736
 737 int usb_drv_send_nonblocking(int ep, void *ptr, int len)
 738 {
 739     return usb_drv_transfer(ep, ptr, len, true, false);
 740 }
 741
 742
 743 void usb_drv_set_test_mode(int mode)
 744 {
 745     (void) mode;
 746 }
 747
 748 void usb_drv_set_address(int address)
 749 {
 750     /* ignore it if addres is already set */
 751     if(extract(DCFG, devadr) == 0)
 752     {
 753         logf("usb-drv: set address %x", address);
 754         DCFG = (DCFG & ~bitm(DCFG, devadr)) | (address << DCFG_devadr_bitp);
 755     }
 756 }
 757
 758 void usb_drv_stall(int ep, bool stall, bool in)
 759 {
 760     (void) ep;
 761     (void) stall;
 762     (void) in;
 763     logf("usb-drv: %sstall EP%d %s", stall ? "" : "un", ep, in ? "IN" : "OUT");
 764 }
 765
 766 bool usb_drv_stalled(int ep, bool in)
 767 {
 768     (void) ep;
 769     (void) in;
 770     return true;
 771 }
 772